This source file includes following definitions.
- mxs_dmaengine_prep_pio
1
2 #ifndef _MXS_DMA_H_
3 #define _MXS_DMA_H_
4
5 #include <linux/dmaengine.h>
6
7 #define MXS_DMA_CTRL_WAIT4END BIT(31)
8 #define MXS_DMA_CTRL_WAIT4RDY BIT(30)
9
10
11
12
13
14
15
16 static inline struct dma_async_tx_descriptor *mxs_dmaengine_prep_pio(
17 struct dma_chan *chan, u32 *pio, unsigned int npio,
18 enum dma_transfer_direction dir, unsigned long flags)
19 {
20 return dmaengine_prep_slave_sg(chan, (struct scatterlist *)pio, npio,
21 dir, flags);
22 }
23
24 #endif