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7 #ifndef _LINUX_WM97XX_H
8 #define _LINUX_WM97XX_H
9
10 #include <sound/core.h>
11 #include <sound/pcm.h>
12 #include <sound/ac97_codec.h>
13 #include <sound/initval.h>
14 #include <linux/types.h>
15 #include <linux/list.h>
16 #include <linux/input.h>
17 #include <linux/platform_device.h>
18
19
20
21
22 #define WM97xx_GENERIC 0x0000
23 #define WM97xx_WM1613 0x1613
24
25
26
27
28 #define AC97_WM97XX_DIGITISER1 0x76
29 #define AC97_WM97XX_DIGITISER2 0x78
30 #define AC97_WM97XX_DIGITISER_RD 0x7a
31 #define AC97_WM9713_DIG1 0x74
32 #define AC97_WM9713_DIG2 AC97_WM97XX_DIGITISER1
33 #define AC97_WM9713_DIG3 AC97_WM97XX_DIGITISER2
34
35
36
37
38 #define WM97XX_POLL 0x8000
39 #define WM97XX_ADCSEL_X 0x1000
40 #define WM97XX_ADCSEL_Y 0x2000
41 #define WM97XX_ADCSEL_PRES 0x3000
42 #define WM97XX_AUX_ID1 0x4000
43 #define WM97XX_AUX_ID2 0x5000
44 #define WM97XX_AUX_ID3 0x6000
45 #define WM97XX_AUX_ID4 0x7000
46 #define WM97XX_ADCSEL_MASK 0x7000
47 #define WM97XX_COO 0x0800
48 #define WM97XX_CTC 0x0400
49 #define WM97XX_CM_RATE_93 0x0000
50 #define WM97XX_CM_RATE_187 0x0100
51 #define WM97XX_CM_RATE_375 0x0200
52 #define WM97XX_CM_RATE_750 0x0300
53 #define WM97XX_CM_RATE_8K 0x00f0
54 #define WM97XX_CM_RATE_12K 0x01f0
55 #define WM97XX_CM_RATE_24K 0x02f0
56 #define WM97XX_CM_RATE_48K 0x03f0
57 #define WM97XX_CM_RATE_MASK 0x03f0
58 #define WM97XX_RATE(i) (((i & 3) << 8) | ((i & 4) ? 0xf0 : 0))
59 #define WM97XX_DELAY(i) ((i << 4) & 0x00f0)
60 #define WM97XX_DELAY_MASK 0x00f0
61 #define WM97XX_SLEN 0x0008
62 #define WM97XX_SLT(i) ((i - 5) & 0x7)
63 #define WM97XX_SLT_MASK 0x0007
64 #define WM97XX_PRP_DETW 0x4000
65 #define WM97XX_PRP_DET 0x8000
66 #define WM97XX_PRP_DET_DIG 0xc000
67 #define WM97XX_RPR 0x2000
68 #define WM97XX_PEN_DOWN 0x8000
69
70
71 #define WM9712_45W 0x1000
72 #define WM9712_PDEN 0x0800
73 #define WM9712_WAIT 0x0200
74 #define WM9712_PIL 0x0100
75 #define WM9712_MASK_HI 0x0040
76 #define WM9712_MASK_EDGE 0x0080
77 #define WM9712_MASK_SYNC 0x00c0
78 #define WM9712_RPU(i) (i&0x3f)
79 #define WM9712_PD(i) (0x1 << i)
80
81
82 #define AC97_WM9712_POWER 0x24
83 #define AC97_WM9712_REV 0x58
84
85
86 #define WM9705_PDEN 0x1000
87 #define WM9705_PINV 0x0800
88 #define WM9705_BSEN 0x0400
89 #define WM9705_BINV 0x0200
90 #define WM9705_WAIT 0x0100
91 #define WM9705_PIL 0x0080
92 #define WM9705_PHIZ 0x0040
93 #define WM9705_MASK_HI 0x0010
94 #define WM9705_MASK_EDGE 0x0020
95 #define WM9705_MASK_SYNC 0x0030
96 #define WM9705_PDD(i) (i & 0x000f)
97
98
99
100 #define WM9713_PDPOL 0x0400
101 #define WM9713_POLL 0x0200
102 #define WM9713_CTC 0x0100
103 #define WM9713_ADCSEL_X 0x0002
104 #define WM9713_ADCSEL_Y 0x0004
105 #define WM9713_ADCSEL_PRES 0x0008
106 #define WM9713_COO 0x0001
107 #define WM9713_45W 0x1000
108 #define WM9713_PDEN 0x0800
109 #define WM9713_ADCSEL_MASK 0x00fe
110 #define WM9713_WAIT 0x0200
111
112
113 #define TS_COMP1 0x0
114 #define TS_COMP2 0x1
115 #define TS_BMON 0x2
116 #define TS_WIPER 0x3
117
118
119 #define WM97XX_ID1 0x574d
120 #define WM9712_ID2 0x4c12
121 #define WM9705_ID2 0x4c05
122 #define WM9713_ID2 0x4c13
123
124
125 #define WM97XX_MAX_GPIO 16
126 #define WM97XX_GPIO_1 (1 << 1)
127 #define WM97XX_GPIO_2 (1 << 2)
128 #define WM97XX_GPIO_3 (1 << 3)
129 #define WM97XX_GPIO_4 (1 << 4)
130 #define WM97XX_GPIO_5 (1 << 5)
131 #define WM97XX_GPIO_6 (1 << 6)
132 #define WM97XX_GPIO_7 (1 << 7)
133 #define WM97XX_GPIO_8 (1 << 8)
134 #define WM97XX_GPIO_9 (1 << 9)
135 #define WM97XX_GPIO_10 (1 << 10)
136 #define WM97XX_GPIO_11 (1 << 11)
137 #define WM97XX_GPIO_12 (1 << 12)
138 #define WM97XX_GPIO_13 (1 << 13)
139 #define WM97XX_GPIO_14 (1 << 14)
140 #define WM97XX_GPIO_15 (1 << 15)
141
142
143 #define AC97_LINK_FRAME 21
144
145
146
147
148
149 #define RC_AGAIN 0x00000001
150
151 #define RC_VALID 0x00000002
152
153 #define RC_PENUP 0x00000004
154
155
156
157 #define RC_PENDOWN 0x00000008
158
159
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162
163
164
165 struct wm97xx_data {
166 int x;
167 int y;
168 int p;
169 };
170
171
172
173
174 enum wm97xx_gpio_status {
175 WM97XX_GPIO_HIGH,
176 WM97XX_GPIO_LOW
177 };
178
179
180
181
182 enum wm97xx_gpio_dir {
183 WM97XX_GPIO_IN,
184 WM97XX_GPIO_OUT
185 };
186
187
188
189
190 enum wm97xx_gpio_pol {
191 WM97XX_GPIO_POL_HIGH,
192 WM97XX_GPIO_POL_LOW
193 };
194
195
196
197
198 enum wm97xx_gpio_sticky {
199 WM97XX_GPIO_STICKY,
200 WM97XX_GPIO_NOTSTICKY
201 };
202
203
204
205
206 enum wm97xx_gpio_wake {
207 WM97XX_GPIO_WAKE,
208 WM97XX_GPIO_NOWAKE
209 };
210
211
212
213
214 #define WM97XX_DIG_START 0x1
215 #define WM97XX_DIG_STOP 0x2
216 #define WM97XX_PHY_INIT 0x3
217 #define WM97XX_AUX_PREPARE 0x4
218 #define WM97XX_DIG_RESTORE 0x5
219
220 struct wm97xx;
221
222 extern struct wm97xx_codec_drv wm9705_codec;
223 extern struct wm97xx_codec_drv wm9712_codec;
224 extern struct wm97xx_codec_drv wm9713_codec;
225
226
227
228
229 struct wm97xx_codec_drv {
230 u16 id;
231 char *name;
232
233
234 int (*poll_sample) (struct wm97xx *, int adcsel, int *sample);
235
236
237 int (*poll_touch) (struct wm97xx *, struct wm97xx_data *);
238
239 int (*acc_enable) (struct wm97xx *, int enable);
240 void (*phy_init) (struct wm97xx *);
241 void (*dig_enable) (struct wm97xx *, int enable);
242 void (*dig_restore) (struct wm97xx *);
243 void (*aux_prepare) (struct wm97xx *);
244 };
245
246
247
248 struct wm97xx_mach_ops {
249
250
251 int acc_enabled;
252 void (*acc_pen_up) (struct wm97xx *);
253 int (*acc_pen_down) (struct wm97xx *);
254 int (*acc_startup) (struct wm97xx *);
255 void (*acc_shutdown) (struct wm97xx *);
256
257
258 void (*irq_enable) (struct wm97xx *, int enable);
259
260
261 int irq_gpio;
262
263
264 void (*pre_sample) (int);
265 void (*post_sample) (int);
266 };
267
268 struct wm97xx {
269 u16 dig[3], id, gpio[6], misc;
270 u16 dig_save[3];
271 struct wm97xx_codec_drv *codec;
272 struct input_dev *input_dev;
273 struct snd_ac97 *ac97;
274 struct device *dev;
275 struct platform_device *battery_dev;
276 struct platform_device *touch_dev;
277 struct wm97xx_mach_ops *mach_ops;
278 struct mutex codec_mutex;
279 struct delayed_work ts_reader;
280 unsigned long ts_reader_interval;
281 unsigned long ts_reader_min_interval;
282 unsigned int pen_irq;
283 struct workqueue_struct *ts_workq;
284 struct work_struct pen_event_work;
285 u16 acc_slot;
286 u16 acc_rate;
287 unsigned pen_is_down:1;
288 unsigned aux_waiting:1;
289 unsigned pen_probably_down:1;
290 u16 variant;
291 u16 suspend_mode;
292 };
293
294 struct wm97xx_batt_pdata {
295 int batt_aux;
296 int temp_aux;
297 int charge_gpio;
298 int min_voltage;
299 int max_voltage;
300 int batt_div;
301 int batt_mult;
302 int temp_div;
303 int temp_mult;
304 int batt_tech;
305 char *batt_name;
306 };
307
308 struct wm97xx_pdata {
309 struct wm97xx_batt_pdata *batt_pdata;
310 };
311
312
313
314
315
316 enum wm97xx_gpio_status wm97xx_get_gpio(struct wm97xx *wm, u32 gpio);
317 void wm97xx_set_gpio(struct wm97xx *wm, u32 gpio,
318 enum wm97xx_gpio_status status);
319 void wm97xx_config_gpio(struct wm97xx *wm, u32 gpio,
320 enum wm97xx_gpio_dir dir,
321 enum wm97xx_gpio_pol pol,
322 enum wm97xx_gpio_sticky sticky,
323 enum wm97xx_gpio_wake wake);
324
325 void wm97xx_set_suspend_mode(struct wm97xx *wm, u16 mode);
326
327
328 int wm97xx_reg_read(struct wm97xx *wm, u16 reg);
329 void wm97xx_reg_write(struct wm97xx *wm, u16 reg, u16 val);
330
331
332 int wm97xx_read_aux_adc(struct wm97xx *wm, u16 adcsel);
333
334
335 int wm97xx_register_mach_ops(struct wm97xx *, struct wm97xx_mach_ops *);
336 void wm97xx_unregister_mach_ops(struct wm97xx *);
337
338 #endif