This source file includes following definitions.
- gpiochip_add
- gpiochip_populate_parent_fwspec_twocell
- gpiochip_populate_parent_fwspec_fourcell
- gpiochip_irqchip_add
- gpiochip_irqchip_add_nested
- gpiochip_irqchip_add
- gpiochip_irqchip_add_nested
- gpiochip_add_pin_range
- gpiochip_add_pingroup_range
- gpiochip_remove_pin_ranges
- gpiod_to_chip
- gpiochip_lock_as_irq
- gpiochip_unlock_as_irq
1
2 #ifndef __LINUX_GPIO_DRIVER_H
3 #define __LINUX_GPIO_DRIVER_H
4
5 #include <linux/device.h>
6 #include <linux/types.h>
7 #include <linux/irq.h>
8 #include <linux/irqchip/chained_irq.h>
9 #include <linux/irqdomain.h>
10 #include <linux/lockdep.h>
11 #include <linux/pinctrl/pinctrl.h>
12 #include <linux/pinctrl/pinconf-generic.h>
13
14 struct gpio_desc;
15 struct of_phandle_args;
16 struct device_node;
17 struct seq_file;
18 struct gpio_device;
19 struct module;
20 enum gpiod_flags;
21 enum gpio_lookup_flags;
22
23 struct gpio_chip;
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28 struct gpio_irq_chip {
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34 struct irq_chip *chip;
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42 struct irq_domain *domain;
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49 const struct irq_domain_ops *domain_ops;
50
51 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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58 struct fwnode_handle *fwnode;
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68 struct irq_domain *parent_domain;
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87 int (*child_to_parent_hwirq)(struct gpio_chip *chip,
88 unsigned int child_hwirq,
89 unsigned int child_type,
90 unsigned int *parent_hwirq,
91 unsigned int *parent_type);
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102 void (*populate_parent_fwspec)(struct gpio_chip *chip,
103 struct irq_fwspec *fwspec,
104 unsigned int parent_hwirq,
105 unsigned int parent_type);
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115 unsigned int (*child_offset_to_irq)(struct gpio_chip *chip,
116 unsigned int pin);
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126 struct irq_domain_ops child_irq_domain_ops;
127 #endif
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135 irq_flow_handler_t handler;
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143 unsigned int default_type;
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150 struct lock_class_key *lock_key;
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157 struct lock_class_key *request_key;
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165 irq_flow_handler_t parent_handler;
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173 void *parent_handler_data;
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180 unsigned int num_parents;
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188 unsigned int *parents;
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195 unsigned int *map;
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202 bool threaded;
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210 int (*init_hw)(struct gpio_chip *chip);
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221 void (*init_valid_mask)(struct gpio_chip *chip,
222 unsigned long *valid_mask,
223 unsigned int ngpios);
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231 unsigned long *valid_mask;
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239 unsigned int first;
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246 void (*irq_enable)(struct irq_data *data);
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253 void (*irq_disable)(struct irq_data *data);
254 };
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340 struct gpio_chip {
341 const char *label;
342 struct gpio_device *gpiodev;
343 struct device *parent;
344 struct module *owner;
345
346 int (*request)(struct gpio_chip *chip,
347 unsigned offset);
348 void (*free)(struct gpio_chip *chip,
349 unsigned offset);
350 int (*get_direction)(struct gpio_chip *chip,
351 unsigned offset);
352 int (*direction_input)(struct gpio_chip *chip,
353 unsigned offset);
354 int (*direction_output)(struct gpio_chip *chip,
355 unsigned offset, int value);
356 int (*get)(struct gpio_chip *chip,
357 unsigned offset);
358 int (*get_multiple)(struct gpio_chip *chip,
359 unsigned long *mask,
360 unsigned long *bits);
361 void (*set)(struct gpio_chip *chip,
362 unsigned offset, int value);
363 void (*set_multiple)(struct gpio_chip *chip,
364 unsigned long *mask,
365 unsigned long *bits);
366 int (*set_config)(struct gpio_chip *chip,
367 unsigned offset,
368 unsigned long config);
369 int (*to_irq)(struct gpio_chip *chip,
370 unsigned offset);
371
372 void (*dbg_show)(struct seq_file *s,
373 struct gpio_chip *chip);
374
375 int (*init_valid_mask)(struct gpio_chip *chip,
376 unsigned long *valid_mask,
377 unsigned int ngpios);
378
379 int base;
380 u16 ngpio;
381 const char *const *names;
382 bool can_sleep;
383
384 #if IS_ENABLED(CONFIG_GPIO_GENERIC)
385 unsigned long (*read_reg)(void __iomem *reg);
386 void (*write_reg)(void __iomem *reg, unsigned long data);
387 bool be_bits;
388 void __iomem *reg_dat;
389 void __iomem *reg_set;
390 void __iomem *reg_clr;
391 void __iomem *reg_dir_out;
392 void __iomem *reg_dir_in;
393 bool bgpio_dir_unreadable;
394 int bgpio_bits;
395 spinlock_t bgpio_lock;
396 unsigned long bgpio_data;
397 unsigned long bgpio_dir;
398 #endif
399
400 #ifdef CONFIG_GPIOLIB_IRQCHIP
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412 struct gpio_irq_chip irq;
413 #endif
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421 unsigned long *valid_mask;
422
423 #if defined(CONFIG_OF_GPIO)
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434 struct device_node *of_node;
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441 unsigned int of_gpio_n_cells;
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449 int (*of_xlate)(struct gpio_chip *gc,
450 const struct of_phandle_args *gpiospec, u32 *flags);
451 #endif
452 };
453
454 extern const char *gpiochip_is_requested(struct gpio_chip *chip,
455 unsigned offset);
456
457
458 extern int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
459 struct lock_class_key *lock_key,
460 struct lock_class_key *request_key);
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485 #ifdef CONFIG_LOCKDEP
486 #define gpiochip_add_data(chip, data) ({ \
487 static struct lock_class_key lock_key; \
488 static struct lock_class_key request_key; \
489 gpiochip_add_data_with_key(chip, data, &lock_key, \
490 &request_key); \
491 })
492 #else
493 #define gpiochip_add_data(chip, data) gpiochip_add_data_with_key(chip, data, NULL, NULL)
494 #endif
495
496 static inline int gpiochip_add(struct gpio_chip *chip)
497 {
498 return gpiochip_add_data(chip, NULL);
499 }
500 extern void gpiochip_remove(struct gpio_chip *chip);
501 extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
502 void *data);
503
504 extern struct gpio_chip *gpiochip_find(void *data,
505 int (*match)(struct gpio_chip *chip, void *data));
506
507 bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset);
508 int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset);
509 void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset);
510 void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset);
511 void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset);
512
513
514 bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset);
515 bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset);
516
517
518 bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset);
519 bool gpiochip_line_is_valid(const struct gpio_chip *chip, unsigned int offset);
520
521
522 void *gpiochip_get_data(struct gpio_chip *chip);
523
524 struct bgpio_pdata {
525 const char *label;
526 int base;
527 int ngpio;
528 };
529
530 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
531
532 void gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
533 struct irq_fwspec *fwspec,
534 unsigned int parent_hwirq,
535 unsigned int parent_type);
536 void gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
537 struct irq_fwspec *fwspec,
538 unsigned int parent_hwirq,
539 unsigned int parent_type);
540
541 #else
542
543 static inline void gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
544 struct irq_fwspec *fwspec,
545 unsigned int parent_hwirq,
546 unsigned int parent_type)
547 {
548 }
549
550 static inline void gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
551 struct irq_fwspec *fwspec,
552 unsigned int parent_hwirq,
553 unsigned int parent_type)
554 {
555 }
556
557 #endif
558
559 int bgpio_init(struct gpio_chip *gc, struct device *dev,
560 unsigned long sz, void __iomem *dat, void __iomem *set,
561 void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
562 unsigned long flags);
563
564 #define BGPIOF_BIG_ENDIAN BIT(0)
565 #define BGPIOF_UNREADABLE_REG_SET BIT(1)
566 #define BGPIOF_UNREADABLE_REG_DIR BIT(2)
567 #define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
568 #define BGPIOF_READ_OUTPUT_REG_SET BIT(4)
569 #define BGPIOF_NO_OUTPUT BIT(5)
570
571 int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
572 irq_hw_number_t hwirq);
573 void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq);
574
575 int gpiochip_irq_domain_activate(struct irq_domain *domain,
576 struct irq_data *data, bool reserve);
577 void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
578 struct irq_data *data);
579
580 void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
581 struct irq_chip *irqchip,
582 unsigned int parent_irq,
583 irq_flow_handler_t parent_handler);
584
585 void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
586 struct irq_chip *irqchip,
587 unsigned int parent_irq);
588
589 int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
590 struct irq_chip *irqchip,
591 unsigned int first_irq,
592 irq_flow_handler_t handler,
593 unsigned int type,
594 bool threaded,
595 struct lock_class_key *lock_key,
596 struct lock_class_key *request_key);
597
598 bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
599 unsigned int offset);
600
601 #ifdef CONFIG_LOCKDEP
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609 static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
610 struct irq_chip *irqchip,
611 unsigned int first_irq,
612 irq_flow_handler_t handler,
613 unsigned int type)
614 {
615 static struct lock_class_key lock_key;
616 static struct lock_class_key request_key;
617
618 return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
619 handler, type, false,
620 &lock_key, &request_key);
621 }
622
623 static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
624 struct irq_chip *irqchip,
625 unsigned int first_irq,
626 irq_flow_handler_t handler,
627 unsigned int type)
628 {
629
630 static struct lock_class_key lock_key;
631 static struct lock_class_key request_key;
632
633 return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
634 handler, type, true,
635 &lock_key, &request_key);
636 }
637 #else
638 static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
639 struct irq_chip *irqchip,
640 unsigned int first_irq,
641 irq_flow_handler_t handler,
642 unsigned int type)
643 {
644 return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
645 handler, type, false, NULL, NULL);
646 }
647
648 static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
649 struct irq_chip *irqchip,
650 unsigned int first_irq,
651 irq_flow_handler_t handler,
652 unsigned int type)
653 {
654 return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
655 handler, type, true, NULL, NULL);
656 }
657 #endif
658
659 int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset);
660 void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset);
661 int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
662 unsigned long config);
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669
670 struct gpio_pin_range {
671 struct list_head node;
672 struct pinctrl_dev *pctldev;
673 struct pinctrl_gpio_range range;
674 };
675
676 #ifdef CONFIG_PINCTRL
677
678 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
679 unsigned int gpio_offset, unsigned int pin_offset,
680 unsigned int npins);
681 int gpiochip_add_pingroup_range(struct gpio_chip *chip,
682 struct pinctrl_dev *pctldev,
683 unsigned int gpio_offset, const char *pin_group);
684 void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
685
686 #else
687
688 static inline int
689 gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
690 unsigned int gpio_offset, unsigned int pin_offset,
691 unsigned int npins)
692 {
693 return 0;
694 }
695 static inline int
696 gpiochip_add_pingroup_range(struct gpio_chip *chip,
697 struct pinctrl_dev *pctldev,
698 unsigned int gpio_offset, const char *pin_group)
699 {
700 return 0;
701 }
702
703 static inline void
704 gpiochip_remove_pin_ranges(struct gpio_chip *chip)
705 {
706 }
707
708 #endif
709
710 struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
711 const char *label,
712 enum gpio_lookup_flags lflags,
713 enum gpiod_flags dflags);
714 void gpiochip_free_own_desc(struct gpio_desc *desc);
715
716 void devprop_gpiochip_set_names(struct gpio_chip *chip,
717 const struct fwnode_handle *fwnode);
718
719 #ifdef CONFIG_GPIOLIB
720
721
722 int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
723 void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
724
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726 struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
727
728 #else
729
730 static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
731 {
732
733 WARN_ON(1);
734 return ERR_PTR(-ENODEV);
735 }
736
737 static inline int gpiochip_lock_as_irq(struct gpio_chip *chip,
738 unsigned int offset)
739 {
740 WARN_ON(1);
741 return -EINVAL;
742 }
743
744 static inline void gpiochip_unlock_as_irq(struct gpio_chip *chip,
745 unsigned int offset)
746 {
747 WARN_ON(1);
748 }
749 #endif
750
751 #endif