root/include/linux/mmc/host.h

INCLUDED FROM

DEFINITIONS

1. mmc_priv
2. mmc_from_priv
3. sdio_irq_claimed
4. mmc_signal_sdio_irq
5. mmc_regulator_set_ocr
6. mmc_regulator_set_vqmmc
7. mmc_card_is_removable
8. mmc_card_keep_power
9. mmc_card_wake_sdio_irq
10. mmc_card_hs
11. mmc_card_uhs
12. mmc_retune_needed
13. mmc_can_retune
14. mmc_doing_retune
15. mmc_get_dma_dir

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  *  linux/include/linux/mmc/host.h
   4  *
   5  *  Host driver specific definitions.
   6  */
   7 #ifndef LINUX_MMC_HOST_H
   8 #define LINUX_MMC_HOST_H
   9 
  10 #include <linux/sched.h>
  11 #include <linux/device.h>
  12 #include <linux/fault-inject.h>
  13 
  14 #include <linux/mmc/core.h>
  15 #include <linux/mmc/card.h>
  16 #include <linux/mmc/pm.h>
  17 #include <linux/dma-direction.h>
  18 
  19 struct mmc_ios {
  20         unsigned int    clock;                  /* clock rate */
  21         unsigned short  vdd;
  22         unsigned int    power_delay_ms;         /* waiting for stable power */
  23 
  24 /* vdd stores the bit number of the selected voltage range from below. */
  25 
  26         unsigned char   bus_mode;               /* command output mode */
  27 
  28 #define MMC_BUSMODE_OPENDRAIN   1
  29 #define MMC_BUSMODE_PUSHPULL    2
  30 
  31         unsigned char   chip_select;            /* SPI chip select */
  32 
  33 #define MMC_CS_DONTCARE         0
  34 #define MMC_CS_HIGH             1
  35 #define MMC_CS_LOW              2
  36 
  37         unsigned char   power_mode;             /* power supply mode */
  38 
  39 #define MMC_POWER_OFF           0
  40 #define MMC_POWER_UP            1
  41 #define MMC_POWER_ON            2
  42 #define MMC_POWER_UNDEFINED     3
  43 
  44         unsigned char   bus_width;              /* data bus width */
  45 
  46 #define MMC_BUS_WIDTH_1         0
  47 #define MMC_BUS_WIDTH_4         2
  48 #define MMC_BUS_WIDTH_8         3
  49 
  50         unsigned char   timing;                 /* timing specification used */
  51 
  52 #define MMC_TIMING_LEGACY       0
  53 #define MMC_TIMING_MMC_HS       1
  54 #define MMC_TIMING_SD_HS        2
  55 #define MMC_TIMING_UHS_SDR12    3
  56 #define MMC_TIMING_UHS_SDR25    4
  57 #define MMC_TIMING_UHS_SDR50    5
  58 #define MMC_TIMING_UHS_SDR104   6
  59 #define MMC_TIMING_UHS_DDR50    7
  60 #define MMC_TIMING_MMC_DDR52    8
  61 #define MMC_TIMING_MMC_HS200    9
  62 #define MMC_TIMING_MMC_HS400    10
  63 
  64         unsigned char   signal_voltage;         /* signalling voltage (1.8V or 3.3V) */
  65 
  66 #define MMC_SIGNAL_VOLTAGE_330  0
  67 #define MMC_SIGNAL_VOLTAGE_180  1
  68 #define MMC_SIGNAL_VOLTAGE_120  2
  69 
  70         unsigned char   drv_type;               /* driver type (A, B, C, D) */
  71 
  72 #define MMC_SET_DRIVER_TYPE_B   0
  73 #define MMC_SET_DRIVER_TYPE_A   1
  74 #define MMC_SET_DRIVER_TYPE_C   2
  75 #define MMC_SET_DRIVER_TYPE_D   3
  76 
  77         bool enhanced_strobe;                   /* hs400es selection */
  78 };
  79 
  80 struct mmc_host;
  81 
  82 struct mmc_host_ops {
  83         /*
  84          * It is optional for the host to implement pre_req and post_req in
  85          * order to support double buffering of requests (prepare one
  86          * request while another request is active).
  87          * pre_req() must always be followed by a post_req().
  88          * To undo a call made to pre_req(), call post_req() with
  89          * a nonzero err condition.
  90          */
  91         void    (*post_req)(struct mmc_host *host, struct mmc_request *req,
  92                             int err);
  93         void    (*pre_req)(struct mmc_host *host, struct mmc_request *req);
  94         void    (*request)(struct mmc_host *host, struct mmc_request *req);
  95 
  96         /*
  97          * Avoid calling the next three functions too often or in a "fast
  98          * path", since underlaying controller might implement them in an
  99          * expensive and/or slow way. Also note that these functions might
 100          * sleep, so don't call them in the atomic contexts!
 101          */
 102 
 103         /*
 104          * Notes to the set_ios callback:
 105          * ios->clock might be 0. For some controllers, setting 0Hz
 106          * as any other frequency works. However, some controllers
 107          * explicitly need to disable the clock. Otherwise e.g. voltage
 108          * switching might fail because the SDCLK is not really quiet.
 109          */
 110         void    (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
 111 
 112         /*
 113          * Return values for the get_ro callback should be:
 114          *   0 for a read/write card
 115          *   1 for a read-only card
 116          *   -ENOSYS when not supported (equal to NULL callback)
 117          *   or a negative errno value when something bad happened
 118          */
 119         int     (*get_ro)(struct mmc_host *host);
 120 
 121         /*
 122          * Return values for the get_cd callback should be:
 123          *   0 for a absent card
 124          *   1 for a present card
 125          *   -ENOSYS when not supported (equal to NULL callback)
 126          *   or a negative errno value when something bad happened
 127          */
 128         int     (*get_cd)(struct mmc_host *host);
 129 
 130         void    (*enable_sdio_irq)(struct mmc_host *host, int enable);
 131         /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */
 132         void    (*ack_sdio_irq)(struct mmc_host *host);
 133 
 134         /* optional callback for HC quirks */
 135         void    (*init_card)(struct mmc_host *host, struct mmc_card *card);
 136 
 137         int     (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
 138 
 139         /* Check if the card is pulling dat[0:3] low */
 140         int     (*card_busy)(struct mmc_host *host);
 141 
 142         /* The tuning command opcode value is different for SD and eMMC cards */
 143         int     (*execute_tuning)(struct mmc_host *host, u32 opcode);
 144 
 145         /* Prepare HS400 target operating frequency depending host driver */
 146         int     (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
 147 
 148         /* Prepare switch to DDR during the HS400 init sequence */
 149         int     (*hs400_prepare_ddr)(struct mmc_host *host);
 150 
 151         /* Prepare for switching from HS400 to HS200 */
 152         void    (*hs400_downgrade)(struct mmc_host *host);
 153 
 154         /* Complete selection of HS400 */
 155         void    (*hs400_complete)(struct mmc_host *host);
 156 
 157         /* Prepare enhanced strobe depending host driver */
 158         void    (*hs400_enhanced_strobe)(struct mmc_host *host,
 159                                          struct mmc_ios *ios);
 160         int     (*select_drive_strength)(struct mmc_card *card,
 161                                          unsigned int max_dtr, int host_drv,
 162                                          int card_drv, int *drv_type);
 163         void    (*hw_reset)(struct mmc_host *host);
 164         void    (*card_event)(struct mmc_host *host);
 165 
 166         /*
 167          * Optional callback to support controllers with HW issues for multiple
 168          * I/O. Returns the number of supported blocks for the request.
 169          */
 170         int     (*multi_io_quirk)(struct mmc_card *card,
 171                                   unsigned int direction, int blk_size);
 172 };
 173 
 174 struct mmc_cqe_ops {
 175         /* Allocate resources, and make the CQE operational */
 176         int     (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
 177         /* Free resources, and make the CQE non-operational */
 178         void    (*cqe_disable)(struct mmc_host *host);
 179         /*
 180          * Issue a read, write or DCMD request to the CQE. Also deal with the
 181          * effect of ->cqe_off().
 182          */
 183         int     (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
 184         /* Free resources (e.g. DMA mapping) associated with the request */
 185         void    (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
 186         /*
 187          * Prepare the CQE and host controller to accept non-CQ commands. There
 188          * is no corresponding ->cqe_on(), instead ->cqe_request() is required
 189          * to deal with that.
 190          */
 191         void    (*cqe_off)(struct mmc_host *host);
 192         /*
 193          * Wait for all CQE tasks to complete. Return an error if recovery
 194          * becomes necessary.
 195          */
 196         int     (*cqe_wait_for_idle)(struct mmc_host *host);
 197         /*
 198          * Notify CQE that a request has timed out. Return false if the request
 199          * completed or true if a timeout happened in which case indicate if
 200          * recovery is needed.
 201          */
 202         bool    (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
 203                                bool *recovery_needed);
 204         /*
 205          * Stop all CQE activity and prepare the CQE and host controller to
 206          * accept recovery commands.
 207          */
 208         void    (*cqe_recovery_start)(struct mmc_host *host);
 209         /*
 210          * Clear the queue and call mmc_cqe_request_done() on all requests.
 211          * Requests that errored will have the error set on the mmc_request
 212          * (data->error or cmd->error for DCMD).  Requests that did not error
 213          * will have zero data bytes transferred.
 214          */
 215         void    (*cqe_recovery_finish)(struct mmc_host *host);
 216 };
 217 
 218 struct mmc_async_req {
 219         /* active mmc request */
 220         struct mmc_request      *mrq;
 221         /*
 222          * Check error status of completed mmc request.
 223          * Returns 0 if success otherwise non zero.
 224          */
 225         enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
 226 };
 227 
 228 /**
 229  * struct mmc_slot - MMC slot functions
 230  *
 231  * @cd_irq:             MMC/SD-card slot hotplug detection IRQ or -EINVAL
 232  * @handler_priv:       MMC/SD-card slot context
 233  *
 234  * Some MMC/SD host controllers implement slot-functions like card and
 235  * write-protect detection natively. However, a large number of controllers
 236  * leave these functions to the CPU. This struct provides a hook to attach
 237  * such slot-function drivers.
 238  */
 239 struct mmc_slot {
 240         int cd_irq;
 241         bool cd_wake_enabled;
 242         void *handler_priv;
 243 };
 244 
 245 /**
 246  * mmc_context_info - synchronization details for mmc context
 247  * @is_done_rcv         wake up reason was done request
 248  * @is_new_req          wake up reason was new request
 249  * @is_waiting_last_req mmc context waiting for single running request
 250  * @wait                wait queue
 251  */
 252 struct mmc_context_info {
 253         bool                    is_done_rcv;
 254         bool                    is_new_req;
 255         bool                    is_waiting_last_req;
 256         wait_queue_head_t       wait;
 257 };
 258 
 259 struct regulator;
 260 struct mmc_pwrseq;
 261 
 262 struct mmc_supply {
 263         struct regulator *vmmc;         /* Card power supply */
 264         struct regulator *vqmmc;        /* Optional Vccq supply */
 265 };
 266 
 267 struct mmc_ctx {
 268         struct task_struct *task;
 269 };
 270 
 271 struct mmc_host {
 272         struct device           *parent;
 273         struct device           class_dev;
 274         int                     index;
 275         const struct mmc_host_ops *ops;
 276         struct mmc_pwrseq       *pwrseq;
 277         unsigned int            f_min;
 278         unsigned int            f_max;
 279         unsigned int            f_init;
 280         u32                     ocr_avail;
 281         u32                     ocr_avail_sdio; /* SDIO-specific OCR */
 282         u32                     ocr_avail_sd;   /* SD-specific OCR */
 283         u32                     ocr_avail_mmc;  /* MMC-specific OCR */
 284 #ifdef CONFIG_PM_SLEEP
 285         struct notifier_block   pm_notify;
 286 #endif
 287         u32                     max_current_330;
 288         u32                     max_current_300;
 289         u32                     max_current_180;
 290 
 291 #define MMC_VDD_165_195         0x00000080      /* VDD voltage 1.65 - 1.95 */
 292 #define MMC_VDD_20_21           0x00000100      /* VDD voltage 2.0 ~ 2.1 */
 293 #define MMC_VDD_21_22           0x00000200      /* VDD voltage 2.1 ~ 2.2 */
 294 #define MMC_VDD_22_23           0x00000400      /* VDD voltage 2.2 ~ 2.3 */
 295 #define MMC_VDD_23_24           0x00000800      /* VDD voltage 2.3 ~ 2.4 */
 296 #define MMC_VDD_24_25           0x00001000      /* VDD voltage 2.4 ~ 2.5 */
 297 #define MMC_VDD_25_26           0x00002000      /* VDD voltage 2.5 ~ 2.6 */
 298 #define MMC_VDD_26_27           0x00004000      /* VDD voltage 2.6 ~ 2.7 */
 299 #define MMC_VDD_27_28           0x00008000      /* VDD voltage 2.7 ~ 2.8 */
 300 #define MMC_VDD_28_29           0x00010000      /* VDD voltage 2.8 ~ 2.9 */
 301 #define MMC_VDD_29_30           0x00020000      /* VDD voltage 2.9 ~ 3.0 */
 302 #define MMC_VDD_30_31           0x00040000      /* VDD voltage 3.0 ~ 3.1 */
 303 #define MMC_VDD_31_32           0x00080000      /* VDD voltage 3.1 ~ 3.2 */
 304 #define MMC_VDD_32_33           0x00100000      /* VDD voltage 3.2 ~ 3.3 */
 305 #define MMC_VDD_33_34           0x00200000      /* VDD voltage 3.3 ~ 3.4 */
 306 #define MMC_VDD_34_35           0x00400000      /* VDD voltage 3.4 ~ 3.5 */
 307 #define MMC_VDD_35_36           0x00800000      /* VDD voltage 3.5 ~ 3.6 */
 308 
 309         u32                     caps;           /* Host capabilities */
 310 
 311 #define MMC_CAP_4_BIT_DATA      (1 << 0)        /* Can the host do 4 bit transfers */
 312 #define MMC_CAP_MMC_HIGHSPEED   (1 << 1)        /* Can do MMC high-speed timing */
 313 #define MMC_CAP_SD_HIGHSPEED    (1 << 2)        /* Can do SD high-speed timing */
 314 #define MMC_CAP_SDIO_IRQ        (1 << 3)        /* Can signal pending SDIO IRQs */
 315 #define MMC_CAP_SPI             (1 << 4)        /* Talks only SPI protocols */
 316 #define MMC_CAP_NEEDS_POLL      (1 << 5)        /* Needs polling for card-detection */
 317 #define MMC_CAP_8_BIT_DATA      (1 << 6)        /* Can the host do 8 bit transfers */
 318 #define MMC_CAP_AGGRESSIVE_PM   (1 << 7)        /* Suspend (e)MMC/SD at idle  */
 319 #define MMC_CAP_NONREMOVABLE    (1 << 8)        /* Nonremovable e.g. eMMC */
 320 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)        /* Waits while card is busy */
 321 #define MMC_CAP_ERASE           (1 << 10)       /* Allow erase/trim commands */
 322 #define MMC_CAP_3_3V_DDR        (1 << 11)       /* Host supports eMMC DDR 3.3V */
 323 #define MMC_CAP_1_8V_DDR        (1 << 12)       /* Host supports eMMC DDR 1.8V */
 324 #define MMC_CAP_1_2V_DDR        (1 << 13)       /* Host supports eMMC DDR 1.2V */
 325 #define MMC_CAP_POWER_OFF_CARD  (1 << 14)       /* Can power off after boot */
 326 #define MMC_CAP_BUS_WIDTH_TEST  (1 << 15)       /* CMD14/CMD19 bus width ok */
 327 #define MMC_CAP_UHS_SDR12       (1 << 16)       /* Host supports UHS SDR12 mode */
 328 #define MMC_CAP_UHS_SDR25       (1 << 17)       /* Host supports UHS SDR25 mode */
 329 #define MMC_CAP_UHS_SDR50       (1 << 18)       /* Host supports UHS SDR50 mode */
 330 #define MMC_CAP_UHS_SDR104      (1 << 19)       /* Host supports UHS SDR104 mode */
 331 #define MMC_CAP_UHS_DDR50       (1 << 20)       /* Host supports UHS DDR50 mode */
 332 #define MMC_CAP_UHS             (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
 333                                  MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
 334                                  MMC_CAP_UHS_DDR50)
 335 #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21)       /* Synced runtime PM suspends. */
 336 #define MMC_CAP_NEED_RSP_BUSY   (1 << 22)       /* Commands with R1B can't use R1. */
 337 #define MMC_CAP_DRIVER_TYPE_A   (1 << 23)       /* Host supports Driver Type A */
 338 #define MMC_CAP_DRIVER_TYPE_C   (1 << 24)       /* Host supports Driver Type C */
 339 #define MMC_CAP_DRIVER_TYPE_D   (1 << 25)       /* Host supports Driver Type D */
 340 #define MMC_CAP_DONE_COMPLETE   (1 << 27)       /* RW reqs can be completed within mmc_request_done() */
 341 #define MMC_CAP_CD_WAKE         (1 << 28)       /* Enable card detect wake */
 342 #define MMC_CAP_CMD_DURING_TFR  (1 << 29)       /* Commands during data transfer */
 343 #define MMC_CAP_CMD23           (1 << 30)       /* CMD23 supported. */
 344 #define MMC_CAP_HW_RESET        (1 << 31)       /* Hardware reset */
 345 
 346         u32                     caps2;          /* More host capabilities */
 347 
 348 #define MMC_CAP2_BOOTPART_NOACC (1 << 0)        /* Boot partition no access */
 349 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)        /* Can do full power cycle */
 350 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5)        /* can support */
 351 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6)        /* can support */
 352 #define MMC_CAP2_HS200          (MMC_CAP2_HS200_1_8V_SDR | \
 353                                  MMC_CAP2_HS200_1_2V_SDR)
 354 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)       /* Card-detect signal active high */
 355 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)       /* Write-protect signal active high */
 356 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)   /* Don't power up before scan */
 357 #define MMC_CAP2_HS400_1_8V     (1 << 15)       /* Can support HS400 1.8V */
 358 #define MMC_CAP2_HS400_1_2V     (1 << 16)       /* Can support HS400 1.2V */
 359 #define MMC_CAP2_HS400          (MMC_CAP2_HS400_1_8V | \
 360                                  MMC_CAP2_HS400_1_2V)
 361 #define MMC_CAP2_HSX00_1_8V     (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
 362 #define MMC_CAP2_HSX00_1_2V     (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
 363 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
 364 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18)     /* No physical write protect pin, assume that card is always read-write */
 365 #define MMC_CAP2_NO_SDIO        (1 << 19)       /* Do not send SDIO commands during initialization */
 366 #define MMC_CAP2_HS400_ES       (1 << 20)       /* Host supports enhanced strobe */
 367 #define MMC_CAP2_NO_SD          (1 << 21)       /* Do not send SD commands during initialization */
 368 #define MMC_CAP2_NO_MMC         (1 << 22)       /* Do not send (e)MMC commands during initialization */
 369 #define MMC_CAP2_CQE            (1 << 23)       /* Has eMMC command queue engine */
 370 #define MMC_CAP2_CQE_DCMD       (1 << 24)       /* CQE can issue a direct command */
 371 #define MMC_CAP2_AVOID_3_3V     (1 << 25)       /* Host must negotiate down from 3.3V */
 372 #define MMC_CAP2_MERGE_CAPABLE  (1 << 26)       /* Host can merge a segment over the segment size */
 373 
 374         int                     fixed_drv_type; /* fixed driver type for non-removable media */
 375 
 376         mmc_pm_flag_t           pm_caps;        /* supported pm features */
 377 
 378         /* host specific block data */
 379         unsigned int            max_seg_size;   /* see blk_queue_max_segment_size */
 380         unsigned short          max_segs;       /* see blk_queue_max_segments */
 381         unsigned short          unused;
 382         unsigned int            max_req_size;   /* maximum number of bytes in one req */
 383         unsigned int            max_blk_size;   /* maximum size of one mmc block */
 384         unsigned int            max_blk_count;  /* maximum number of blocks in one req */
 385         unsigned int            max_busy_timeout; /* max busy timeout in ms */
 386 
 387         /* private data */
 388         spinlock_t              lock;           /* lock for claim and bus ops */
 389 
 390         struct mmc_ios          ios;            /* current io bus settings */
 391 
 392         /* group bitfields together to minimize padding */
 393         unsigned int            use_spi_crc:1;
 394         unsigned int            claimed:1;      /* host exclusively claimed */
 395         unsigned int            bus_dead:1;     /* bus has been released */
 396         unsigned int            can_retune:1;   /* re-tuning can be used */
 397         unsigned int            doing_retune:1; /* re-tuning in progress */
 398         unsigned int            retune_now:1;   /* do re-tuning at next req */
 399         unsigned int            retune_paused:1; /* re-tuning is temporarily disabled */
 400         unsigned int            use_blk_mq:1;   /* use blk-mq */
 401         unsigned int            retune_crc_disable:1; /* don't trigger retune upon crc */
 402         unsigned int            can_dma_map_merge:1; /* merging can be used */
 403 
 404         int                     rescan_disable; /* disable card detection */
 405         int                     rescan_entered; /* used with nonremovable devices */
 406 
 407         int                     need_retune;    /* re-tuning is needed */
 408         int                     hold_retune;    /* hold off re-tuning */
 409         unsigned int            retune_period;  /* re-tuning period in secs */
 410         struct timer_list       retune_timer;   /* for periodic re-tuning */
 411 
 412         bool                    trigger_card_event; /* card_event necessary */
 413 
 414         struct mmc_card         *card;          /* device attached to this host */
 415 
 416         wait_queue_head_t       wq;
 417         struct mmc_ctx          *claimer;       /* context that has host claimed */
 418         int                     claim_cnt;      /* "claim" nesting count */
 419         struct mmc_ctx          default_ctx;    /* default context */
 420 
 421         struct delayed_work     detect;
 422         int                     detect_change;  /* card detect flag */
 423         struct mmc_slot         slot;
 424 
 425         const struct mmc_bus_ops *bus_ops;      /* current bus driver */
 426         unsigned int            bus_refs;       /* reference counter */
 427 
 428         unsigned int            sdio_irqs;
 429         struct task_struct      *sdio_irq_thread;
 430         struct delayed_work     sdio_irq_work;
 431         bool                    sdio_irq_pending;
 432         atomic_t                sdio_irq_thread_abort;
 433 
 434         mmc_pm_flag_t           pm_flags;       /* requested pm features */
 435 
 436         struct led_trigger      *led;           /* activity led */
 437 
 438 #ifdef CONFIG_REGULATOR
 439         bool                    regulator_enabled; /* regulator state */
 440 #endif
 441         struct mmc_supply       supply;
 442 
 443         struct dentry           *debugfs_root;
 444 
 445         /* Ongoing data transfer that allows commands during transfer */
 446         struct mmc_request      *ongoing_mrq;
 447 
 448 #ifdef CONFIG_FAIL_MMC_REQUEST
 449         struct fault_attr       fail_mmc_request;
 450 #endif
 451 
 452         unsigned int            actual_clock;   /* Actual HC clock rate */
 453 
 454         unsigned int            slotno; /* used for sdio acpi binding */
 455 
 456         int                     dsr_req;        /* DSR value is valid */
 457         u32                     dsr;    /* optional driver stage (DSR) value */
 458 
 459         /* Command Queue Engine (CQE) support */
 460         const struct mmc_cqe_ops *cqe_ops;
 461         void                    *cqe_private;
 462         int                     cqe_qdepth;
 463         bool                    cqe_enabled;
 464         bool                    cqe_on;
 465 
 466         unsigned long           private[0] ____cacheline_aligned;
 467 };
 468 
 469 struct device_node;
 470 
 471 struct mmc_host *mmc_alloc_host(int extra, struct device *);
 472 int mmc_add_host(struct mmc_host *);
 473 void mmc_remove_host(struct mmc_host *);
 474 void mmc_free_host(struct mmc_host *);
 475 int mmc_of_parse(struct mmc_host *host);
 476 int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
 477 
 478 static inline void *mmc_priv(struct mmc_host *host)
 479 {
 480         return (void *)host->private;
 481 }
 482 
 483 static inline struct mmc_host *mmc_from_priv(void *priv)
 484 {
 485         return container_of(priv, struct mmc_host, private);
 486 }
 487 
 488 #define mmc_host_is_spi(host)   ((host)->caps & MMC_CAP_SPI)
 489 
 490 #define mmc_dev(x)      ((x)->parent)
 491 #define mmc_classdev(x) (&(x)->class_dev)
 492 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
 493 
 494 void mmc_detect_change(struct mmc_host *, unsigned long delay);
 495 void mmc_request_done(struct mmc_host *, struct mmc_request *);
 496 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
 497 
 498 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
 499 
 500 /*
 501  * May be called from host driver's system/runtime suspend/resume callbacks,
 502  * to know if SDIO IRQs has been claimed.
 503  */
 504 static inline bool sdio_irq_claimed(struct mmc_host *host)
 505 {
 506         return host->sdio_irqs > 0;
 507 }
 508 
 509 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
 510 {
 511         host->ops->enable_sdio_irq(host, 0);
 512         host->sdio_irq_pending = true;
 513         if (host->sdio_irq_thread)
 514                 wake_up_process(host->sdio_irq_thread);
 515 }
 516 
 517 void sdio_signal_irq(struct mmc_host *host);
 518 
 519 #ifdef CONFIG_REGULATOR
 520 int mmc_regulator_set_ocr(struct mmc_host *mmc,
 521                         struct regulator *supply,
 522                         unsigned short vdd_bit);
 523 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
 524 #else
 525 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
 526                                  struct regulator *supply,
 527                                  unsigned short vdd_bit)
 528 {
 529         return 0;
 530 }
 531 
 532 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
 533                                           struct mmc_ios *ios)
 534 {
 535         return -EINVAL;
 536 }
 537 #endif
 538 
 539 int mmc_regulator_get_supply(struct mmc_host *mmc);
 540 
 541 static inline int mmc_card_is_removable(struct mmc_host *host)
 542 {
 543         return !(host->caps & MMC_CAP_NONREMOVABLE);
 544 }
 545 
 546 static inline int mmc_card_keep_power(struct mmc_host *host)
 547 {
 548         return host->pm_flags & MMC_PM_KEEP_POWER;
 549 }
 550 
 551 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
 552 {
 553         return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
 554 }
 555 
 556 /* TODO: Move to private header */
 557 static inline int mmc_card_hs(struct mmc_card *card)
 558 {
 559         return card->host->ios.timing == MMC_TIMING_SD_HS ||
 560                 card->host->ios.timing == MMC_TIMING_MMC_HS;
 561 }
 562 
 563 /* TODO: Move to private header */
 564 static inline int mmc_card_uhs(struct mmc_card *card)
 565 {
 566         return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
 567                 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
 568 }
 569 
 570 void mmc_retune_timer_stop(struct mmc_host *host);
 571 
 572 static inline void mmc_retune_needed(struct mmc_host *host)
 573 {
 574         if (host->can_retune)
 575                 host->need_retune = 1;
 576 }
 577 
 578 static inline bool mmc_can_retune(struct mmc_host *host)
 579 {
 580         return host->can_retune == 1;
 581 }
 582 
 583 static inline bool mmc_doing_retune(struct mmc_host *host)
 584 {
 585         return host->doing_retune == 1;
 586 }
 587 
 588 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
 589 {
 590         return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 591 }
 592 
 593 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
 594 int mmc_abort_tuning(struct mmc_host *host, u32 opcode);
 595 
 596 #endif /* LINUX_MMC_HOST_H */