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10 #ifndef __MAX17042_BATTERY_H_
11 #define __MAX17042_BATTERY_H_
12
13 #define MAX17042_STATUS_BattAbsent (1 << 3)
14 #define MAX17042_BATTERY_FULL (95)
15 #define MAX17042_DEFAULT_SNS_RESISTOR (10000)
16 #define MAX17042_DEFAULT_VMIN (3000)
17 #define MAX17042_DEFAULT_VMAX (4500)
18 #define MAX17042_DEFAULT_TEMP_MIN (0)
19 #define MAX17042_DEFAULT_TEMP_MAX (700)
20
21
22 #define MAX17042_FULL_THRESHOLD 10
23
24 #define MAX17042_CHARACTERIZATION_DATA_SIZE 48
25
26 enum max17042_register {
27 MAX17042_STATUS = 0x00,
28 MAX17042_VALRT_Th = 0x01,
29 MAX17042_TALRT_Th = 0x02,
30 MAX17042_SALRT_Th = 0x03,
31 MAX17042_AtRate = 0x04,
32 MAX17042_RepCap = 0x05,
33 MAX17042_RepSOC = 0x06,
34 MAX17042_Age = 0x07,
35 MAX17042_TEMP = 0x08,
36 MAX17042_VCELL = 0x09,
37 MAX17042_Current = 0x0A,
38 MAX17042_AvgCurrent = 0x0B,
39
40 MAX17042_SOC = 0x0D,
41 MAX17042_AvSOC = 0x0E,
42 MAX17042_RemCap = 0x0F,
43 MAX17042_FullCAP = 0x10,
44 MAX17042_TTE = 0x11,
45 MAX17042_V_empty = 0x12,
46
47 MAX17042_RSLOW = 0x14,
48
49 MAX17042_AvgTA = 0x16,
50 MAX17042_Cycles = 0x17,
51 MAX17042_DesignCap = 0x18,
52 MAX17042_AvgVCELL = 0x19,
53 MAX17042_MinMaxTemp = 0x1A,
54 MAX17042_MinMaxVolt = 0x1B,
55 MAX17042_MinMaxCurr = 0x1C,
56 MAX17042_CONFIG = 0x1D,
57 MAX17042_ICHGTerm = 0x1E,
58 MAX17042_AvCap = 0x1F,
59 MAX17042_ManName = 0x20,
60 MAX17042_DevName = 0x21,
61
62 MAX17042_FullCAPNom = 0x23,
63 MAX17042_TempNom = 0x24,
64 MAX17042_TempLim = 0x25,
65 MAX17042_TempHot = 0x26,
66 MAX17042_AIN = 0x27,
67 MAX17042_LearnCFG = 0x28,
68 MAX17042_FilterCFG = 0x29,
69 MAX17042_RelaxCFG = 0x2A,
70 MAX17042_MiscCFG = 0x2B,
71 MAX17042_TGAIN = 0x2C,
72 MAx17042_TOFF = 0x2D,
73 MAX17042_CGAIN = 0x2E,
74 MAX17042_COFF = 0x2F,
75
76 MAX17042_MaskSOC = 0x32,
77 MAX17042_SOC_empty = 0x33,
78 MAX17042_T_empty = 0x34,
79
80 MAX17042_FullCAP0 = 0x35,
81 MAX17042_LAvg_empty = 0x36,
82 MAX17042_FCTC = 0x37,
83 MAX17042_RCOMP0 = 0x38,
84 MAX17042_TempCo = 0x39,
85 MAX17042_EmptyTempCo = 0x3A,
86 MAX17042_K_empty0 = 0x3B,
87 MAX17042_TaskPeriod = 0x3C,
88 MAX17042_FSTAT = 0x3D,
89
90 MAX17042_SHDNTIMER = 0x3F,
91
92 MAX17042_dQacc = 0x45,
93 MAX17042_dPacc = 0x46,
94
95 MAX17042_VFSOC0 = 0x48,
96
97 MAX17042_QH = 0x4D,
98 MAX17042_QL = 0x4E,
99
100 MAX17042_VFSOC0Enable = 0x60,
101 MAX17042_MLOCKReg1 = 0x62,
102 MAX17042_MLOCKReg2 = 0x63,
103
104 MAX17042_MODELChrTbl = 0x80,
105
106 MAX17042_OCV = 0xEE,
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108 MAX17042_OCVInternal = 0xFB,
109
110 MAX17042_VFSOC = 0xFF,
111 };
112
113
114 enum max17047_register {
115 MAX17047_QRTbl00 = 0x12,
116 MAX17047_FullSOCThr = 0x13,
117 MAX17047_QRTbl10 = 0x22,
118 MAX17047_QRTbl20 = 0x32,
119 MAX17047_V_empty = 0x3A,
120 MAX17047_QRTbl30 = 0x42,
121 };
122
123 enum max170xx_chip_type {
124 MAXIM_DEVICE_TYPE_UNKNOWN = 0,
125 MAXIM_DEVICE_TYPE_MAX17042,
126 MAXIM_DEVICE_TYPE_MAX17047,
127 MAXIM_DEVICE_TYPE_MAX17050,
128
129 MAXIM_DEVICE_TYPE_NUM
130 };
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136
137 struct max17042_reg_data {
138 u8 addr;
139 u16 data;
140 };
141
142 struct max17042_config_data {
143
144 u32 cur_sense_val;
145
146
147 u16 tgain;
148 u16 toff;
149 u16 cgain;
150 u16 coff;
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152
153 u16 valrt_thresh;
154 u16 talrt_thresh;
155 u16 soc_alrt_thresh;
156 u16 config;
157 u16 shdntimer;
158
159
160 u16 full_soc_thresh;
161 u16 design_cap;
162 u16 ichgt_term;
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164
165 u16 at_rate;
166 u16 learn_cfg;
167 u16 filter_cfg;
168 u16 relax_cfg;
169 u16 misc_cfg;
170 u16 masksoc;
171
172
173 u16 fullcap;
174 u16 fullcapnom;
175 u16 socempty;
176 u16 lavg_empty;
177 u16 dqacc;
178 u16 dpacc;
179 u16 qrtbl00;
180 u16 qrtbl10;
181 u16 qrtbl20;
182 u16 qrtbl30;
183
184
185 u16 cell_technology;
186
187
188 u16 vempty;
189 u16 temp_nom;
190 u16 temp_lim;
191 u16 fctc;
192 u16 rcomp0;
193 u16 tcompc0;
194 u16 empty_tempco;
195 u16 kempty0;
196 u16 cell_char_tbl[MAX17042_CHARACTERIZATION_DATA_SIZE];
197 } __packed;
198
199 struct max17042_platform_data {
200 struct max17042_reg_data *init_data;
201 struct max17042_config_data *config_data;
202 int num_init_data;
203 bool enable_current_sense;
204 bool enable_por_init;
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210
211 unsigned int r_sns;
212 int vmin;
213 int vmax;
214 int temp_min;
215 int temp_max;
216 };
217
218 #endif