1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2007-2009 Texas Instruments Inc
4 * Copyright (C) 2007 MontaVista Software, Inc.
5 *
6 * Andy Lowe (alowe@mvista.com), MontaVista Software
7 * - Initial version
8 * Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd.
9 * - ported to sub device interface
10 */
11 #ifndef _OSD_H
12 #define _OSD_H
13
14 #include <media/davinci/vpbe_types.h>
15
16 #define DM644X_VPBE_OSD_SUBDEV_NAME "dm644x,vpbe-osd"
17 #define DM365_VPBE_OSD_SUBDEV_NAME "dm365,vpbe-osd"
18 #define DM355_VPBE_OSD_SUBDEV_NAME "dm355,vpbe-osd"
19
20 /**
21 * enum osd_layer
22 * @WIN_OSD0: On-Screen Display Window 0
23 * @WIN_VID0: Video Window 0
24 * @WIN_OSD1: On-Screen Display Window 1
25 * @WIN_VID1: Video Window 1
26 *
27 * Description:
28 * An enumeration of the osd display layers.
29 */
30 enum osd_layer {
31 WIN_OSD0,
32 WIN_VID0,
33 WIN_OSD1,
34 WIN_VID1,
35 };
36
37 /**
38 * enum osd_win_layer
39 * @OSDWIN_OSD0: On-Screen Display Window 0
40 * @OSDWIN_OSD1: On-Screen Display Window 1
41 *
42 * Description:
43 * An enumeration of the OSD Window layers.
44 */
45 enum osd_win_layer {
46 OSDWIN_OSD0,
47 OSDWIN_OSD1,
48 };
49
50 /**
51 * enum osd_pix_format
52 * @PIXFMT_1BPP: 1-bit-per-pixel bitmap
53 * @PIXFMT_2BPP: 2-bits-per-pixel bitmap
54 * @PIXFMT_4BPP: 4-bits-per-pixel bitmap
55 * @PIXFMT_8BPP: 8-bits-per-pixel bitmap
56 * @PIXFMT_RGB565: 16-bits-per-pixel RGB565
57 * @PIXFMT_YCbCrI: YUV 4:2:2
58 * @PIXFMT_RGB888: 24-bits-per-pixel RGB888
59 * @PIXFMT_YCrCbI: YUV 4:2:2 with chroma swap
60 * @PIXFMT_NV12: YUV 4:2:0 planar
61 * @PIXFMT_OSD_ATTR: OSD Attribute Window pixel format (4bpp)
62 *
63 * Description:
64 * An enumeration of the DaVinci pixel formats.
65 */
66 enum osd_pix_format {
67 PIXFMT_1BPP = 0,
68 PIXFMT_2BPP,
69 PIXFMT_4BPP,
70 PIXFMT_8BPP,
71 PIXFMT_RGB565,
72 PIXFMT_YCBCRI,
73 PIXFMT_RGB888,
74 PIXFMT_YCRCBI,
75 PIXFMT_NV12,
76 PIXFMT_OSD_ATTR,
77 };
78
79 /**
80 * enum osd_h_exp_ratio
81 * @H_EXP_OFF: no expansion (1/1)
82 * @H_EXP_9_OVER_8: 9/8 expansion ratio
83 * @H_EXP_3_OVER_2: 3/2 expansion ratio
84 *
85 * Description:
86 * An enumeration of the available horizontal expansion ratios.
87 */
88 enum osd_h_exp_ratio {
89 H_EXP_OFF,
90 H_EXP_9_OVER_8,
91 H_EXP_3_OVER_2,
92 };
93
94 /**
95 * enum osd_v_exp_ratio
96 * @V_EXP_OFF: no expansion (1/1)
97 * @V_EXP_6_OVER_5: 6/5 expansion ratio
98 *
99 * Description:
100 * An enumeration of the available vertical expansion ratios.
101 */
102 enum osd_v_exp_ratio {
103 V_EXP_OFF,
104 V_EXP_6_OVER_5,
105 };
106
107 /**
108 * enum osd_zoom_factor
109 * @ZOOM_X1: no zoom (x1)
110 * @ZOOM_X2: x2 zoom
111 * @ZOOM_X4: x4 zoom
112 *
113 * Description:
114 * An enumeration of the available zoom factors.
115 */
116 enum osd_zoom_factor {
117 ZOOM_X1,
118 ZOOM_X2,
119 ZOOM_X4,
120 };
121
122 /**
123 * enum osd_clut
124 * @ROM_CLUT: ROM CLUT
125 * @RAM_CLUT: RAM CLUT
126 *
127 * Description:
128 * An enumeration of the available Color Lookup Tables (CLUTs).
129 */
130 enum osd_clut {
131 ROM_CLUT,
132 RAM_CLUT,
133 };
134
135 /**
136 * enum osd_rom_clut
137 * @ROM_CLUT0: Macintosh CLUT
138 * @ROM_CLUT1: CLUT from DM270 and prior devices
139 *
140 * Description:
141 * An enumeration of the ROM Color Lookup Table (CLUT) options.
142 */
143 enum osd_rom_clut {
144 ROM_CLUT0,
145 ROM_CLUT1,
146 };
147
148 /**
149 * enum osd_blending_factor
150 * @OSD_0_VID_8: OSD pixels are fully transparent
151 * @OSD_1_VID_7: OSD pixels contribute 1/8, video pixels contribute 7/8
152 * @OSD_2_VID_6: OSD pixels contribute 2/8, video pixels contribute 6/8
153 * @OSD_3_VID_5: OSD pixels contribute 3/8, video pixels contribute 5/8
154 * @OSD_4_VID_4: OSD pixels contribute 4/8, video pixels contribute 4/8
155 * @OSD_5_VID_3: OSD pixels contribute 5/8, video pixels contribute 3/8
156 * @OSD_6_VID_2: OSD pixels contribute 6/8, video pixels contribute 2/8
157 * @OSD_8_VID_0: OSD pixels are fully opaque
158 *
159 * Description:
160 * An enumeration of the DaVinci pixel blending factor options.
161 */
162 enum osd_blending_factor {
163 OSD_0_VID_8,
164 OSD_1_VID_7,
165 OSD_2_VID_6,
166 OSD_3_VID_5,
167 OSD_4_VID_4,
168 OSD_5_VID_3,
169 OSD_6_VID_2,
170 OSD_8_VID_0,
171 };
172
173 /**
174 * enum osd_blink_interval
175 * @BLINK_X1: blink interval is 1 vertical refresh cycle
176 * @BLINK_X2: blink interval is 2 vertical refresh cycles
177 * @BLINK_X3: blink interval is 3 vertical refresh cycles
178 * @BLINK_X4: blink interval is 4 vertical refresh cycles
179 *
180 * Description:
181 * An enumeration of the DaVinci pixel blinking interval options.
182 */
183 enum osd_blink_interval {
184 BLINK_X1,
185 BLINK_X2,
186 BLINK_X3,
187 BLINK_X4,
188 };
189
190 /**
191 * enum osd_cursor_h_width
192 * @H_WIDTH_1: horizontal line width is 1 pixel
193 * @H_WIDTH_4: horizontal line width is 4 pixels
194 * @H_WIDTH_8: horizontal line width is 8 pixels
195 * @H_WIDTH_12: horizontal line width is 12 pixels
196 * @H_WIDTH_16: horizontal line width is 16 pixels
197 * @H_WIDTH_20: horizontal line width is 20 pixels
198 * @H_WIDTH_24: horizontal line width is 24 pixels
199 * @H_WIDTH_28: horizontal line width is 28 pixels
200 */
201 enum osd_cursor_h_width {
202 H_WIDTH_1,
203 H_WIDTH_4,
204 H_WIDTH_8,
205 H_WIDTH_12,
206 H_WIDTH_16,
207 H_WIDTH_20,
208 H_WIDTH_24,
209 H_WIDTH_28,
210 };
211
212 /**
213 * enum davinci_cursor_v_width
214 * @V_WIDTH_1: vertical line width is 1 line
215 * @V_WIDTH_2: vertical line width is 2 lines
216 * @V_WIDTH_4: vertical line width is 4 lines
217 * @V_WIDTH_6: vertical line width is 6 lines
218 * @V_WIDTH_8: vertical line width is 8 lines
219 * @V_WIDTH_10: vertical line width is 10 lines
220 * @V_WIDTH_12: vertical line width is 12 lines
221 * @V_WIDTH_14: vertical line width is 14 lines
222 */
223 enum osd_cursor_v_width {
224 V_WIDTH_1,
225 V_WIDTH_2,
226 V_WIDTH_4,
227 V_WIDTH_6,
228 V_WIDTH_8,
229 V_WIDTH_10,
230 V_WIDTH_12,
231 V_WIDTH_14,
232 };
233
234 /**
235 * struct osd_cursor_config
236 * @xsize: horizontal size in pixels
237 * @ysize: vertical size in lines
238 * @xpos: horizontal offset in pixels from the left edge of the display
239 * @ypos: vertical offset in lines from the top of the display
240 * @interlaced: Non-zero if the display is interlaced, or zero otherwise
241 * @h_width: horizontal line width
242 * @v_width: vertical line width
243 * @clut: the CLUT selector (ROM or RAM) for the cursor color
244 * @clut_index: an index into the CLUT for the cursor color
245 *
246 * Description:
247 * A structure describing the configuration parameters of the hardware
248 * rectangular cursor.
249 */
250 struct osd_cursor_config {
251 unsigned xsize;
252 unsigned ysize;
253 unsigned xpos;
254 unsigned ypos;
255 int interlaced;
256 enum osd_cursor_h_width h_width;
257 enum osd_cursor_v_width v_width;
258 enum osd_clut clut;
259 unsigned char clut_index;
260 };
261
262 /**
263 * struct osd_layer_config
264 * @pixfmt: pixel format
265 * @line_length: offset in bytes between start of each line in memory
266 * @xsize: number of horizontal pixels displayed per line
267 * @ysize: number of lines displayed
268 * @xpos: horizontal offset in pixels from the left edge of the display
269 * @ypos: vertical offset in lines from the top of the display
270 * @interlaced: Non-zero if the display is interlaced, or zero otherwise
271 *
272 * Description:
273 * A structure describing the configuration parameters of an On-Screen Display
274 * (OSD) or video layer related to how the image is stored in memory.
275 * @line_length must be a multiple of the cache line size (32 bytes).
276 */
277 struct osd_layer_config {
278 enum osd_pix_format pixfmt;
279 unsigned line_length;
280 unsigned xsize;
281 unsigned ysize;
282 unsigned xpos;
283 unsigned ypos;
284 int interlaced;
285 };
286
287 /* parameters that apply on a per-window (OSD or video) basis */
288 struct osd_window_state {
289 int is_allocated;
290 int is_enabled;
291 unsigned long fb_base_phys;
292 enum osd_zoom_factor h_zoom;
293 enum osd_zoom_factor v_zoom;
294 struct osd_layer_config lconfig;
295 };
296
297 /* parameters that apply on a per-OSD-window basis */
298 struct osd_osdwin_state {
299 enum osd_clut clut;
300 enum osd_blending_factor blend;
301 int colorkey_blending;
302 unsigned colorkey;
303 int rec601_attenuation;
304 /* index is pixel value */
305 unsigned char palette_map[16];
306 };
307
308 /* hardware rectangular cursor parameters */
309 struct osd_cursor_state {
310 int is_enabled;
311 struct osd_cursor_config config;
312 };
313
314 struct osd_state;
315
316 struct vpbe_osd_ops {
317 int (*initialize)(struct osd_state *sd);
318 int (*request_layer)(struct osd_state *sd, enum osd_layer layer);
319 void (*release_layer)(struct osd_state *sd, enum osd_layer layer);
320 int (*enable_layer)(struct osd_state *sd, enum osd_layer layer,
321 int otherwin);
322 void (*disable_layer)(struct osd_state *sd, enum osd_layer layer);
323 int (*set_layer_config)(struct osd_state *sd, enum osd_layer layer,
324 struct osd_layer_config *lconfig);
325 void (*get_layer_config)(struct osd_state *sd, enum osd_layer layer,
326 struct osd_layer_config *lconfig);
327 void (*start_layer)(struct osd_state *sd, enum osd_layer layer,
328 unsigned long fb_base_phys,
329 unsigned long cbcr_ofst);
330 void (*set_left_margin)(struct osd_state *sd, u32 val);
331 void (*set_top_margin)(struct osd_state *sd, u32 val);
332 void (*set_interpolation_filter)(struct osd_state *sd, int filter);
333 int (*set_vid_expansion)(struct osd_state *sd,
334 enum osd_h_exp_ratio h_exp,
335 enum osd_v_exp_ratio v_exp);
336 void (*get_vid_expansion)(struct osd_state *sd,
337 enum osd_h_exp_ratio *h_exp,
338 enum osd_v_exp_ratio *v_exp);
339 void (*set_zoom)(struct osd_state *sd, enum osd_layer layer,
340 enum osd_zoom_factor h_zoom,
341 enum osd_zoom_factor v_zoom);
342 };
343
344 struct osd_state {
345 enum vpbe_version vpbe_type;
346 spinlock_t lock;
347 struct device *dev;
348 dma_addr_t osd_base_phys;
349 void __iomem *osd_base;
350 unsigned long osd_size;
351 /* 1-->the isr will toggle the VID0 ping-pong buffer */
352 int pingpong;
353 int interpolation_filter;
354 int field_inversion;
355 enum osd_h_exp_ratio osd_h_exp;
356 enum osd_v_exp_ratio osd_v_exp;
357 enum osd_h_exp_ratio vid_h_exp;
358 enum osd_v_exp_ratio vid_v_exp;
359 enum osd_clut backg_clut;
360 unsigned backg_clut_index;
361 enum osd_rom_clut rom_clut;
362 int is_blinking;
363 /* attribute window blinking enabled */
364 enum osd_blink_interval blink;
365 /* YCbCrI or YCrCbI */
366 enum osd_pix_format yc_pixfmt;
367 /* columns are Y, Cb, Cr */
368 unsigned char clut_ram[256][3];
369 struct osd_cursor_state cursor;
370 /* OSD0, VID0, OSD1, VID1 */
371 struct osd_window_state win[4];
372 /* OSD0, OSD1 */
373 struct osd_osdwin_state osdwin[2];
374 /* OSD device Operations */
375 struct vpbe_osd_ops ops;
376 };
377
378 struct osd_platform_data {
379 int field_inv_wa_enable;
380 };
381
382 #endif