This source file includes following definitions.
- qede_set_vf_vlan
- qede_set_vf_mac
- qede_sriov_configure
- qede_netdev_event
- qede_init
- qede_cleanup
- qede_fill_by_demand_stats
- qede_get_stats64
- qede_get_vf_config
- qede_set_vf_rate
- qede_set_vf_spoofchk
- qede_set_vf_link_state
- qede_set_vf_trust
- qede_ioctl
- qede_setup_tc
- qede_set_flower
- qede_setup_tc_block_cb
- qede_setup_tc_offload
- qede_alloc_etherdev
- qede_init_ndev
- qede_config_debug
- qede_free_fp_array
- qede_alloc_fp_array
- __qede_lock
- __qede_unlock
- qede_lock
- qede_unlock
- qede_sp_task
- qede_update_pf_params
- qede_log_probe
- __qede_probe
- qede_probe
- __qede_remove
- qede_remove
- qede_shutdown
- qede_set_num_queues
- qede_free_mem_sb
- qede_alloc_mem_sb
- qede_free_rx_buffers
- qede_free_mem_rxq
- qede_set_tpa_param
- qede_alloc_mem_rxq
- qede_free_mem_txq
- qede_alloc_mem_txq
- qede_free_mem_fp
- qede_alloc_mem_fp
- qede_free_mem_load
- qede_alloc_mem_load
- qede_empty_tx_queue
- qede_empty_tx_queues
- qede_init_fp
- qede_set_real_num_queues
- qede_napi_disable_remove
- qede_napi_add_enable
- qede_sync_free_irqs
- qede_req_msix_irqs
- qede_simd_fp_handler
- qede_setup_irqs
- qede_drain_txq
- qede_stop_txq
- qede_stop_queues
- qede_start_txq
- qede_start_queues
- qede_unload
- qede_load
- qede_reload
- qede_open
- qede_close
- qede_link_update
- qede_schedule_recovery_handler
- qede_recovery_failed
- qede_recovery_handler
- qede_is_txq_full
- qede_get_generic_tlv_data
- qede_get_eth_tlv_data
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32 #include <linux/module.h>
33 #include <linux/pci.h>
34 #include <linux/version.h>
35 #include <linux/device.h>
36 #include <linux/netdevice.h>
37 #include <linux/etherdevice.h>
38 #include <linux/skbuff.h>
39 #include <linux/errno.h>
40 #include <linux/list.h>
41 #include <linux/string.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/interrupt.h>
44 #include <asm/byteorder.h>
45 #include <asm/param.h>
46 #include <linux/io.h>
47 #include <linux/netdev_features.h>
48 #include <linux/udp.h>
49 #include <linux/tcp.h>
50 #include <net/udp_tunnel.h>
51 #include <linux/ip.h>
52 #include <net/ipv6.h>
53 #include <net/tcp.h>
54 #include <linux/if_ether.h>
55 #include <linux/if_vlan.h>
56 #include <linux/pkt_sched.h>
57 #include <linux/ethtool.h>
58 #include <linux/in.h>
59 #include <linux/random.h>
60 #include <net/ip6_checksum.h>
61 #include <linux/bitops.h>
62 #include <linux/vmalloc.h>
63 #include "qede.h"
64 #include "qede_ptp.h"
65
66 static char version[] =
67 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
68
69 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
70 MODULE_LICENSE("GPL");
71 MODULE_VERSION(DRV_MODULE_VERSION);
72
73 static uint debug;
74 module_param(debug, uint, 0);
75 MODULE_PARM_DESC(debug, " Default debug msglevel");
76
77 static const struct qed_eth_ops *qed_ops;
78
79 #define CHIP_NUM_57980S_40 0x1634
80 #define CHIP_NUM_57980S_10 0x1666
81 #define CHIP_NUM_57980S_MF 0x1636
82 #define CHIP_NUM_57980S_100 0x1644
83 #define CHIP_NUM_57980S_50 0x1654
84 #define CHIP_NUM_57980S_25 0x1656
85 #define CHIP_NUM_57980S_IOV 0x1664
86 #define CHIP_NUM_AH 0x8070
87 #define CHIP_NUM_AH_IOV 0x8090
88
89 #ifndef PCI_DEVICE_ID_NX2_57980E
90 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
91 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
92 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
93 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
94 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
95 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
96 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
97 #define PCI_DEVICE_ID_AH CHIP_NUM_AH
98 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
99
100 #endif
101
102 enum qede_pci_private {
103 QEDE_PRIVATE_PF,
104 QEDE_PRIVATE_VF
105 };
106
107 static const struct pci_device_id qede_pci_tbl[] = {
108 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
109 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
110 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
111 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
112 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
113 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
114 #ifdef CONFIG_QED_SRIOV
115 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
116 #endif
117 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
118 #ifdef CONFIG_QED_SRIOV
119 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
120 #endif
121 { 0 }
122 };
123
124 MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
125
126 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
127
128 #define TX_TIMEOUT (5 * HZ)
129
130
131 #define XDP_PI 11
132
133 static void qede_remove(struct pci_dev *pdev);
134 static void qede_shutdown(struct pci_dev *pdev);
135 static void qede_link_update(void *dev, struct qed_link_output *link);
136 static void qede_schedule_recovery_handler(void *dev);
137 static void qede_recovery_handler(struct qede_dev *edev);
138 static void qede_get_eth_tlv_data(void *edev, void *data);
139 static void qede_get_generic_tlv_data(void *edev,
140 struct qed_generic_tlvs *data);
141
142 #ifdef CONFIG_QED_SRIOV
143 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
144 __be16 vlan_proto)
145 {
146 struct qede_dev *edev = netdev_priv(ndev);
147
148 if (vlan > 4095) {
149 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
150 return -EINVAL;
151 }
152
153 if (vlan_proto != htons(ETH_P_8021Q))
154 return -EPROTONOSUPPORT;
155
156 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
157 vlan, vf);
158
159 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
160 }
161
162 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
163 {
164 struct qede_dev *edev = netdev_priv(ndev);
165
166 DP_VERBOSE(edev, QED_MSG_IOV,
167 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
168 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
169
170 if (!is_valid_ether_addr(mac)) {
171 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
172 return -EINVAL;
173 }
174
175 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
176 }
177
178 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
179 {
180 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
181 struct qed_dev_info *qed_info = &edev->dev_info.common;
182 struct qed_update_vport_params *vport_params;
183 int rc;
184
185 vport_params = vzalloc(sizeof(*vport_params));
186 if (!vport_params)
187 return -ENOMEM;
188 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
189
190 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
191
192
193 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
194 !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
195 vport_params->vport_id = 0;
196 vport_params->update_tx_switching_flg = 1;
197 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
198 edev->ops->vport_update(edev->cdev, vport_params);
199 }
200
201 vfree(vport_params);
202 return rc;
203 }
204 #endif
205
206 static struct pci_driver qede_pci_driver = {
207 .name = "qede",
208 .id_table = qede_pci_tbl,
209 .probe = qede_probe,
210 .remove = qede_remove,
211 .shutdown = qede_shutdown,
212 #ifdef CONFIG_QED_SRIOV
213 .sriov_configure = qede_sriov_configure,
214 #endif
215 };
216
217 static struct qed_eth_cb_ops qede_ll_ops = {
218 {
219 #ifdef CONFIG_RFS_ACCEL
220 .arfs_filter_op = qede_arfs_filter_op,
221 #endif
222 .link_update = qede_link_update,
223 .schedule_recovery_handler = qede_schedule_recovery_handler,
224 .get_generic_tlv_data = qede_get_generic_tlv_data,
225 .get_protocol_tlv_data = qede_get_eth_tlv_data,
226 },
227 .force_mac = qede_force_mac,
228 .ports_update = qede_udp_ports_update,
229 };
230
231 static int qede_netdev_event(struct notifier_block *this, unsigned long event,
232 void *ptr)
233 {
234 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
235 struct ethtool_drvinfo drvinfo;
236 struct qede_dev *edev;
237
238 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
239 goto done;
240
241
242 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
243 goto done;
244
245 memset(&drvinfo, 0, sizeof(drvinfo));
246 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
247 if (strcmp(drvinfo.driver, "qede"))
248 goto done;
249 edev = netdev_priv(ndev);
250
251 switch (event) {
252 case NETDEV_CHANGENAME:
253
254 if (!edev->ops || !edev->ops->common)
255 goto done;
256 edev->ops->common->set_name(edev->cdev, edev->ndev->name);
257 break;
258 case NETDEV_CHANGEADDR:
259 edev = netdev_priv(ndev);
260 qede_rdma_event_changeaddr(edev);
261 break;
262 }
263
264 done:
265 return NOTIFY_DONE;
266 }
267
268 static struct notifier_block qede_netdev_notifier = {
269 .notifier_call = qede_netdev_event,
270 };
271
272 static
273 int __init qede_init(void)
274 {
275 int ret;
276
277 pr_info("qede_init: %s\n", version);
278
279 qed_ops = qed_get_eth_ops();
280 if (!qed_ops) {
281 pr_notice("Failed to get qed ethtool operations\n");
282 return -EINVAL;
283 }
284
285
286
287
288 ret = register_netdevice_notifier(&qede_netdev_notifier);
289 if (ret) {
290 pr_notice("Failed to register netdevice_notifier\n");
291 qed_put_eth_ops();
292 return -EINVAL;
293 }
294
295 ret = pci_register_driver(&qede_pci_driver);
296 if (ret) {
297 pr_notice("Failed to register driver\n");
298 unregister_netdevice_notifier(&qede_netdev_notifier);
299 qed_put_eth_ops();
300 return -EINVAL;
301 }
302
303 return 0;
304 }
305
306 static void __exit qede_cleanup(void)
307 {
308 if (debug & QED_LOG_INFO_MASK)
309 pr_info("qede_cleanup called\n");
310
311 unregister_netdevice_notifier(&qede_netdev_notifier);
312 pci_unregister_driver(&qede_pci_driver);
313 qed_put_eth_ops();
314 }
315
316 module_init(qede_init);
317 module_exit(qede_cleanup);
318
319 static int qede_open(struct net_device *ndev);
320 static int qede_close(struct net_device *ndev);
321
322 void qede_fill_by_demand_stats(struct qede_dev *edev)
323 {
324 struct qede_stats_common *p_common = &edev->stats.common;
325 struct qed_eth_stats stats;
326
327 edev->ops->get_vport_stats(edev->cdev, &stats);
328
329 p_common->no_buff_discards = stats.common.no_buff_discards;
330 p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
331 p_common->ttl0_discard = stats.common.ttl0_discard;
332 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
333 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
334 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
335 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
336 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
337 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
338 p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
339 p_common->mac_filter_discards = stats.common.mac_filter_discards;
340 p_common->gft_filter_drop = stats.common.gft_filter_drop;
341
342 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
343 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
344 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
345 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
346 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
347 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
348 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
349 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
350 p_common->coalesced_events = stats.common.tpa_coalesced_events;
351 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
352 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
353 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
354
355 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
356 p_common->rx_65_to_127_byte_packets =
357 stats.common.rx_65_to_127_byte_packets;
358 p_common->rx_128_to_255_byte_packets =
359 stats.common.rx_128_to_255_byte_packets;
360 p_common->rx_256_to_511_byte_packets =
361 stats.common.rx_256_to_511_byte_packets;
362 p_common->rx_512_to_1023_byte_packets =
363 stats.common.rx_512_to_1023_byte_packets;
364 p_common->rx_1024_to_1518_byte_packets =
365 stats.common.rx_1024_to_1518_byte_packets;
366 p_common->rx_crc_errors = stats.common.rx_crc_errors;
367 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
368 p_common->rx_pause_frames = stats.common.rx_pause_frames;
369 p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
370 p_common->rx_align_errors = stats.common.rx_align_errors;
371 p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
372 p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
373 p_common->rx_jabbers = stats.common.rx_jabbers;
374 p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
375 p_common->rx_fragments = stats.common.rx_fragments;
376 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
377 p_common->tx_65_to_127_byte_packets =
378 stats.common.tx_65_to_127_byte_packets;
379 p_common->tx_128_to_255_byte_packets =
380 stats.common.tx_128_to_255_byte_packets;
381 p_common->tx_256_to_511_byte_packets =
382 stats.common.tx_256_to_511_byte_packets;
383 p_common->tx_512_to_1023_byte_packets =
384 stats.common.tx_512_to_1023_byte_packets;
385 p_common->tx_1024_to_1518_byte_packets =
386 stats.common.tx_1024_to_1518_byte_packets;
387 p_common->tx_pause_frames = stats.common.tx_pause_frames;
388 p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
389 p_common->brb_truncates = stats.common.brb_truncates;
390 p_common->brb_discards = stats.common.brb_discards;
391 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
392 p_common->link_change_count = stats.common.link_change_count;
393 p_common->ptp_skip_txts = edev->ptp_skip_txts;
394
395 if (QEDE_IS_BB(edev)) {
396 struct qede_stats_bb *p_bb = &edev->stats.bb;
397
398 p_bb->rx_1519_to_1522_byte_packets =
399 stats.bb.rx_1519_to_1522_byte_packets;
400 p_bb->rx_1519_to_2047_byte_packets =
401 stats.bb.rx_1519_to_2047_byte_packets;
402 p_bb->rx_2048_to_4095_byte_packets =
403 stats.bb.rx_2048_to_4095_byte_packets;
404 p_bb->rx_4096_to_9216_byte_packets =
405 stats.bb.rx_4096_to_9216_byte_packets;
406 p_bb->rx_9217_to_16383_byte_packets =
407 stats.bb.rx_9217_to_16383_byte_packets;
408 p_bb->tx_1519_to_2047_byte_packets =
409 stats.bb.tx_1519_to_2047_byte_packets;
410 p_bb->tx_2048_to_4095_byte_packets =
411 stats.bb.tx_2048_to_4095_byte_packets;
412 p_bb->tx_4096_to_9216_byte_packets =
413 stats.bb.tx_4096_to_9216_byte_packets;
414 p_bb->tx_9217_to_16383_byte_packets =
415 stats.bb.tx_9217_to_16383_byte_packets;
416 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
417 p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
418 } else {
419 struct qede_stats_ah *p_ah = &edev->stats.ah;
420
421 p_ah->rx_1519_to_max_byte_packets =
422 stats.ah.rx_1519_to_max_byte_packets;
423 p_ah->tx_1519_to_max_byte_packets =
424 stats.ah.tx_1519_to_max_byte_packets;
425 }
426 }
427
428 static void qede_get_stats64(struct net_device *dev,
429 struct rtnl_link_stats64 *stats)
430 {
431 struct qede_dev *edev = netdev_priv(dev);
432 struct qede_stats_common *p_common;
433
434 qede_fill_by_demand_stats(edev);
435 p_common = &edev->stats.common;
436
437 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
438 p_common->rx_bcast_pkts;
439 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
440 p_common->tx_bcast_pkts;
441
442 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
443 p_common->rx_bcast_bytes;
444 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
445 p_common->tx_bcast_bytes;
446
447 stats->tx_errors = p_common->tx_err_drop_pkts;
448 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
449
450 stats->rx_fifo_errors = p_common->no_buff_discards;
451
452 if (QEDE_IS_BB(edev))
453 stats->collisions = edev->stats.bb.tx_total_collisions;
454 stats->rx_crc_errors = p_common->rx_crc_errors;
455 stats->rx_frame_errors = p_common->rx_align_errors;
456 }
457
458 #ifdef CONFIG_QED_SRIOV
459 static int qede_get_vf_config(struct net_device *dev, int vfidx,
460 struct ifla_vf_info *ivi)
461 {
462 struct qede_dev *edev = netdev_priv(dev);
463
464 if (!edev->ops)
465 return -EINVAL;
466
467 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
468 }
469
470 static int qede_set_vf_rate(struct net_device *dev, int vfidx,
471 int min_tx_rate, int max_tx_rate)
472 {
473 struct qede_dev *edev = netdev_priv(dev);
474
475 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
476 max_tx_rate);
477 }
478
479 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
480 {
481 struct qede_dev *edev = netdev_priv(dev);
482
483 if (!edev->ops)
484 return -EINVAL;
485
486 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
487 }
488
489 static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
490 int link_state)
491 {
492 struct qede_dev *edev = netdev_priv(dev);
493
494 if (!edev->ops)
495 return -EINVAL;
496
497 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
498 }
499
500 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
501 {
502 struct qede_dev *edev = netdev_priv(dev);
503
504 if (!edev->ops)
505 return -EINVAL;
506
507 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
508 }
509 #endif
510
511 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
512 {
513 struct qede_dev *edev = netdev_priv(dev);
514
515 if (!netif_running(dev))
516 return -EAGAIN;
517
518 switch (cmd) {
519 case SIOCSHWTSTAMP:
520 return qede_ptp_hw_ts(edev, ifr);
521 default:
522 DP_VERBOSE(edev, QED_MSG_DEBUG,
523 "default IOCTL cmd 0x%x\n", cmd);
524 return -EOPNOTSUPP;
525 }
526
527 return 0;
528 }
529
530 static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
531 {
532 struct qede_dev *edev = netdev_priv(ndev);
533 int cos, count, offset;
534
535 if (num_tc > edev->dev_info.num_tc)
536 return -EINVAL;
537
538 netdev_reset_tc(ndev);
539 netdev_set_num_tc(ndev, num_tc);
540
541 for_each_cos_in_txq(edev, cos) {
542 count = QEDE_TSS_COUNT(edev);
543 offset = cos * QEDE_TSS_COUNT(edev);
544 netdev_set_tc_queue(ndev, cos, count, offset);
545 }
546
547 return 0;
548 }
549
550 static int
551 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
552 __be16 proto)
553 {
554 switch (f->command) {
555 case FLOW_CLS_REPLACE:
556 return qede_add_tc_flower_fltr(edev, proto, f);
557 case FLOW_CLS_DESTROY:
558 return qede_delete_flow_filter(edev, f->cookie);
559 default:
560 return -EOPNOTSUPP;
561 }
562 }
563
564 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
565 void *cb_priv)
566 {
567 struct flow_cls_offload *f;
568 struct qede_dev *edev = cb_priv;
569
570 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
571 return -EOPNOTSUPP;
572
573 switch (type) {
574 case TC_SETUP_CLSFLOWER:
575 f = type_data;
576 return qede_set_flower(edev, f, f->common.protocol);
577 default:
578 return -EOPNOTSUPP;
579 }
580 }
581
582 static LIST_HEAD(qede_block_cb_list);
583
584 static int
585 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
586 void *type_data)
587 {
588 struct qede_dev *edev = netdev_priv(dev);
589 struct tc_mqprio_qopt *mqprio;
590
591 switch (type) {
592 case TC_SETUP_BLOCK:
593 return flow_block_cb_setup_simple(type_data,
594 &qede_block_cb_list,
595 qede_setup_tc_block_cb,
596 edev, edev, true);
597 case TC_SETUP_QDISC_MQPRIO:
598 mqprio = type_data;
599
600 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
601 return qede_setup_tc(dev, mqprio->num_tc);
602 default:
603 return -EOPNOTSUPP;
604 }
605 }
606
607 static const struct net_device_ops qede_netdev_ops = {
608 .ndo_open = qede_open,
609 .ndo_stop = qede_close,
610 .ndo_start_xmit = qede_start_xmit,
611 .ndo_select_queue = qede_select_queue,
612 .ndo_set_rx_mode = qede_set_rx_mode,
613 .ndo_set_mac_address = qede_set_mac_addr,
614 .ndo_validate_addr = eth_validate_addr,
615 .ndo_change_mtu = qede_change_mtu,
616 .ndo_do_ioctl = qede_ioctl,
617 #ifdef CONFIG_QED_SRIOV
618 .ndo_set_vf_mac = qede_set_vf_mac,
619 .ndo_set_vf_vlan = qede_set_vf_vlan,
620 .ndo_set_vf_trust = qede_set_vf_trust,
621 #endif
622 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
623 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
624 .ndo_fix_features = qede_fix_features,
625 .ndo_set_features = qede_set_features,
626 .ndo_get_stats64 = qede_get_stats64,
627 #ifdef CONFIG_QED_SRIOV
628 .ndo_set_vf_link_state = qede_set_vf_link_state,
629 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
630 .ndo_get_vf_config = qede_get_vf_config,
631 .ndo_set_vf_rate = qede_set_vf_rate,
632 #endif
633 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
634 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
635 .ndo_features_check = qede_features_check,
636 .ndo_bpf = qede_xdp,
637 #ifdef CONFIG_RFS_ACCEL
638 .ndo_rx_flow_steer = qede_rx_flow_steer,
639 #endif
640 .ndo_setup_tc = qede_setup_tc_offload,
641 };
642
643 static const struct net_device_ops qede_netdev_vf_ops = {
644 .ndo_open = qede_open,
645 .ndo_stop = qede_close,
646 .ndo_start_xmit = qede_start_xmit,
647 .ndo_select_queue = qede_select_queue,
648 .ndo_set_rx_mode = qede_set_rx_mode,
649 .ndo_set_mac_address = qede_set_mac_addr,
650 .ndo_validate_addr = eth_validate_addr,
651 .ndo_change_mtu = qede_change_mtu,
652 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
653 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
654 .ndo_fix_features = qede_fix_features,
655 .ndo_set_features = qede_set_features,
656 .ndo_get_stats64 = qede_get_stats64,
657 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
658 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
659 .ndo_features_check = qede_features_check,
660 };
661
662 static const struct net_device_ops qede_netdev_vf_xdp_ops = {
663 .ndo_open = qede_open,
664 .ndo_stop = qede_close,
665 .ndo_start_xmit = qede_start_xmit,
666 .ndo_select_queue = qede_select_queue,
667 .ndo_set_rx_mode = qede_set_rx_mode,
668 .ndo_set_mac_address = qede_set_mac_addr,
669 .ndo_validate_addr = eth_validate_addr,
670 .ndo_change_mtu = qede_change_mtu,
671 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
672 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
673 .ndo_fix_features = qede_fix_features,
674 .ndo_set_features = qede_set_features,
675 .ndo_get_stats64 = qede_get_stats64,
676 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
677 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
678 .ndo_features_check = qede_features_check,
679 .ndo_bpf = qede_xdp,
680 };
681
682
683
684
685
686
687 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
688 struct pci_dev *pdev,
689 struct qed_dev_eth_info *info,
690 u32 dp_module, u8 dp_level)
691 {
692 struct net_device *ndev;
693 struct qede_dev *edev;
694
695 ndev = alloc_etherdev_mqs(sizeof(*edev),
696 info->num_queues * info->num_tc,
697 info->num_queues);
698 if (!ndev) {
699 pr_err("etherdev allocation failed\n");
700 return NULL;
701 }
702
703 edev = netdev_priv(ndev);
704 edev->ndev = ndev;
705 edev->cdev = cdev;
706 edev->pdev = pdev;
707 edev->dp_module = dp_module;
708 edev->dp_level = dp_level;
709 edev->ops = qed_ops;
710 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
711 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
712
713 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
714 info->num_queues, info->num_queues);
715
716 SET_NETDEV_DEV(ndev, &pdev->dev);
717
718 memset(&edev->stats, 0, sizeof(edev->stats));
719 memcpy(&edev->dev_info, info, sizeof(*info));
720
721
722
723
724 if (edev->dev_info.common.wol_support)
725 edev->wol_enabled = true;
726
727 INIT_LIST_HEAD(&edev->vlan_list);
728
729 return edev;
730 }
731
732 static void qede_init_ndev(struct qede_dev *edev)
733 {
734 struct net_device *ndev = edev->ndev;
735 struct pci_dev *pdev = edev->pdev;
736 bool udp_tunnel_enable = false;
737 netdev_features_t hw_features;
738
739 pci_set_drvdata(pdev, ndev);
740
741 ndev->mem_start = edev->dev_info.common.pci_mem_start;
742 ndev->base_addr = ndev->mem_start;
743 ndev->mem_end = edev->dev_info.common.pci_mem_end;
744 ndev->irq = edev->dev_info.common.pci_irq;
745
746 ndev->watchdog_timeo = TX_TIMEOUT;
747
748 if (IS_VF(edev)) {
749 if (edev->dev_info.xdp_supported)
750 ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
751 else
752 ndev->netdev_ops = &qede_netdev_vf_ops;
753 } else {
754 ndev->netdev_ops = &qede_netdev_ops;
755 }
756
757 qede_set_ethtool_ops(ndev);
758
759 ndev->priv_flags |= IFF_UNICAST_FLT;
760
761
762 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
763 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
764 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
765
766 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1)
767 hw_features |= NETIF_F_NTUPLE;
768
769 if (edev->dev_info.common.vxlan_enable ||
770 edev->dev_info.common.geneve_enable)
771 udp_tunnel_enable = true;
772
773 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
774 hw_features |= NETIF_F_TSO_ECN;
775 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
776 NETIF_F_SG | NETIF_F_TSO |
777 NETIF_F_TSO_ECN | NETIF_F_TSO6 |
778 NETIF_F_RXCSUM;
779 }
780
781 if (udp_tunnel_enable) {
782 hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
783 NETIF_F_GSO_UDP_TUNNEL_CSUM);
784 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
785 NETIF_F_GSO_UDP_TUNNEL_CSUM);
786 }
787
788 if (edev->dev_info.common.gre_enable) {
789 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
790 ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
791 NETIF_F_GSO_GRE_CSUM);
792 }
793
794 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
795 NETIF_F_HIGHDMA;
796 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
797 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
798 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
799
800 ndev->hw_features = hw_features;
801
802
803 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
804 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
805
806
807 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
808
809 ndev->mtu = edev->dev_info.common.mtu;
810 }
811
812
813
814
815
816
817
818
819
820
821
822
823 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
824 {
825 *p_dp_level = QED_LEVEL_NOTICE;
826 *p_dp_module = 0;
827
828 if (debug & QED_LOG_VERBOSE_MASK) {
829 *p_dp_level = QED_LEVEL_VERBOSE;
830 *p_dp_module = (debug & 0x3FFFFFFF);
831 } else if (debug & QED_LOG_INFO_MASK) {
832 *p_dp_level = QED_LEVEL_INFO;
833 } else if (debug & QED_LOG_NOTICE_MASK) {
834 *p_dp_level = QED_LEVEL_NOTICE;
835 }
836 }
837
838 static void qede_free_fp_array(struct qede_dev *edev)
839 {
840 if (edev->fp_array) {
841 struct qede_fastpath *fp;
842 int i;
843
844 for_each_queue(i) {
845 fp = &edev->fp_array[i];
846
847 kfree(fp->sb_info);
848
849
850
851
852 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
853 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
854 kfree(fp->rxq);
855 kfree(fp->xdp_tx);
856 kfree(fp->txq);
857 }
858 kfree(edev->fp_array);
859 }
860
861 edev->num_queues = 0;
862 edev->fp_num_tx = 0;
863 edev->fp_num_rx = 0;
864 }
865
866 static int qede_alloc_fp_array(struct qede_dev *edev)
867 {
868 u8 fp_combined, fp_rx = edev->fp_num_rx;
869 struct qede_fastpath *fp;
870 int i;
871
872 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
873 sizeof(*edev->fp_array), GFP_KERNEL);
874 if (!edev->fp_array) {
875 DP_NOTICE(edev, "fp array allocation failed\n");
876 goto err;
877 }
878
879 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
880
881
882
883
884
885
886 for_each_queue(i) {
887 fp = &edev->fp_array[i];
888
889 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
890 if (!fp->sb_info) {
891 DP_NOTICE(edev, "sb info struct allocation failed\n");
892 goto err;
893 }
894
895 if (fp_rx) {
896 fp->type = QEDE_FASTPATH_RX;
897 fp_rx--;
898 } else if (fp_combined) {
899 fp->type = QEDE_FASTPATH_COMBINED;
900 fp_combined--;
901 } else {
902 fp->type = QEDE_FASTPATH_TX;
903 }
904
905 if (fp->type & QEDE_FASTPATH_TX) {
906 fp->txq = kcalloc(edev->dev_info.num_tc,
907 sizeof(*fp->txq), GFP_KERNEL);
908 if (!fp->txq)
909 goto err;
910 }
911
912 if (fp->type & QEDE_FASTPATH_RX) {
913 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
914 if (!fp->rxq)
915 goto err;
916
917 if (edev->xdp_prog) {
918 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
919 GFP_KERNEL);
920 if (!fp->xdp_tx)
921 goto err;
922 fp->type |= QEDE_FASTPATH_XDP;
923 }
924 }
925 }
926
927 return 0;
928 err:
929 qede_free_fp_array(edev);
930 return -ENOMEM;
931 }
932
933
934
935
936 void __qede_lock(struct qede_dev *edev)
937 {
938 mutex_lock(&edev->qede_lock);
939 }
940
941 void __qede_unlock(struct qede_dev *edev)
942 {
943 mutex_unlock(&edev->qede_lock);
944 }
945
946
947
948
949 static void qede_lock(struct qede_dev *edev)
950 {
951 rtnl_lock();
952 __qede_lock(edev);
953 }
954
955 static void qede_unlock(struct qede_dev *edev)
956 {
957 __qede_unlock(edev);
958 rtnl_unlock();
959 }
960
961 static void qede_sp_task(struct work_struct *work)
962 {
963 struct qede_dev *edev = container_of(work, struct qede_dev,
964 sp_task.work);
965
966
967
968
969
970
971
972 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
973 #ifdef CONFIG_QED_SRIOV
974
975
976
977 qede_sriov_configure(edev->pdev, 0);
978 #endif
979 qede_lock(edev);
980 qede_recovery_handler(edev);
981 qede_unlock(edev);
982 }
983
984 __qede_lock(edev);
985
986 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
987 if (edev->state == QEDE_STATE_OPEN)
988 qede_config_rx_mode(edev->ndev);
989
990 #ifdef CONFIG_RFS_ACCEL
991 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
992 if (edev->state == QEDE_STATE_OPEN)
993 qede_process_arfs_filters(edev, false);
994 }
995 #endif
996 __qede_unlock(edev);
997 }
998
999 static void qede_update_pf_params(struct qed_dev *cdev)
1000 {
1001 struct qed_pf_params pf_params;
1002 u16 num_cons;
1003
1004
1005 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1006
1007
1008 num_cons = QED_MIN_L2_CONS;
1009
1010 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1011
1012
1013
1014
1015 pf_params.eth_pf_params.num_vf_cons = 48;
1016
1017 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1018 qed_ops->common->update_pf_params(cdev, &pf_params);
1019 }
1020
1021 #define QEDE_FW_VER_STR_SIZE 80
1022
1023 static void qede_log_probe(struct qede_dev *edev)
1024 {
1025 struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1026 u8 buf[QEDE_FW_VER_STR_SIZE];
1027 size_t left_size;
1028
1029 snprintf(buf, QEDE_FW_VER_STR_SIZE,
1030 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1031 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1032 p_dev_info->fw_eng,
1033 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1034 QED_MFW_VERSION_3_OFFSET,
1035 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1036 QED_MFW_VERSION_2_OFFSET,
1037 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1038 QED_MFW_VERSION_1_OFFSET,
1039 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1040 QED_MFW_VERSION_0_OFFSET);
1041
1042 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1043 if (p_dev_info->mbi_version && left_size)
1044 snprintf(buf + strlen(buf), left_size,
1045 " [MBI %d.%d.%d]",
1046 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1047 QED_MBI_VERSION_2_OFFSET,
1048 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1049 QED_MBI_VERSION_1_OFFSET,
1050 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1051 QED_MBI_VERSION_0_OFFSET);
1052
1053 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1054 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1055 buf, edev->ndev->name);
1056 }
1057
1058 enum qede_probe_mode {
1059 QEDE_PROBE_NORMAL,
1060 QEDE_PROBE_RECOVERY,
1061 };
1062
1063 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1064 bool is_vf, enum qede_probe_mode mode)
1065 {
1066 struct qed_probe_params probe_params;
1067 struct qed_slowpath_params sp_params;
1068 struct qed_dev_eth_info dev_info;
1069 struct qede_dev *edev;
1070 struct qed_dev *cdev;
1071 int rc;
1072
1073 if (unlikely(dp_level & QED_LEVEL_INFO))
1074 pr_notice("Starting qede probe\n");
1075
1076 memset(&probe_params, 0, sizeof(probe_params));
1077 probe_params.protocol = QED_PROTOCOL_ETH;
1078 probe_params.dp_module = dp_module;
1079 probe_params.dp_level = dp_level;
1080 probe_params.is_vf = is_vf;
1081 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1082 cdev = qed_ops->common->probe(pdev, &probe_params);
1083 if (!cdev) {
1084 rc = -ENODEV;
1085 goto err0;
1086 }
1087
1088 qede_update_pf_params(cdev);
1089
1090
1091 memset(&sp_params, 0, sizeof(sp_params));
1092 sp_params.int_mode = QED_INT_MODE_MSIX;
1093 sp_params.drv_major = QEDE_MAJOR_VERSION;
1094 sp_params.drv_minor = QEDE_MINOR_VERSION;
1095 sp_params.drv_rev = QEDE_REVISION_VERSION;
1096 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
1097 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1098 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1099 if (rc) {
1100 pr_notice("Cannot start slowpath\n");
1101 goto err1;
1102 }
1103
1104
1105 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1106 if (rc)
1107 goto err2;
1108
1109 if (mode != QEDE_PROBE_RECOVERY) {
1110 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1111 dp_level);
1112 if (!edev) {
1113 rc = -ENOMEM;
1114 goto err2;
1115 }
1116 } else {
1117 struct net_device *ndev = pci_get_drvdata(pdev);
1118
1119 edev = netdev_priv(ndev);
1120 edev->cdev = cdev;
1121 memset(&edev->stats, 0, sizeof(edev->stats));
1122 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1123 }
1124
1125 if (is_vf)
1126 set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1127
1128 qede_init_ndev(edev);
1129
1130 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1131 if (rc)
1132 goto err3;
1133
1134 if (mode != QEDE_PROBE_RECOVERY) {
1135
1136
1137
1138
1139
1140 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1141 mutex_init(&edev->qede_lock);
1142
1143 rc = register_netdev(edev->ndev);
1144 if (rc) {
1145 DP_NOTICE(edev, "Cannot register net-device\n");
1146 goto err4;
1147 }
1148 }
1149
1150 edev->ops->common->set_name(cdev, edev->ndev->name);
1151
1152
1153 if (!is_vf)
1154 qede_ptp_enable(edev, (mode == QEDE_PROBE_NORMAL));
1155
1156 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1157
1158 #ifdef CONFIG_DCB
1159 if (!IS_VF(edev))
1160 qede_set_dcbnl_ops(edev->ndev);
1161 #endif
1162
1163 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1164
1165 qede_log_probe(edev);
1166 return 0;
1167
1168 err4:
1169 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1170 err3:
1171 free_netdev(edev->ndev);
1172 err2:
1173 qed_ops->common->slowpath_stop(cdev);
1174 err1:
1175 qed_ops->common->remove(cdev);
1176 err0:
1177 return rc;
1178 }
1179
1180 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1181 {
1182 bool is_vf = false;
1183 u32 dp_module = 0;
1184 u8 dp_level = 0;
1185
1186 switch ((enum qede_pci_private)id->driver_data) {
1187 case QEDE_PRIVATE_VF:
1188 if (debug & QED_LOG_VERBOSE_MASK)
1189 dev_err(&pdev->dev, "Probing a VF\n");
1190 is_vf = true;
1191 break;
1192 default:
1193 if (debug & QED_LOG_VERBOSE_MASK)
1194 dev_err(&pdev->dev, "Probing a PF\n");
1195 }
1196
1197 qede_config_debug(debug, &dp_module, &dp_level);
1198
1199 return __qede_probe(pdev, dp_module, dp_level, is_vf,
1200 QEDE_PROBE_NORMAL);
1201 }
1202
1203 enum qede_remove_mode {
1204 QEDE_REMOVE_NORMAL,
1205 QEDE_REMOVE_RECOVERY,
1206 };
1207
1208 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1209 {
1210 struct net_device *ndev = pci_get_drvdata(pdev);
1211 struct qede_dev *edev;
1212 struct qed_dev *cdev;
1213
1214 if (!ndev) {
1215 dev_info(&pdev->dev, "Device has already been removed\n");
1216 return;
1217 }
1218
1219 edev = netdev_priv(ndev);
1220 cdev = edev->cdev;
1221
1222 DP_INFO(edev, "Starting qede_remove\n");
1223
1224 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1225
1226 if (mode != QEDE_REMOVE_RECOVERY) {
1227 unregister_netdev(ndev);
1228
1229 cancel_delayed_work_sync(&edev->sp_task);
1230
1231 edev->ops->common->set_power_state(cdev, PCI_D0);
1232
1233 pci_set_drvdata(pdev, NULL);
1234 }
1235
1236 qede_ptp_disable(edev);
1237
1238
1239 qed_ops->common->slowpath_stop(cdev);
1240 if (system_state == SYSTEM_POWER_OFF)
1241 return;
1242 qed_ops->common->remove(cdev);
1243
1244
1245
1246
1247
1248
1249
1250 if (mode != QEDE_REMOVE_RECOVERY)
1251 free_netdev(ndev);
1252
1253 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1254 }
1255
1256 static void qede_remove(struct pci_dev *pdev)
1257 {
1258 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1259 }
1260
1261 static void qede_shutdown(struct pci_dev *pdev)
1262 {
1263 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1264 }
1265
1266
1267
1268
1269
1270
1271 static int qede_set_num_queues(struct qede_dev *edev)
1272 {
1273 int rc;
1274 u16 rss_num;
1275
1276
1277 if (edev->req_queues)
1278 rss_num = edev->req_queues;
1279 else
1280 rss_num = netif_get_num_default_rss_queues() *
1281 edev->dev_info.common.num_hwfns;
1282
1283 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1284
1285 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1286 if (rc > 0) {
1287
1288 edev->num_queues = rc;
1289 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1290 QEDE_QUEUE_CNT(edev), rss_num);
1291 rc = 0;
1292 }
1293
1294 edev->fp_num_tx = edev->req_num_tx;
1295 edev->fp_num_rx = edev->req_num_rx;
1296
1297 return rc;
1298 }
1299
1300 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1301 u16 sb_id)
1302 {
1303 if (sb_info->sb_virt) {
1304 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1305 QED_SB_TYPE_L2_QUEUE);
1306 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1307 (void *)sb_info->sb_virt, sb_info->sb_phys);
1308 memset(sb_info, 0, sizeof(*sb_info));
1309 }
1310 }
1311
1312
1313 static int qede_alloc_mem_sb(struct qede_dev *edev,
1314 struct qed_sb_info *sb_info, u16 sb_id)
1315 {
1316 struct status_block_e4 *sb_virt;
1317 dma_addr_t sb_phys;
1318 int rc;
1319
1320 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1321 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1322 if (!sb_virt) {
1323 DP_ERR(edev, "Status block allocation failed\n");
1324 return -ENOMEM;
1325 }
1326
1327 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1328 sb_virt, sb_phys, sb_id,
1329 QED_SB_TYPE_L2_QUEUE);
1330 if (rc) {
1331 DP_ERR(edev, "Status block initialization failed\n");
1332 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1333 sb_virt, sb_phys);
1334 return rc;
1335 }
1336
1337 return 0;
1338 }
1339
1340 static void qede_free_rx_buffers(struct qede_dev *edev,
1341 struct qede_rx_queue *rxq)
1342 {
1343 u16 i;
1344
1345 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1346 struct sw_rx_data *rx_buf;
1347 struct page *data;
1348
1349 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1350 data = rx_buf->data;
1351
1352 dma_unmap_page(&edev->pdev->dev,
1353 rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1354
1355 rx_buf->data = NULL;
1356 __free_page(data);
1357 }
1358 }
1359
1360 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1361 {
1362
1363 qede_free_rx_buffers(edev, rxq);
1364
1365
1366 kfree(rxq->sw_rx_ring);
1367
1368
1369 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1370 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1371 }
1372
1373 static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1374 {
1375 int i;
1376
1377 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1378 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1379
1380 tpa_info->state = QEDE_AGG_STATE_NONE;
1381 }
1382 }
1383
1384
1385 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1386 {
1387 int i, rc, size;
1388
1389 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1390
1391 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1392
1393 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1394 size = rxq->rx_headroom +
1395 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1396
1397
1398 if (rxq->rx_buf_size + size > PAGE_SIZE)
1399 rxq->rx_buf_size = PAGE_SIZE - size;
1400
1401
1402
1403
1404 if (!edev->xdp_prog) {
1405 size = size + rxq->rx_buf_size;
1406 rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1407 } else {
1408 rxq->rx_buf_seg_size = PAGE_SIZE;
1409 edev->ndev->features &= ~NETIF_F_GRO_HW;
1410 }
1411
1412
1413 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1414 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1415 if (!rxq->sw_rx_ring) {
1416 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1417 rc = -ENOMEM;
1418 goto err;
1419 }
1420
1421
1422 rc = edev->ops->common->chain_alloc(edev->cdev,
1423 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1424 QED_CHAIN_MODE_NEXT_PTR,
1425 QED_CHAIN_CNT_TYPE_U16,
1426 RX_RING_SIZE,
1427 sizeof(struct eth_rx_bd),
1428 &rxq->rx_bd_ring, NULL);
1429 if (rc)
1430 goto err;
1431
1432
1433 rc = edev->ops->common->chain_alloc(edev->cdev,
1434 QED_CHAIN_USE_TO_CONSUME,
1435 QED_CHAIN_MODE_PBL,
1436 QED_CHAIN_CNT_TYPE_U16,
1437 RX_RING_SIZE,
1438 sizeof(union eth_rx_cqe),
1439 &rxq->rx_comp_ring, NULL);
1440 if (rc)
1441 goto err;
1442
1443
1444 rxq->filled_buffers = 0;
1445 for (i = 0; i < rxq->num_rx_buffers; i++) {
1446 rc = qede_alloc_rx_buffer(rxq, false);
1447 if (rc) {
1448 DP_ERR(edev,
1449 "Rx buffers allocation failed at index %d\n", i);
1450 goto err;
1451 }
1452 }
1453
1454 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1455 if (!edev->gro_disable)
1456 qede_set_tpa_param(rxq);
1457 err:
1458 return rc;
1459 }
1460
1461 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1462 {
1463
1464 if (txq->is_xdp)
1465 kfree(txq->sw_tx_ring.xdp);
1466 else
1467 kfree(txq->sw_tx_ring.skbs);
1468
1469
1470 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1471 }
1472
1473
1474 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1475 {
1476 union eth_tx_bd_types *p_virt;
1477 int size, rc;
1478
1479 txq->num_tx_buffers = edev->q_num_tx_buffers;
1480
1481
1482 if (txq->is_xdp) {
1483 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1484 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1485 if (!txq->sw_tx_ring.xdp)
1486 goto err;
1487 } else {
1488 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1489 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1490 if (!txq->sw_tx_ring.skbs)
1491 goto err;
1492 }
1493
1494 rc = edev->ops->common->chain_alloc(edev->cdev,
1495 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1496 QED_CHAIN_MODE_PBL,
1497 QED_CHAIN_CNT_TYPE_U16,
1498 txq->num_tx_buffers,
1499 sizeof(*p_virt),
1500 &txq->tx_pbl, NULL);
1501 if (rc)
1502 goto err;
1503
1504 return 0;
1505
1506 err:
1507 qede_free_mem_txq(edev, txq);
1508 return -ENOMEM;
1509 }
1510
1511
1512 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1513 {
1514 qede_free_mem_sb(edev, fp->sb_info, fp->id);
1515
1516 if (fp->type & QEDE_FASTPATH_RX)
1517 qede_free_mem_rxq(edev, fp->rxq);
1518
1519 if (fp->type & QEDE_FASTPATH_XDP)
1520 qede_free_mem_txq(edev, fp->xdp_tx);
1521
1522 if (fp->type & QEDE_FASTPATH_TX) {
1523 int cos;
1524
1525 for_each_cos_in_txq(edev, cos)
1526 qede_free_mem_txq(edev, &fp->txq[cos]);
1527 }
1528 }
1529
1530
1531
1532
1533 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1534 {
1535 int rc = 0;
1536
1537 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1538 if (rc)
1539 goto out;
1540
1541 if (fp->type & QEDE_FASTPATH_RX) {
1542 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1543 if (rc)
1544 goto out;
1545 }
1546
1547 if (fp->type & QEDE_FASTPATH_XDP) {
1548 rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1549 if (rc)
1550 goto out;
1551 }
1552
1553 if (fp->type & QEDE_FASTPATH_TX) {
1554 int cos;
1555
1556 for_each_cos_in_txq(edev, cos) {
1557 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1558 if (rc)
1559 goto out;
1560 }
1561 }
1562
1563 out:
1564 return rc;
1565 }
1566
1567 static void qede_free_mem_load(struct qede_dev *edev)
1568 {
1569 int i;
1570
1571 for_each_queue(i) {
1572 struct qede_fastpath *fp = &edev->fp_array[i];
1573
1574 qede_free_mem_fp(edev, fp);
1575 }
1576 }
1577
1578
1579 static int qede_alloc_mem_load(struct qede_dev *edev)
1580 {
1581 int rc = 0, queue_id;
1582
1583 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1584 struct qede_fastpath *fp = &edev->fp_array[queue_id];
1585
1586 rc = qede_alloc_mem_fp(edev, fp);
1587 if (rc) {
1588 DP_ERR(edev,
1589 "Failed to allocate memory for fastpath - rss id = %d\n",
1590 queue_id);
1591 qede_free_mem_load(edev);
1592 return rc;
1593 }
1594 }
1595
1596 return 0;
1597 }
1598
1599 static void qede_empty_tx_queue(struct qede_dev *edev,
1600 struct qede_tx_queue *txq)
1601 {
1602 unsigned int pkts_compl = 0, bytes_compl = 0;
1603 struct netdev_queue *netdev_txq;
1604 int rc, len = 0;
1605
1606 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1607
1608 while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1609 qed_chain_get_prod_idx(&txq->tx_pbl)) {
1610 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1611 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1612 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1613 qed_chain_get_prod_idx(&txq->tx_pbl));
1614
1615 rc = qede_free_tx_pkt(edev, txq, &len);
1616 if (rc) {
1617 DP_NOTICE(edev,
1618 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1619 txq->index,
1620 qed_chain_get_cons_idx(&txq->tx_pbl),
1621 qed_chain_get_prod_idx(&txq->tx_pbl));
1622 break;
1623 }
1624
1625 bytes_compl += len;
1626 pkts_compl++;
1627 txq->sw_tx_cons++;
1628 }
1629
1630 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1631 }
1632
1633 static void qede_empty_tx_queues(struct qede_dev *edev)
1634 {
1635 int i;
1636
1637 for_each_queue(i)
1638 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1639 int cos;
1640
1641 for_each_cos_in_txq(edev, cos) {
1642 struct qede_fastpath *fp;
1643
1644 fp = &edev->fp_array[i];
1645 qede_empty_tx_queue(edev,
1646 &fp->txq[cos]);
1647 }
1648 }
1649 }
1650
1651
1652 static void qede_init_fp(struct qede_dev *edev)
1653 {
1654 int queue_id, rxq_index = 0, txq_index = 0;
1655 struct qede_fastpath *fp;
1656
1657 for_each_queue(queue_id) {
1658 fp = &edev->fp_array[queue_id];
1659
1660 fp->edev = edev;
1661 fp->id = queue_id;
1662
1663 if (fp->type & QEDE_FASTPATH_XDP) {
1664 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1665 rxq_index);
1666 fp->xdp_tx->is_xdp = 1;
1667 }
1668
1669 if (fp->type & QEDE_FASTPATH_RX) {
1670 fp->rxq->rxq_id = rxq_index++;
1671
1672
1673 if (fp->type & QEDE_FASTPATH_XDP)
1674 fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1675 else
1676 fp->rxq->data_direction = DMA_FROM_DEVICE;
1677 fp->rxq->dev = &edev->pdev->dev;
1678
1679
1680 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1681 fp->rxq->rxq_id) < 0);
1682 }
1683
1684 if (fp->type & QEDE_FASTPATH_TX) {
1685 int cos;
1686
1687 for_each_cos_in_txq(edev, cos) {
1688 struct qede_tx_queue *txq = &fp->txq[cos];
1689 u16 ndev_tx_id;
1690
1691 txq->cos = cos;
1692 txq->index = txq_index;
1693 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1694 txq->ndev_txq_id = ndev_tx_id;
1695
1696 if (edev->dev_info.is_legacy)
1697 txq->is_legacy = 1;
1698 txq->dev = &edev->pdev->dev;
1699 }
1700
1701 txq_index++;
1702 }
1703
1704 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1705 edev->ndev->name, queue_id);
1706 }
1707 }
1708
1709 static int qede_set_real_num_queues(struct qede_dev *edev)
1710 {
1711 int rc = 0;
1712
1713 rc = netif_set_real_num_tx_queues(edev->ndev,
1714 QEDE_TSS_COUNT(edev) *
1715 edev->dev_info.num_tc);
1716 if (rc) {
1717 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1718 return rc;
1719 }
1720
1721 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1722 if (rc) {
1723 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1724 return rc;
1725 }
1726
1727 return 0;
1728 }
1729
1730 static void qede_napi_disable_remove(struct qede_dev *edev)
1731 {
1732 int i;
1733
1734 for_each_queue(i) {
1735 napi_disable(&edev->fp_array[i].napi);
1736
1737 netif_napi_del(&edev->fp_array[i].napi);
1738 }
1739 }
1740
1741 static void qede_napi_add_enable(struct qede_dev *edev)
1742 {
1743 int i;
1744
1745
1746 for_each_queue(i) {
1747 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
1748 qede_poll, NAPI_POLL_WEIGHT);
1749 napi_enable(&edev->fp_array[i].napi);
1750 }
1751 }
1752
1753 static void qede_sync_free_irqs(struct qede_dev *edev)
1754 {
1755 int i;
1756
1757 for (i = 0; i < edev->int_info.used_cnt; i++) {
1758 if (edev->int_info.msix_cnt) {
1759 synchronize_irq(edev->int_info.msix[i].vector);
1760 free_irq(edev->int_info.msix[i].vector,
1761 &edev->fp_array[i]);
1762 } else {
1763 edev->ops->common->simd_handler_clean(edev->cdev, i);
1764 }
1765 }
1766
1767 edev->int_info.used_cnt = 0;
1768 }
1769
1770 static int qede_req_msix_irqs(struct qede_dev *edev)
1771 {
1772 int i, rc;
1773
1774
1775 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1776 DP_ERR(edev,
1777 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1778 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1779 return -EINVAL;
1780 }
1781
1782 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1783 #ifdef CONFIG_RFS_ACCEL
1784 struct qede_fastpath *fp = &edev->fp_array[i];
1785
1786 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1787 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1788 edev->int_info.msix[i].vector);
1789 if (rc) {
1790 DP_ERR(edev, "Failed to add CPU rmap\n");
1791 qede_free_arfs(edev);
1792 }
1793 }
1794 #endif
1795 rc = request_irq(edev->int_info.msix[i].vector,
1796 qede_msix_fp_int, 0, edev->fp_array[i].name,
1797 &edev->fp_array[i]);
1798 if (rc) {
1799 DP_ERR(edev, "Request fp %d irq failed\n", i);
1800 qede_sync_free_irqs(edev);
1801 return rc;
1802 }
1803 DP_VERBOSE(edev, NETIF_MSG_INTR,
1804 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
1805 edev->fp_array[i].name, i,
1806 &edev->fp_array[i]);
1807 edev->int_info.used_cnt++;
1808 }
1809
1810 return 0;
1811 }
1812
1813 static void qede_simd_fp_handler(void *cookie)
1814 {
1815 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
1816
1817 napi_schedule_irqoff(&fp->napi);
1818 }
1819
1820 static int qede_setup_irqs(struct qede_dev *edev)
1821 {
1822 int i, rc = 0;
1823
1824
1825 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
1826 if (rc)
1827 return rc;
1828
1829 if (edev->int_info.msix_cnt) {
1830 rc = qede_req_msix_irqs(edev);
1831 if (rc)
1832 return rc;
1833 edev->ndev->irq = edev->int_info.msix[0].vector;
1834 } else {
1835 const struct qed_common_ops *ops;
1836
1837
1838 ops = edev->ops->common;
1839 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
1840 ops->simd_handler_config(edev->cdev,
1841 &edev->fp_array[i], i,
1842 qede_simd_fp_handler);
1843 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
1844 }
1845 return 0;
1846 }
1847
1848 static int qede_drain_txq(struct qede_dev *edev,
1849 struct qede_tx_queue *txq, bool allow_drain)
1850 {
1851 int rc, cnt = 1000;
1852
1853 while (txq->sw_tx_cons != txq->sw_tx_prod) {
1854 if (!cnt) {
1855 if (allow_drain) {
1856 DP_NOTICE(edev,
1857 "Tx queue[%d] is stuck, requesting MCP to drain\n",
1858 txq->index);
1859 rc = edev->ops->common->drain(edev->cdev);
1860 if (rc)
1861 return rc;
1862 return qede_drain_txq(edev, txq, false);
1863 }
1864 DP_NOTICE(edev,
1865 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
1866 txq->index, txq->sw_tx_prod,
1867 txq->sw_tx_cons);
1868 return -ENODEV;
1869 }
1870 cnt--;
1871 usleep_range(1000, 2000);
1872 barrier();
1873 }
1874
1875
1876 usleep_range(1000, 2000);
1877
1878 return 0;
1879 }
1880
1881 static int qede_stop_txq(struct qede_dev *edev,
1882 struct qede_tx_queue *txq, int rss_id)
1883 {
1884
1885 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
1886 &txq->tx_db);
1887
1888 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
1889 }
1890
1891 static int qede_stop_queues(struct qede_dev *edev)
1892 {
1893 struct qed_update_vport_params *vport_update_params;
1894 struct qed_dev *cdev = edev->cdev;
1895 struct qede_fastpath *fp;
1896 int rc, i;
1897
1898
1899 vport_update_params = vzalloc(sizeof(*vport_update_params));
1900 if (!vport_update_params)
1901 return -ENOMEM;
1902
1903 vport_update_params->vport_id = 0;
1904 vport_update_params->update_vport_active_flg = 1;
1905 vport_update_params->vport_active_flg = 0;
1906 vport_update_params->update_rss_flg = 0;
1907
1908 rc = edev->ops->vport_update(cdev, vport_update_params);
1909 vfree(vport_update_params);
1910
1911 if (rc) {
1912 DP_ERR(edev, "Failed to update vport\n");
1913 return rc;
1914 }
1915
1916
1917 for_each_queue(i) {
1918 fp = &edev->fp_array[i];
1919
1920 if (fp->type & QEDE_FASTPATH_TX) {
1921 int cos;
1922
1923 for_each_cos_in_txq(edev, cos) {
1924 rc = qede_drain_txq(edev, &fp->txq[cos], true);
1925 if (rc)
1926 return rc;
1927 }
1928 }
1929
1930 if (fp->type & QEDE_FASTPATH_XDP) {
1931 rc = qede_drain_txq(edev, fp->xdp_tx, true);
1932 if (rc)
1933 return rc;
1934 }
1935 }
1936
1937
1938 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
1939 fp = &edev->fp_array[i];
1940
1941
1942 if (fp->type & QEDE_FASTPATH_TX) {
1943 int cos;
1944
1945 for_each_cos_in_txq(edev, cos) {
1946 rc = qede_stop_txq(edev, &fp->txq[cos], i);
1947 if (rc)
1948 return rc;
1949 }
1950 }
1951
1952
1953 if (fp->type & QEDE_FASTPATH_RX) {
1954 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
1955 if (rc) {
1956 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
1957 return rc;
1958 }
1959 }
1960
1961
1962 if (fp->type & QEDE_FASTPATH_XDP) {
1963 rc = qede_stop_txq(edev, fp->xdp_tx, i);
1964 if (rc)
1965 return rc;
1966
1967 bpf_prog_put(fp->rxq->xdp_prog);
1968 }
1969 }
1970
1971
1972 rc = edev->ops->vport_stop(cdev, 0);
1973 if (rc)
1974 DP_ERR(edev, "Failed to stop VPORT\n");
1975
1976 return rc;
1977 }
1978
1979 static int qede_start_txq(struct qede_dev *edev,
1980 struct qede_fastpath *fp,
1981 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
1982 {
1983 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
1984 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
1985 struct qed_queue_start_common_params params;
1986 struct qed_txq_start_ret_params ret_params;
1987 int rc;
1988
1989 memset(¶ms, 0, sizeof(params));
1990 memset(&ret_params, 0, sizeof(ret_params));
1991
1992
1993
1994
1995 if (txq->is_xdp)
1996 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
1997 else
1998 params.queue_id = txq->index;
1999
2000 params.p_sb = fp->sb_info;
2001 params.sb_idx = sb_idx;
2002 params.tc = txq->cos;
2003
2004 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table,
2005 page_cnt, &ret_params);
2006 if (rc) {
2007 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2008 return rc;
2009 }
2010
2011 txq->doorbell_addr = ret_params.p_doorbell;
2012 txq->handle = ret_params.p_handle;
2013
2014
2015 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2016
2017
2018 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2019 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2020 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2021 DQ_XCM_ETH_TX_BD_PROD_CMD);
2022 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2023
2024
2025 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2026 &txq->tx_db, DB_REC_WIDTH_32B,
2027 DB_REC_KERNEL);
2028
2029 return rc;
2030 }
2031
2032 static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2033 {
2034 int vlan_removal_en = 1;
2035 struct qed_dev *cdev = edev->cdev;
2036 struct qed_dev_info *qed_info = &edev->dev_info.common;
2037 struct qed_update_vport_params *vport_update_params;
2038 struct qed_queue_start_common_params q_params;
2039 struct qed_start_vport_params start = {0};
2040 int rc, i;
2041
2042 if (!edev->num_queues) {
2043 DP_ERR(edev,
2044 "Cannot update V-VPORT as active as there are no Rx queues\n");
2045 return -EINVAL;
2046 }
2047
2048 vport_update_params = vzalloc(sizeof(*vport_update_params));
2049 if (!vport_update_params)
2050 return -ENOMEM;
2051
2052 start.handle_ptp_pkts = !!(edev->ptp);
2053 start.gro_enable = !edev->gro_disable;
2054 start.mtu = edev->ndev->mtu;
2055 start.vport_id = 0;
2056 start.drop_ttl0 = true;
2057 start.remove_inner_vlan = vlan_removal_en;
2058 start.clear_stats = clear_stats;
2059
2060 rc = edev->ops->vport_start(cdev, &start);
2061
2062 if (rc) {
2063 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2064 goto out;
2065 }
2066
2067 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2068 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2069 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2070
2071 for_each_queue(i) {
2072 struct qede_fastpath *fp = &edev->fp_array[i];
2073 dma_addr_t p_phys_table;
2074 u32 page_cnt;
2075
2076 if (fp->type & QEDE_FASTPATH_RX) {
2077 struct qed_rxq_start_ret_params ret_params;
2078 struct qede_rx_queue *rxq = fp->rxq;
2079 __le16 *val;
2080
2081 memset(&ret_params, 0, sizeof(ret_params));
2082 memset(&q_params, 0, sizeof(q_params));
2083 q_params.queue_id = rxq->rxq_id;
2084 q_params.vport_id = 0;
2085 q_params.p_sb = fp->sb_info;
2086 q_params.sb_idx = RX_PI;
2087
2088 p_phys_table =
2089 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2090 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2091
2092 rc = edev->ops->q_rx_start(cdev, i, &q_params,
2093 rxq->rx_buf_size,
2094 rxq->rx_bd_ring.p_phys_addr,
2095 p_phys_table,
2096 page_cnt, &ret_params);
2097 if (rc) {
2098 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2099 rc);
2100 goto out;
2101 }
2102
2103
2104 rxq->hw_rxq_prod_addr = ret_params.p_prod;
2105 rxq->handle = ret_params.p_handle;
2106
2107 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2108 rxq->hw_cons_ptr = val;
2109
2110 qede_update_rx_prod(edev, rxq);
2111 }
2112
2113 if (fp->type & QEDE_FASTPATH_XDP) {
2114 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2115 if (rc)
2116 goto out;
2117
2118 fp->rxq->xdp_prog = bpf_prog_add(edev->xdp_prog, 1);
2119 if (IS_ERR(fp->rxq->xdp_prog)) {
2120 rc = PTR_ERR(fp->rxq->xdp_prog);
2121 fp->rxq->xdp_prog = NULL;
2122 goto out;
2123 }
2124 }
2125
2126 if (fp->type & QEDE_FASTPATH_TX) {
2127 int cos;
2128
2129 for_each_cos_in_txq(edev, cos) {
2130 rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2131 TX_PI(cos));
2132 if (rc)
2133 goto out;
2134 }
2135 }
2136 }
2137
2138
2139 vport_update_params->vport_id = start.vport_id;
2140 vport_update_params->update_vport_active_flg = 1;
2141 vport_update_params->vport_active_flg = 1;
2142
2143 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2144 qed_info->tx_switching) {
2145 vport_update_params->update_tx_switching_flg = 1;
2146 vport_update_params->tx_switching_flg = 1;
2147 }
2148
2149 qede_fill_rss_params(edev, &vport_update_params->rss_params,
2150 &vport_update_params->update_rss_flg);
2151
2152 rc = edev->ops->vport_update(cdev, vport_update_params);
2153 if (rc)
2154 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2155
2156 out:
2157 vfree(vport_update_params);
2158 return rc;
2159 }
2160
2161 enum qede_unload_mode {
2162 QEDE_UNLOAD_NORMAL,
2163 QEDE_UNLOAD_RECOVERY,
2164 };
2165
2166 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2167 bool is_locked)
2168 {
2169 struct qed_link_params link_params;
2170 int rc;
2171
2172 DP_INFO(edev, "Starting qede unload\n");
2173
2174 if (!is_locked)
2175 __qede_lock(edev);
2176
2177 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2178
2179 if (mode != QEDE_UNLOAD_RECOVERY)
2180 edev->state = QEDE_STATE_CLOSED;
2181
2182 qede_rdma_dev_event_close(edev);
2183
2184
2185 netif_tx_disable(edev->ndev);
2186 netif_carrier_off(edev->ndev);
2187
2188 if (mode != QEDE_UNLOAD_RECOVERY) {
2189
2190 memset(&link_params, 0, sizeof(link_params));
2191 link_params.link_up = false;
2192 edev->ops->common->set_link(edev->cdev, &link_params);
2193
2194 rc = qede_stop_queues(edev);
2195 if (rc) {
2196 qede_sync_free_irqs(edev);
2197 goto out;
2198 }
2199
2200 DP_INFO(edev, "Stopped Queues\n");
2201 }
2202
2203 qede_vlan_mark_nonconfigured(edev);
2204 edev->ops->fastpath_stop(edev->cdev);
2205
2206 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
2207 qede_poll_for_freeing_arfs_filters(edev);
2208 qede_free_arfs(edev);
2209 }
2210
2211
2212 qede_sync_free_irqs(edev);
2213 edev->ops->common->set_fp_int(edev->cdev, 0);
2214
2215 qede_napi_disable_remove(edev);
2216
2217 if (mode == QEDE_UNLOAD_RECOVERY)
2218 qede_empty_tx_queues(edev);
2219
2220 qede_free_mem_load(edev);
2221 qede_free_fp_array(edev);
2222
2223 out:
2224 if (!is_locked)
2225 __qede_unlock(edev);
2226
2227 if (mode != QEDE_UNLOAD_RECOVERY)
2228 DP_NOTICE(edev, "Link is down\n");
2229
2230 edev->ptp_skip_txts = 0;
2231
2232 DP_INFO(edev, "Ending qede unload\n");
2233 }
2234
2235 enum qede_load_mode {
2236 QEDE_LOAD_NORMAL,
2237 QEDE_LOAD_RELOAD,
2238 QEDE_LOAD_RECOVERY,
2239 };
2240
2241 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2242 bool is_locked)
2243 {
2244 struct qed_link_params link_params;
2245 u8 num_tc;
2246 int rc;
2247
2248 DP_INFO(edev, "Starting qede load\n");
2249
2250 if (!is_locked)
2251 __qede_lock(edev);
2252
2253 rc = qede_set_num_queues(edev);
2254 if (rc)
2255 goto out;
2256
2257 rc = qede_alloc_fp_array(edev);
2258 if (rc)
2259 goto out;
2260
2261 qede_init_fp(edev);
2262
2263 rc = qede_alloc_mem_load(edev);
2264 if (rc)
2265 goto err1;
2266 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2267 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2268
2269 rc = qede_set_real_num_queues(edev);
2270 if (rc)
2271 goto err2;
2272
2273 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
2274 rc = qede_alloc_arfs(edev);
2275 if (rc)
2276 DP_NOTICE(edev, "aRFS memory allocation failed\n");
2277 }
2278
2279 qede_napi_add_enable(edev);
2280 DP_INFO(edev, "Napi added and enabled\n");
2281
2282 rc = qede_setup_irqs(edev);
2283 if (rc)
2284 goto err3;
2285 DP_INFO(edev, "Setup IRQs succeeded\n");
2286
2287 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2288 if (rc)
2289 goto err4;
2290 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2291
2292 num_tc = netdev_get_num_tc(edev->ndev);
2293 num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2294 qede_setup_tc(edev->ndev, num_tc);
2295
2296
2297 qede_configure_vlan_filters(edev);
2298
2299 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2300
2301
2302 memset(&link_params, 0, sizeof(link_params));
2303 link_params.link_up = true;
2304 edev->ops->common->set_link(edev->cdev, &link_params);
2305
2306 edev->state = QEDE_STATE_OPEN;
2307
2308 DP_INFO(edev, "Ending successfully qede load\n");
2309
2310 goto out;
2311 err4:
2312 qede_sync_free_irqs(edev);
2313 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
2314 err3:
2315 qede_napi_disable_remove(edev);
2316 err2:
2317 qede_free_mem_load(edev);
2318 err1:
2319 edev->ops->common->set_fp_int(edev->cdev, 0);
2320 qede_free_fp_array(edev);
2321 edev->num_queues = 0;
2322 edev->fp_num_tx = 0;
2323 edev->fp_num_rx = 0;
2324 out:
2325 if (!is_locked)
2326 __qede_unlock(edev);
2327
2328 return rc;
2329 }
2330
2331
2332
2333
2334 void qede_reload(struct qede_dev *edev,
2335 struct qede_reload_args *args, bool is_locked)
2336 {
2337 if (!is_locked)
2338 __qede_lock(edev);
2339
2340
2341
2342
2343
2344 if (edev->state == QEDE_STATE_OPEN) {
2345 qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2346 if (args)
2347 args->func(edev, args);
2348 qede_load(edev, QEDE_LOAD_RELOAD, true);
2349
2350
2351 qede_config_rx_mode(edev->ndev);
2352 } else if (args) {
2353 args->func(edev, args);
2354 }
2355
2356 if (!is_locked)
2357 __qede_unlock(edev);
2358 }
2359
2360
2361 static int qede_open(struct net_device *ndev)
2362 {
2363 struct qede_dev *edev = netdev_priv(ndev);
2364 int rc;
2365
2366 netif_carrier_off(ndev);
2367
2368 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2369
2370 rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2371 if (rc)
2372 return rc;
2373
2374 udp_tunnel_get_rx_info(ndev);
2375
2376 edev->ops->common->update_drv_state(edev->cdev, true);
2377
2378 return 0;
2379 }
2380
2381 static int qede_close(struct net_device *ndev)
2382 {
2383 struct qede_dev *edev = netdev_priv(ndev);
2384
2385 qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2386
2387 edev->ops->common->update_drv_state(edev->cdev, false);
2388
2389 return 0;
2390 }
2391
2392 static void qede_link_update(void *dev, struct qed_link_output *link)
2393 {
2394 struct qede_dev *edev = dev;
2395
2396 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2397 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2398 return;
2399 }
2400
2401 if (link->link_up) {
2402 if (!netif_carrier_ok(edev->ndev)) {
2403 DP_NOTICE(edev, "Link is up\n");
2404 netif_tx_start_all_queues(edev->ndev);
2405 netif_carrier_on(edev->ndev);
2406 qede_rdma_dev_event_open(edev);
2407 }
2408 } else {
2409 if (netif_carrier_ok(edev->ndev)) {
2410 DP_NOTICE(edev, "Link is down\n");
2411 netif_tx_disable(edev->ndev);
2412 netif_carrier_off(edev->ndev);
2413 qede_rdma_dev_event_close(edev);
2414 }
2415 }
2416 }
2417
2418 static void qede_schedule_recovery_handler(void *dev)
2419 {
2420 struct qede_dev *edev = dev;
2421
2422 if (edev->state == QEDE_STATE_RECOVERY) {
2423 DP_NOTICE(edev,
2424 "Avoid scheduling a recovery handling since already in recovery state\n");
2425 return;
2426 }
2427
2428 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2429 schedule_delayed_work(&edev->sp_task, 0);
2430
2431 DP_INFO(edev, "Scheduled a recovery handler\n");
2432 }
2433
2434 static void qede_recovery_failed(struct qede_dev *edev)
2435 {
2436 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2437
2438 netif_device_detach(edev->ndev);
2439
2440 if (edev->cdev)
2441 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2442 }
2443
2444 static void qede_recovery_handler(struct qede_dev *edev)
2445 {
2446 u32 curr_state = edev->state;
2447 int rc;
2448
2449 DP_NOTICE(edev, "Starting a recovery process\n");
2450
2451
2452
2453
2454 edev->state = QEDE_STATE_RECOVERY;
2455
2456 edev->ops->common->recovery_prolog(edev->cdev);
2457
2458 if (curr_state == QEDE_STATE_OPEN)
2459 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2460
2461 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2462
2463 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2464 IS_VF(edev), QEDE_PROBE_RECOVERY);
2465 if (rc) {
2466 edev->cdev = NULL;
2467 goto err;
2468 }
2469
2470 if (curr_state == QEDE_STATE_OPEN) {
2471 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2472 if (rc)
2473 goto err;
2474
2475 qede_config_rx_mode(edev->ndev);
2476 udp_tunnel_get_rx_info(edev->ndev);
2477 }
2478
2479 edev->state = curr_state;
2480
2481 DP_NOTICE(edev, "Recovery handling is done\n");
2482
2483 return;
2484
2485 err:
2486 qede_recovery_failed(edev);
2487 }
2488
2489 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2490 {
2491 struct netdev_queue *netdev_txq;
2492
2493 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2494 if (netif_xmit_stopped(netdev_txq))
2495 return true;
2496
2497 return false;
2498 }
2499
2500 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2501 {
2502 struct qede_dev *edev = dev;
2503 struct netdev_hw_addr *ha;
2504 int i;
2505
2506 if (edev->ndev->features & NETIF_F_IP_CSUM)
2507 data->feat_flags |= QED_TLV_IP_CSUM;
2508 if (edev->ndev->features & NETIF_F_TSO)
2509 data->feat_flags |= QED_TLV_LSO;
2510
2511 ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2512 memset(data->mac[1], 0, ETH_ALEN);
2513 memset(data->mac[2], 0, ETH_ALEN);
2514
2515 netif_addr_lock_bh(edev->ndev);
2516 i = 1;
2517 netdev_for_each_uc_addr(ha, edev->ndev) {
2518 ether_addr_copy(data->mac[i++], ha->addr);
2519 if (i == QED_TLV_MAC_COUNT)
2520 break;
2521 }
2522
2523 netif_addr_unlock_bh(edev->ndev);
2524 }
2525
2526 static void qede_get_eth_tlv_data(void *dev, void *data)
2527 {
2528 struct qed_mfw_tlv_eth *etlv = data;
2529 struct qede_dev *edev = dev;
2530 struct qede_fastpath *fp;
2531 int i;
2532
2533 etlv->lso_maxoff_size = 0XFFFF;
2534 etlv->lso_maxoff_size_set = true;
2535 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2536 etlv->lso_minseg_size_set = true;
2537 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2538 etlv->prom_mode_set = true;
2539 etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2540 etlv->tx_descr_size_set = true;
2541 etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2542 etlv->rx_descr_size_set = true;
2543 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2544 etlv->iov_offload_set = true;
2545
2546
2547
2548
2549 etlv->txqs_empty = true;
2550 etlv->rxqs_empty = true;
2551 etlv->num_txqs_full = 0;
2552 etlv->num_rxqs_full = 0;
2553
2554 __qede_lock(edev);
2555 for_each_queue(i) {
2556 fp = &edev->fp_array[i];
2557 if (fp->type & QEDE_FASTPATH_TX) {
2558 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2559
2560 if (txq->sw_tx_cons != txq->sw_tx_prod)
2561 etlv->txqs_empty = false;
2562 if (qede_is_txq_full(edev, txq))
2563 etlv->num_txqs_full++;
2564 }
2565 if (fp->type & QEDE_FASTPATH_RX) {
2566 if (qede_has_rx_work(fp->rxq))
2567 etlv->rxqs_empty = false;
2568
2569
2570
2571
2572
2573 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2574 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2575 RX_RING_SIZE - 100)
2576 etlv->num_rxqs_full++;
2577 }
2578 }
2579 __qede_unlock(edev);
2580
2581 etlv->txqs_empty_set = true;
2582 etlv->rxqs_empty_set = true;
2583 etlv->num_txqs_full_set = true;
2584 etlv->num_rxqs_full_set = true;
2585 }