1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 * Google virtual Ethernet (gve) driver
3 *
4 * Copyright (C) 2015-2019 Google, Inc.
5 */
6
7 /* GVE Transmit Descriptor formats */
8
9 #ifndef _GVE_DESC_H_
10 #define _GVE_DESC_H_
11
12 #include <linux/build_bug.h>
13
14 /* A note on seg_addrs
15 *
16 * Base addresses encoded in seg_addr are not assumed to be physical
17 * addresses. The ring format assumes these come from some linear address
18 * space. This could be physical memory, kernel virtual memory, user virtual
19 * memory. gVNIC uses lists of registered pages. Each queue is assumed
20 * to be associated with a single such linear address space to ensure a
21 * consistent meaning for seg_addrs posted to its rings.
22 */
23
24 struct gve_tx_pkt_desc {
25 u8 type_flags; /* desc type is lower 4 bits, flags upper */
26 u8 l4_csum_offset; /* relative offset of L4 csum word */
27 u8 l4_hdr_offset; /* Offset of start of L4 headers in packet */
28 u8 desc_cnt; /* Total descriptors for this packet */
29 __be16 len; /* Total length of this packet (in bytes) */
30 __be16 seg_len; /* Length of this descriptor's segment */
31 __be64 seg_addr; /* Base address (see note) of this segment */
32 } __packed;
33
34 struct gve_tx_seg_desc {
35 u8 type_flags; /* type is lower 4 bits, flags upper */
36 u8 l3_offset; /* TSO: 2 byte units to start of IPH */
37 __be16 reserved;
38 __be16 mss; /* TSO MSS */
39 __be16 seg_len;
40 __be64 seg_addr;
41 } __packed;
42
43 /* GVE Transmit Descriptor Types */
44 #define GVE_TXD_STD (0x0 << 4) /* Std with Host Address */
45 #define GVE_TXD_TSO (0x1 << 4) /* TSO with Host Address */
46 #define GVE_TXD_SEG (0x2 << 4) /* Seg with Host Address */
47
48 /* GVE Transmit Descriptor Flags for Std Pkts */
49 #define GVE_TXF_L4CSUM BIT(0) /* Need csum offload */
50 #define GVE_TXF_TSTAMP BIT(2) /* Timestamp required */
51
52 /* GVE Transmit Descriptor Flags for TSO Segs */
53 #define GVE_TXSF_IPV6 BIT(1) /* IPv6 TSO */
54
55 /* GVE Receive Packet Descriptor */
56 /* The start of an ethernet packet comes 2 bytes into the rx buffer.
57 * gVNIC adds this padding so that both the DMA and the L3/4 protocol header
58 * access is aligned.
59 */
60 #define GVE_RX_PAD 2
61
62 struct gve_rx_desc {
63 u8 padding[48];
64 __be32 rss_hash; /* Receive-side scaling hash (Toeplitz for gVNIC) */
65 __be16 mss;
66 __be16 reserved; /* Reserved to zero */
67 u8 hdr_len; /* Header length (L2-L4) including padding */
68 u8 hdr_off; /* 64-byte-scaled offset into RX_DATA entry */
69 __sum16 csum; /* 1's-complement partial checksum of L3+ bytes */
70 __be16 len; /* Length of the received packet */
71 __be16 flags_seq; /* Flags [15:3] and sequence number [2:0] (1-7) */
72 } __packed;
73 static_assert(sizeof(struct gve_rx_desc) == 64);
74
75 /* As with the Tx ring format, the qpl_offset entries below are offsets into an
76 * ordered list of registered pages.
77 */
78 struct gve_rx_data_slot {
79 /* byte offset into the rx registered segment of this slot */
80 __be64 qpl_offset;
81 };
82
83 /* GVE Recive Packet Descriptor Seq No */
84 #define GVE_SEQNO(x) (be16_to_cpu(x) & 0x7)
85
86 /* GVE Recive Packet Descriptor Flags */
87 #define GVE_RXFLG(x) cpu_to_be16(1 << (3 + (x)))
88 #define GVE_RXF_FRAG GVE_RXFLG(3) /* IP Fragment */
89 #define GVE_RXF_IPV4 GVE_RXFLG(4) /* IPv4 */
90 #define GVE_RXF_IPV6 GVE_RXFLG(5) /* IPv6 */
91 #define GVE_RXF_TCP GVE_RXFLG(6) /* TCP Packet */
92 #define GVE_RXF_UDP GVE_RXFLG(7) /* UDP Packet */
93 #define GVE_RXF_ERR GVE_RXFLG(8) /* Packet Error Detected */
94
95 /* GVE IRQ */
96 #define GVE_IRQ_ACK BIT(31)
97 #define GVE_IRQ_MASK BIT(30)
98 #define GVE_IRQ_EVENT BIT(29)
99
100 static inline bool gve_needs_rss(__be16 flag)
101 {
102 if (flag & GVE_RXF_FRAG)
103 return false;
104 if (flag & (GVE_RXF_IPV4 | GVE_RXF_IPV6))
105 return true;
106 return false;
107 }
108
109 static inline u8 gve_next_seqno(u8 seq)
110 {
111 return (seq + 1) == 8 ? 1 : seq + 1;
112 }
113 #endif /* _GVE_DESC_H_ */