1
2 #ifndef __MYRI10GE_MCP_GEN_HEADER_H__
3 #define __MYRI10GE_MCP_GEN_HEADER_H__
4
5
6 #define MCP_HEADER_PTR_OFFSET 0x3c
7
8 #define MCP_TYPE_MX 0x4d582020
9 #define MCP_TYPE_PCIE 0x70636965
10 #define MCP_TYPE_ETH 0x45544820
11 #define MCP_TYPE_MCP0 0x4d435030
12 #define MCP_TYPE_DFLT 0x20202020
13 #define MCP_TYPE_ETHZ 0x4554485a
14
15 struct mcp_gen_header {
16
17 unsigned header_length;
18 __be32 mcp_type;
19 char version[128];
20 unsigned mcp_private;
21
22
23 unsigned sram_size;
24 unsigned string_specs;
25 unsigned string_specs_len;
26
27
28
29
30
31
32
33
34
35
36
37 unsigned char mcp_index;
38 unsigned char disable_rabbit;
39 unsigned char unaligned_tlp;
40 unsigned char pcie_link_algo;
41 unsigned counters_addr;
42 unsigned copy_block_info;
43 unsigned short handoff_id_major;
44 unsigned short handoff_id_caps;
45 unsigned msix_table_addr;
46 unsigned bss_addr;
47 unsigned features;
48 unsigned ee_hdr_addr;
49 unsigned led_pattern;
50 unsigned led_pattern_dflt;
51
52 };
53
54 struct zmcp_info {
55 unsigned info_len;
56 unsigned zmcp_addr;
57 unsigned zmcp_len;
58 unsigned mcp_edata;
59 };
60
61 #endif