This source file includes following definitions.
- ftmac100_enable_all_int
- ftmac100_disable_all_int
- ftmac100_set_rx_ring_base
- ftmac100_set_tx_ring_base
- ftmac100_txdma_start_polling
- ftmac100_reset
- ftmac100_set_mac
- ftmac100_start_hw
- ftmac100_stop_hw
- ftmac100_rxdes_first_segment
- ftmac100_rxdes_last_segment
- ftmac100_rxdes_owned_by_dma
- ftmac100_rxdes_set_dma_own
- ftmac100_rxdes_rx_error
- ftmac100_rxdes_crc_error
- ftmac100_rxdes_frame_too_long
- ftmac100_rxdes_runt
- ftmac100_rxdes_odd_nibble
- ftmac100_rxdes_frame_length
- ftmac100_rxdes_multicast
- ftmac100_rxdes_set_buffer_size
- ftmac100_rxdes_set_end_of_ring
- ftmac100_rxdes_set_dma_addr
- ftmac100_rxdes_get_dma_addr
- ftmac100_rxdes_set_page
- ftmac100_rxdes_get_page
- ftmac100_next_rx_pointer
- ftmac100_rx_pointer_advance
- ftmac100_current_rxdes
- ftmac100_rx_locate_first_segment
- ftmac100_rx_packet_error
- ftmac100_rx_drop_packet
- ftmac100_rx_packet
- ftmac100_txdes_reset
- ftmac100_txdes_owned_by_dma
- ftmac100_txdes_set_dma_own
- ftmac100_txdes_excessive_collision
- ftmac100_txdes_late_collision
- ftmac100_txdes_set_end_of_ring
- ftmac100_txdes_set_first_segment
- ftmac100_txdes_set_last_segment
- ftmac100_txdes_set_txint
- ftmac100_txdes_set_buffer_size
- ftmac100_txdes_set_dma_addr
- ftmac100_txdes_get_dma_addr
- ftmac100_txdes_set_skb
- ftmac100_txdes_get_skb
- ftmac100_next_tx_pointer
- ftmac100_tx_pointer_advance
- ftmac100_tx_clean_pointer_advance
- ftmac100_current_txdes
- ftmac100_current_clean_txdes
- ftmac100_tx_complete_packet
- ftmac100_tx_complete
- ftmac100_xmit
- ftmac100_alloc_rx_page
- ftmac100_free_buffers
- ftmac100_alloc_buffers
- ftmac100_mdio_read
- ftmac100_mdio_write
- ftmac100_get_drvinfo
- ftmac100_get_link_ksettings
- ftmac100_set_link_ksettings
- ftmac100_nway_reset
- ftmac100_get_link
- ftmac100_interrupt
- ftmac100_poll
- ftmac100_open
- ftmac100_stop
- ftmac100_hard_start_xmit
- ftmac100_do_ioctl
- ftmac100_probe
- ftmac100_remove
- ftmac100_init
- ftmac100_exit
1
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4
5
6
7
8
9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10
11 #include <linux/dma-mapping.h>
12 #include <linux/etherdevice.h>
13 #include <linux/ethtool.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/io.h>
17 #include <linux/mii.h>
18 #include <linux/module.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/netdevice.h>
21 #include <linux/platform_device.h>
22
23 #include "ftmac100.h"
24
25 #define DRV_NAME "ftmac100"
26 #define DRV_VERSION "0.2"
27
28 #define RX_QUEUE_ENTRIES 128
29 #define TX_QUEUE_ENTRIES 16
30
31 #define MAX_PKT_SIZE 1518
32 #define RX_BUF_SIZE 2044
33
34 #if MAX_PKT_SIZE > 0x7ff
35 #error invalid MAX_PKT_SIZE
36 #endif
37
38 #if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
39 #error invalid RX_BUF_SIZE
40 #endif
41
42
43
44
45 struct ftmac100_descs {
46 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
47 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
48 };
49
50 struct ftmac100 {
51 struct resource *res;
52 void __iomem *base;
53 int irq;
54
55 struct ftmac100_descs *descs;
56 dma_addr_t descs_dma_addr;
57
58 unsigned int rx_pointer;
59 unsigned int tx_clean_pointer;
60 unsigned int tx_pointer;
61 unsigned int tx_pending;
62
63 spinlock_t tx_lock;
64
65 struct net_device *netdev;
66 struct device *dev;
67 struct napi_struct napi;
68
69 struct mii_if_info mii;
70 };
71
72 static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
73 struct ftmac100_rxdes *rxdes, gfp_t gfp);
74
75
76
77
78 #define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
79 FTMAC100_INT_NORXBUF | \
80 FTMAC100_INT_XPKT_OK | \
81 FTMAC100_INT_XPKT_LOST | \
82 FTMAC100_INT_RPKT_LOST | \
83 FTMAC100_INT_AHB_ERR | \
84 FTMAC100_INT_PHYSTS_CHG)
85
86 #define INT_MASK_ALL_DISABLED 0
87
88 static void ftmac100_enable_all_int(struct ftmac100 *priv)
89 {
90 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
91 }
92
93 static void ftmac100_disable_all_int(struct ftmac100 *priv)
94 {
95 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
96 }
97
98 static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
99 {
100 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
101 }
102
103 static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
104 {
105 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
106 }
107
108 static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
109 {
110 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
111 }
112
113 static int ftmac100_reset(struct ftmac100 *priv)
114 {
115 struct net_device *netdev = priv->netdev;
116 int i;
117
118
119 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
120
121 for (i = 0; i < 5; i++) {
122 unsigned int maccr;
123
124 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
125 if (!(maccr & FTMAC100_MACCR_SW_RST)) {
126
127
128
129
130
131 udelay(500);
132 return 0;
133 }
134
135 udelay(1000);
136 }
137
138 netdev_err(netdev, "software reset failed\n");
139 return -EIO;
140 }
141
142 static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
143 {
144 unsigned int maddr = mac[0] << 8 | mac[1];
145 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
146
147 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
148 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
149 }
150
151 #define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
152 FTMAC100_MACCR_RCV_EN | \
153 FTMAC100_MACCR_XDMA_EN | \
154 FTMAC100_MACCR_RDMA_EN | \
155 FTMAC100_MACCR_CRC_APD | \
156 FTMAC100_MACCR_FULLDUP | \
157 FTMAC100_MACCR_RX_RUNT | \
158 FTMAC100_MACCR_RX_BROADPKT)
159
160 static int ftmac100_start_hw(struct ftmac100 *priv)
161 {
162 struct net_device *netdev = priv->netdev;
163
164 if (ftmac100_reset(priv))
165 return -EIO;
166
167
168 ftmac100_set_rx_ring_base(priv,
169 priv->descs_dma_addr +
170 offsetof(struct ftmac100_descs, rxdes));
171 ftmac100_set_tx_ring_base(priv,
172 priv->descs_dma_addr +
173 offsetof(struct ftmac100_descs, txdes));
174
175 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
176
177 ftmac100_set_mac(priv, netdev->dev_addr);
178
179 iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
180 return 0;
181 }
182
183 static void ftmac100_stop_hw(struct ftmac100 *priv)
184 {
185 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
186 }
187
188
189
190
191 static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
192 {
193 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
194 }
195
196 static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
197 {
198 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
199 }
200
201 static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
202 {
203 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
204 }
205
206 static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
207 {
208
209 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
210 }
211
212 static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
213 {
214 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
215 }
216
217 static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
218 {
219 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
220 }
221
222 static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
223 {
224 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
225 }
226
227 static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
228 {
229 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
230 }
231
232 static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
233 {
234 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
235 }
236
237 static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
238 {
239 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
240 }
241
242 static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
243 {
244 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
245 }
246
247 static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
248 unsigned int size)
249 {
250 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
251 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
252 }
253
254 static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
255 {
256 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
257 }
258
259 static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
260 dma_addr_t addr)
261 {
262 rxdes->rxdes2 = cpu_to_le32(addr);
263 }
264
265 static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
266 {
267 return le32_to_cpu(rxdes->rxdes2);
268 }
269
270
271
272
273
274 static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
275 {
276 rxdes->rxdes3 = (unsigned int)page;
277 }
278
279 static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
280 {
281 return (struct page *)rxdes->rxdes3;
282 }
283
284
285
286
287 static int ftmac100_next_rx_pointer(int pointer)
288 {
289 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
290 }
291
292 static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
293 {
294 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
295 }
296
297 static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
298 {
299 return &priv->descs->rxdes[priv->rx_pointer];
300 }
301
302 static struct ftmac100_rxdes *
303 ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
304 {
305 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
306
307 while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
308 if (ftmac100_rxdes_first_segment(rxdes))
309 return rxdes;
310
311 ftmac100_rxdes_set_dma_own(rxdes);
312 ftmac100_rx_pointer_advance(priv);
313 rxdes = ftmac100_current_rxdes(priv);
314 }
315
316 return NULL;
317 }
318
319 static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
320 struct ftmac100_rxdes *rxdes)
321 {
322 struct net_device *netdev = priv->netdev;
323 bool error = false;
324
325 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
326 if (net_ratelimit())
327 netdev_info(netdev, "rx err\n");
328
329 netdev->stats.rx_errors++;
330 error = true;
331 }
332
333 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
334 if (net_ratelimit())
335 netdev_info(netdev, "rx crc err\n");
336
337 netdev->stats.rx_crc_errors++;
338 error = true;
339 }
340
341 if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
342 if (net_ratelimit())
343 netdev_info(netdev, "rx frame too long\n");
344
345 netdev->stats.rx_length_errors++;
346 error = true;
347 } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
348 if (net_ratelimit())
349 netdev_info(netdev, "rx runt\n");
350
351 netdev->stats.rx_length_errors++;
352 error = true;
353 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
354 if (net_ratelimit())
355 netdev_info(netdev, "rx odd nibble\n");
356
357 netdev->stats.rx_length_errors++;
358 error = true;
359 }
360
361 return error;
362 }
363
364 static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
365 {
366 struct net_device *netdev = priv->netdev;
367 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
368 bool done = false;
369
370 if (net_ratelimit())
371 netdev_dbg(netdev, "drop packet %p\n", rxdes);
372
373 do {
374 if (ftmac100_rxdes_last_segment(rxdes))
375 done = true;
376
377 ftmac100_rxdes_set_dma_own(rxdes);
378 ftmac100_rx_pointer_advance(priv);
379 rxdes = ftmac100_current_rxdes(priv);
380 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
381
382 netdev->stats.rx_dropped++;
383 }
384
385 static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
386 {
387 struct net_device *netdev = priv->netdev;
388 struct ftmac100_rxdes *rxdes;
389 struct sk_buff *skb;
390 struct page *page;
391 dma_addr_t map;
392 int length;
393 bool ret;
394
395 rxdes = ftmac100_rx_locate_first_segment(priv);
396 if (!rxdes)
397 return false;
398
399 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
400 ftmac100_rx_drop_packet(priv);
401 return true;
402 }
403
404
405
406
407
408 ret = ftmac100_rxdes_last_segment(rxdes);
409 BUG_ON(!ret);
410
411
412 skb = netdev_alloc_skb_ip_align(netdev, 128);
413 if (unlikely(!skb)) {
414 if (net_ratelimit())
415 netdev_err(netdev, "rx skb alloc failed\n");
416
417 ftmac100_rx_drop_packet(priv);
418 return true;
419 }
420
421 if (unlikely(ftmac100_rxdes_multicast(rxdes)))
422 netdev->stats.multicast++;
423
424 map = ftmac100_rxdes_get_dma_addr(rxdes);
425 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
426
427 length = ftmac100_rxdes_frame_length(rxdes);
428 page = ftmac100_rxdes_get_page(rxdes);
429 skb_fill_page_desc(skb, 0, page, 0, length);
430 skb->len += length;
431 skb->data_len += length;
432
433 if (length > 128) {
434 skb->truesize += PAGE_SIZE;
435
436 __pskb_pull_tail(skb, ETH_HLEN);
437 } else {
438
439 __pskb_pull_tail(skb, length);
440 }
441 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
442
443 ftmac100_rx_pointer_advance(priv);
444
445 skb->protocol = eth_type_trans(skb, netdev);
446
447 netdev->stats.rx_packets++;
448 netdev->stats.rx_bytes += skb->len;
449
450
451 netif_receive_skb(skb);
452
453 (*processed)++;
454 return true;
455 }
456
457
458
459
460 static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
461 {
462
463 txdes->txdes0 = 0;
464 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
465 txdes->txdes2 = 0;
466 txdes->txdes3 = 0;
467 }
468
469 static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
470 {
471 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
472 }
473
474 static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
475 {
476
477
478
479
480 wmb();
481 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
482 }
483
484 static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
485 {
486 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
487 }
488
489 static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
490 {
491 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
492 }
493
494 static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
495 {
496 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
497 }
498
499 static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
500 {
501 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
502 }
503
504 static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
505 {
506 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
507 }
508
509 static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
510 {
511 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
512 }
513
514 static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
515 unsigned int len)
516 {
517 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
518 }
519
520 static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
521 dma_addr_t addr)
522 {
523 txdes->txdes2 = cpu_to_le32(addr);
524 }
525
526 static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
527 {
528 return le32_to_cpu(txdes->txdes2);
529 }
530
531
532
533
534
535 static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
536 {
537 txdes->txdes3 = (unsigned int)skb;
538 }
539
540 static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
541 {
542 return (struct sk_buff *)txdes->txdes3;
543 }
544
545
546
547
548 static int ftmac100_next_tx_pointer(int pointer)
549 {
550 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
551 }
552
553 static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
554 {
555 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
556 }
557
558 static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
559 {
560 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
561 }
562
563 static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
564 {
565 return &priv->descs->txdes[priv->tx_pointer];
566 }
567
568 static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
569 {
570 return &priv->descs->txdes[priv->tx_clean_pointer];
571 }
572
573 static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
574 {
575 struct net_device *netdev = priv->netdev;
576 struct ftmac100_txdes *txdes;
577 struct sk_buff *skb;
578 dma_addr_t map;
579
580 if (priv->tx_pending == 0)
581 return false;
582
583 txdes = ftmac100_current_clean_txdes(priv);
584
585 if (ftmac100_txdes_owned_by_dma(txdes))
586 return false;
587
588 skb = ftmac100_txdes_get_skb(txdes);
589 map = ftmac100_txdes_get_dma_addr(txdes);
590
591 if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
592 ftmac100_txdes_late_collision(txdes))) {
593
594
595
596
597 netdev->stats.tx_aborted_errors++;
598 } else {
599 netdev->stats.tx_packets++;
600 netdev->stats.tx_bytes += skb->len;
601 }
602
603 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
604 dev_kfree_skb(skb);
605
606 ftmac100_txdes_reset(txdes);
607
608 ftmac100_tx_clean_pointer_advance(priv);
609
610 spin_lock(&priv->tx_lock);
611 priv->tx_pending--;
612 spin_unlock(&priv->tx_lock);
613 netif_wake_queue(netdev);
614
615 return true;
616 }
617
618 static void ftmac100_tx_complete(struct ftmac100 *priv)
619 {
620 while (ftmac100_tx_complete_packet(priv))
621 ;
622 }
623
624 static netdev_tx_t ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
625 dma_addr_t map)
626 {
627 struct net_device *netdev = priv->netdev;
628 struct ftmac100_txdes *txdes;
629 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
630
631 txdes = ftmac100_current_txdes(priv);
632 ftmac100_tx_pointer_advance(priv);
633
634
635 ftmac100_txdes_set_skb(txdes, skb);
636 ftmac100_txdes_set_dma_addr(txdes, map);
637
638 ftmac100_txdes_set_first_segment(txdes);
639 ftmac100_txdes_set_last_segment(txdes);
640 ftmac100_txdes_set_txint(txdes);
641 ftmac100_txdes_set_buffer_size(txdes, len);
642
643 spin_lock(&priv->tx_lock);
644 priv->tx_pending++;
645 if (priv->tx_pending == TX_QUEUE_ENTRIES)
646 netif_stop_queue(netdev);
647
648
649 ftmac100_txdes_set_dma_own(txdes);
650 spin_unlock(&priv->tx_lock);
651
652 ftmac100_txdma_start_polling(priv);
653 return NETDEV_TX_OK;
654 }
655
656
657
658
659 static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
660 struct ftmac100_rxdes *rxdes, gfp_t gfp)
661 {
662 struct net_device *netdev = priv->netdev;
663 struct page *page;
664 dma_addr_t map;
665
666 page = alloc_page(gfp);
667 if (!page) {
668 if (net_ratelimit())
669 netdev_err(netdev, "failed to allocate rx page\n");
670 return -ENOMEM;
671 }
672
673 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
674 if (unlikely(dma_mapping_error(priv->dev, map))) {
675 if (net_ratelimit())
676 netdev_err(netdev, "failed to map rx page\n");
677 __free_page(page);
678 return -ENOMEM;
679 }
680
681 ftmac100_rxdes_set_page(rxdes, page);
682 ftmac100_rxdes_set_dma_addr(rxdes, map);
683 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
684 ftmac100_rxdes_set_dma_own(rxdes);
685 return 0;
686 }
687
688 static void ftmac100_free_buffers(struct ftmac100 *priv)
689 {
690 int i;
691
692 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
693 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
694 struct page *page = ftmac100_rxdes_get_page(rxdes);
695 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
696
697 if (!page)
698 continue;
699
700 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
701 __free_page(page);
702 }
703
704 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
705 struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
706 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
707 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
708
709 if (!skb)
710 continue;
711
712 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
713 dev_kfree_skb(skb);
714 }
715
716 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
717 priv->descs, priv->descs_dma_addr);
718 }
719
720 static int ftmac100_alloc_buffers(struct ftmac100 *priv)
721 {
722 int i;
723
724 priv->descs = dma_alloc_coherent(priv->dev,
725 sizeof(struct ftmac100_descs),
726 &priv->descs_dma_addr, GFP_KERNEL);
727 if (!priv->descs)
728 return -ENOMEM;
729
730
731 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
732
733 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
734 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
735
736 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
737 goto err;
738 }
739
740
741 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
742 return 0;
743
744 err:
745 ftmac100_free_buffers(priv);
746 return -ENOMEM;
747 }
748
749
750
751
752 static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
753 {
754 struct ftmac100 *priv = netdev_priv(netdev);
755 unsigned int phycr;
756 int i;
757
758 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
759 FTMAC100_PHYCR_REGAD(reg) |
760 FTMAC100_PHYCR_MIIRD;
761
762 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
763
764 for (i = 0; i < 10; i++) {
765 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
766
767 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
768 return phycr & FTMAC100_PHYCR_MIIRDATA;
769
770 udelay(100);
771 }
772
773 netdev_err(netdev, "mdio read timed out\n");
774 return 0;
775 }
776
777 static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
778 int data)
779 {
780 struct ftmac100 *priv = netdev_priv(netdev);
781 unsigned int phycr;
782 int i;
783
784 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
785 FTMAC100_PHYCR_REGAD(reg) |
786 FTMAC100_PHYCR_MIIWR;
787
788 data = FTMAC100_PHYWDATA_MIIWDATA(data);
789
790 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
791 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
792
793 for (i = 0; i < 10; i++) {
794 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
795
796 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
797 return;
798
799 udelay(100);
800 }
801
802 netdev_err(netdev, "mdio write timed out\n");
803 }
804
805
806
807
808 static void ftmac100_get_drvinfo(struct net_device *netdev,
809 struct ethtool_drvinfo *info)
810 {
811 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
812 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
813 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
814 }
815
816 static int ftmac100_get_link_ksettings(struct net_device *netdev,
817 struct ethtool_link_ksettings *cmd)
818 {
819 struct ftmac100 *priv = netdev_priv(netdev);
820
821 mii_ethtool_get_link_ksettings(&priv->mii, cmd);
822
823 return 0;
824 }
825
826 static int ftmac100_set_link_ksettings(struct net_device *netdev,
827 const struct ethtool_link_ksettings *cmd)
828 {
829 struct ftmac100 *priv = netdev_priv(netdev);
830 return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
831 }
832
833 static int ftmac100_nway_reset(struct net_device *netdev)
834 {
835 struct ftmac100 *priv = netdev_priv(netdev);
836 return mii_nway_restart(&priv->mii);
837 }
838
839 static u32 ftmac100_get_link(struct net_device *netdev)
840 {
841 struct ftmac100 *priv = netdev_priv(netdev);
842 return mii_link_ok(&priv->mii);
843 }
844
845 static const struct ethtool_ops ftmac100_ethtool_ops = {
846 .get_drvinfo = ftmac100_get_drvinfo,
847 .nway_reset = ftmac100_nway_reset,
848 .get_link = ftmac100_get_link,
849 .get_link_ksettings = ftmac100_get_link_ksettings,
850 .set_link_ksettings = ftmac100_set_link_ksettings,
851 };
852
853
854
855
856 static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
857 {
858 struct net_device *netdev = dev_id;
859 struct ftmac100 *priv = netdev_priv(netdev);
860
861
862 ftmac100_disable_all_int(priv);
863 if (likely(netif_running(netdev)))
864 napi_schedule(&priv->napi);
865
866 return IRQ_HANDLED;
867 }
868
869
870
871
872 static int ftmac100_poll(struct napi_struct *napi, int budget)
873 {
874 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
875 struct net_device *netdev = priv->netdev;
876 unsigned int status;
877 bool completed = true;
878 int rx = 0;
879
880 status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
881
882 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
883
884
885
886
887
888
889
890 bool retry;
891
892 do {
893 retry = ftmac100_rx_packet(priv, &rx);
894 } while (retry && rx < budget);
895
896 if (retry && rx == budget)
897 completed = false;
898 }
899
900 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
901
902
903
904
905
906
907
908
909 ftmac100_tx_complete(priv);
910 }
911
912 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
913 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
914 if (net_ratelimit())
915 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
916 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
917 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
918 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
919 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
920
921 if (status & FTMAC100_INT_NORXBUF) {
922
923 netdev->stats.rx_over_errors++;
924 }
925
926 if (status & FTMAC100_INT_RPKT_LOST) {
927
928 netdev->stats.rx_fifo_errors++;
929 }
930
931 if (status & FTMAC100_INT_PHYSTS_CHG) {
932
933 mii_check_link(&priv->mii);
934 }
935 }
936
937 if (completed) {
938
939 napi_complete(napi);
940 ftmac100_enable_all_int(priv);
941 }
942
943 return rx;
944 }
945
946
947
948
949 static int ftmac100_open(struct net_device *netdev)
950 {
951 struct ftmac100 *priv = netdev_priv(netdev);
952 int err;
953
954 err = ftmac100_alloc_buffers(priv);
955 if (err) {
956 netdev_err(netdev, "failed to allocate buffers\n");
957 goto err_alloc;
958 }
959
960 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
961 if (err) {
962 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
963 goto err_irq;
964 }
965
966 priv->rx_pointer = 0;
967 priv->tx_clean_pointer = 0;
968 priv->tx_pointer = 0;
969 priv->tx_pending = 0;
970
971 err = ftmac100_start_hw(priv);
972 if (err)
973 goto err_hw;
974
975 napi_enable(&priv->napi);
976 netif_start_queue(netdev);
977
978 ftmac100_enable_all_int(priv);
979
980 return 0;
981
982 err_hw:
983 free_irq(priv->irq, netdev);
984 err_irq:
985 ftmac100_free_buffers(priv);
986 err_alloc:
987 return err;
988 }
989
990 static int ftmac100_stop(struct net_device *netdev)
991 {
992 struct ftmac100 *priv = netdev_priv(netdev);
993
994 ftmac100_disable_all_int(priv);
995 netif_stop_queue(netdev);
996 napi_disable(&priv->napi);
997 ftmac100_stop_hw(priv);
998 free_irq(priv->irq, netdev);
999 ftmac100_free_buffers(priv);
1000
1001 return 0;
1002 }
1003
1004 static netdev_tx_t
1005 ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1006 {
1007 struct ftmac100 *priv = netdev_priv(netdev);
1008 dma_addr_t map;
1009
1010 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1011 if (net_ratelimit())
1012 netdev_dbg(netdev, "tx packet too big\n");
1013
1014 netdev->stats.tx_dropped++;
1015 dev_kfree_skb(skb);
1016 return NETDEV_TX_OK;
1017 }
1018
1019 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1020 if (unlikely(dma_mapping_error(priv->dev, map))) {
1021
1022 if (net_ratelimit())
1023 netdev_err(netdev, "map socket buffer failed\n");
1024
1025 netdev->stats.tx_dropped++;
1026 dev_kfree_skb(skb);
1027 return NETDEV_TX_OK;
1028 }
1029
1030 return ftmac100_xmit(priv, skb, map);
1031 }
1032
1033
1034 static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1035 {
1036 struct ftmac100 *priv = netdev_priv(netdev);
1037 struct mii_ioctl_data *data = if_mii(ifr);
1038
1039 return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
1040 }
1041
1042 static const struct net_device_ops ftmac100_netdev_ops = {
1043 .ndo_open = ftmac100_open,
1044 .ndo_stop = ftmac100_stop,
1045 .ndo_start_xmit = ftmac100_hard_start_xmit,
1046 .ndo_set_mac_address = eth_mac_addr,
1047 .ndo_validate_addr = eth_validate_addr,
1048 .ndo_do_ioctl = ftmac100_do_ioctl,
1049 };
1050
1051
1052
1053
1054 static int ftmac100_probe(struct platform_device *pdev)
1055 {
1056 struct resource *res;
1057 int irq;
1058 struct net_device *netdev;
1059 struct ftmac100 *priv;
1060 int err;
1061
1062 if (!pdev)
1063 return -ENODEV;
1064
1065 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1066 if (!res)
1067 return -ENXIO;
1068
1069 irq = platform_get_irq(pdev, 0);
1070 if (irq < 0)
1071 return irq;
1072
1073
1074 netdev = alloc_etherdev(sizeof(*priv));
1075 if (!netdev) {
1076 err = -ENOMEM;
1077 goto err_alloc_etherdev;
1078 }
1079
1080 SET_NETDEV_DEV(netdev, &pdev->dev);
1081 netdev->ethtool_ops = &ftmac100_ethtool_ops;
1082 netdev->netdev_ops = &ftmac100_netdev_ops;
1083
1084 platform_set_drvdata(pdev, netdev);
1085
1086
1087 priv = netdev_priv(netdev);
1088 priv->netdev = netdev;
1089 priv->dev = &pdev->dev;
1090
1091 spin_lock_init(&priv->tx_lock);
1092
1093
1094 netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64);
1095
1096
1097 priv->res = request_mem_region(res->start, resource_size(res),
1098 dev_name(&pdev->dev));
1099 if (!priv->res) {
1100 dev_err(&pdev->dev, "Could not reserve memory region\n");
1101 err = -ENOMEM;
1102 goto err_req_mem;
1103 }
1104
1105 priv->base = ioremap(res->start, resource_size(res));
1106 if (!priv->base) {
1107 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1108 err = -EIO;
1109 goto err_ioremap;
1110 }
1111
1112 priv->irq = irq;
1113
1114
1115 priv->mii.phy_id = 0;
1116 priv->mii.phy_id_mask = 0x1f;
1117 priv->mii.reg_num_mask = 0x1f;
1118 priv->mii.dev = netdev;
1119 priv->mii.mdio_read = ftmac100_mdio_read;
1120 priv->mii.mdio_write = ftmac100_mdio_write;
1121
1122
1123 err = register_netdev(netdev);
1124 if (err) {
1125 dev_err(&pdev->dev, "Failed to register netdev\n");
1126 goto err_register_netdev;
1127 }
1128
1129 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1130
1131 if (!is_valid_ether_addr(netdev->dev_addr)) {
1132 eth_hw_addr_random(netdev);
1133 netdev_info(netdev, "generated random MAC address %pM\n",
1134 netdev->dev_addr);
1135 }
1136
1137 return 0;
1138
1139 err_register_netdev:
1140 iounmap(priv->base);
1141 err_ioremap:
1142 release_resource(priv->res);
1143 err_req_mem:
1144 netif_napi_del(&priv->napi);
1145 free_netdev(netdev);
1146 err_alloc_etherdev:
1147 return err;
1148 }
1149
1150 static int ftmac100_remove(struct platform_device *pdev)
1151 {
1152 struct net_device *netdev;
1153 struct ftmac100 *priv;
1154
1155 netdev = platform_get_drvdata(pdev);
1156 priv = netdev_priv(netdev);
1157
1158 unregister_netdev(netdev);
1159
1160 iounmap(priv->base);
1161 release_resource(priv->res);
1162
1163 netif_napi_del(&priv->napi);
1164 free_netdev(netdev);
1165 return 0;
1166 }
1167
1168 static const struct of_device_id ftmac100_of_ids[] = {
1169 { .compatible = "andestech,atmac100" },
1170 { }
1171 };
1172
1173 static struct platform_driver ftmac100_driver = {
1174 .probe = ftmac100_probe,
1175 .remove = ftmac100_remove,
1176 .driver = {
1177 .name = DRV_NAME,
1178 .of_match_table = ftmac100_of_ids
1179 },
1180 };
1181
1182
1183
1184
1185 static int __init ftmac100_init(void)
1186 {
1187 pr_info("Loading version " DRV_VERSION " ...\n");
1188 return platform_driver_register(&ftmac100_driver);
1189 }
1190
1191 static void __exit ftmac100_exit(void)
1192 {
1193 platform_driver_unregister(&ftmac100_driver);
1194 }
1195
1196 module_init(ftmac100_init);
1197 module_exit(ftmac100_exit);
1198
1199 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1200 MODULE_DESCRIPTION("FTMAC100 driver");
1201 MODULE_LICENSE("GPL");
1202 MODULE_DEVICE_TABLE(of, ftmac100_of_ids);