drivers/net/ethernet/amd/xgbe/xgbe-mdio.c

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This source file includes following definitions.
xgbe_phy_module_eeprom
xgbe_phy_module_info
xgbe_an37_clear_interrupts
xgbe_an37_disable_interrupts
xgbe_an37_enable_interrupts
xgbe_an73_clear_interrupts
xgbe_an73_disable_interrupts
xgbe_an73_enable_interrupts
xgbe_an_enable_interrupts
xgbe_an_clear_interrupts_all
xgbe_kr_mode
xgbe_kx_2500_mode
xgbe_kx_1000_mode
xgbe_sfi_mode
xgbe_x_mode
xgbe_sgmii_1000_mode
xgbe_sgmii_100_mode
xgbe_cur_mode
xgbe_in_kr_mode
xgbe_change_mode
xgbe_switch_mode
xgbe_set_mode
xgbe_use_mode
xgbe_an37_set
xgbe_an37_restart
xgbe_an37_disable
xgbe_an73_set
xgbe_an73_restart
xgbe_an73_disable
xgbe_an_restart
xgbe_an_disable
xgbe_an_disable_all
xgbe_an73_tx_training
xgbe_an73_tx_xnp
xgbe_an73_rx_bpa
xgbe_an73_rx_xnp
xgbe_an73_page_received
xgbe_an73_incompat_link
xgbe_an37_isr
xgbe_an73_isr
xgbe_an_isr_task
xgbe_an_isr
xgbe_an_combined_isr
xgbe_an_irq_work
xgbe_state_as_string
xgbe_an37_state_machine
xgbe_an73_state_machine
xgbe_an_state_machine
xgbe_an37_init
xgbe_an73_init
xgbe_an_init
xgbe_phy_fc_string
xgbe_phy_speed_string
xgbe_phy_print_status
xgbe_phy_adjust_link
xgbe_phy_valid_speed
xgbe_phy_config_fixed
__xgbe_phy_config_aneg
xgbe_phy_config_aneg
xgbe_phy_reconfig_aneg
xgbe_phy_aneg_done
xgbe_check_link_timeout
xgbe_phy_status_aneg
xgbe_phy_status_result
xgbe_phy_status
xgbe_phy_stop
xgbe_phy_start
xgbe_phy_reset
xgbe_dump_phy_registers
xgbe_phy_best_advertised_speed
xgbe_phy_exit
xgbe_phy_init
xgbe_init_function_ptrs_phy
   1 /*
   2  * AMD 10Gb Ethernet driver
   3  *
   4  * This file is available to you under your choice of the following two
   5  * licenses:
   6  *
   7  * License 1: GPLv2
   8  *
   9  * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
  10  *
  11  * This file is free software; you may copy, redistribute and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation, either version 2 of the License, or (at
  14  * your option) any later version.
  15  *
  16  * This file is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  23  *
  24  * This file incorporates work covered by the following copyright and
  25  * permission notice:
  26  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  27  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  28  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  29  *     and you.
  30  *
  31  *     The Software IS NOT an item of Licensed Software or Licensed Product
  32  *     under any End User Software License Agreement or Agreement for Licensed
  33  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  34  *     granted, free of charge, to any person obtaining a copy of this software
  35  *     annotated with this license and the Software, to deal in the Software
  36  *     without restriction, including without limitation the rights to use,
  37  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  38  *     of the Software, and to permit persons to whom the Software is furnished
  39  *     to do so, subject to the following conditions:
  40  *
  41  *     The above copyright notice and this permission notice shall be included
  42  *     in all copies or substantial portions of the Software.
  43  *
  44  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
  45  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  46  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  47  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
  48  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  49  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  50  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  51  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  52  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  53  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  54  *     THE POSSIBILITY OF SUCH DAMAGE.
  55  *
  56  *
  57  * License 2: Modified BSD
  58  *
  59  * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
  60  * All rights reserved.
  61  *
  62  * Redistribution and use in source and binary forms, with or without
  63  * modification, are permitted provided that the following conditions are met:
  64  *     * Redistributions of source code must retain the above copyright
  65  *       notice, this list of conditions and the following disclaimer.
  66  *     * Redistributions in binary form must reproduce the above copyright
  67  *       notice, this list of conditions and the following disclaimer in the
  68  *       documentation and/or other materials provided with the distribution.
  69  *     * Neither the name of Advanced Micro Devices, Inc. nor the
  70  *       names of its contributors may be used to endorse or promote products
  71  *       derived from this software without specific prior written permission.
  72  *
  73  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  74  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  75  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  76  * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
  77  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  79  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  80  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  82  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83  *
  84  * This file incorporates work covered by the following copyright and
  85  * permission notice:
  86  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  87  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  88  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  89  *     and you.
  90  *
  91  *     The Software IS NOT an item of Licensed Software or Licensed Product
  92  *     under any End User Software License Agreement or Agreement for Licensed
  93  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  94  *     granted, free of charge, to any person obtaining a copy of this software
  95  *     annotated with this license and the Software, to deal in the Software
  96  *     without restriction, including without limitation the rights to use,
  97  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  98  *     of the Software, and to permit persons to whom the Software is furnished
  99  *     to do so, subject to the following conditions:
 100  *
 101  *     The above copyright notice and this permission notice shall be included
 102  *     in all copies or substantial portions of the Software.
 103  *
 104  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
 105  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 106  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 107  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
 108  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 109  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 110  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 111  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 112  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 113  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 114  *     THE POSSIBILITY OF SUCH DAMAGE.
 115  */
 116 
 117 #include <linux/interrupt.h>
 118 #include <linux/module.h>
 119 #include <linux/kmod.h>
 120 #include <linux/mdio.h>
 121 #include <linux/phy.h>
 122 #include <linux/of.h>
 123 #include <linux/bitops.h>
 124 #include <linux/jiffies.h>
 125 
 126 #include "xgbe.h"
 127 #include "xgbe-common.h"
 128 
 129 static int xgbe_phy_module_eeprom(struct xgbe_prv_data *pdata,
 130                                   struct ethtool_eeprom *eeprom, u8 *data)
 131 {
 132         if (!pdata->phy_if.phy_impl.module_eeprom)
 133                 return -ENXIO;
 134 
 135         return pdata->phy_if.phy_impl.module_eeprom(pdata, eeprom, data);
 136 }
 137 
 138 static int xgbe_phy_module_info(struct xgbe_prv_data *pdata,
 139                                 struct ethtool_modinfo *modinfo)
 140 {
 141         if (!pdata->phy_if.phy_impl.module_info)
 142                 return -ENXIO;
 143 
 144         return pdata->phy_if.phy_impl.module_info(pdata, modinfo);
 145 }
 146 
 147 static void xgbe_an37_clear_interrupts(struct xgbe_prv_data *pdata)
 148 {
 149         int reg;
 150 
 151         reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_STAT);
 152         reg &= ~XGBE_AN_CL37_INT_MASK;
 153         XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_STAT, reg);
 154 }
 155 
 156 static void xgbe_an37_disable_interrupts(struct xgbe_prv_data *pdata)
 157 {
 158         int reg;
 159 
 160         reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL);
 161         reg &= ~XGBE_AN_CL37_INT_MASK;
 162         XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL, reg);
 163 
 164         reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL);
 165         reg &= ~XGBE_PCS_CL37_BP;
 166         XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL, reg);
 167 }
 168 
 169 static void xgbe_an37_enable_interrupts(struct xgbe_prv_data *pdata)
 170 {
 171         int reg;
 172 
 173         reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL);
 174         reg |= XGBE_PCS_CL37_BP;
 175         XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL, reg);
 176 
 177         reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL);
 178         reg |= XGBE_AN_CL37_INT_MASK;
 179         XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL, reg);
 180 }
 181 
 182 static void xgbe_an73_clear_interrupts(struct xgbe_prv_data *pdata)
 183 {
 184         XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);
 185 }
 186 
 187 static void xgbe_an73_disable_interrupts(struct xgbe_prv_data *pdata)
 188 {
 189         XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INTMASK, 0);
 190 }
 191 
 192 static void xgbe_an73_enable_interrupts(struct xgbe_prv_data *pdata)
 193 {
 194         XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INTMASK, XGBE_AN_CL73_INT_MASK);
 195 }
 196 
 197 static void xgbe_an_enable_interrupts(struct xgbe_prv_data *pdata)
 198 {
 199         switch (pdata->an_mode) {
 200         case XGBE_AN_MODE_CL73:
 201         case XGBE_AN_MODE_CL73_REDRV:
 202                 xgbe_an73_enable_interrupts(pdata);
 203                 break;
 204         case XGBE_AN_MODE_CL37:
 205         case XGBE_AN_MODE_CL37_SGMII:
 206                 xgbe_an37_enable_interrupts(pdata);
 207                 break;
 208         default:
 209                 break;
 210         }
 211 }
 212 
 213 static void xgbe_an_clear_interrupts_all(struct xgbe_prv_data *pdata)
 214 {
 215         xgbe_an73_clear_interrupts(pdata);
 216         xgbe_an37_clear_interrupts(pdata);
 217 }
 218 
 219 static void xgbe_kr_mode(struct xgbe_prv_data *pdata)
 220 {
 221         /* Set MAC to 10G speed */
 222         pdata->hw_if.set_speed(pdata, SPEED_10000);
 223 
 224         /* Call PHY implementation support to complete rate change */
 225         pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_KR);
 226 }
 227 
 228 static void xgbe_kx_2500_mode(struct xgbe_prv_data *pdata)
 229 {
 230         /* Set MAC to 2.5G speed */
 231         pdata->hw_if.set_speed(pdata, SPEED_2500);
 232 
 233         /* Call PHY implementation support to complete rate change */
 234         pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_KX_2500);
 235 }
 236 
 237 static void xgbe_kx_1000_mode(struct xgbe_prv_data *pdata)
 238 {
 239         /* Set MAC to 1G speed */
 240         pdata->hw_if.set_speed(pdata, SPEED_1000);
 241 
 242         /* Call PHY implementation support to complete rate change */
 243         pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_KX_1000);
 244 }
 245 
 246 static void xgbe_sfi_mode(struct xgbe_prv_data *pdata)
 247 {
 248         /* If a KR re-driver is present, change to KR mode instead */
 249         if (pdata->kr_redrv)
 250                 return xgbe_kr_mode(pdata);
 251 
 252         /* Set MAC to 10G speed */
 253         pdata->hw_if.set_speed(pdata, SPEED_10000);
 254 
 255         /* Call PHY implementation support to complete rate change */
 256         pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SFI);
 257 }
 258 
 259 static void xgbe_x_mode(struct xgbe_prv_data *pdata)
 260 {
 261         /* Set MAC to 1G speed */
 262         pdata->hw_if.set_speed(pdata, SPEED_1000);
 263 
 264         /* Call PHY implementation support to complete rate change */
 265         pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_X);
 266 }
 267 
 268 static void xgbe_sgmii_1000_mode(struct xgbe_prv_data *pdata)
 269 {
 270         /* Set MAC to 1G speed */
 271         pdata->hw_if.set_speed(pdata, SPEED_1000);
 272 
 273         /* Call PHY implementation support to complete rate change */
 274         pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SGMII_1000);
 275 }
 276 
 277 static void xgbe_sgmii_100_mode(struct xgbe_prv_data *pdata)
 278 {
 279         /* Set MAC to 1G speed */
 280         pdata->hw_if.set_speed(pdata, SPEED_1000);
 281 
 282         /* Call PHY implementation support to complete rate change */
 283         pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SGMII_100);
 284 }
 285 
 286 static enum xgbe_mode xgbe_cur_mode(struct xgbe_prv_data *pdata)
 287 {
 288         return pdata->phy_if.phy_impl.cur_mode(pdata);
 289 }
 290 
 291 static bool xgbe_in_kr_mode(struct xgbe_prv_data *pdata)
 292 {
 293         return (xgbe_cur_mode(pdata) == XGBE_MODE_KR);
 294 }
 295 
 296 static void xgbe_change_mode(struct xgbe_prv_data *pdata,
 297                              enum xgbe_mode mode)
 298 {
 299         switch (mode) {
 300         case XGBE_MODE_KX_1000:
 301                 xgbe_kx_1000_mode(pdata);
 302                 break;
 303         case XGBE_MODE_KX_2500:
 304                 xgbe_kx_2500_mode(pdata);
 305                 break;
 306         case XGBE_MODE_KR:
 307                 xgbe_kr_mode(pdata);
 308                 break;
 309         case XGBE_MODE_SGMII_100:
 310                 xgbe_sgmii_100_mode(pdata);
 311                 break;
 312         case XGBE_MODE_SGMII_1000:
 313                 xgbe_sgmii_1000_mode(pdata);
 314                 break;
 315         case XGBE_MODE_X:
 316                 xgbe_x_mode(pdata);
 317                 break;
 318         case XGBE_MODE_SFI:
 319                 xgbe_sfi_mode(pdata);
 320                 break;
 321         case XGBE_MODE_UNKNOWN:
 322                 break;
 323         default:
 324                 netif_dbg(pdata, link, pdata->netdev,
 325                           "invalid operation mode requested (%u)\n", mode);
 326         }
 327 }
 328 
 329 static void xgbe_switch_mode(struct xgbe_prv_data *pdata)
 330 {
 331         xgbe_change_mode(pdata, pdata->phy_if.phy_impl.switch_mode(pdata));
 332 }
 333 
 334 static bool xgbe_set_mode(struct xgbe_prv_data *pdata,
 335                           enum xgbe_mode mode)
 336 {
 337         if (mode == xgbe_cur_mode(pdata))
 338                 return false;
 339 
 340         xgbe_change_mode(pdata, mode);
 341 
 342         return true;
 343 }
 344 
 345 static bool xgbe_use_mode(struct xgbe_prv_data *pdata,
 346                           enum xgbe_mode mode)
 347 {
 348         return pdata->phy_if.phy_impl.use_mode(pdata, mode);
 349 }
 350 
 351 static void xgbe_an37_set(struct xgbe_prv_data *pdata, bool enable,
 352                           bool restart)
 353 {
 354         unsigned int reg;
 355 
 356         reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_CTRL1);
 357         reg &= ~MDIO_VEND2_CTRL1_AN_ENABLE;
 358 
 359         if (enable)
 360                 reg |= MDIO_VEND2_CTRL1_AN_ENABLE;
 361 
 362         if (restart)
 363                 reg |= MDIO_VEND2_CTRL1_AN_RESTART;
 364 
 365         XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_CTRL1, reg);
 366 }
 367 
 368 static void xgbe_an37_restart(struct xgbe_prv_data *pdata)
 369 {
 370         xgbe_an37_enable_interrupts(pdata);
 371         xgbe_an37_set(pdata, true, true);
 372 
 373         netif_dbg(pdata, link, pdata->netdev, "CL37 AN enabled/restarted\n");
 374 }
 375 
 376 static void xgbe_an37_disable(struct xgbe_prv_data *pdata)
 377 {
 378         xgbe_an37_set(pdata, false, false);
 379         xgbe_an37_disable_interrupts(pdata);
 380 
 381         netif_dbg(pdata, link, pdata->netdev, "CL37 AN disabled\n");
 382 }
 383 
 384 static void xgbe_an73_set(struct xgbe_prv_data *pdata, bool enable,
 385                           bool restart)
 386 {
 387         unsigned int reg;
 388 
 389         /* Disable KR training for now */
 390         reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL);
 391         reg &= ~XGBE_KR_TRAINING_ENABLE;
 392         XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);
 393 
 394         /* Update AN settings */
 395         reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1);
 396         reg &= ~MDIO_AN_CTRL1_ENABLE;
 397 
 398         if (enable)
 399                 reg |= MDIO_AN_CTRL1_ENABLE;
 400 
 401         if (restart)
 402                 reg |= MDIO_AN_CTRL1_RESTART;
 403 
 404         XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_CTRL1, reg);
 405 }
 406 
 407 static void xgbe_an73_restart(struct xgbe_prv_data *pdata)
 408 {
 409         xgbe_an73_enable_interrupts(pdata);
 410         xgbe_an73_set(pdata, true, true);
 411 
 412         netif_dbg(pdata, link, pdata->netdev, "CL73 AN enabled/restarted\n");
 413 }
 414 
 415 static void xgbe_an73_disable(struct xgbe_prv_data *pdata)
 416 {
 417         xgbe_an73_set(pdata, false, false);
 418         xgbe_an73_disable_interrupts(pdata);
 419 
 420         pdata->an_start = 0;
 421 
 422         netif_dbg(pdata, link, pdata->netdev, "CL73 AN disabled\n");
 423 }
 424 
 425 static void xgbe_an_restart(struct xgbe_prv_data *pdata)
 426 {
 427         if (pdata->phy_if.phy_impl.an_pre)
 428                 pdata->phy_if.phy_impl.an_pre(pdata);
 429 
 430         switch (pdata->an_mode) {
 431         case XGBE_AN_MODE_CL73:
 432         case XGBE_AN_MODE_CL73_REDRV:
 433                 xgbe_an73_restart(pdata);
 434                 break;
 435         case XGBE_AN_MODE_CL37:
 436         case XGBE_AN_MODE_CL37_SGMII:
 437                 xgbe_an37_restart(pdata);
 438                 break;
 439         default:
 440                 break;
 441         }
 442 }
 443 
 444 static void xgbe_an_disable(struct xgbe_prv_data *pdata)
 445 {
 446         if (pdata->phy_if.phy_impl.an_post)
 447                 pdata->phy_if.phy_impl.an_post(pdata);
 448 
 449         switch (pdata->an_mode) {
 450         case XGBE_AN_MODE_CL73:
 451         case XGBE_AN_MODE_CL73_REDRV:
 452                 xgbe_an73_disable(pdata);
 453                 break;
 454         case XGBE_AN_MODE_CL37:
 455         case XGBE_AN_MODE_CL37_SGMII:
 456                 xgbe_an37_disable(pdata);
 457                 break;
 458         default:
 459                 break;
 460         }
 461 }
 462 
 463 static void xgbe_an_disable_all(struct xgbe_prv_data *pdata)
 464 {
 465         xgbe_an73_disable(pdata);
 466         xgbe_an37_disable(pdata);
 467 }
 468 
 469 static enum xgbe_an xgbe_an73_tx_training(struct xgbe_prv_data *pdata,
 470                                           enum xgbe_rx *state)
 471 {
 472         unsigned int ad_reg, lp_reg, reg;
 473 
 474         *state = XGBE_RX_COMPLETE;
 475 
 476         /* If we're not in KR mode then we're done */
 477         if (!xgbe_in_kr_mode(pdata))
 478                 return XGBE_AN_PAGE_RECEIVED;
 479 
 480         /* Enable/Disable FEC */
 481         ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
 482         lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2);
 483 
 484         reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FECCTRL);
 485         reg &= ~(MDIO_PMA_10GBR_FECABLE_ABLE | MDIO_PMA_10GBR_FECABLE_ERRABLE);
 486         if ((ad_reg & 0xc000) && (lp_reg & 0xc000))
 487                 reg |= pdata->fec_ability;
 488 
 489         XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FECCTRL, reg);
 490 
 491         /* Start KR training */
 492         if (pdata->phy_if.phy_impl.kr_training_pre)
 493                 pdata->phy_if.phy_impl.kr_training_pre(pdata);
 494 
 495         reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL);
 496         reg |= XGBE_KR_TRAINING_ENABLE;
 497         reg |= XGBE_KR_TRAINING_START;
 498         XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);
 499 
 500         netif_dbg(pdata, link, pdata->netdev,
 501                   "KR training initiated\n");
 502 
 503         if (pdata->phy_if.phy_impl.kr_training_post)
 504                 pdata->phy_if.phy_impl.kr_training_post(pdata);
 505 
 506         return XGBE_AN_PAGE_RECEIVED;
 507 }
 508 
 509 static enum xgbe_an xgbe_an73_tx_xnp(struct xgbe_prv_data *pdata,
 510                                      enum xgbe_rx *state)
 511 {
 512         u16 msg;
 513 
 514         *state = XGBE_RX_XNP;
 515 
 516         msg = XGBE_XNP_MCF_NULL_MESSAGE;
 517         msg |= XGBE_XNP_MP_FORMATTED;
 518 
 519         XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_XNP + 2, 0);
 520         XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_XNP + 1, 0);
 521         XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_XNP, msg);
 522 
 523         return XGBE_AN_PAGE_RECEIVED;
 524 }
 525 
 526 static enum xgbe_an xgbe_an73_rx_bpa(struct xgbe_prv_data *pdata,
 527                                      enum xgbe_rx *state)
 528 {
 529         unsigned int link_support;
 530         unsigned int reg, ad_reg, lp_reg;
 531 
 532         /* Read Base Ability register 2 first */
 533         reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1);
 534 
 535         /* Check for a supported mode, otherwise restart in a different one */
 536         link_support = xgbe_in_kr_mode(pdata) ? 0x80 : 0x20;
 537         if (!(reg & link_support))
 538                 return XGBE_AN_INCOMPAT_LINK;
 539 
 540         /* Check Extended Next Page support */
 541         ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
 542         lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA);
 543 
 544         return ((ad_reg & XGBE_XNP_NP_EXCHANGE) ||
 545                 (lp_reg & XGBE_XNP_NP_EXCHANGE))
 546                ? xgbe_an73_tx_xnp(pdata, state)
 547                : xgbe_an73_tx_training(pdata, state);
 548 }
 549 
 550 static enum xgbe_an xgbe_an73_rx_xnp(struct xgbe_prv_data *pdata,
 551                                      enum xgbe_rx *state)
 552 {
 553         unsigned int ad_reg, lp_reg;
 554 
 555         /* Check Extended Next Page support */
 556         ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_XNP);
 557         lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPX);
 558 
 559         return ((ad_reg & XGBE_XNP_NP_EXCHANGE) ||
 560                 (lp_reg & XGBE_XNP_NP_EXCHANGE))
 561                ? xgbe_an73_tx_xnp(pdata, state)
 562                : xgbe_an73_tx_training(pdata, state);
 563 }
 564 
 565 static enum xgbe_an xgbe_an73_page_received(struct xgbe_prv_data *pdata)
 566 {
 567         enum xgbe_rx *state;
 568         unsigned long an_timeout;
 569         enum xgbe_an ret;
 570 
 571         if (!pdata->an_start) {
 572                 pdata->an_start = jiffies;
 573         } else {
 574                 an_timeout = pdata->an_start +
 575                              msecs_to_jiffies(XGBE_AN_MS_TIMEOUT);
 576                 if (time_after(jiffies, an_timeout)) {
 577                         /* Auto-negotiation timed out, reset state */
 578                         pdata->kr_state = XGBE_RX_BPA;
 579                         pdata->kx_state = XGBE_RX_BPA;
 580 
 581                         pdata->an_start = jiffies;
 582 
 583                         netif_dbg(pdata, link, pdata->netdev,
 584                                   "CL73 AN timed out, resetting state\n");
 585                 }
 586         }
 587 
 588         state = xgbe_in_kr_mode(pdata) ? &pdata->kr_state
 589                                        : &pdata->kx_state;
 590 
 591         switch (*state) {
 592         case XGBE_RX_BPA:
 593                 ret = xgbe_an73_rx_bpa(pdata, state);
 594                 break;
 595 
 596         case XGBE_RX_XNP:
 597                 ret = xgbe_an73_rx_xnp(pdata, state);
 598                 break;
 599 
 600         default:
 601                 ret = XGBE_AN_ERROR;
 602         }
 603 
 604         return ret;
 605 }
 606 
 607 static enum xgbe_an xgbe_an73_incompat_link(struct xgbe_prv_data *pdata)
 608 {
 609         struct ethtool_link_ksettings *lks = &pdata->phy.lks;
 610 
 611         /* Be sure we aren't looping trying to negotiate */
 612         if (xgbe_in_kr_mode(pdata)) {
 613                 pdata->kr_state = XGBE_RX_ERROR;
 614 
 615                 if (!XGBE_ADV(lks, 1000baseKX_Full) &&
 616                     !XGBE_ADV(lks, 2500baseX_Full))
 617                         return XGBE_AN_NO_LINK;
 618 
 619                 if (pdata->kx_state != XGBE_RX_BPA)
 620                         return XGBE_AN_NO_LINK;
 621         } else {
 622                 pdata->kx_state = XGBE_RX_ERROR;
 623 
 624                 if (!XGBE_ADV(lks, 10000baseKR_Full))
 625                         return XGBE_AN_NO_LINK;
 626 
 627                 if (pdata->kr_state != XGBE_RX_BPA)
 628                         return XGBE_AN_NO_LINK;
 629         }
 630 
 631         xgbe_an_disable(pdata);
 632 
 633         xgbe_switch_mode(pdata);
 634 
 635         xgbe_an_restart(pdata);
 636 
 637         return XGBE_AN_INCOMPAT_LINK;
 638 }
 639 
 640 static void xgbe_an37_isr(struct xgbe_prv_data *pdata)
 641 {
 642         unsigned int reg;
 643 
 644         /* Disable AN interrupts */
 645         xgbe_an37_disable_interrupts(pdata);
 646 
 647         /* Save the interrupt(s) that fired */
 648         reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_STAT);
 649         pdata->an_int = reg & XGBE_AN_CL37_INT_MASK;
 650         pdata->an_status = reg & ~XGBE_AN_CL37_INT_MASK;
 651 
 652         if (pdata->an_int) {
 653                 /* Clear the interrupt(s) that fired and process them */
 654                 reg &= ~XGBE_AN_CL37_INT_MASK;
 655                 XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_STAT, reg);
 656 
 657                 queue_work(pdata->an_workqueue, &pdata->an_irq_work);
 658         } else {
 659                 /* Enable AN interrupts */
 660                 xgbe_an37_enable_interrupts(pdata);
 661 
 662                 /* Reissue interrupt if status is not clear */
 663                 if (pdata->vdata->irq_reissue_support)
 664                         XP_IOWRITE(pdata, XP_INT_REISSUE_EN, 1 << 3);
 665         }
 666 }
 667 
 668 static void xgbe_an73_isr(struct xgbe_prv_data *pdata)
 669 {
 670         /* Disable AN interrupts */
 671         xgbe_an73_disable_interrupts(pdata);
 672 
 673         /* Save the interrupt(s) that fired */
 674         pdata->an_int = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_INT);
 675 
 676         if (pdata->an_int) {
 677                 /* Clear the interrupt(s) that fired and process them */
 678                 XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, ~pdata->an_int);
 679 
 680                 queue_work(pdata->an_workqueue, &pdata->an_irq_work);
 681         } else {
 682                 /* Enable AN interrupts */
 683                 xgbe_an73_enable_interrupts(pdata);
 684 
 685                 /* Reissue interrupt if status is not clear */
 686                 if (pdata->vdata->irq_reissue_support)
 687                         XP_IOWRITE(pdata, XP_INT_REISSUE_EN, 1 << 3);
 688         }
 689 }
 690 
 691 static void xgbe_an_isr_task(unsigned long data)
 692 {
 693         struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;
 694 
 695         netif_dbg(pdata, intr, pdata->netdev, "AN interrupt received\n");
 696 
 697         switch (pdata->an_mode) {
 698         case XGBE_AN_MODE_CL73:
 699         case XGBE_AN_MODE_CL73_REDRV:
 700                 xgbe_an73_isr(pdata);
 701                 break;
 702         case XGBE_AN_MODE_CL37:
 703         case XGBE_AN_MODE_CL37_SGMII:
 704                 xgbe_an37_isr(pdata);
 705                 break;
 706         default:
 707                 break;
 708         }
 709 }
 710 
 711 static irqreturn_t xgbe_an_isr(int irq, void *data)
 712 {
 713         struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;
 714 
 715         if (pdata->isr_as_tasklet)
 716                 tasklet_schedule(&pdata->tasklet_an);
 717         else
 718                 xgbe_an_isr_task((unsigned long)pdata);
 719 
 720         return IRQ_HANDLED;
 721 }
 722 
 723 static irqreturn_t xgbe_an_combined_isr(struct xgbe_prv_data *pdata)
 724 {
 725         xgbe_an_isr_task((unsigned long)pdata);
 726 
 727         return IRQ_HANDLED;
 728 }
 729 
 730 static void xgbe_an_irq_work(struct work_struct *work)
 731 {
 732         struct xgbe_prv_data *pdata = container_of(work,
 733                                                    struct xgbe_prv_data,
 734                                                    an_irq_work);
 735 
 736         /* Avoid a race between enabling the IRQ and exiting the work by
 737          * waiting for the work to finish and then queueing it
 738          */
 739         flush_work(&pdata->an_work);
 740         queue_work(pdata->an_workqueue, &pdata->an_work);
 741 }
 742 
 743 static const char *xgbe_state_as_string(enum xgbe_an state)
 744 {
 745         switch (state) {
 746         case XGBE_AN_READY:
 747                 return "Ready";
 748         case XGBE_AN_PAGE_RECEIVED:
 749                 return "Page-Received";
 750         case XGBE_AN_INCOMPAT_LINK:
 751                 return "Incompatible-Link";
 752         case XGBE_AN_COMPLETE:
 753                 return "Complete";
 754         case XGBE_AN_NO_LINK:
 755                 return "No-Link";
 756         case XGBE_AN_ERROR:
 757                 return "Error";
 758         default:
 759                 return "Undefined";
 760         }
 761 }
 762 
 763 static void xgbe_an37_state_machine(struct xgbe_prv_data *pdata)
 764 {
 765         enum xgbe_an cur_state = pdata->an_state;
 766 
 767         if (!pdata->an_int)
 768                 return;
 769 
 770         if (pdata->an_int & XGBE_AN_CL37_INT_CMPLT) {
 771                 pdata->an_state = XGBE_AN_COMPLETE;
 772                 pdata->an_int &= ~XGBE_AN_CL37_INT_CMPLT;
 773 
 774                 /* If SGMII is enabled, check the link status */
 775                 if ((pdata->an_mode == XGBE_AN_MODE_CL37_SGMII) &&
 776                     !(pdata->an_status & XGBE_SGMII_AN_LINK_STATUS))
 777                         pdata->an_state = XGBE_AN_NO_LINK;
 778         }
 779 
 780         netif_dbg(pdata, link, pdata->netdev, "CL37 AN %s\n",
 781                   xgbe_state_as_string(pdata->an_state));
 782 
 783         cur_state = pdata->an_state;
 784 
 785         switch (pdata->an_state) {
 786         case XGBE_AN_READY:
 787                 break;
 788 
 789         case XGBE_AN_COMPLETE:
 790                 netif_dbg(pdata, link, pdata->netdev,
 791                           "Auto negotiation successful\n");
 792                 break;
 793 
 794         case XGBE_AN_NO_LINK:
 795                 break;
 796 
 797         default:
 798                 pdata->an_state = XGBE_AN_ERROR;
 799         }
 800 
 801         if (pdata->an_state == XGBE_AN_ERROR) {
 802                 netdev_err(pdata->netdev,
 803                            "error during auto-negotiation, state=%u\n",
 804                            cur_state);
 805 
 806                 pdata->an_int = 0;
 807                 xgbe_an37_clear_interrupts(pdata);
 808         }
 809 
 810         if (pdata->an_state >= XGBE_AN_COMPLETE) {
 811                 pdata->an_result = pdata->an_state;
 812                 pdata->an_state = XGBE_AN_READY;
 813 
 814                 if (pdata->phy_if.phy_impl.an_post)
 815                         pdata->phy_if.phy_impl.an_post(pdata);
 816 
 817                 netif_dbg(pdata, link, pdata->netdev, "CL37 AN result: %s\n",
 818                           xgbe_state_as_string(pdata->an_result));
 819         }
 820 
 821         xgbe_an37_enable_interrupts(pdata);
 822 }
 823 
 824 static void xgbe_an73_state_machine(struct xgbe_prv_data *pdata)
 825 {
 826         enum xgbe_an cur_state = pdata->an_state;
 827 
 828         if (!pdata->an_int)
 829                 return;
 830 
 831 next_int:
 832         if (pdata->an_int & XGBE_AN_CL73_PG_RCV) {
 833                 pdata->an_state = XGBE_AN_PAGE_RECEIVED;
 834                 pdata->an_int &= ~XGBE_AN_CL73_PG_RCV;
 835         } else if (pdata->an_int & XGBE_AN_CL73_INC_LINK) {
 836                 pdata->an_state = XGBE_AN_INCOMPAT_LINK;
 837                 pdata->an_int &= ~XGBE_AN_CL73_INC_LINK;
 838         } else if (pdata->an_int & XGBE_AN_CL73_INT_CMPLT) {
 839                 pdata->an_state = XGBE_AN_COMPLETE;
 840                 pdata->an_int &= ~XGBE_AN_CL73_INT_CMPLT;
 841         } else {
 842                 pdata->an_state = XGBE_AN_ERROR;
 843         }
 844 
 845 again:
 846         netif_dbg(pdata, link, pdata->netdev, "CL73 AN %s\n",
 847                   xgbe_state_as_string(pdata->an_state));
 848 
 849         cur_state = pdata->an_state;
 850 
 851         switch (pdata->an_state) {
 852         case XGBE_AN_READY:
 853                 pdata->an_supported = 0;
 854                 break;
 855 
 856         case XGBE_AN_PAGE_RECEIVED:
 857                 pdata->an_state = xgbe_an73_page_received(pdata);
 858                 pdata->an_supported++;
 859                 break;
 860 
 861         case XGBE_AN_INCOMPAT_LINK:
 862                 pdata->an_supported = 0;
 863                 pdata->parallel_detect = 0;
 864                 pdata->an_state = xgbe_an73_incompat_link(pdata);
 865                 break;
 866 
 867         case XGBE_AN_COMPLETE:
 868                 pdata->parallel_detect = pdata->an_supported ? 0 : 1;
 869                 netif_dbg(pdata, link, pdata->netdev, "%s successful\n",
 870                           pdata->an_supported ? "Auto negotiation"
 871                                               : "Parallel detection");
 872                 break;
 873 
 874         case XGBE_AN_NO_LINK:
 875                 break;
 876 
 877         default:
 878                 pdata->an_state = XGBE_AN_ERROR;
 879         }
 880 
 881         if (pdata->an_state == XGBE_AN_NO_LINK) {
 882                 pdata->an_int = 0;
 883                 xgbe_an73_clear_interrupts(pdata);
 884         } else if (pdata->an_state == XGBE_AN_ERROR) {
 885                 netdev_err(pdata->netdev,
 886                            "error during auto-negotiation, state=%u\n",
 887                            cur_state);
 888 
 889                 pdata->an_int = 0;
 890                 xgbe_an73_clear_interrupts(pdata);
 891         }
 892 
 893         if (pdata->an_state >= XGBE_AN_COMPLETE) {
 894                 pdata->an_result = pdata->an_state;
 895                 pdata->an_state = XGBE_AN_READY;
 896                 pdata->kr_state = XGBE_RX_BPA;
 897                 pdata->kx_state = XGBE_RX_BPA;
 898                 pdata->an_start = 0;
 899 
 900                 if (pdata->phy_if.phy_impl.an_post)
 901                         pdata->phy_if.phy_impl.an_post(pdata);
 902 
 903                 netif_dbg(pdata, link, pdata->netdev, "CL73 AN result: %s\n",
 904                           xgbe_state_as_string(pdata->an_result));
 905         }
 906 
 907         if (cur_state != pdata->an_state)
 908                 goto again;
 909 
 910         if (pdata->an_int)
 911                 goto next_int;
 912 
 913         xgbe_an73_enable_interrupts(pdata);
 914 }
 915 
 916 static void xgbe_an_state_machine(struct work_struct *work)
 917 {
 918         struct xgbe_prv_data *pdata = container_of(work,
 919                                                    struct xgbe_prv_data,
 920                                                    an_work);
 921 
 922         mutex_lock(&pdata->an_mutex);
 923 
 924         switch (pdata->an_mode) {
 925         case XGBE_AN_MODE_CL73:
 926         case XGBE_AN_MODE_CL73_REDRV:
 927                 xgbe_an73_state_machine(pdata);
 928                 break;
 929         case XGBE_AN_MODE_CL37:
 930         case XGBE_AN_MODE_CL37_SGMII:
 931                 xgbe_an37_state_machine(pdata);
 932                 break;
 933         default:
 934                 break;
 935         }
 936 
 937         /* Reissue interrupt if status is not clear */
 938         if (pdata->vdata->irq_reissue_support)
 939                 XP_IOWRITE(pdata, XP_INT_REISSUE_EN, 1 << 3);
 940 
 941         mutex_unlock(&pdata->an_mutex);
 942 }
 943 
 944 static void xgbe_an37_init(struct xgbe_prv_data *pdata)
 945 {
 946         struct ethtool_link_ksettings lks;
 947         unsigned int reg;
 948 
 949         pdata->phy_if.phy_impl.an_advertising(pdata, &lks);
 950 
 951         /* Set up Advertisement register */
 952         reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_ADVERTISE);
 953         if (XGBE_ADV(&lks, Pause))
 954                 reg |= 0x100;
 955         else
 956                 reg &= ~0x100;
 957 
 958         if (XGBE_ADV(&lks, Asym_Pause))
 959                 reg |= 0x80;
 960         else
 961                 reg &= ~0x80;
 962 
 963         /* Full duplex, but not half */
 964         reg |= XGBE_AN_CL37_FD_MASK;
 965         reg &= ~XGBE_AN_CL37_HD_MASK;
 966 
 967         XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_ADVERTISE, reg);
 968 
 969         /* Set up the Control register */
 970         reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL);
 971         reg &= ~XGBE_AN_CL37_TX_CONFIG_MASK;
 972         reg &= ~XGBE_AN_CL37_PCS_MODE_MASK;
 973 
 974         switch (pdata->an_mode) {
 975         case XGBE_AN_MODE_CL37:
 976                 reg |= XGBE_AN_CL37_PCS_MODE_BASEX;
 977                 break;
 978         case XGBE_AN_MODE_CL37_SGMII:
 979                 reg |= XGBE_AN_CL37_PCS_MODE_SGMII;
 980                 break;
 981         default:
 982                 break;
 983         }
 984 
 985         reg |= XGBE_AN_CL37_MII_CTRL_8BIT;
 986 
 987         XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL, reg);
 988 
 989         netif_dbg(pdata, link, pdata->netdev, "CL37 AN (%s) initialized\n",
 990                   (pdata->an_mode == XGBE_AN_MODE_CL37) ? "BaseX" : "SGMII");
 991 }
 992 
 993 static void xgbe_an73_init(struct xgbe_prv_data *pdata)
 994 {
 995         struct ethtool_link_ksettings lks;
 996         unsigned int reg;
 997 
 998         pdata->phy_if.phy_impl.an_advertising(pdata, &lks);
 999 
1000         /* Set up Advertisement register 3 first */
1001         reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
1002         if (XGBE_ADV(&lks, 10000baseR_FEC))
1003                 reg |= 0xc000;
1004         else
1005                 reg &= ~0xc000;
1006 
1007         XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2, reg);
1008 
1009         /* Set up Advertisement register 2 next */
1010         reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);
1011         if (XGBE_ADV(&lks, 10000baseKR_Full))
1012                 reg |= 0x80;
1013         else
1014                 reg &= ~0x80;
1015 
1016         if (XGBE_ADV(&lks, 1000baseKX_Full) ||
1017             XGBE_ADV(&lks, 2500baseX_Full))
1018                 reg |= 0x20;
1019         else
1020                 reg &= ~0x20;
1021 
1022         XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1, reg);
1023 
1024         /* Set up Advertisement register 1 last */
1025         reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
1026         if (XGBE_ADV(&lks, Pause))
1027                 reg |= 0x400;
1028         else
1029                 reg &= ~0x400;
1030 
1031         if (XGBE_ADV(&lks, Asym_Pause))
1032                 reg |= 0x800;
1033         else
1034                 reg &= ~0x800;
1035 
1036         /* We don't intend to perform XNP */
1037         reg &= ~XGBE_XNP_NP_EXCHANGE;
1038 
1039         XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);
1040 
1041         netif_dbg(pdata, link, pdata->netdev, "CL73 AN initialized\n");
1042 }
1043 
1044 static void xgbe_an_init(struct xgbe_prv_data *pdata)
1045 {
1046         /* Set up advertisement registers based on current settings */
1047         pdata->an_mode = pdata->phy_if.phy_impl.an_mode(pdata);
1048         switch (pdata->an_mode) {
1049         case XGBE_AN_MODE_CL73:
1050         case XGBE_AN_MODE_CL73_REDRV:
1051                 xgbe_an73_init(pdata);
1052                 break;
1053         case XGBE_AN_MODE_CL37:
1054         case XGBE_AN_MODE_CL37_SGMII:
1055                 xgbe_an37_init(pdata);
1056                 break;
1057         default:
1058                 break;
1059         }
1060 }
1061 
1062 static const char *xgbe_phy_fc_string(struct xgbe_prv_data *pdata)
1063 {
1064         if (pdata->tx_pause && pdata->rx_pause)
1065                 return "rx/tx";
1066         else if (pdata->rx_pause)
1067                 return "rx";
1068         else if (pdata->tx_pause)
1069                 return "tx";
1070         else
1071                 return "off";
1072 }
1073 
1074 static const char *xgbe_phy_speed_string(int speed)
1075 {
1076         switch (speed) {
1077         case SPEED_100:
1078                 return "100Mbps";
1079         case SPEED_1000:
1080                 return "1Gbps";
1081         case SPEED_2500:
1082                 return "2.5Gbps";
1083         case SPEED_10000:
1084                 return "10Gbps";
1085         case SPEED_UNKNOWN:
1086                 return "Unknown";
1087         default:
1088                 return "Unsupported";
1089         }
1090 }
1091 
1092 static void xgbe_phy_print_status(struct xgbe_prv_data *pdata)
1093 {
1094         if (pdata->phy.link)
1095                 netdev_info(pdata->netdev,
1096                             "Link is Up - %s/%s - flow control %s\n",
1097                             xgbe_phy_speed_string(pdata->phy.speed),
1098                             pdata->phy.duplex == DUPLEX_FULL ? "Full" : "Half",
1099                             xgbe_phy_fc_string(pdata));
1100         else
1101                 netdev_info(pdata->netdev, "Link is Down\n");
1102 }
1103 
1104 static void xgbe_phy_adjust_link(struct xgbe_prv_data *pdata)
1105 {
1106         int new_state = 0;
1107 
1108         if (pdata->phy.link) {
1109                 /* Flow control support */
1110                 pdata->pause_autoneg = pdata->phy.pause_autoneg;
1111 
1112                 if (pdata->tx_pause != pdata->phy.tx_pause) {
1113                         new_state = 1;
1114                         pdata->tx_pause = pdata->phy.tx_pause;
1115                         pdata->hw_if.config_tx_flow_control(pdata);
1116                 }
1117 
1118                 if (pdata->rx_pause != pdata->phy.rx_pause) {
1119                         new_state = 1;
1120                         pdata->rx_pause = pdata->phy.rx_pause;
1121                         pdata->hw_if.config_rx_flow_control(pdata);
1122                 }
1123 
1124                 /* Speed support */
1125                 if (pdata->phy_speed != pdata->phy.speed) {
1126                         new_state = 1;
1127                         pdata->phy_speed = pdata->phy.speed;
1128                 }
1129 
1130                 if (pdata->phy_link != pdata->phy.link) {
1131                         new_state = 1;
1132                         pdata->phy_link = pdata->phy.link;
1133                 }
1134         } else if (pdata->phy_link) {
1135                 new_state = 1;
1136                 pdata->phy_link = 0;
1137                 pdata->phy_speed = SPEED_UNKNOWN;
1138         }
1139 
1140         if (new_state && netif_msg_link(pdata))
1141                 xgbe_phy_print_status(pdata);
1142 }
1143 
1144 static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)
1145 {
1146         return pdata->phy_if.phy_impl.valid_speed(pdata, speed);
1147 }
1148 
1149 static int xgbe_phy_config_fixed(struct xgbe_prv_data *pdata)
1150 {
1151         enum xgbe_mode mode;
1152 
1153         netif_dbg(pdata, link, pdata->netdev, "fixed PHY configuration\n");
1154 
1155         /* Disable auto-negotiation */
1156         xgbe_an_disable(pdata);
1157 
1158         /* Set specified mode for specified speed */
1159         mode = pdata->phy_if.phy_impl.get_mode(pdata, pdata->phy.speed);
1160         switch (mode) {
1161         case XGBE_MODE_KX_1000:
1162         case XGBE_MODE_KX_2500:
1163         case XGBE_MODE_KR:
1164         case XGBE_MODE_SGMII_100:
1165         case XGBE_MODE_SGMII_1000:
1166         case XGBE_MODE_X:
1167         case XGBE_MODE_SFI:
1168                 break;
1169         case XGBE_MODE_UNKNOWN:
1170         default:
1171                 return -EINVAL;
1172         }
1173 
1174         /* Validate duplex mode */
1175         if (pdata->phy.duplex != DUPLEX_FULL)
1176                 return -EINVAL;
1177 
1178         xgbe_set_mode(pdata, mode);
1179 
1180         return 0;
1181 }
1182 
1183 static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata, bool set_mode)
1184 {
1185         int ret;
1186 
1187         mutex_lock(&pdata->an_mutex);
1188 
1189         set_bit(XGBE_LINK_INIT, &pdata->dev_state);
1190         pdata->link_check = jiffies;
1191 
1192         ret = pdata->phy_if.phy_impl.an_config(pdata);
1193         if (ret)
1194                 goto out;
1195 
1196         if (pdata->phy.autoneg != AUTONEG_ENABLE) {
1197                 ret = xgbe_phy_config_fixed(pdata);
1198                 if (ret || !pdata->kr_redrv)
1199                         goto out;
1200 
1201                 netif_dbg(pdata, link, pdata->netdev, "AN redriver support\n");
1202         } else {
1203                 netif_dbg(pdata, link, pdata->netdev, "AN PHY configuration\n");
1204         }
1205 
1206         /* Disable auto-negotiation interrupt */
1207         disable_irq(pdata->an_irq);
1208 
1209         if (set_mode) {
1210                 /* Start auto-negotiation in a supported mode */
1211                 if (xgbe_use_mode(pdata, XGBE_MODE_KR)) {
1212                         xgbe_set_mode(pdata, XGBE_MODE_KR);
1213                 } else if (xgbe_use_mode(pdata, XGBE_MODE_KX_2500)) {
1214                         xgbe_set_mode(pdata, XGBE_MODE_KX_2500);
1215                 } else if (xgbe_use_mode(pdata, XGBE_MODE_KX_1000)) {
1216                         xgbe_set_mode(pdata, XGBE_MODE_KX_1000);
1217                 } else if (xgbe_use_mode(pdata, XGBE_MODE_SFI)) {
1218                         xgbe_set_mode(pdata, XGBE_MODE_SFI);
1219                 } else if (xgbe_use_mode(pdata, XGBE_MODE_X)) {
1220                         xgbe_set_mode(pdata, XGBE_MODE_X);
1221                 } else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_1000)) {
1222                         xgbe_set_mode(pdata, XGBE_MODE_SGMII_1000);
1223                 } else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_100)) {
1224                         xgbe_set_mode(pdata, XGBE_MODE_SGMII_100);
1225                 } else {
1226                         enable_irq(pdata->an_irq);
1227                         ret = -EINVAL;
1228                         goto out;
1229                 }
1230         }
1231 
1232         /* Disable and stop any in progress auto-negotiation */
1233         xgbe_an_disable_all(pdata);
1234 
1235         /* Clear any auto-negotitation interrupts */
1236         xgbe_an_clear_interrupts_all(pdata);
1237 
1238         pdata->an_result = XGBE_AN_READY;
1239         pdata->an_state = XGBE_AN_READY;
1240         pdata->kr_state = XGBE_RX_BPA;
1241         pdata->kx_state = XGBE_RX_BPA;
1242 
1243         /* Re-enable auto-negotiation interrupt */
1244         enable_irq(pdata->an_irq);
1245 
1246         xgbe_an_init(pdata);
1247         xgbe_an_restart(pdata);
1248 
1249 out:
1250         if (ret)
1251                 set_bit(XGBE_LINK_ERR, &pdata->dev_state);
1252         else
1253                 clear_bit(XGBE_LINK_ERR, &pdata->dev_state);
1254 
1255         mutex_unlock(&pdata->an_mutex);
1256 
1257         return ret;
1258 }
1259 
1260 static int xgbe_phy_config_aneg(struct xgbe_prv_data *pdata)
1261 {
1262         return __xgbe_phy_config_aneg(pdata, true);
1263 }
1264 
1265 static int xgbe_phy_reconfig_aneg(struct xgbe_prv_data *pdata)
1266 {
1267         return __xgbe_phy_config_aneg(pdata, false);
1268 }
1269 
1270 static bool xgbe_phy_aneg_done(struct xgbe_prv_data *pdata)
1271 {
1272         return (pdata->an_result == XGBE_AN_COMPLETE);
1273 }
1274 
1275 static void xgbe_check_link_timeout(struct xgbe_prv_data *pdata)
1276 {
1277         unsigned long link_timeout;
1278 
1279         link_timeout = pdata->link_check + (XGBE_LINK_TIMEOUT * HZ);
1280         if (time_after(jiffies, link_timeout)) {
1281                 netif_dbg(pdata, link, pdata->netdev, "AN link timeout\n");
1282                 xgbe_phy_config_aneg(pdata);
1283         }
1284 }
1285 
1286 static enum xgbe_mode xgbe_phy_status_aneg(struct xgbe_prv_data *pdata)
1287 {
1288         return pdata->phy_if.phy_impl.an_outcome(pdata);
1289 }
1290 
1291 static void xgbe_phy_status_result(struct xgbe_prv_data *pdata)
1292 {
1293         struct ethtool_link_ksettings *lks = &pdata->phy.lks;
1294         enum xgbe_mode mode;
1295 
1296         XGBE_ZERO_LP_ADV(lks);
1297 
1298         if ((pdata->phy.autoneg != AUTONEG_ENABLE) || pdata->parallel_detect)
1299                 mode = xgbe_cur_mode(pdata);
1300         else
1301                 mode = xgbe_phy_status_aneg(pdata);
1302 
1303         switch (mode) {
1304         case XGBE_MODE_SGMII_100:
1305                 pdata->phy.speed = SPEED_100;
1306                 break;
1307         case XGBE_MODE_X:
1308         case XGBE_MODE_KX_1000:
1309         case XGBE_MODE_SGMII_1000:
1310                 pdata->phy.speed = SPEED_1000;
1311                 break;
1312         case XGBE_MODE_KX_2500:
1313                 pdata->phy.speed = SPEED_2500;
1314                 break;
1315         case XGBE_MODE_KR:
1316         case XGBE_MODE_SFI:
1317                 pdata->phy.speed = SPEED_10000;
1318                 break;
1319         case XGBE_MODE_UNKNOWN:
1320         default:
1321                 pdata->phy.speed = SPEED_UNKNOWN;
1322         }
1323 
1324         pdata->phy.duplex = DUPLEX_FULL;
1325 
1326         if (xgbe_set_mode(pdata, mode) && pdata->an_again)
1327                 xgbe_phy_reconfig_aneg(pdata);
1328 }
1329 
1330 static void xgbe_phy_status(struct xgbe_prv_data *pdata)
1331 {
1332         unsigned int link_aneg;
1333         int an_restart;
1334 
1335         if (test_bit(XGBE_LINK_ERR, &pdata->dev_state)) {
1336                 netif_carrier_off(pdata->netdev);
1337 
1338                 pdata->phy.link = 0;
1339                 goto adjust_link;
1340         }
1341 
1342         link_aneg = (pdata->phy.autoneg == AUTONEG_ENABLE);
1343 
1344         pdata->phy.link = pdata->phy_if.phy_impl.link_status(pdata,
1345                                                              &an_restart);
1346         if (an_restart) {
1347                 xgbe_phy_config_aneg(pdata);
1348                 return;
1349         }
1350 
1351         if (pdata->phy.link) {
1352                 if (link_aneg && !xgbe_phy_aneg_done(pdata)) {
1353                         xgbe_check_link_timeout(pdata);
1354                         return;
1355                 }
1356 
1357                 xgbe_phy_status_result(pdata);
1358 
1359                 if (test_bit(XGBE_LINK_INIT, &pdata->dev_state))
1360                         clear_bit(XGBE_LINK_INIT, &pdata->dev_state);
1361 
1362                 netif_carrier_on(pdata->netdev);
1363         } else {
1364                 if (test_bit(XGBE_LINK_INIT, &pdata->dev_state)) {
1365                         xgbe_check_link_timeout(pdata);
1366 
1367                         if (link_aneg)
1368                                 return;
1369                 }
1370 
1371                 xgbe_phy_status_result(pdata);
1372 
1373                 netif_carrier_off(pdata->netdev);
1374         }
1375 
1376 adjust_link:
1377         xgbe_phy_adjust_link(pdata);
1378 }
1379 
1380 static void xgbe_phy_stop(struct xgbe_prv_data *pdata)
1381 {
1382         netif_dbg(pdata, link, pdata->netdev, "stopping PHY\n");
1383 
1384         if (!pdata->phy_started)
1385                 return;
1386 
1387         /* Indicate the PHY is down */
1388         pdata->phy_started = 0;
1389 
1390         /* Disable auto-negotiation */
1391         xgbe_an_disable_all(pdata);
1392 
1393         if (pdata->dev_irq != pdata->an_irq)
1394                 devm_free_irq(pdata->dev, pdata->an_irq, pdata);
1395 
1396         pdata->phy_if.phy_impl.stop(pdata);
1397 
1398         pdata->phy.link = 0;
1399         netif_carrier_off(pdata->netdev);
1400 
1401         xgbe_phy_adjust_link(pdata);
1402 }
1403 
1404 static int xgbe_phy_start(struct xgbe_prv_data *pdata)
1405 {
1406         struct net_device *netdev = pdata->netdev;
1407         int ret;
1408 
1409         netif_dbg(pdata, link, pdata->netdev, "starting PHY\n");
1410 
1411         ret = pdata->phy_if.phy_impl.start(pdata);
1412         if (ret)
1413                 return ret;
1414 
1415         /* If we have a separate AN irq, enable it */
1416         if (pdata->dev_irq != pdata->an_irq) {
1417                 tasklet_init(&pdata->tasklet_an, xgbe_an_isr_task,
1418                              (unsigned long)pdata);
1419 
1420                 ret = devm_request_irq(pdata->dev, pdata->an_irq,
1421                                        xgbe_an_isr, 0, pdata->an_name,
1422                                        pdata);
1423                 if (ret) {
1424                         netdev_err(netdev, "phy irq request failed\n");
1425                         goto err_stop;
1426                 }
1427         }
1428 
1429         /* Set initial mode - call the mode setting routines
1430          * directly to insure we are properly configured
1431          */
1432         if (xgbe_use_mode(pdata, XGBE_MODE_KR)) {
1433                 xgbe_kr_mode(pdata);
1434         } else if (xgbe_use_mode(pdata, XGBE_MODE_KX_2500)) {
1435                 xgbe_kx_2500_mode(pdata);
1436         } else if (xgbe_use_mode(pdata, XGBE_MODE_KX_1000)) {
1437                 xgbe_kx_1000_mode(pdata);
1438         } else if (xgbe_use_mode(pdata, XGBE_MODE_SFI)) {
1439                 xgbe_sfi_mode(pdata);
1440         } else if (xgbe_use_mode(pdata, XGBE_MODE_X)) {
1441                 xgbe_x_mode(pdata);
1442         } else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_1000)) {
1443                 xgbe_sgmii_1000_mode(pdata);
1444         } else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_100)) {
1445                 xgbe_sgmii_100_mode(pdata);
1446         } else {
1447                 ret = -EINVAL;
1448                 goto err_irq;
1449         }
1450 
1451         /* Indicate the PHY is up and running */
1452         pdata->phy_started = 1;
1453 
1454         xgbe_an_init(pdata);
1455         xgbe_an_enable_interrupts(pdata);
1456 
1457         return xgbe_phy_config_aneg(pdata);
1458 
1459 err_irq:
1460         if (pdata->dev_irq != pdata->an_irq)
1461                 devm_free_irq(pdata->dev, pdata->an_irq, pdata);
1462 
1463 err_stop:
1464         pdata->phy_if.phy_impl.stop(pdata);
1465 
1466         return ret;
1467 }
1468 
1469 static int xgbe_phy_reset(struct xgbe_prv_data *pdata)
1470 {
1471         int ret;
1472 
1473         ret = pdata->phy_if.phy_impl.reset(pdata);
1474         if (ret)
1475                 return ret;
1476 
1477         /* Disable auto-negotiation for now */
1478         xgbe_an_disable_all(pdata);
1479 
1480         /* Clear auto-negotiation interrupts */
1481         xgbe_an_clear_interrupts_all(pdata);
1482 
1483         return 0;
1484 }
1485 
1486 static void xgbe_dump_phy_registers(struct xgbe_prv_data *pdata)
1487 {
1488         struct device *dev = pdata->dev;
1489 
1490         dev_dbg(dev, "\n************* PHY Reg dump **********************\n");
1491 
1492         dev_dbg(dev, "PCS Control Reg (%#06x) = %#06x\n", MDIO_CTRL1,
1493                 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1));
1494         dev_dbg(dev, "PCS Status Reg (%#06x) = %#06x\n", MDIO_STAT1,
1495                 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1));
1496         dev_dbg(dev, "Phy Id (PHYS ID 1 %#06x)= %#06x\n", MDIO_DEVID1,
1497                 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID1));
1498         dev_dbg(dev, "Phy Id (PHYS ID 2 %#06x)= %#06x\n", MDIO_DEVID2,
1499                 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID2));
1500         dev_dbg(dev, "Devices in Package (%#06x)= %#06x\n", MDIO_DEVS1,
1501                 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS1));
1502         dev_dbg(dev, "Devices in Package (%#06x)= %#06x\n", MDIO_DEVS2,
1503                 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS2));
1504 
1505         dev_dbg(dev, "Auto-Neg Control Reg (%#06x) = %#06x\n", MDIO_CTRL1,
1506                 XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1));
1507         dev_dbg(dev, "Auto-Neg Status Reg (%#06x) = %#06x\n", MDIO_STAT1,
1508                 XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_STAT1));
1509         dev_dbg(dev, "Auto-Neg Ad Reg 1 (%#06x) = %#06x\n",
1510                 MDIO_AN_ADVERTISE,
1511                 XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE));
1512         dev_dbg(dev, "Auto-Neg Ad Reg 2 (%#06x) = %#06x\n",
1513                 MDIO_AN_ADVERTISE + 1,
1514                 XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1));
1515         dev_dbg(dev, "Auto-Neg Ad Reg 3 (%#06x) = %#06x\n",
1516                 MDIO_AN_ADVERTISE + 2,
1517                 XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2));
1518         dev_dbg(dev, "Auto-Neg Completion Reg (%#06x) = %#06x\n",
1519                 MDIO_AN_COMP_STAT,
1520                 XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_COMP_STAT));
1521 
1522         dev_dbg(dev, "\n*************************************************\n");
1523 }
1524 
1525 static int xgbe_phy_best_advertised_speed(struct xgbe_prv_data *pdata)
1526 {
1527         struct ethtool_link_ksettings *lks = &pdata->phy.lks;
1528 
1529         if (XGBE_ADV(lks, 10000baseKR_Full))
1530                 return SPEED_10000;
1531         else if (XGBE_ADV(lks, 10000baseT_Full))
1532                 return SPEED_10000;
1533         else if (XGBE_ADV(lks, 2500baseX_Full))
1534                 return SPEED_2500;
1535         else if (XGBE_ADV(lks, 2500baseT_Full))
1536                 return SPEED_2500;
1537         else if (XGBE_ADV(lks, 1000baseKX_Full))
1538                 return SPEED_1000;
1539         else if (XGBE_ADV(lks, 1000baseT_Full))
1540                 return SPEED_1000;
1541         else if (XGBE_ADV(lks, 100baseT_Full))
1542                 return SPEED_100;
1543 
1544         return SPEED_UNKNOWN;
1545 }
1546 
1547 static void xgbe_phy_exit(struct xgbe_prv_data *pdata)
1548 {
1549         pdata->phy_if.phy_impl.exit(pdata);
1550 }
1551 
1552 static int xgbe_phy_init(struct xgbe_prv_data *pdata)
1553 {
1554         struct ethtool_link_ksettings *lks = &pdata->phy.lks;
1555         int ret;
1556 
1557         mutex_init(&pdata->an_mutex);
1558         INIT_WORK(&pdata->an_irq_work, xgbe_an_irq_work);
1559         INIT_WORK(&pdata->an_work, xgbe_an_state_machine);
1560         pdata->mdio_mmd = MDIO_MMD_PCS;
1561 
1562         /* Check for FEC support */
1563         pdata->fec_ability = XMDIO_READ(pdata, MDIO_MMD_PMAPMD,
1564                                         MDIO_PMA_10GBR_FECABLE);
1565         pdata->fec_ability &= (MDIO_PMA_10GBR_FECABLE_ABLE |
1566                                MDIO_PMA_10GBR_FECABLE_ERRABLE);
1567 
1568         /* Setup the phy (including supported features) */
1569         ret = pdata->phy_if.phy_impl.init(pdata);
1570         if (ret)
1571                 return ret;
1572 
1573         /* Copy supported link modes to advertising link modes */
1574         XGBE_LM_COPY(lks, advertising, lks, supported);
1575 
1576         pdata->phy.address = 0;
1577 
1578         if (XGBE_ADV(lks, Autoneg)) {
1579                 pdata->phy.autoneg = AUTONEG_ENABLE;
1580                 pdata->phy.speed = SPEED_UNKNOWN;
1581                 pdata->phy.duplex = DUPLEX_UNKNOWN;
1582         } else {
1583                 pdata->phy.autoneg = AUTONEG_DISABLE;
1584                 pdata->phy.speed = xgbe_phy_best_advertised_speed(pdata);
1585                 pdata->phy.duplex = DUPLEX_FULL;
1586         }
1587 
1588         pdata->phy.link = 0;
1589 
1590         pdata->phy.pause_autoneg = pdata->pause_autoneg;
1591         pdata->phy.tx_pause = pdata->tx_pause;
1592         pdata->phy.rx_pause = pdata->rx_pause;
1593 
1594         /* Fix up Flow Control advertising */
1595         XGBE_CLR_ADV(lks, Pause);
1596         XGBE_CLR_ADV(lks, Asym_Pause);
1597 
1598         if (pdata->rx_pause) {
1599                 XGBE_SET_ADV(lks, Pause);
1600                 XGBE_SET_ADV(lks, Asym_Pause);
1601         }
1602 
1603         if (pdata->tx_pause) {
1604                 /* Equivalent to XOR of Asym_Pause */
1605                 if (XGBE_ADV(lks, Asym_Pause))
1606                         XGBE_CLR_ADV(lks, Asym_Pause);
1607                 else
1608                         XGBE_SET_ADV(lks, Asym_Pause);
1609         }
1610 
1611         if (netif_msg_drv(pdata))
1612                 xgbe_dump_phy_registers(pdata);
1613 
1614         return 0;
1615 }
1616 
1617 void xgbe_init_function_ptrs_phy(struct xgbe_phy_if *phy_if)
1618 {
1619         phy_if->phy_init        = xgbe_phy_init;
1620         phy_if->phy_exit        = xgbe_phy_exit;
1621 
1622         phy_if->phy_reset       = xgbe_phy_reset;
1623         phy_if->phy_start       = xgbe_phy_start;
1624         phy_if->phy_stop        = xgbe_phy_stop;
1625 
1626         phy_if->phy_status      = xgbe_phy_status;
1627         phy_if->phy_config_aneg = xgbe_phy_config_aneg;
1628 
1629         phy_if->phy_valid_speed = xgbe_phy_valid_speed;
1630 
1631         phy_if->an_isr          = xgbe_an_combined_isr;
1632 
1633         phy_if->module_info     = xgbe_phy_module_info;
1634         phy_if->module_eeprom   = xgbe_phy_module_eeprom;
1635 }
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c

DEFINITIONS
