drivers/net/ethernet/amd/xgbe/xgbe.h

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This source file includes following definitions.
xgbe_pci_init
xgbe_pci_exit
xgbe_debugfs_init
xgbe_debugfs_exit
xgbe_debugfs_rename
   1 /*
   2  * AMD 10Gb Ethernet driver
   3  *
   4  * This file is available to you under your choice of the following two
   5  * licenses:
   6  *
   7  * License 1: GPLv2
   8  *
   9  * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
  10  *
  11  * This file is free software; you may copy, redistribute and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation, either version 2 of the License, or (at
  14  * your option) any later version.
  15  *
  16  * This file is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  23  *
  24  * This file incorporates work covered by the following copyright and
  25  * permission notice:
  26  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  27  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  28  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  29  *     and you.
  30  *
  31  *     The Software IS NOT an item of Licensed Software or Licensed Product
  32  *     under any End User Software License Agreement or Agreement for Licensed
  33  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  34  *     granted, free of charge, to any person obtaining a copy of this software
  35  *     annotated with this license and the Software, to deal in the Software
  36  *     without restriction, including without limitation the rights to use,
  37  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  38  *     of the Software, and to permit persons to whom the Software is furnished
  39  *     to do so, subject to the following conditions:
  40  *
  41  *     The above copyright notice and this permission notice shall be included
  42  *     in all copies or substantial portions of the Software.
  43  *
  44  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
  45  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  46  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  47  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
  48  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  49  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  50  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  51  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  52  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  53  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  54  *     THE POSSIBILITY OF SUCH DAMAGE.
  55  *
  56  *
  57  * License 2: Modified BSD
  58  *
  59  * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
  60  * All rights reserved.
  61  *
  62  * Redistribution and use in source and binary forms, with or without
  63  * modification, are permitted provided that the following conditions are met:
  64  *     * Redistributions of source code must retain the above copyright
  65  *       notice, this list of conditions and the following disclaimer.
  66  *     * Redistributions in binary form must reproduce the above copyright
  67  *       notice, this list of conditions and the following disclaimer in the
  68  *       documentation and/or other materials provided with the distribution.
  69  *     * Neither the name of Advanced Micro Devices, Inc. nor the
  70  *       names of its contributors may be used to endorse or promote products
  71  *       derived from this software without specific prior written permission.
  72  *
  73  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  74  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  75  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  76  * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
  77  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  79  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  80  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  82  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83  *
  84  * This file incorporates work covered by the following copyright and
  85  * permission notice:
  86  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  87  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  88  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  89  *     and you.
  90  *
  91  *     The Software IS NOT an item of Licensed Software or Licensed Product
  92  *     under any End User Software License Agreement or Agreement for Licensed
  93  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  94  *     granted, free of charge, to any person obtaining a copy of this software
  95  *     annotated with this license and the Software, to deal in the Software
  96  *     without restriction, including without limitation the rights to use,
  97  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  98  *     of the Software, and to permit persons to whom the Software is furnished
  99  *     to do so, subject to the following conditions:
 100  *
 101  *     The above copyright notice and this permission notice shall be included
 102  *     in all copies or substantial portions of the Software.
 103  *
 104  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
 105  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 106  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 107  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
 108  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 109  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 110  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 111  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 112  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 113  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 114  *     THE POSSIBILITY OF SUCH DAMAGE.
 115  */
 116 
 117 #ifndef __XGBE_H__
 118 #define __XGBE_H__
 119 
 120 #include <linux/dma-mapping.h>
 121 #include <linux/netdevice.h>
 122 #include <linux/workqueue.h>
 123 #include <linux/phy.h>
 124 #include <linux/if_vlan.h>
 125 #include <linux/bitops.h>
 126 #include <linux/ptp_clock_kernel.h>
 127 #include <linux/timecounter.h>
 128 #include <linux/net_tstamp.h>
 129 #include <net/dcbnl.h>
 130 #include <linux/completion.h>
 131 #include <linux/cpumask.h>
 132 #include <linux/interrupt.h>
 133 #include <linux/dcache.h>
 134 #include <linux/ethtool.h>
 135 #include <linux/list.h>
 136 
 137 #define XGBE_DRV_NAME           "amd-xgbe"
 138 #define XGBE_DRV_VERSION        "1.0.3"
 139 #define XGBE_DRV_DESC           "AMD 10 Gigabit Ethernet Driver"
 140 
 141 /* Descriptor related defines */
 142 #define XGBE_TX_DESC_CNT        512
 143 #define XGBE_TX_DESC_MIN_FREE   (XGBE_TX_DESC_CNT >> 3)
 144 #define XGBE_TX_DESC_MAX_PROC   (XGBE_TX_DESC_CNT >> 1)
 145 #define XGBE_RX_DESC_CNT        512
 146 
 147 #define XGBE_TX_DESC_CNT_MIN    64
 148 #define XGBE_TX_DESC_CNT_MAX    4096
 149 #define XGBE_RX_DESC_CNT_MIN    64
 150 #define XGBE_RX_DESC_CNT_MAX    4096
 151 
 152 #define XGBE_TX_MAX_BUF_SIZE    (0x3fff & ~(64 - 1))
 153 
 154 /* Descriptors required for maximum contiguous TSO/GSO packet */
 155 #define XGBE_TX_MAX_SPLIT       ((GSO_MAX_SIZE / XGBE_TX_MAX_BUF_SIZE) + 1)
 156 
 157 /* Maximum possible descriptors needed for an SKB:
 158  * - Maximum number of SKB frags
 159  * - Maximum descriptors for contiguous TSO/GSO packet
 160  * - Possible context descriptor
 161  * - Possible TSO header descriptor
 162  */
 163 #define XGBE_TX_MAX_DESCS       (MAX_SKB_FRAGS + XGBE_TX_MAX_SPLIT + 2)
 164 
 165 #define XGBE_RX_MIN_BUF_SIZE    (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
 166 #define XGBE_RX_BUF_ALIGN       64
 167 #define XGBE_SKB_ALLOC_SIZE     256
 168 #define XGBE_SPH_HDSMS_SIZE     2       /* Keep in sync with SKB_ALLOC_SIZE */
 169 
 170 #define XGBE_MAX_DMA_CHANNELS   16
 171 #define XGBE_MAX_QUEUES         16
 172 #define XGBE_PRIORITY_QUEUES    8
 173 #define XGBE_DMA_STOP_TIMEOUT   1
 174 
 175 /* DMA cache settings - Outer sharable, write-back, write-allocate */
 176 #define XGBE_DMA_OS_ARCR        0x002b2b2b
 177 #define XGBE_DMA_OS_AWCR        0x2f2f2f2f
 178 
 179 /* DMA cache settings - System, no caches used */
 180 #define XGBE_DMA_SYS_ARCR       0x00303030
 181 #define XGBE_DMA_SYS_AWCR       0x30303030
 182 
 183 /* DMA cache settings - PCI device */
 184 #define XGBE_DMA_PCI_ARCR       0x00000003
 185 #define XGBE_DMA_PCI_AWCR       0x13131313
 186 #define XGBE_DMA_PCI_AWARCR     0x00000313
 187 
 188 /* DMA channel interrupt modes */
 189 #define XGBE_IRQ_MODE_EDGE      0
 190 #define XGBE_IRQ_MODE_LEVEL     1
 191 
 192 #define XGMAC_MIN_PACKET        60
 193 #define XGMAC_STD_PACKET_MTU    1500
 194 #define XGMAC_MAX_STD_PACKET    1518
 195 #define XGMAC_JUMBO_PACKET_MTU  9000
 196 #define XGMAC_MAX_JUMBO_PACKET  9018
 197 #define XGMAC_ETH_PREAMBLE      (12 + 8)        /* Inter-frame gap + preamble */
 198 
 199 #define XGMAC_PFC_DATA_LEN      46
 200 #define XGMAC_PFC_DELAYS        14000
 201 
 202 #define XGMAC_PRIO_QUEUES(_cnt)                                 \
 203         min_t(unsigned int, IEEE_8021QAZ_MAX_TCS, (_cnt))
 204 
 205 /* Common property names */
 206 #define XGBE_MAC_ADDR_PROPERTY  "mac-address"
 207 #define XGBE_PHY_MODE_PROPERTY  "phy-mode"
 208 #define XGBE_DMA_IRQS_PROPERTY  "amd,per-channel-interrupt"
 209 #define XGBE_SPEEDSET_PROPERTY  "amd,speed-set"
 210 
 211 /* Device-tree clock names */
 212 #define XGBE_DMA_CLOCK          "dma_clk"
 213 #define XGBE_PTP_CLOCK          "ptp_clk"
 214 
 215 /* ACPI property names */
 216 #define XGBE_ACPI_DMA_FREQ      "amd,dma-freq"
 217 #define XGBE_ACPI_PTP_FREQ      "amd,ptp-freq"
 218 
 219 /* PCI BAR mapping */
 220 #define XGBE_XGMAC_BAR          0
 221 #define XGBE_XPCS_BAR           1
 222 #define XGBE_MAC_PROP_OFFSET    0x1d000
 223 #define XGBE_I2C_CTRL_OFFSET    0x1e000
 224 
 225 /* PCI MSI/MSIx support */
 226 #define XGBE_MSI_BASE_COUNT     4
 227 #define XGBE_MSI_MIN_COUNT      (XGBE_MSI_BASE_COUNT + 1)
 228 
 229 /* PCI clock frequencies */
 230 #define XGBE_V2_DMA_CLOCK_FREQ  500000000       /* 500 MHz */
 231 #define XGBE_V2_PTP_CLOCK_FREQ  125000000       /* 125 MHz */
 232 
 233 /* Timestamp support - values based on 50MHz PTP clock
 234  *   50MHz => 20 nsec
 235  */
 236 #define XGBE_TSTAMP_SSINC       20
 237 #define XGBE_TSTAMP_SNSINC      0
 238 
 239 /* Driver PMT macros */
 240 #define XGMAC_DRIVER_CONTEXT    1
 241 #define XGMAC_IOCTL_CONTEXT     2
 242 
 243 #define XGMAC_FIFO_MIN_ALLOC    2048
 244 #define XGMAC_FIFO_UNIT         256
 245 #define XGMAC_FIFO_ALIGN(_x)                            \
 246         (((_x) + XGMAC_FIFO_UNIT - 1) & ~(XGMAC_FIFO_UNIT - 1))
 247 #define XGMAC_FIFO_FC_OFF       2048
 248 #define XGMAC_FIFO_FC_MIN       4096
 249 
 250 #define XGBE_TC_MIN_QUANTUM     10
 251 
 252 /* Helper macro for descriptor handling
 253  *  Always use XGBE_GET_DESC_DATA to access the descriptor data
 254  *  since the index is free-running and needs to be and-ed
 255  *  with the descriptor count value of the ring to index to
 256  *  the proper descriptor data.
 257  */
 258 #define XGBE_GET_DESC_DATA(_ring, _idx)                         \
 259         ((_ring)->rdata +                                       \
 260          ((_idx) & ((_ring)->rdesc_count - 1)))
 261 
 262 /* Default coalescing parameters */
 263 #define XGMAC_INIT_DMA_TX_USECS         1000
 264 #define XGMAC_INIT_DMA_TX_FRAMES        25
 265 
 266 #define XGMAC_MAX_DMA_RIWT              0xff
 267 #define XGMAC_INIT_DMA_RX_USECS         30
 268 #define XGMAC_INIT_DMA_RX_FRAMES        25
 269 
 270 /* Flow control queue count */
 271 #define XGMAC_MAX_FLOW_CONTROL_QUEUES   8
 272 
 273 /* Flow control threshold units */
 274 #define XGMAC_FLOW_CONTROL_UNIT         512
 275 #define XGMAC_FLOW_CONTROL_ALIGN(_x)                            \
 276         (((_x) + XGMAC_FLOW_CONTROL_UNIT - 1) & ~(XGMAC_FLOW_CONTROL_UNIT - 1))
 277 #define XGMAC_FLOW_CONTROL_VALUE(_x)                            \
 278         (((_x) < 1024) ? 0 : ((_x) / XGMAC_FLOW_CONTROL_UNIT) - 2)
 279 #define XGMAC_FLOW_CONTROL_MAX          33280
 280 
 281 /* Maximum MAC address hash table size (256 bits = 8 bytes) */
 282 #define XGBE_MAC_HASH_TABLE_SIZE        8
 283 
 284 /* Receive Side Scaling */
 285 #define XGBE_RSS_HASH_KEY_SIZE          40
 286 #define XGBE_RSS_MAX_TABLE_SIZE         256
 287 #define XGBE_RSS_LOOKUP_TABLE_TYPE      0
 288 #define XGBE_RSS_HASH_KEY_TYPE          1
 289 
 290 /* Auto-negotiation */
 291 #define XGBE_AN_MS_TIMEOUT              500
 292 #define XGBE_LINK_TIMEOUT               5
 293 
 294 #define XGBE_SGMII_AN_LINK_STATUS       BIT(1)
 295 #define XGBE_SGMII_AN_LINK_SPEED        (BIT(2) | BIT(3))
 296 #define XGBE_SGMII_AN_LINK_SPEED_100    0x04
 297 #define XGBE_SGMII_AN_LINK_SPEED_1000   0x08
 298 #define XGBE_SGMII_AN_LINK_DUPLEX       BIT(4)
 299 
 300 /* ECC correctable error notification window (seconds) */
 301 #define XGBE_ECC_LIMIT                  60
 302 
 303 /* MDIO port types */
 304 #define XGMAC_MAX_C22_PORT              3
 305 
 306 /* Link mode bit operations */
 307 #define XGBE_ZERO_SUP(_ls)              \
 308         ethtool_link_ksettings_zero_link_mode((_ls), supported)
 309 
 310 #define XGBE_SET_SUP(_ls, _mode)        \
 311         ethtool_link_ksettings_add_link_mode((_ls), supported, _mode)
 312 
 313 #define XGBE_CLR_SUP(_ls, _mode)        \
 314         ethtool_link_ksettings_del_link_mode((_ls), supported, _mode)
 315 
 316 #define XGBE_IS_SUP(_ls, _mode) \
 317         ethtool_link_ksettings_test_link_mode((_ls), supported, _mode)
 318 
 319 #define XGBE_ZERO_ADV(_ls)              \
 320         ethtool_link_ksettings_zero_link_mode((_ls), advertising)
 321 
 322 #define XGBE_SET_ADV(_ls, _mode)        \
 323         ethtool_link_ksettings_add_link_mode((_ls), advertising, _mode)
 324 
 325 #define XGBE_CLR_ADV(_ls, _mode)        \
 326         ethtool_link_ksettings_del_link_mode((_ls), advertising, _mode)
 327 
 328 #define XGBE_ADV(_ls, _mode)            \
 329         ethtool_link_ksettings_test_link_mode((_ls), advertising, _mode)
 330 
 331 #define XGBE_ZERO_LP_ADV(_ls)           \
 332         ethtool_link_ksettings_zero_link_mode((_ls), lp_advertising)
 333 
 334 #define XGBE_SET_LP_ADV(_ls, _mode)     \
 335         ethtool_link_ksettings_add_link_mode((_ls), lp_advertising, _mode)
 336 
 337 #define XGBE_CLR_LP_ADV(_ls, _mode)     \
 338         ethtool_link_ksettings_del_link_mode((_ls), lp_advertising, _mode)
 339 
 340 #define XGBE_LP_ADV(_ls, _mode)         \
 341         ethtool_link_ksettings_test_link_mode((_ls), lp_advertising, _mode)
 342 
 343 #define XGBE_LM_COPY(_dst, _dname, _src, _sname)        \
 344         bitmap_copy((_dst)->link_modes._dname,          \
 345                     (_src)->link_modes._sname,          \
 346                     __ETHTOOL_LINK_MODE_MASK_NBITS)
 347 
 348 struct xgbe_prv_data;
 349 
 350 struct xgbe_packet_data {
 351         struct sk_buff *skb;
 352 
 353         unsigned int attributes;
 354 
 355         unsigned int errors;
 356 
 357         unsigned int rdesc_count;
 358         unsigned int length;
 359 
 360         unsigned int header_len;
 361         unsigned int tcp_header_len;
 362         unsigned int tcp_payload_len;
 363         unsigned short mss;
 364 
 365         unsigned short vlan_ctag;
 366 
 367         u64 rx_tstamp;
 368 
 369         u32 rss_hash;
 370         enum pkt_hash_types rss_hash_type;
 371 
 372         unsigned int tx_packets;
 373         unsigned int tx_bytes;
 374 };
 375 
 376 /* Common Rx and Tx descriptor mapping */
 377 struct xgbe_ring_desc {
 378         __le32 desc0;
 379         __le32 desc1;
 380         __le32 desc2;
 381         __le32 desc3;
 382 };
 383 
 384 /* Page allocation related values */
 385 struct xgbe_page_alloc {
 386         struct page *pages;
 387         unsigned int pages_len;
 388         unsigned int pages_offset;
 389 
 390         dma_addr_t pages_dma;
 391 };
 392 
 393 /* Ring entry buffer data */
 394 struct xgbe_buffer_data {
 395         struct xgbe_page_alloc pa;
 396         struct xgbe_page_alloc pa_unmap;
 397 
 398         dma_addr_t dma_base;
 399         unsigned long dma_off;
 400         unsigned int dma_len;
 401 };
 402 
 403 /* Tx-related ring data */
 404 struct xgbe_tx_ring_data {
 405         unsigned int packets;           /* BQL packet count */
 406         unsigned int bytes;             /* BQL byte count */
 407 };
 408 
 409 /* Rx-related ring data */
 410 struct xgbe_rx_ring_data {
 411         struct xgbe_buffer_data hdr;    /* Header locations */
 412         struct xgbe_buffer_data buf;    /* Payload locations */
 413 
 414         unsigned short hdr_len;         /* Length of received header */
 415         unsigned short len;             /* Length of received packet */
 416 };
 417 
 418 /* Structure used to hold information related to the descriptor
 419  * and the packet associated with the descriptor (always use
 420  * use the XGBE_GET_DESC_DATA macro to access this data from the ring)
 421  */
 422 struct xgbe_ring_data {
 423         struct xgbe_ring_desc *rdesc;   /* Virtual address of descriptor */
 424         dma_addr_t rdesc_dma;           /* DMA address of descriptor */
 425 
 426         struct sk_buff *skb;            /* Virtual address of SKB */
 427         dma_addr_t skb_dma;             /* DMA address of SKB data */
 428         unsigned int skb_dma_len;       /* Length of SKB DMA area */
 429 
 430         struct xgbe_tx_ring_data tx;    /* Tx-related data */
 431         struct xgbe_rx_ring_data rx;    /* Rx-related data */
 432 
 433         unsigned int mapped_as_page;
 434 
 435         /* Incomplete receive save location.  If the budget is exhausted
 436          * or the last descriptor (last normal descriptor or a following
 437          * context descriptor) has not been DMA'd yet the current state
 438          * of the receive processing needs to be saved.
 439          */
 440         unsigned int state_saved;
 441         struct {
 442                 struct sk_buff *skb;
 443                 unsigned int len;
 444                 unsigned int error;
 445         } state;
 446 };
 447 
 448 struct xgbe_ring {
 449         /* Ring lock - used just for TX rings at the moment */
 450         spinlock_t lock;
 451 
 452         /* Per packet related information */
 453         struct xgbe_packet_data packet_data;
 454 
 455         /* Virtual/DMA addresses and count of allocated descriptor memory */
 456         struct xgbe_ring_desc *rdesc;
 457         dma_addr_t rdesc_dma;
 458         unsigned int rdesc_count;
 459 
 460         /* Array of descriptor data corresponding the descriptor memory
 461          * (always use the XGBE_GET_DESC_DATA macro to access this data)
 462          */
 463         struct xgbe_ring_data *rdata;
 464 
 465         /* Page allocation for RX buffers */
 466         struct xgbe_page_alloc rx_hdr_pa;
 467         struct xgbe_page_alloc rx_buf_pa;
 468         int node;
 469 
 470         /* Ring index values
 471          *  cur   - Tx: index of descriptor to be used for current transfer
 472          *          Rx: index of descriptor to check for packet availability
 473          *  dirty - Tx: index of descriptor to check for transfer complete
 474          *          Rx: index of descriptor to check for buffer reallocation
 475          */
 476         unsigned int cur;
 477         unsigned int dirty;
 478 
 479         /* Coalesce frame count used for interrupt bit setting */
 480         unsigned int coalesce_count;
 481 
 482         union {
 483                 struct {
 484                         unsigned int queue_stopped;
 485                         unsigned int xmit_more;
 486                         unsigned short cur_mss;
 487                         unsigned short cur_vlan_ctag;
 488                 } tx;
 489         };
 490 } ____cacheline_aligned;
 491 
 492 /* Structure used to describe the descriptor rings associated with
 493  * a DMA channel.
 494  */
 495 struct xgbe_channel {
 496         char name[16];
 497 
 498         /* Address of private data area for device */
 499         struct xgbe_prv_data *pdata;
 500 
 501         /* Queue index and base address of queue's DMA registers */
 502         unsigned int queue_index;
 503         void __iomem *dma_regs;
 504 
 505         /* Per channel interrupt irq number */
 506         int dma_irq;
 507         char dma_irq_name[IFNAMSIZ + 32];
 508 
 509         /* Netdev related settings */
 510         struct napi_struct napi;
 511 
 512         /* Per channel interrupt enablement tracker */
 513         unsigned int curr_ier;
 514         unsigned int saved_ier;
 515 
 516         unsigned int tx_timer_active;
 517         struct timer_list tx_timer;
 518 
 519         struct xgbe_ring *tx_ring;
 520         struct xgbe_ring *rx_ring;
 521 
 522         int node;
 523         cpumask_t affinity_mask;
 524 } ____cacheline_aligned;
 525 
 526 enum xgbe_state {
 527         XGBE_DOWN,
 528         XGBE_LINK_INIT,
 529         XGBE_LINK_ERR,
 530         XGBE_STOPPED,
 531 };
 532 
 533 enum xgbe_int {
 534         XGMAC_INT_DMA_CH_SR_TI,
 535         XGMAC_INT_DMA_CH_SR_TPS,
 536         XGMAC_INT_DMA_CH_SR_TBU,
 537         XGMAC_INT_DMA_CH_SR_RI,
 538         XGMAC_INT_DMA_CH_SR_RBU,
 539         XGMAC_INT_DMA_CH_SR_RPS,
 540         XGMAC_INT_DMA_CH_SR_TI_RI,
 541         XGMAC_INT_DMA_CH_SR_FBE,
 542         XGMAC_INT_DMA_ALL,
 543 };
 544 
 545 enum xgbe_int_state {
 546         XGMAC_INT_STATE_SAVE,
 547         XGMAC_INT_STATE_RESTORE,
 548 };
 549 
 550 enum xgbe_ecc_sec {
 551         XGBE_ECC_SEC_TX,
 552         XGBE_ECC_SEC_RX,
 553         XGBE_ECC_SEC_DESC,
 554 };
 555 
 556 enum xgbe_speed {
 557         XGBE_SPEED_1000 = 0,
 558         XGBE_SPEED_2500,
 559         XGBE_SPEED_10000,
 560         XGBE_SPEEDS,
 561 };
 562 
 563 enum xgbe_xpcs_access {
 564         XGBE_XPCS_ACCESS_V1 = 0,
 565         XGBE_XPCS_ACCESS_V2,
 566 };
 567 
 568 enum xgbe_an_mode {
 569         XGBE_AN_MODE_CL73 = 0,
 570         XGBE_AN_MODE_CL73_REDRV,
 571         XGBE_AN_MODE_CL37,
 572         XGBE_AN_MODE_CL37_SGMII,
 573         XGBE_AN_MODE_NONE,
 574 };
 575 
 576 enum xgbe_an {
 577         XGBE_AN_READY = 0,
 578         XGBE_AN_PAGE_RECEIVED,
 579         XGBE_AN_INCOMPAT_LINK,
 580         XGBE_AN_COMPLETE,
 581         XGBE_AN_NO_LINK,
 582         XGBE_AN_ERROR,
 583 };
 584 
 585 enum xgbe_rx {
 586         XGBE_RX_BPA = 0,
 587         XGBE_RX_XNP,
 588         XGBE_RX_COMPLETE,
 589         XGBE_RX_ERROR,
 590 };
 591 
 592 enum xgbe_mode {
 593         XGBE_MODE_KX_1000 = 0,
 594         XGBE_MODE_KX_2500,
 595         XGBE_MODE_KR,
 596         XGBE_MODE_X,
 597         XGBE_MODE_SGMII_100,
 598         XGBE_MODE_SGMII_1000,
 599         XGBE_MODE_SFI,
 600         XGBE_MODE_UNKNOWN,
 601 };
 602 
 603 enum xgbe_speedset {
 604         XGBE_SPEEDSET_1000_10000 = 0,
 605         XGBE_SPEEDSET_2500_10000,
 606 };
 607 
 608 enum xgbe_mdio_mode {
 609         XGBE_MDIO_MODE_NONE = 0,
 610         XGBE_MDIO_MODE_CL22,
 611         XGBE_MDIO_MODE_CL45,
 612 };
 613 
 614 struct xgbe_phy {
 615         struct ethtool_link_ksettings lks;
 616 
 617         int address;
 618 
 619         int autoneg;
 620         int speed;
 621         int duplex;
 622 
 623         int link;
 624 
 625         int pause_autoneg;
 626         int tx_pause;
 627         int rx_pause;
 628 };
 629 
 630 enum xgbe_i2c_cmd {
 631         XGBE_I2C_CMD_READ = 0,
 632         XGBE_I2C_CMD_WRITE,
 633 };
 634 
 635 struct xgbe_i2c_op {
 636         enum xgbe_i2c_cmd cmd;
 637 
 638         unsigned int target;
 639 
 640         void *buf;
 641         unsigned int len;
 642 };
 643 
 644 struct xgbe_i2c_op_state {
 645         struct xgbe_i2c_op *op;
 646 
 647         unsigned int tx_len;
 648         unsigned char *tx_buf;
 649 
 650         unsigned int rx_len;
 651         unsigned char *rx_buf;
 652 
 653         unsigned int tx_abort_source;
 654 
 655         int ret;
 656 };
 657 
 658 struct xgbe_i2c {
 659         unsigned int started;
 660         unsigned int max_speed_mode;
 661         unsigned int rx_fifo_size;
 662         unsigned int tx_fifo_size;
 663 
 664         struct xgbe_i2c_op_state op_state;
 665 };
 666 
 667 struct xgbe_mmc_stats {
 668         /* Tx Stats */
 669         u64 txoctetcount_gb;
 670         u64 txframecount_gb;
 671         u64 txbroadcastframes_g;
 672         u64 txmulticastframes_g;
 673         u64 tx64octets_gb;
 674         u64 tx65to127octets_gb;
 675         u64 tx128to255octets_gb;
 676         u64 tx256to511octets_gb;
 677         u64 tx512to1023octets_gb;
 678         u64 tx1024tomaxoctets_gb;
 679         u64 txunicastframes_gb;
 680         u64 txmulticastframes_gb;
 681         u64 txbroadcastframes_gb;
 682         u64 txunderflowerror;
 683         u64 txoctetcount_g;
 684         u64 txframecount_g;
 685         u64 txpauseframes;
 686         u64 txvlanframes_g;
 687 
 688         /* Rx Stats */
 689         u64 rxframecount_gb;
 690         u64 rxoctetcount_gb;
 691         u64 rxoctetcount_g;
 692         u64 rxbroadcastframes_g;
 693         u64 rxmulticastframes_g;
 694         u64 rxcrcerror;
 695         u64 rxrunterror;
 696         u64 rxjabbererror;
 697         u64 rxundersize_g;
 698         u64 rxoversize_g;
 699         u64 rx64octets_gb;
 700         u64 rx65to127octets_gb;
 701         u64 rx128to255octets_gb;
 702         u64 rx256to511octets_gb;
 703         u64 rx512to1023octets_gb;
 704         u64 rx1024tomaxoctets_gb;
 705         u64 rxunicastframes_g;
 706         u64 rxlengtherror;
 707         u64 rxoutofrangetype;
 708         u64 rxpauseframes;
 709         u64 rxfifooverflow;
 710         u64 rxvlanframes_gb;
 711         u64 rxwatchdogerror;
 712 };
 713 
 714 struct xgbe_ext_stats {
 715         u64 tx_tso_packets;
 716         u64 rx_split_header_packets;
 717         u64 rx_buffer_unavailable;
 718 
 719         u64 txq_packets[XGBE_MAX_DMA_CHANNELS];
 720         u64 txq_bytes[XGBE_MAX_DMA_CHANNELS];
 721         u64 rxq_packets[XGBE_MAX_DMA_CHANNELS];
 722         u64 rxq_bytes[XGBE_MAX_DMA_CHANNELS];
 723 
 724         u64 tx_vxlan_packets;
 725         u64 rx_vxlan_packets;
 726         u64 rx_csum_errors;
 727         u64 rx_vxlan_csum_errors;
 728 };
 729 
 730 struct xgbe_hw_if {
 731         int (*tx_complete)(struct xgbe_ring_desc *);
 732 
 733         int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);
 734         int (*config_rx_mode)(struct xgbe_prv_data *);
 735 
 736         int (*enable_rx_csum)(struct xgbe_prv_data *);
 737         int (*disable_rx_csum)(struct xgbe_prv_data *);
 738 
 739         int (*enable_rx_vlan_stripping)(struct xgbe_prv_data *);
 740         int (*disable_rx_vlan_stripping)(struct xgbe_prv_data *);
 741         int (*enable_rx_vlan_filtering)(struct xgbe_prv_data *);
 742         int (*disable_rx_vlan_filtering)(struct xgbe_prv_data *);
 743         int (*update_vlan_hash_table)(struct xgbe_prv_data *);
 744 
 745         int (*read_mmd_regs)(struct xgbe_prv_data *, int, int);
 746         void (*write_mmd_regs)(struct xgbe_prv_data *, int, int, int);
 747         int (*set_speed)(struct xgbe_prv_data *, int);
 748 
 749         int (*set_ext_mii_mode)(struct xgbe_prv_data *, unsigned int,
 750                                 enum xgbe_mdio_mode);
 751         int (*read_ext_mii_regs)(struct xgbe_prv_data *, int, int);
 752         int (*write_ext_mii_regs)(struct xgbe_prv_data *, int, int, u16);
 753 
 754         int (*set_gpio)(struct xgbe_prv_data *, unsigned int);
 755         int (*clr_gpio)(struct xgbe_prv_data *, unsigned int);
 756 
 757         void (*enable_tx)(struct xgbe_prv_data *);
 758         void (*disable_tx)(struct xgbe_prv_data *);
 759         void (*enable_rx)(struct xgbe_prv_data *);
 760         void (*disable_rx)(struct xgbe_prv_data *);
 761 
 762         void (*powerup_tx)(struct xgbe_prv_data *);
 763         void (*powerdown_tx)(struct xgbe_prv_data *);
 764         void (*powerup_rx)(struct xgbe_prv_data *);
 765         void (*powerdown_rx)(struct xgbe_prv_data *);
 766 
 767         int (*init)(struct xgbe_prv_data *);
 768         int (*exit)(struct xgbe_prv_data *);
 769 
 770         int (*enable_int)(struct xgbe_channel *, enum xgbe_int);
 771         int (*disable_int)(struct xgbe_channel *, enum xgbe_int);
 772         void (*dev_xmit)(struct xgbe_channel *);
 773         int (*dev_read)(struct xgbe_channel *);
 774         void (*tx_desc_init)(struct xgbe_channel *);
 775         void (*rx_desc_init)(struct xgbe_channel *);
 776         void (*tx_desc_reset)(struct xgbe_ring_data *);
 777         void (*rx_desc_reset)(struct xgbe_prv_data *, struct xgbe_ring_data *,
 778                               unsigned int);
 779         int (*is_last_desc)(struct xgbe_ring_desc *);
 780         int (*is_context_desc)(struct xgbe_ring_desc *);
 781         void (*tx_start_xmit)(struct xgbe_channel *, struct xgbe_ring *);
 782 
 783         /* For FLOW ctrl */
 784         int (*config_tx_flow_control)(struct xgbe_prv_data *);
 785         int (*config_rx_flow_control)(struct xgbe_prv_data *);
 786 
 787         /* For RX coalescing */
 788         int (*config_rx_coalesce)(struct xgbe_prv_data *);
 789         int (*config_tx_coalesce)(struct xgbe_prv_data *);
 790         unsigned int (*usec_to_riwt)(struct xgbe_prv_data *, unsigned int);
 791         unsigned int (*riwt_to_usec)(struct xgbe_prv_data *, unsigned int);
 792 
 793         /* For RX and TX threshold config */
 794         int (*config_rx_threshold)(struct xgbe_prv_data *, unsigned int);
 795         int (*config_tx_threshold)(struct xgbe_prv_data *, unsigned int);
 796 
 797         /* For RX and TX Store and Forward Mode config */
 798         int (*config_rsf_mode)(struct xgbe_prv_data *, unsigned int);
 799         int (*config_tsf_mode)(struct xgbe_prv_data *, unsigned int);
 800 
 801         /* For TX DMA Operate on Second Frame config */
 802         int (*config_osp_mode)(struct xgbe_prv_data *);
 803 
 804         /* For MMC statistics */
 805         void (*rx_mmc_int)(struct xgbe_prv_data *);
 806         void (*tx_mmc_int)(struct xgbe_prv_data *);
 807         void (*read_mmc_stats)(struct xgbe_prv_data *);
 808 
 809         /* For Timestamp config */
 810         int (*config_tstamp)(struct xgbe_prv_data *, unsigned int);
 811         void (*update_tstamp_addend)(struct xgbe_prv_data *, unsigned int);
 812         void (*set_tstamp_time)(struct xgbe_prv_data *, unsigned int sec,
 813                                 unsigned int nsec);
 814         u64 (*get_tstamp_time)(struct xgbe_prv_data *);
 815         u64 (*get_tx_tstamp)(struct xgbe_prv_data *);
 816 
 817         /* For Data Center Bridging config */
 818         void (*config_tc)(struct xgbe_prv_data *);
 819         void (*config_dcb_tc)(struct xgbe_prv_data *);
 820         void (*config_dcb_pfc)(struct xgbe_prv_data *);
 821 
 822         /* For Receive Side Scaling */
 823         int (*enable_rss)(struct xgbe_prv_data *);
 824         int (*disable_rss)(struct xgbe_prv_data *);
 825         int (*set_rss_hash_key)(struct xgbe_prv_data *, const u8 *);
 826         int (*set_rss_lookup_table)(struct xgbe_prv_data *, const u32 *);
 827 
 828         /* For ECC */
 829         void (*disable_ecc_ded)(struct xgbe_prv_data *);
 830         void (*disable_ecc_sec)(struct xgbe_prv_data *, enum xgbe_ecc_sec);
 831 
 832         /* For VXLAN */
 833         void (*enable_vxlan)(struct xgbe_prv_data *);
 834         void (*disable_vxlan)(struct xgbe_prv_data *);
 835         void (*set_vxlan_id)(struct xgbe_prv_data *);
 836 };
 837 
 838 /* This structure represents implementation specific routines for an
 839  * implementation of a PHY. All routines are required unless noted below.
 840  *   Optional routines:
 841  *     an_pre, an_post
 842  *     kr_training_pre, kr_training_post
 843  *     module_info, module_eeprom
 844  */
 845 struct xgbe_phy_impl_if {
 846         /* Perform Setup/teardown actions */
 847         int (*init)(struct xgbe_prv_data *);
 848         void (*exit)(struct xgbe_prv_data *);
 849 
 850         /* Perform start/stop specific actions */
 851         int (*reset)(struct xgbe_prv_data *);
 852         int (*start)(struct xgbe_prv_data *);
 853         void (*stop)(struct xgbe_prv_data *);
 854 
 855         /* Return the link status */
 856         int (*link_status)(struct xgbe_prv_data *, int *);
 857 
 858         /* Indicate if a particular speed is valid */
 859         bool (*valid_speed)(struct xgbe_prv_data *, int);
 860 
 861         /* Check if the specified mode can/should be used */
 862         bool (*use_mode)(struct xgbe_prv_data *, enum xgbe_mode);
 863         /* Switch the PHY into various modes */
 864         void (*set_mode)(struct xgbe_prv_data *, enum xgbe_mode);
 865         /* Retrieve mode needed for a specific speed */
 866         enum xgbe_mode (*get_mode)(struct xgbe_prv_data *, int);
 867         /* Retrieve new/next mode when trying to auto-negotiate */
 868         enum xgbe_mode (*switch_mode)(struct xgbe_prv_data *);
 869         /* Retrieve current mode */
 870         enum xgbe_mode (*cur_mode)(struct xgbe_prv_data *);
 871 
 872         /* Retrieve current auto-negotiation mode */
 873         enum xgbe_an_mode (*an_mode)(struct xgbe_prv_data *);
 874 
 875         /* Configure auto-negotiation settings */
 876         int (*an_config)(struct xgbe_prv_data *);
 877 
 878         /* Set/override auto-negotiation advertisement settings */
 879         void (*an_advertising)(struct xgbe_prv_data *,
 880                                struct ethtool_link_ksettings *);
 881 
 882         /* Process results of auto-negotiation */
 883         enum xgbe_mode (*an_outcome)(struct xgbe_prv_data *);
 884 
 885         /* Pre/Post auto-negotiation support */
 886         void (*an_pre)(struct xgbe_prv_data *);
 887         void (*an_post)(struct xgbe_prv_data *);
 888 
 889         /* Pre/Post KR training enablement support */
 890         void (*kr_training_pre)(struct xgbe_prv_data *);
 891         void (*kr_training_post)(struct xgbe_prv_data *);
 892 
 893         /* SFP module related info */
 894         int (*module_info)(struct xgbe_prv_data *pdata,
 895                            struct ethtool_modinfo *modinfo);
 896         int (*module_eeprom)(struct xgbe_prv_data *pdata,
 897                              struct ethtool_eeprom *eeprom, u8 *data);
 898 };
 899 
 900 struct xgbe_phy_if {
 901         /* For PHY setup/teardown */
 902         int (*phy_init)(struct xgbe_prv_data *);
 903         void (*phy_exit)(struct xgbe_prv_data *);
 904 
 905         /* For PHY support when setting device up/down */
 906         int (*phy_reset)(struct xgbe_prv_data *);
 907         int (*phy_start)(struct xgbe_prv_data *);
 908         void (*phy_stop)(struct xgbe_prv_data *);
 909 
 910         /* For PHY support while device is up */
 911         void (*phy_status)(struct xgbe_prv_data *);
 912         int (*phy_config_aneg)(struct xgbe_prv_data *);
 913 
 914         /* For PHY settings validation */
 915         bool (*phy_valid_speed)(struct xgbe_prv_data *, int);
 916 
 917         /* For single interrupt support */
 918         irqreturn_t (*an_isr)(struct xgbe_prv_data *);
 919 
 920         /* For ethtool PHY support */
 921         int (*module_info)(struct xgbe_prv_data *pdata,
 922                            struct ethtool_modinfo *modinfo);
 923         int (*module_eeprom)(struct xgbe_prv_data *pdata,
 924                              struct ethtool_eeprom *eeprom, u8 *data);
 925 
 926         /* PHY implementation specific services */
 927         struct xgbe_phy_impl_if phy_impl;
 928 };
 929 
 930 struct xgbe_i2c_if {
 931         /* For initial I2C setup */
 932         int (*i2c_init)(struct xgbe_prv_data *);
 933 
 934         /* For I2C support when setting device up/down */
 935         int (*i2c_start)(struct xgbe_prv_data *);
 936         void (*i2c_stop)(struct xgbe_prv_data *);
 937 
 938         /* For performing I2C operations */
 939         int (*i2c_xfer)(struct xgbe_prv_data *, struct xgbe_i2c_op *);
 940 
 941         /* For single interrupt support */
 942         irqreturn_t (*i2c_isr)(struct xgbe_prv_data *);
 943 };
 944 
 945 struct xgbe_desc_if {
 946         int (*alloc_ring_resources)(struct xgbe_prv_data *);
 947         void (*free_ring_resources)(struct xgbe_prv_data *);
 948         int (*map_tx_skb)(struct xgbe_channel *, struct sk_buff *);
 949         int (*map_rx_buffer)(struct xgbe_prv_data *, struct xgbe_ring *,
 950                              struct xgbe_ring_data *);
 951         void (*unmap_rdata)(struct xgbe_prv_data *, struct xgbe_ring_data *);
 952         void (*wrapper_tx_desc_init)(struct xgbe_prv_data *);
 953         void (*wrapper_rx_desc_init)(struct xgbe_prv_data *);
 954 };
 955 
 956 /* This structure contains flags that indicate what hardware features
 957  * or configurations are present in the device.
 958  */
 959 struct xgbe_hw_features {
 960         /* HW Version */
 961         unsigned int version;
 962 
 963         /* HW Feature Register0 */
 964         unsigned int gmii;              /* 1000 Mbps support */
 965         unsigned int vlhash;            /* VLAN Hash Filter */
 966         unsigned int sma;               /* SMA(MDIO) Interface */
 967         unsigned int rwk;               /* PMT remote wake-up packet */
 968         unsigned int mgk;               /* PMT magic packet */
 969         unsigned int mmc;               /* RMON module */
 970         unsigned int aoe;               /* ARP Offload */
 971         unsigned int ts;                /* IEEE 1588-2008 Advanced Timestamp */
 972         unsigned int eee;               /* Energy Efficient Ethernet */
 973         unsigned int tx_coe;            /* Tx Checksum Offload */
 974         unsigned int rx_coe;            /* Rx Checksum Offload */
 975         unsigned int addn_mac;          /* Additional MAC Addresses */
 976         unsigned int ts_src;            /* Timestamp Source */
 977         unsigned int sa_vlan_ins;       /* Source Address or VLAN Insertion */
 978         unsigned int vxn;               /* VXLAN/NVGRE */
 979 
 980         /* HW Feature Register1 */
 981         unsigned int rx_fifo_size;      /* MTL Receive FIFO Size */
 982         unsigned int tx_fifo_size;      /* MTL Transmit FIFO Size */
 983         unsigned int adv_ts_hi;         /* Advance Timestamping High Word */
 984         unsigned int dma_width;         /* DMA width */
 985         unsigned int dcb;               /* DCB Feature */
 986         unsigned int sph;               /* Split Header Feature */
 987         unsigned int tso;               /* TCP Segmentation Offload */
 988         unsigned int dma_debug;         /* DMA Debug Registers */
 989         unsigned int rss;               /* Receive Side Scaling */
 990         unsigned int tc_cnt;            /* Number of Traffic Classes */
 991         unsigned int hash_table_size;   /* Hash Table Size */
 992         unsigned int l3l4_filter_num;   /* Number of L3-L4 Filters */
 993 
 994         /* HW Feature Register2 */
 995         unsigned int rx_q_cnt;          /* Number of MTL Receive Queues */
 996         unsigned int tx_q_cnt;          /* Number of MTL Transmit Queues */
 997         unsigned int rx_ch_cnt;         /* Number of DMA Receive Channels */
 998         unsigned int tx_ch_cnt;         /* Number of DMA Transmit Channels */
 999         unsigned int pps_out_num;       /* Number of PPS outputs */
1000         unsigned int aux_snap_num;      /* Number of Aux snapshot inputs */
1001 };
1002 
1003 struct xgbe_version_data {
1004         void (*init_function_ptrs_phy_impl)(struct xgbe_phy_if *);
1005         enum xgbe_xpcs_access xpcs_access;
1006         unsigned int mmc_64bit;
1007         unsigned int tx_max_fifo_size;
1008         unsigned int rx_max_fifo_size;
1009         unsigned int tx_tstamp_workaround;
1010         unsigned int ecc_support;
1011         unsigned int i2c_support;
1012         unsigned int irq_reissue_support;
1013         unsigned int tx_desc_prefetch;
1014         unsigned int rx_desc_prefetch;
1015         unsigned int an_cdr_workaround;
1016 };
1017 
1018 struct xgbe_vxlan_data {
1019         struct list_head list;
1020         sa_family_t sa_family;
1021         __be16 port;
1022 };
1023 
1024 struct xgbe_prv_data {
1025         struct net_device *netdev;
1026         struct pci_dev *pcidev;
1027         struct platform_device *platdev;
1028         struct acpi_device *adev;
1029         struct device *dev;
1030         struct platform_device *phy_platdev;
1031         struct device *phy_dev;
1032 
1033         /* Version related data */
1034         struct xgbe_version_data *vdata;
1035 
1036         /* ACPI or DT flag */
1037         unsigned int use_acpi;
1038 
1039         /* XGMAC/XPCS related mmio registers */
1040         void __iomem *xgmac_regs;       /* XGMAC CSRs */
1041         void __iomem *xpcs_regs;        /* XPCS MMD registers */
1042         void __iomem *rxtx_regs;        /* SerDes Rx/Tx CSRs */
1043         void __iomem *sir0_regs;        /* SerDes integration registers (1/2) */
1044         void __iomem *sir1_regs;        /* SerDes integration registers (2/2) */
1045         void __iomem *xprop_regs;       /* XGBE property registers */
1046         void __iomem *xi2c_regs;        /* XGBE I2C CSRs */
1047 
1048         /* Port property registers */
1049         unsigned int pp0;
1050         unsigned int pp1;
1051         unsigned int pp2;
1052         unsigned int pp3;
1053         unsigned int pp4;
1054 
1055         /* Overall device lock */
1056         spinlock_t lock;
1057 
1058         /* XPCS indirect addressing lock */
1059         spinlock_t xpcs_lock;
1060         unsigned int xpcs_window_def_reg;
1061         unsigned int xpcs_window_sel_reg;
1062         unsigned int xpcs_window;
1063         unsigned int xpcs_window_size;
1064         unsigned int xpcs_window_mask;
1065 
1066         /* RSS addressing mutex */
1067         struct mutex rss_mutex;
1068 
1069         /* Flags representing xgbe_state */
1070         unsigned long dev_state;
1071 
1072         /* ECC support */
1073         unsigned long tx_sec_period;
1074         unsigned long tx_ded_period;
1075         unsigned long rx_sec_period;
1076         unsigned long rx_ded_period;
1077         unsigned long desc_sec_period;
1078         unsigned long desc_ded_period;
1079 
1080         unsigned int tx_sec_count;
1081         unsigned int tx_ded_count;
1082         unsigned int rx_sec_count;
1083         unsigned int rx_ded_count;
1084         unsigned int desc_ded_count;
1085         unsigned int desc_sec_count;
1086 
1087         int dev_irq;
1088         int ecc_irq;
1089         int i2c_irq;
1090         int channel_irq[XGBE_MAX_DMA_CHANNELS];
1091 
1092         unsigned int per_channel_irq;
1093         unsigned int irq_count;
1094         unsigned int channel_irq_count;
1095         unsigned int channel_irq_mode;
1096 
1097         char ecc_name[IFNAMSIZ + 32];
1098 
1099         struct xgbe_hw_if hw_if;
1100         struct xgbe_phy_if phy_if;
1101         struct xgbe_desc_if desc_if;
1102         struct xgbe_i2c_if i2c_if;
1103 
1104         /* AXI DMA settings */
1105         unsigned int coherent;
1106         unsigned int arcr;
1107         unsigned int awcr;
1108         unsigned int awarcr;
1109 
1110         /* Service routine support */
1111         struct workqueue_struct *dev_workqueue;
1112         struct work_struct service_work;
1113         struct timer_list service_timer;
1114 
1115         /* Rings for Tx/Rx on a DMA channel */
1116         struct xgbe_channel *channel[XGBE_MAX_DMA_CHANNELS];
1117         unsigned int tx_max_channel_count;
1118         unsigned int rx_max_channel_count;
1119         unsigned int channel_count;
1120         unsigned int tx_ring_count;
1121         unsigned int tx_desc_count;
1122         unsigned int rx_ring_count;
1123         unsigned int rx_desc_count;
1124 
1125         unsigned int new_tx_ring_count;
1126         unsigned int new_rx_ring_count;
1127 
1128         unsigned int tx_max_q_count;
1129         unsigned int rx_max_q_count;
1130         unsigned int tx_q_count;
1131         unsigned int rx_q_count;
1132 
1133         /* Tx/Rx common settings */
1134         unsigned int blen;
1135         unsigned int pbl;
1136         unsigned int aal;
1137         unsigned int rd_osr_limit;
1138         unsigned int wr_osr_limit;
1139 
1140         /* Tx settings */
1141         unsigned int tx_sf_mode;
1142         unsigned int tx_threshold;
1143         unsigned int tx_osp_mode;
1144         unsigned int tx_max_fifo_size;
1145 
1146         /* Rx settings */
1147         unsigned int rx_sf_mode;
1148         unsigned int rx_threshold;
1149         unsigned int rx_max_fifo_size;
1150 
1151         /* Tx coalescing settings */
1152         unsigned int tx_usecs;
1153         unsigned int tx_frames;
1154 
1155         /* Rx coalescing settings */
1156         unsigned int rx_riwt;
1157         unsigned int rx_usecs;
1158         unsigned int rx_frames;
1159 
1160         /* Current Rx buffer size */
1161         unsigned int rx_buf_size;
1162 
1163         /* Flow control settings */
1164         unsigned int pause_autoneg;
1165         unsigned int tx_pause;
1166         unsigned int rx_pause;
1167         unsigned int rx_rfa[XGBE_MAX_QUEUES];
1168         unsigned int rx_rfd[XGBE_MAX_QUEUES];
1169 
1170         /* Receive Side Scaling settings */
1171         u8 rss_key[XGBE_RSS_HASH_KEY_SIZE];
1172         u32 rss_table[XGBE_RSS_MAX_TABLE_SIZE];
1173         u32 rss_options;
1174 
1175         /* VXLAN settings */
1176         unsigned int vxlan_port_set;
1177         unsigned int vxlan_offloads_set;
1178         unsigned int vxlan_force_disable;
1179         unsigned int vxlan_port_count;
1180         struct list_head vxlan_ports;
1181         u16 vxlan_port;
1182         netdev_features_t vxlan_features;
1183 
1184         /* Netdev related settings */
1185         unsigned char mac_addr[ETH_ALEN];
1186         netdev_features_t netdev_features;
1187         struct napi_struct napi;
1188         struct xgbe_mmc_stats mmc_stats;
1189         struct xgbe_ext_stats ext_stats;
1190 
1191         /* Filtering support */
1192         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
1193 
1194         /* Device clocks */
1195         struct clk *sysclk;
1196         unsigned long sysclk_rate;
1197         struct clk *ptpclk;
1198         unsigned long ptpclk_rate;
1199 
1200         /* Timestamp support */
1201         spinlock_t tstamp_lock;
1202         struct ptp_clock_info ptp_clock_info;
1203         struct ptp_clock *ptp_clock;
1204         struct hwtstamp_config tstamp_config;
1205         struct cyclecounter tstamp_cc;
1206         struct timecounter tstamp_tc;
1207         unsigned int tstamp_addend;
1208         struct work_struct tx_tstamp_work;
1209         struct sk_buff *tx_tstamp_skb;
1210         u64 tx_tstamp;
1211 
1212         /* DCB support */
1213         struct ieee_ets *ets;
1214         struct ieee_pfc *pfc;
1215         unsigned int q2tc_map[XGBE_MAX_QUEUES];
1216         unsigned int prio2q_map[IEEE_8021QAZ_MAX_TCS];
1217         unsigned int pfcq[XGBE_MAX_QUEUES];
1218         unsigned int pfc_rfa;
1219         u8 num_tcs;
1220 
1221         /* Hardware features of the device */
1222         struct xgbe_hw_features hw_feat;
1223 
1224         /* Device work structures */
1225         struct work_struct restart_work;
1226         struct work_struct stopdev_work;
1227 
1228         /* Keeps track of power mode */
1229         unsigned int power_down;
1230 
1231         /* Network interface message level setting */
1232         u32 msg_enable;
1233 
1234         /* Current PHY settings */
1235         phy_interface_t phy_mode;
1236         int phy_link;
1237         int phy_speed;
1238 
1239         /* MDIO/PHY related settings */
1240         unsigned int phy_started;
1241         void *phy_data;
1242         struct xgbe_phy phy;
1243         int mdio_mmd;
1244         unsigned long link_check;
1245         struct completion mdio_complete;
1246 
1247         unsigned int kr_redrv;
1248 
1249         char an_name[IFNAMSIZ + 32];
1250         struct workqueue_struct *an_workqueue;
1251 
1252         int an_irq;
1253         struct work_struct an_irq_work;
1254 
1255         /* Auto-negotiation state machine support */
1256         unsigned int an_int;
1257         unsigned int an_status;
1258         struct mutex an_mutex;
1259         enum xgbe_an an_result;
1260         enum xgbe_an an_state;
1261         enum xgbe_rx kr_state;
1262         enum xgbe_rx kx_state;
1263         struct work_struct an_work;
1264         unsigned int an_again;
1265         unsigned int an_supported;
1266         unsigned int parallel_detect;
1267         unsigned int fec_ability;
1268         unsigned long an_start;
1269         enum xgbe_an_mode an_mode;
1270 
1271         /* I2C support */
1272         struct xgbe_i2c i2c;
1273         struct mutex i2c_mutex;
1274         struct completion i2c_complete;
1275         char i2c_name[IFNAMSIZ + 32];
1276 
1277         unsigned int lpm_ctrl;          /* CTRL1 for resume */
1278 
1279         unsigned int isr_as_tasklet;
1280         struct tasklet_struct tasklet_dev;
1281         struct tasklet_struct tasklet_ecc;
1282         struct tasklet_struct tasklet_i2c;
1283         struct tasklet_struct tasklet_an;
1284 
1285         struct dentry *xgbe_debugfs;
1286 
1287         unsigned int debugfs_xgmac_reg;
1288 
1289         unsigned int debugfs_xpcs_mmd;
1290         unsigned int debugfs_xpcs_reg;
1291 
1292         unsigned int debugfs_xprop_reg;
1293 
1294         unsigned int debugfs_xi2c_reg;
1295 
1296         bool debugfs_an_cdr_workaround;
1297         bool debugfs_an_cdr_track_early;
1298 };
1299 
1300 /* Function prototypes*/
1301 struct xgbe_prv_data *xgbe_alloc_pdata(struct device *);
1302 void xgbe_free_pdata(struct xgbe_prv_data *);
1303 void xgbe_set_counts(struct xgbe_prv_data *);
1304 int xgbe_config_netdev(struct xgbe_prv_data *);
1305 void xgbe_deconfig_netdev(struct xgbe_prv_data *);
1306 
1307 int xgbe_platform_init(void);
1308 void xgbe_platform_exit(void);
1309 #ifdef CONFIG_PCI
1310 int xgbe_pci_init(void);
1311 void xgbe_pci_exit(void);
1312 #else
1313 static inline int xgbe_pci_init(void) { return 0; }
1314 static inline void xgbe_pci_exit(void) { }
1315 #endif
1316 
1317 void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *);
1318 void xgbe_init_function_ptrs_phy(struct xgbe_phy_if *);
1319 void xgbe_init_function_ptrs_phy_v1(struct xgbe_phy_if *);
1320 void xgbe_init_function_ptrs_phy_v2(struct xgbe_phy_if *);
1321 void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *);
1322 void xgbe_init_function_ptrs_i2c(struct xgbe_i2c_if *);
1323 const struct net_device_ops *xgbe_get_netdev_ops(void);
1324 const struct ethtool_ops *xgbe_get_ethtool_ops(void);
1325 
1326 #ifdef CONFIG_AMD_XGBE_DCB
1327 const struct dcbnl_rtnl_ops *xgbe_get_dcbnl_ops(void);
1328 #endif
1329 
1330 void xgbe_ptp_register(struct xgbe_prv_data *);
1331 void xgbe_ptp_unregister(struct xgbe_prv_data *);
1332 void xgbe_dump_tx_desc(struct xgbe_prv_data *, struct xgbe_ring *,
1333                        unsigned int, unsigned int, unsigned int);
1334 void xgbe_dump_rx_desc(struct xgbe_prv_data *, struct xgbe_ring *,
1335                        unsigned int);
1336 void xgbe_print_pkt(struct net_device *, struct sk_buff *, bool);
1337 void xgbe_get_all_hw_features(struct xgbe_prv_data *);
1338 int xgbe_powerup(struct net_device *, unsigned int);
1339 int xgbe_powerdown(struct net_device *, unsigned int);
1340 void xgbe_init_rx_coalesce(struct xgbe_prv_data *);
1341 void xgbe_init_tx_coalesce(struct xgbe_prv_data *);
1342 void xgbe_restart_dev(struct xgbe_prv_data *pdata);
1343 void xgbe_full_restart_dev(struct xgbe_prv_data *pdata);
1344 
1345 #ifdef CONFIG_DEBUG_FS
1346 void xgbe_debugfs_init(struct xgbe_prv_data *);
1347 void xgbe_debugfs_exit(struct xgbe_prv_data *);
1348 void xgbe_debugfs_rename(struct xgbe_prv_data *pdata);
1349 #else
1350 static inline void xgbe_debugfs_init(struct xgbe_prv_data *pdata) {}
1351 static inline void xgbe_debugfs_exit(struct xgbe_prv_data *pdata) {}
1352 static inline void xgbe_debugfs_rename(struct xgbe_prv_data *pdata) {}
1353 #endif /* CONFIG_DEBUG_FS */
1354 
1355 /* NOTE: Uncomment for function trace log messages in KERNEL LOG */
1356 #if 0
1357 #define YDEBUG
1358 #define YDEBUG_MDIO
1359 #endif
1360 
1361 /* For debug prints */
1362 #ifdef YDEBUG
1363 #define DBGPR(x...) pr_alert(x)
1364 #else
1365 #define DBGPR(x...) do { } while (0)
1366 #endif
1367 
1368 #ifdef YDEBUG_MDIO
1369 #define DBGPR_MDIO(x...) pr_alert(x)
1370 #else
1371 #define DBGPR_MDIO(x...) do { } while (0)
1372 #endif
1373 
1374 #endif
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root/drivers/net/ethernet/amd/xgbe/xgbe.h

INCLUDED FROM

DEFINITIONS
