root/drivers/net/ethernet/sfc/falcon/efx.c

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DEFINITIONS

This source file includes following definitions.
  1. ef4_check_disabled
  2. ef4_process_channel
  3. ef4_update_irq_mod
  4. ef4_poll
  5. ef4_probe_eventq
  6. ef4_init_eventq
  7. ef4_start_eventq
  8. ef4_stop_eventq
  9. ef4_fini_eventq
  10. ef4_remove_eventq
  11. ef4_alloc_channel
  12. ef4_copy_channel
  13. ef4_probe_channel
  14. ef4_get_channel_name
  15. ef4_set_channel_names
  16. ef4_probe_channels
  17. ef4_start_datapath
  18. ef4_stop_datapath
  19. ef4_remove_channel
  20. ef4_remove_channels
  21. ef4_realloc_channels
  22. ef4_schedule_slow_fill
  23. ef4_channel_dummy_op_int
  24. ef4_channel_dummy_op_void
  25. ef4_link_status_changed
  26. ef4_link_set_advertising
  27. ef4_link_set_wanted_fc
  28. ef4_mac_reconfigure
  29. __ef4_reconfigure_port
  30. ef4_reconfigure_port
  31. ef4_mac_work
  32. ef4_probe_port
  33. ef4_init_port
  34. ef4_start_port
  35. ef4_stop_port
  36. ef4_fini_port
  37. ef4_remove_port
  38. ef4_same_controller
  39. ef4_associate
  40. ef4_dissociate
  41. ef4_init_io
  42. ef4_fini_io
  43. ef4_set_default_rx_indir_table
  44. ef4_wanted_parallelism
  45. ef4_probe_interrupts
  46. ef4_soft_enable_interrupts
  47. ef4_soft_disable_interrupts
  48. ef4_enable_interrupts
  49. ef4_disable_interrupts
  50. ef4_remove_interrupts
  51. ef4_set_channels
  52. ef4_probe_nic
  53. ef4_remove_nic
  54. ef4_probe_filters
  55. ef4_remove_filters
  56. ef4_restore_filters
  57. ef4_probe_all
  58. ef4_start_all
  59. ef4_stop_all
  60. ef4_remove_all
  61. ef4_usecs_to_ticks
  62. ef4_ticks_to_usecs
  63. ef4_init_irq_moderation
  64. ef4_get_irq_moderation
  65. ef4_monitor
  66. ef4_ioctl
  67. ef4_init_napi_channel
  68. ef4_init_napi
  69. ef4_fini_napi_channel
  70. ef4_fini_napi
  71. ef4_net_open
  72. ef4_net_stop
  73. ef4_net_stats
  74. ef4_watchdog
  75. ef4_change_mtu
  76. ef4_set_mac_address
  77. ef4_set_rx_mode
  78. ef4_set_features
  79. ef4_update_name
  80. ef4_netdev_event
  81. show_phy_type
  82. ef4_register_netdev
  83. ef4_unregister_netdev
  84. ef4_reset_down
  85. ef4_reset_up
  86. ef4_reset
  87. ef4_try_recovery
  88. ef4_reset_work
  89. ef4_schedule_reset
  90. ef4_port_dummy_op_int
  91. ef4_port_dummy_op_void
  92. ef4_port_dummy_op_poll
  93. ef4_init_struct
  94. ef4_fini_struct
  95. ef4_update_sw_stats
  96. ef4_pci_remove_main
  97. ef4_pci_remove
  98. ef4_probe_vpd_strings
  99. ef4_pci_probe_main
  100. ef4_pci_probe
  101. ef4_pm_freeze
  102. ef4_pm_thaw
  103. ef4_pm_poweroff
  104. ef4_pm_resume
  105. ef4_pm_suspend
  106. ef4_io_error_detected
  107. ef4_io_slot_reset
  108. ef4_io_resume
  109. ef4_init_module
  110. ef4_exit_module

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /****************************************************************************
   3  * Driver for Solarflare network controllers and boards
   4  * Copyright 2005-2006 Fen Systems Ltd.
   5  * Copyright 2005-2013 Solarflare Communications Inc.
   6  */
   7 
   8 #include <linux/module.h>
   9 #include <linux/pci.h>
  10 #include <linux/netdevice.h>
  11 #include <linux/etherdevice.h>
  12 #include <linux/delay.h>
  13 #include <linux/notifier.h>
  14 #include <linux/ip.h>
  15 #include <linux/tcp.h>
  16 #include <linux/in.h>
  17 #include <linux/ethtool.h>
  18 #include <linux/topology.h>
  19 #include <linux/gfp.h>
  20 #include <linux/aer.h>
  21 #include <linux/interrupt.h>
  22 #include "net_driver.h"
  23 #include "efx.h"
  24 #include "nic.h"
  25 #include "selftest.h"
  26 
  27 #include "workarounds.h"
  28 
  29 /**************************************************************************
  30  *
  31  * Type name strings
  32  *
  33  **************************************************************************
  34  */
  35 
  36 /* Loopback mode names (see LOOPBACK_MODE()) */
  37 const unsigned int ef4_loopback_mode_max = LOOPBACK_MAX;
  38 const char *const ef4_loopback_mode_names[] = {
  39         [LOOPBACK_NONE]         = "NONE",
  40         [LOOPBACK_DATA]         = "DATAPATH",
  41         [LOOPBACK_GMAC]         = "GMAC",
  42         [LOOPBACK_XGMII]        = "XGMII",
  43         [LOOPBACK_XGXS]         = "XGXS",
  44         [LOOPBACK_XAUI]         = "XAUI",
  45         [LOOPBACK_GMII]         = "GMII",
  46         [LOOPBACK_SGMII]        = "SGMII",
  47         [LOOPBACK_XGBR]         = "XGBR",
  48         [LOOPBACK_XFI]          = "XFI",
  49         [LOOPBACK_XAUI_FAR]     = "XAUI_FAR",
  50         [LOOPBACK_GMII_FAR]     = "GMII_FAR",
  51         [LOOPBACK_SGMII_FAR]    = "SGMII_FAR",
  52         [LOOPBACK_XFI_FAR]      = "XFI_FAR",
  53         [LOOPBACK_GPHY]         = "GPHY",
  54         [LOOPBACK_PHYXS]        = "PHYXS",
  55         [LOOPBACK_PCS]          = "PCS",
  56         [LOOPBACK_PMAPMD]       = "PMA/PMD",
  57         [LOOPBACK_XPORT]        = "XPORT",
  58         [LOOPBACK_XGMII_WS]     = "XGMII_WS",
  59         [LOOPBACK_XAUI_WS]      = "XAUI_WS",
  60         [LOOPBACK_XAUI_WS_FAR]  = "XAUI_WS_FAR",
  61         [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
  62         [LOOPBACK_GMII_WS]      = "GMII_WS",
  63         [LOOPBACK_XFI_WS]       = "XFI_WS",
  64         [LOOPBACK_XFI_WS_FAR]   = "XFI_WS_FAR",
  65         [LOOPBACK_PHYXS_WS]     = "PHYXS_WS",
  66 };
  67 
  68 const unsigned int ef4_reset_type_max = RESET_TYPE_MAX;
  69 const char *const ef4_reset_type_names[] = {
  70         [RESET_TYPE_INVISIBLE]          = "INVISIBLE",
  71         [RESET_TYPE_ALL]                = "ALL",
  72         [RESET_TYPE_RECOVER_OR_ALL]     = "RECOVER_OR_ALL",
  73         [RESET_TYPE_WORLD]              = "WORLD",
  74         [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
  75         [RESET_TYPE_DATAPATH]           = "DATAPATH",
  76         [RESET_TYPE_DISABLE]            = "DISABLE",
  77         [RESET_TYPE_TX_WATCHDOG]        = "TX_WATCHDOG",
  78         [RESET_TYPE_INT_ERROR]          = "INT_ERROR",
  79         [RESET_TYPE_RX_RECOVERY]        = "RX_RECOVERY",
  80         [RESET_TYPE_DMA_ERROR]          = "DMA_ERROR",
  81         [RESET_TYPE_TX_SKIP]            = "TX_SKIP",
  82 };
  83 
  84 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
  85  * queued onto this work queue. This is not a per-nic work queue, because
  86  * ef4_reset_work() acquires the rtnl lock, so resets are naturally serialised.
  87  */
  88 static struct workqueue_struct *reset_workqueue;
  89 
  90 /* How often and how many times to poll for a reset while waiting for a
  91  * BIST that another function started to complete.
  92  */
  93 #define BIST_WAIT_DELAY_MS      100
  94 #define BIST_WAIT_DELAY_COUNT   100
  95 
  96 /**************************************************************************
  97  *
  98  * Configurable values
  99  *
 100  *************************************************************************/
 101 
 102 /*
 103  * Use separate channels for TX and RX events
 104  *
 105  * Set this to 1 to use separate channels for TX and RX. It allows us
 106  * to control interrupt affinity separately for TX and RX.
 107  *
 108  * This is only used in MSI-X interrupt mode
 109  */
 110 bool ef4_separate_tx_channels;
 111 module_param(ef4_separate_tx_channels, bool, 0444);
 112 MODULE_PARM_DESC(ef4_separate_tx_channels,
 113                  "Use separate channels for TX and RX");
 114 
 115 /* This is the weight assigned to each of the (per-channel) virtual
 116  * NAPI devices.
 117  */
 118 static int napi_weight = 64;
 119 
 120 /* This is the time (in jiffies) between invocations of the hardware
 121  * monitor.
 122  * On Falcon-based NICs, this will:
 123  * - Check the on-board hardware monitor;
 124  * - Poll the link state and reconfigure the hardware as necessary.
 125  * On Siena-based NICs for power systems with EEH support, this will give EEH a
 126  * chance to start.
 127  */
 128 static unsigned int ef4_monitor_interval = 1 * HZ;
 129 
 130 /* Initial interrupt moderation settings.  They can be modified after
 131  * module load with ethtool.
 132  *
 133  * The default for RX should strike a balance between increasing the
 134  * round-trip latency and reducing overhead.
 135  */
 136 static unsigned int rx_irq_mod_usec = 60;
 137 
 138 /* Initial interrupt moderation settings.  They can be modified after
 139  * module load with ethtool.
 140  *
 141  * This default is chosen to ensure that a 10G link does not go idle
 142  * while a TX queue is stopped after it has become full.  A queue is
 143  * restarted when it drops below half full.  The time this takes (assuming
 144  * worst case 3 descriptors per packet and 1024 descriptors) is
 145  *   512 / 3 * 1.2 = 205 usec.
 146  */
 147 static unsigned int tx_irq_mod_usec = 150;
 148 
 149 /* This is the first interrupt mode to try out of:
 150  * 0 => MSI-X
 151  * 1 => MSI
 152  * 2 => legacy
 153  */
 154 static unsigned int interrupt_mode;
 155 
 156 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
 157  * i.e. the number of CPUs among which we may distribute simultaneous
 158  * interrupt handling.
 159  *
 160  * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
 161  * The default (0) means to assign an interrupt to each core.
 162  */
 163 static unsigned int rss_cpus;
 164 module_param(rss_cpus, uint, 0444);
 165 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
 166 
 167 static bool phy_flash_cfg;
 168 module_param(phy_flash_cfg, bool, 0644);
 169 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
 170 
 171 static unsigned irq_adapt_low_thresh = 8000;
 172 module_param(irq_adapt_low_thresh, uint, 0644);
 173 MODULE_PARM_DESC(irq_adapt_low_thresh,
 174                  "Threshold score for reducing IRQ moderation");
 175 
 176 static unsigned irq_adapt_high_thresh = 16000;
 177 module_param(irq_adapt_high_thresh, uint, 0644);
 178 MODULE_PARM_DESC(irq_adapt_high_thresh,
 179                  "Threshold score for increasing IRQ moderation");
 180 
 181 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
 182                          NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
 183                          NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
 184                          NETIF_MSG_TX_ERR | NETIF_MSG_HW);
 185 module_param(debug, uint, 0);
 186 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
 187 
 188 /**************************************************************************
 189  *
 190  * Utility functions and prototypes
 191  *
 192  *************************************************************************/
 193 
 194 static int ef4_soft_enable_interrupts(struct ef4_nic *efx);
 195 static void ef4_soft_disable_interrupts(struct ef4_nic *efx);
 196 static void ef4_remove_channel(struct ef4_channel *channel);
 197 static void ef4_remove_channels(struct ef4_nic *efx);
 198 static const struct ef4_channel_type ef4_default_channel_type;
 199 static void ef4_remove_port(struct ef4_nic *efx);
 200 static void ef4_init_napi_channel(struct ef4_channel *channel);
 201 static void ef4_fini_napi(struct ef4_nic *efx);
 202 static void ef4_fini_napi_channel(struct ef4_channel *channel);
 203 static void ef4_fini_struct(struct ef4_nic *efx);
 204 static void ef4_start_all(struct ef4_nic *efx);
 205 static void ef4_stop_all(struct ef4_nic *efx);
 206 
 207 #define EF4_ASSERT_RESET_SERIALISED(efx)                \
 208         do {                                            \
 209                 if ((efx->state == STATE_READY) ||      \
 210                     (efx->state == STATE_RECOVERY) ||   \
 211                     (efx->state == STATE_DISABLED))     \
 212                         ASSERT_RTNL();                  \
 213         } while (0)
 214 
 215 static int ef4_check_disabled(struct ef4_nic *efx)
 216 {
 217         if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
 218                 netif_err(efx, drv, efx->net_dev,
 219                           "device is disabled due to earlier errors\n");
 220                 return -EIO;
 221         }
 222         return 0;
 223 }
 224 
 225 /**************************************************************************
 226  *
 227  * Event queue processing
 228  *
 229  *************************************************************************/
 230 
 231 /* Process channel's event queue
 232  *
 233  * This function is responsible for processing the event queue of a
 234  * single channel.  The caller must guarantee that this function will
 235  * never be concurrently called more than once on the same channel,
 236  * though different channels may be being processed concurrently.
 237  */
 238 static int ef4_process_channel(struct ef4_channel *channel, int budget)
 239 {
 240         struct ef4_tx_queue *tx_queue;
 241         int spent;
 242 
 243         if (unlikely(!channel->enabled))
 244                 return 0;
 245 
 246         ef4_for_each_channel_tx_queue(tx_queue, channel) {
 247                 tx_queue->pkts_compl = 0;
 248                 tx_queue->bytes_compl = 0;
 249         }
 250 
 251         spent = ef4_nic_process_eventq(channel, budget);
 252         if (spent && ef4_channel_has_rx_queue(channel)) {
 253                 struct ef4_rx_queue *rx_queue =
 254                         ef4_channel_get_rx_queue(channel);
 255 
 256                 ef4_rx_flush_packet(channel);
 257                 ef4_fast_push_rx_descriptors(rx_queue, true);
 258         }
 259 
 260         /* Update BQL */
 261         ef4_for_each_channel_tx_queue(tx_queue, channel) {
 262                 if (tx_queue->bytes_compl) {
 263                         netdev_tx_completed_queue(tx_queue->core_txq,
 264                                 tx_queue->pkts_compl, tx_queue->bytes_compl);
 265                 }
 266         }
 267 
 268         return spent;
 269 }
 270 
 271 /* NAPI poll handler
 272  *
 273  * NAPI guarantees serialisation of polls of the same device, which
 274  * provides the guarantee required by ef4_process_channel().
 275  */
 276 static void ef4_update_irq_mod(struct ef4_nic *efx, struct ef4_channel *channel)
 277 {
 278         int step = efx->irq_mod_step_us;
 279 
 280         if (channel->irq_mod_score < irq_adapt_low_thresh) {
 281                 if (channel->irq_moderation_us > step) {
 282                         channel->irq_moderation_us -= step;
 283                         efx->type->push_irq_moderation(channel);
 284                 }
 285         } else if (channel->irq_mod_score > irq_adapt_high_thresh) {
 286                 if (channel->irq_moderation_us <
 287                     efx->irq_rx_moderation_us) {
 288                         channel->irq_moderation_us += step;
 289                         efx->type->push_irq_moderation(channel);
 290                 }
 291         }
 292 
 293         channel->irq_count = 0;
 294         channel->irq_mod_score = 0;
 295 }
 296 
 297 static int ef4_poll(struct napi_struct *napi, int budget)
 298 {
 299         struct ef4_channel *channel =
 300                 container_of(napi, struct ef4_channel, napi_str);
 301         struct ef4_nic *efx = channel->efx;
 302         int spent;
 303 
 304         netif_vdbg(efx, intr, efx->net_dev,
 305                    "channel %d NAPI poll executing on CPU %d\n",
 306                    channel->channel, raw_smp_processor_id());
 307 
 308         spent = ef4_process_channel(channel, budget);
 309 
 310         if (spent < budget) {
 311                 if (ef4_channel_has_rx_queue(channel) &&
 312                     efx->irq_rx_adaptive &&
 313                     unlikely(++channel->irq_count == 1000)) {
 314                         ef4_update_irq_mod(efx, channel);
 315                 }
 316 
 317                 ef4_filter_rfs_expire(channel);
 318 
 319                 /* There is no race here; although napi_disable() will
 320                  * only wait for napi_complete(), this isn't a problem
 321                  * since ef4_nic_eventq_read_ack() will have no effect if
 322                  * interrupts have already been disabled.
 323                  */
 324                 napi_complete_done(napi, spent);
 325                 ef4_nic_eventq_read_ack(channel);
 326         }
 327 
 328         return spent;
 329 }
 330 
 331 /* Create event queue
 332  * Event queue memory allocations are done only once.  If the channel
 333  * is reset, the memory buffer will be reused; this guards against
 334  * errors during channel reset and also simplifies interrupt handling.
 335  */
 336 static int ef4_probe_eventq(struct ef4_channel *channel)
 337 {
 338         struct ef4_nic *efx = channel->efx;
 339         unsigned long entries;
 340 
 341         netif_dbg(efx, probe, efx->net_dev,
 342                   "chan %d create event queue\n", channel->channel);
 343 
 344         /* Build an event queue with room for one event per tx and rx buffer,
 345          * plus some extra for link state events and MCDI completions. */
 346         entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
 347         EF4_BUG_ON_PARANOID(entries > EF4_MAX_EVQ_SIZE);
 348         channel->eventq_mask = max(entries, EF4_MIN_EVQ_SIZE) - 1;
 349 
 350         return ef4_nic_probe_eventq(channel);
 351 }
 352 
 353 /* Prepare channel's event queue */
 354 static int ef4_init_eventq(struct ef4_channel *channel)
 355 {
 356         struct ef4_nic *efx = channel->efx;
 357         int rc;
 358 
 359         EF4_WARN_ON_PARANOID(channel->eventq_init);
 360 
 361         netif_dbg(efx, drv, efx->net_dev,
 362                   "chan %d init event queue\n", channel->channel);
 363 
 364         rc = ef4_nic_init_eventq(channel);
 365         if (rc == 0) {
 366                 efx->type->push_irq_moderation(channel);
 367                 channel->eventq_read_ptr = 0;
 368                 channel->eventq_init = true;
 369         }
 370         return rc;
 371 }
 372 
 373 /* Enable event queue processing and NAPI */
 374 void ef4_start_eventq(struct ef4_channel *channel)
 375 {
 376         netif_dbg(channel->efx, ifup, channel->efx->net_dev,
 377                   "chan %d start event queue\n", channel->channel);
 378 
 379         /* Make sure the NAPI handler sees the enabled flag set */
 380         channel->enabled = true;
 381         smp_wmb();
 382 
 383         napi_enable(&channel->napi_str);
 384         ef4_nic_eventq_read_ack(channel);
 385 }
 386 
 387 /* Disable event queue processing and NAPI */
 388 void ef4_stop_eventq(struct ef4_channel *channel)
 389 {
 390         if (!channel->enabled)
 391                 return;
 392 
 393         napi_disable(&channel->napi_str);
 394         channel->enabled = false;
 395 }
 396 
 397 static void ef4_fini_eventq(struct ef4_channel *channel)
 398 {
 399         if (!channel->eventq_init)
 400                 return;
 401 
 402         netif_dbg(channel->efx, drv, channel->efx->net_dev,
 403                   "chan %d fini event queue\n", channel->channel);
 404 
 405         ef4_nic_fini_eventq(channel);
 406         channel->eventq_init = false;
 407 }
 408 
 409 static void ef4_remove_eventq(struct ef4_channel *channel)
 410 {
 411         netif_dbg(channel->efx, drv, channel->efx->net_dev,
 412                   "chan %d remove event queue\n", channel->channel);
 413 
 414         ef4_nic_remove_eventq(channel);
 415 }
 416 
 417 /**************************************************************************
 418  *
 419  * Channel handling
 420  *
 421  *************************************************************************/
 422 
 423 /* Allocate and initialise a channel structure. */
 424 static struct ef4_channel *
 425 ef4_alloc_channel(struct ef4_nic *efx, int i, struct ef4_channel *old_channel)
 426 {
 427         struct ef4_channel *channel;
 428         struct ef4_rx_queue *rx_queue;
 429         struct ef4_tx_queue *tx_queue;
 430         int j;
 431 
 432         channel = kzalloc(sizeof(*channel), GFP_KERNEL);
 433         if (!channel)
 434                 return NULL;
 435 
 436         channel->efx = efx;
 437         channel->channel = i;
 438         channel->type = &ef4_default_channel_type;
 439 
 440         for (j = 0; j < EF4_TXQ_TYPES; j++) {
 441                 tx_queue = &channel->tx_queue[j];
 442                 tx_queue->efx = efx;
 443                 tx_queue->queue = i * EF4_TXQ_TYPES + j;
 444                 tx_queue->channel = channel;
 445         }
 446 
 447         rx_queue = &channel->rx_queue;
 448         rx_queue->efx = efx;
 449         timer_setup(&rx_queue->slow_fill, ef4_rx_slow_fill, 0);
 450 
 451         return channel;
 452 }
 453 
 454 /* Allocate and initialise a channel structure, copying parameters
 455  * (but not resources) from an old channel structure.
 456  */
 457 static struct ef4_channel *
 458 ef4_copy_channel(const struct ef4_channel *old_channel)
 459 {
 460         struct ef4_channel *channel;
 461         struct ef4_rx_queue *rx_queue;
 462         struct ef4_tx_queue *tx_queue;
 463         int j;
 464 
 465         channel = kmalloc(sizeof(*channel), GFP_KERNEL);
 466         if (!channel)
 467                 return NULL;
 468 
 469         *channel = *old_channel;
 470 
 471         channel->napi_dev = NULL;
 472         INIT_HLIST_NODE(&channel->napi_str.napi_hash_node);
 473         channel->napi_str.napi_id = 0;
 474         channel->napi_str.state = 0;
 475         memset(&channel->eventq, 0, sizeof(channel->eventq));
 476 
 477         for (j = 0; j < EF4_TXQ_TYPES; j++) {
 478                 tx_queue = &channel->tx_queue[j];
 479                 if (tx_queue->channel)
 480                         tx_queue->channel = channel;
 481                 tx_queue->buffer = NULL;
 482                 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
 483         }
 484 
 485         rx_queue = &channel->rx_queue;
 486         rx_queue->buffer = NULL;
 487         memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
 488         timer_setup(&rx_queue->slow_fill, ef4_rx_slow_fill, 0);
 489 
 490         return channel;
 491 }
 492 
 493 static int ef4_probe_channel(struct ef4_channel *channel)
 494 {
 495         struct ef4_tx_queue *tx_queue;
 496         struct ef4_rx_queue *rx_queue;
 497         int rc;
 498 
 499         netif_dbg(channel->efx, probe, channel->efx->net_dev,
 500                   "creating channel %d\n", channel->channel);
 501 
 502         rc = channel->type->pre_probe(channel);
 503         if (rc)
 504                 goto fail;
 505 
 506         rc = ef4_probe_eventq(channel);
 507         if (rc)
 508                 goto fail;
 509 
 510         ef4_for_each_channel_tx_queue(tx_queue, channel) {
 511                 rc = ef4_probe_tx_queue(tx_queue);
 512                 if (rc)
 513                         goto fail;
 514         }
 515 
 516         ef4_for_each_channel_rx_queue(rx_queue, channel) {
 517                 rc = ef4_probe_rx_queue(rx_queue);
 518                 if (rc)
 519                         goto fail;
 520         }
 521 
 522         return 0;
 523 
 524 fail:
 525         ef4_remove_channel(channel);
 526         return rc;
 527 }
 528 
 529 static void
 530 ef4_get_channel_name(struct ef4_channel *channel, char *buf, size_t len)
 531 {
 532         struct ef4_nic *efx = channel->efx;
 533         const char *type;
 534         int number;
 535 
 536         number = channel->channel;
 537         if (efx->tx_channel_offset == 0) {
 538                 type = "";
 539         } else if (channel->channel < efx->tx_channel_offset) {
 540                 type = "-rx";
 541         } else {
 542                 type = "-tx";
 543                 number -= efx->tx_channel_offset;
 544         }
 545         snprintf(buf, len, "%s%s-%d", efx->name, type, number);
 546 }
 547 
 548 static void ef4_set_channel_names(struct ef4_nic *efx)
 549 {
 550         struct ef4_channel *channel;
 551 
 552         ef4_for_each_channel(channel, efx)
 553                 channel->type->get_name(channel,
 554                                         efx->msi_context[channel->channel].name,
 555                                         sizeof(efx->msi_context[0].name));
 556 }
 557 
 558 static int ef4_probe_channels(struct ef4_nic *efx)
 559 {
 560         struct ef4_channel *channel;
 561         int rc;
 562 
 563         /* Restart special buffer allocation */
 564         efx->next_buffer_table = 0;
 565 
 566         /* Probe channels in reverse, so that any 'extra' channels
 567          * use the start of the buffer table. This allows the traffic
 568          * channels to be resized without moving them or wasting the
 569          * entries before them.
 570          */
 571         ef4_for_each_channel_rev(channel, efx) {
 572                 rc = ef4_probe_channel(channel);
 573                 if (rc) {
 574                         netif_err(efx, probe, efx->net_dev,
 575                                   "failed to create channel %d\n",
 576                                   channel->channel);
 577                         goto fail;
 578                 }
 579         }
 580         ef4_set_channel_names(efx);
 581 
 582         return 0;
 583 
 584 fail:
 585         ef4_remove_channels(efx);
 586         return rc;
 587 }
 588 
 589 /* Channels are shutdown and reinitialised whilst the NIC is running
 590  * to propagate configuration changes (mtu, checksum offload), or
 591  * to clear hardware error conditions
 592  */
 593 static void ef4_start_datapath(struct ef4_nic *efx)
 594 {
 595         netdev_features_t old_features = efx->net_dev->features;
 596         bool old_rx_scatter = efx->rx_scatter;
 597         struct ef4_tx_queue *tx_queue;
 598         struct ef4_rx_queue *rx_queue;
 599         struct ef4_channel *channel;
 600         size_t rx_buf_len;
 601 
 602         /* Calculate the rx buffer allocation parameters required to
 603          * support the current MTU, including padding for header
 604          * alignment and overruns.
 605          */
 606         efx->rx_dma_len = (efx->rx_prefix_size +
 607                            EF4_MAX_FRAME_LEN(efx->net_dev->mtu) +
 608                            efx->type->rx_buffer_padding);
 609         rx_buf_len = (sizeof(struct ef4_rx_page_state) +
 610                       efx->rx_ip_align + efx->rx_dma_len);
 611         if (rx_buf_len <= PAGE_SIZE) {
 612                 efx->rx_scatter = efx->type->always_rx_scatter;
 613                 efx->rx_buffer_order = 0;
 614         } else if (efx->type->can_rx_scatter) {
 615                 BUILD_BUG_ON(EF4_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
 616                 BUILD_BUG_ON(sizeof(struct ef4_rx_page_state) +
 617                              2 * ALIGN(NET_IP_ALIGN + EF4_RX_USR_BUF_SIZE,
 618                                        EF4_RX_BUF_ALIGNMENT) >
 619                              PAGE_SIZE);
 620                 efx->rx_scatter = true;
 621                 efx->rx_dma_len = EF4_RX_USR_BUF_SIZE;
 622                 efx->rx_buffer_order = 0;
 623         } else {
 624                 efx->rx_scatter = false;
 625                 efx->rx_buffer_order = get_order(rx_buf_len);
 626         }
 627 
 628         ef4_rx_config_page_split(efx);
 629         if (efx->rx_buffer_order)
 630                 netif_dbg(efx, drv, efx->net_dev,
 631                           "RX buf len=%u; page order=%u batch=%u\n",
 632                           efx->rx_dma_len, efx->rx_buffer_order,
 633                           efx->rx_pages_per_batch);
 634         else
 635                 netif_dbg(efx, drv, efx->net_dev,
 636                           "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
 637                           efx->rx_dma_len, efx->rx_page_buf_step,
 638                           efx->rx_bufs_per_page, efx->rx_pages_per_batch);
 639 
 640         /* Restore previously fixed features in hw_features and remove
 641          * features which are fixed now
 642          */
 643         efx->net_dev->hw_features |= efx->net_dev->features;
 644         efx->net_dev->hw_features &= ~efx->fixed_features;
 645         efx->net_dev->features |= efx->fixed_features;
 646         if (efx->net_dev->features != old_features)
 647                 netdev_features_change(efx->net_dev);
 648 
 649         /* RX filters may also have scatter-enabled flags */
 650         if (efx->rx_scatter != old_rx_scatter)
 651                 efx->type->filter_update_rx_scatter(efx);
 652 
 653         /* We must keep at least one descriptor in a TX ring empty.
 654          * We could avoid this when the queue size does not exactly
 655          * match the hardware ring size, but it's not that important.
 656          * Therefore we stop the queue when one more skb might fill
 657          * the ring completely.  We wake it when half way back to
 658          * empty.
 659          */
 660         efx->txq_stop_thresh = efx->txq_entries - ef4_tx_max_skb_descs(efx);
 661         efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
 662 
 663         /* Initialise the channels */
 664         ef4_for_each_channel(channel, efx) {
 665                 ef4_for_each_channel_tx_queue(tx_queue, channel) {
 666                         ef4_init_tx_queue(tx_queue);
 667                         atomic_inc(&efx->active_queues);
 668                 }
 669 
 670                 ef4_for_each_channel_rx_queue(rx_queue, channel) {
 671                         ef4_init_rx_queue(rx_queue);
 672                         atomic_inc(&efx->active_queues);
 673                         ef4_stop_eventq(channel);
 674                         ef4_fast_push_rx_descriptors(rx_queue, false);
 675                         ef4_start_eventq(channel);
 676                 }
 677 
 678                 WARN_ON(channel->rx_pkt_n_frags);
 679         }
 680 
 681         if (netif_device_present(efx->net_dev))
 682                 netif_tx_wake_all_queues(efx->net_dev);
 683 }
 684 
 685 static void ef4_stop_datapath(struct ef4_nic *efx)
 686 {
 687         struct ef4_channel *channel;
 688         struct ef4_tx_queue *tx_queue;
 689         struct ef4_rx_queue *rx_queue;
 690         int rc;
 691 
 692         EF4_ASSERT_RESET_SERIALISED(efx);
 693         BUG_ON(efx->port_enabled);
 694 
 695         /* Stop RX refill */
 696         ef4_for_each_channel(channel, efx) {
 697                 ef4_for_each_channel_rx_queue(rx_queue, channel)
 698                         rx_queue->refill_enabled = false;
 699         }
 700 
 701         ef4_for_each_channel(channel, efx) {
 702                 /* RX packet processing is pipelined, so wait for the
 703                  * NAPI handler to complete.  At least event queue 0
 704                  * might be kept active by non-data events, so don't
 705                  * use napi_synchronize() but actually disable NAPI
 706                  * temporarily.
 707                  */
 708                 if (ef4_channel_has_rx_queue(channel)) {
 709                         ef4_stop_eventq(channel);
 710                         ef4_start_eventq(channel);
 711                 }
 712         }
 713 
 714         rc = efx->type->fini_dmaq(efx);
 715         if (rc && EF4_WORKAROUND_7803(efx)) {
 716                 /* Schedule a reset to recover from the flush failure. The
 717                  * descriptor caches reference memory we're about to free,
 718                  * but falcon_reconfigure_mac_wrapper() won't reconnect
 719                  * the MACs because of the pending reset.
 720                  */
 721                 netif_err(efx, drv, efx->net_dev,
 722                           "Resetting to recover from flush failure\n");
 723                 ef4_schedule_reset(efx, RESET_TYPE_ALL);
 724         } else if (rc) {
 725                 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
 726         } else {
 727                 netif_dbg(efx, drv, efx->net_dev,
 728                           "successfully flushed all queues\n");
 729         }
 730 
 731         ef4_for_each_channel(channel, efx) {
 732                 ef4_for_each_channel_rx_queue(rx_queue, channel)
 733                         ef4_fini_rx_queue(rx_queue);
 734                 ef4_for_each_possible_channel_tx_queue(tx_queue, channel)
 735                         ef4_fini_tx_queue(tx_queue);
 736         }
 737 }
 738 
 739 static void ef4_remove_channel(struct ef4_channel *channel)
 740 {
 741         struct ef4_tx_queue *tx_queue;
 742         struct ef4_rx_queue *rx_queue;
 743 
 744         netif_dbg(channel->efx, drv, channel->efx->net_dev,
 745                   "destroy chan %d\n", channel->channel);
 746 
 747         ef4_for_each_channel_rx_queue(rx_queue, channel)
 748                 ef4_remove_rx_queue(rx_queue);
 749         ef4_for_each_possible_channel_tx_queue(tx_queue, channel)
 750                 ef4_remove_tx_queue(tx_queue);
 751         ef4_remove_eventq(channel);
 752         channel->type->post_remove(channel);
 753 }
 754 
 755 static void ef4_remove_channels(struct ef4_nic *efx)
 756 {
 757         struct ef4_channel *channel;
 758 
 759         ef4_for_each_channel(channel, efx)
 760                 ef4_remove_channel(channel);
 761 }
 762 
 763 int
 764 ef4_realloc_channels(struct ef4_nic *efx, u32 rxq_entries, u32 txq_entries)
 765 {
 766         struct ef4_channel *other_channel[EF4_MAX_CHANNELS], *channel;
 767         u32 old_rxq_entries, old_txq_entries;
 768         unsigned i, next_buffer_table = 0;
 769         int rc, rc2;
 770 
 771         rc = ef4_check_disabled(efx);
 772         if (rc)
 773                 return rc;
 774 
 775         /* Not all channels should be reallocated. We must avoid
 776          * reallocating their buffer table entries.
 777          */
 778         ef4_for_each_channel(channel, efx) {
 779                 struct ef4_rx_queue *rx_queue;
 780                 struct ef4_tx_queue *tx_queue;
 781 
 782                 if (channel->type->copy)
 783                         continue;
 784                 next_buffer_table = max(next_buffer_table,
 785                                         channel->eventq.index +
 786                                         channel->eventq.entries);
 787                 ef4_for_each_channel_rx_queue(rx_queue, channel)
 788                         next_buffer_table = max(next_buffer_table,
 789                                                 rx_queue->rxd.index +
 790                                                 rx_queue->rxd.entries);
 791                 ef4_for_each_channel_tx_queue(tx_queue, channel)
 792                         next_buffer_table = max(next_buffer_table,
 793                                                 tx_queue->txd.index +
 794                                                 tx_queue->txd.entries);
 795         }
 796 
 797         ef4_device_detach_sync(efx);
 798         ef4_stop_all(efx);
 799         ef4_soft_disable_interrupts(efx);
 800 
 801         /* Clone channels (where possible) */
 802         memset(other_channel, 0, sizeof(other_channel));
 803         for (i = 0; i < efx->n_channels; i++) {
 804                 channel = efx->channel[i];
 805                 if (channel->type->copy)
 806                         channel = channel->type->copy(channel);
 807                 if (!channel) {
 808                         rc = -ENOMEM;
 809                         goto out;
 810                 }
 811                 other_channel[i] = channel;
 812         }
 813 
 814         /* Swap entry counts and channel pointers */
 815         old_rxq_entries = efx->rxq_entries;
 816         old_txq_entries = efx->txq_entries;
 817         efx->rxq_entries = rxq_entries;
 818         efx->txq_entries = txq_entries;
 819         for (i = 0; i < efx->n_channels; i++) {
 820                 channel = efx->channel[i];
 821                 efx->channel[i] = other_channel[i];
 822                 other_channel[i] = channel;
 823         }
 824 
 825         /* Restart buffer table allocation */
 826         efx->next_buffer_table = next_buffer_table;
 827 
 828         for (i = 0; i < efx->n_channels; i++) {
 829                 channel = efx->channel[i];
 830                 if (!channel->type->copy)
 831                         continue;
 832                 rc = ef4_probe_channel(channel);
 833                 if (rc)
 834                         goto rollback;
 835                 ef4_init_napi_channel(efx->channel[i]);
 836         }
 837 
 838 out:
 839         /* Destroy unused channel structures */
 840         for (i = 0; i < efx->n_channels; i++) {
 841                 channel = other_channel[i];
 842                 if (channel && channel->type->copy) {
 843                         ef4_fini_napi_channel(channel);
 844                         ef4_remove_channel(channel);
 845                         kfree(channel);
 846                 }
 847         }
 848 
 849         rc2 = ef4_soft_enable_interrupts(efx);
 850         if (rc2) {
 851                 rc = rc ? rc : rc2;
 852                 netif_err(efx, drv, efx->net_dev,
 853                           "unable to restart interrupts on channel reallocation\n");
 854                 ef4_schedule_reset(efx, RESET_TYPE_DISABLE);
 855         } else {
 856                 ef4_start_all(efx);
 857                 netif_device_attach(efx->net_dev);
 858         }
 859         return rc;
 860 
 861 rollback:
 862         /* Swap back */
 863         efx->rxq_entries = old_rxq_entries;
 864         efx->txq_entries = old_txq_entries;
 865         for (i = 0; i < efx->n_channels; i++) {
 866                 channel = efx->channel[i];
 867                 efx->channel[i] = other_channel[i];
 868                 other_channel[i] = channel;
 869         }
 870         goto out;
 871 }
 872 
 873 void ef4_schedule_slow_fill(struct ef4_rx_queue *rx_queue)
 874 {
 875         mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
 876 }
 877 
 878 static const struct ef4_channel_type ef4_default_channel_type = {
 879         .pre_probe              = ef4_channel_dummy_op_int,
 880         .post_remove            = ef4_channel_dummy_op_void,
 881         .get_name               = ef4_get_channel_name,
 882         .copy                   = ef4_copy_channel,
 883         .keep_eventq            = false,
 884 };
 885 
 886 int ef4_channel_dummy_op_int(struct ef4_channel *channel)
 887 {
 888         return 0;
 889 }
 890 
 891 void ef4_channel_dummy_op_void(struct ef4_channel *channel)
 892 {
 893 }
 894 
 895 /**************************************************************************
 896  *
 897  * Port handling
 898  *
 899  **************************************************************************/
 900 
 901 /* This ensures that the kernel is kept informed (via
 902  * netif_carrier_on/off) of the link status, and also maintains the
 903  * link status's stop on the port's TX queue.
 904  */
 905 void ef4_link_status_changed(struct ef4_nic *efx)
 906 {
 907         struct ef4_link_state *link_state = &efx->link_state;
 908 
 909         /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
 910          * that no events are triggered between unregister_netdev() and the
 911          * driver unloading. A more general condition is that NETDEV_CHANGE
 912          * can only be generated between NETDEV_UP and NETDEV_DOWN */
 913         if (!netif_running(efx->net_dev))
 914                 return;
 915 
 916         if (link_state->up != netif_carrier_ok(efx->net_dev)) {
 917                 efx->n_link_state_changes++;
 918 
 919                 if (link_state->up)
 920                         netif_carrier_on(efx->net_dev);
 921                 else
 922                         netif_carrier_off(efx->net_dev);
 923         }
 924 
 925         /* Status message for kernel log */
 926         if (link_state->up)
 927                 netif_info(efx, link, efx->net_dev,
 928                            "link up at %uMbps %s-duplex (MTU %d)\n",
 929                            link_state->speed, link_state->fd ? "full" : "half",
 930                            efx->net_dev->mtu);
 931         else
 932                 netif_info(efx, link, efx->net_dev, "link down\n");
 933 }
 934 
 935 void ef4_link_set_advertising(struct ef4_nic *efx, u32 advertising)
 936 {
 937         efx->link_advertising = advertising;
 938         if (advertising) {
 939                 if (advertising & ADVERTISED_Pause)
 940                         efx->wanted_fc |= (EF4_FC_TX | EF4_FC_RX);
 941                 else
 942                         efx->wanted_fc &= ~(EF4_FC_TX | EF4_FC_RX);
 943                 if (advertising & ADVERTISED_Asym_Pause)
 944                         efx->wanted_fc ^= EF4_FC_TX;
 945         }
 946 }
 947 
 948 void ef4_link_set_wanted_fc(struct ef4_nic *efx, u8 wanted_fc)
 949 {
 950         efx->wanted_fc = wanted_fc;
 951         if (efx->link_advertising) {
 952                 if (wanted_fc & EF4_FC_RX)
 953                         efx->link_advertising |= (ADVERTISED_Pause |
 954                                                   ADVERTISED_Asym_Pause);
 955                 else
 956                         efx->link_advertising &= ~(ADVERTISED_Pause |
 957                                                    ADVERTISED_Asym_Pause);
 958                 if (wanted_fc & EF4_FC_TX)
 959                         efx->link_advertising ^= ADVERTISED_Asym_Pause;
 960         }
 961 }
 962 
 963 static void ef4_fini_port(struct ef4_nic *efx);
 964 
 965 /* We assume that efx->type->reconfigure_mac will always try to sync RX
 966  * filters and therefore needs to read-lock the filter table against freeing
 967  */
 968 void ef4_mac_reconfigure(struct ef4_nic *efx)
 969 {
 970         down_read(&efx->filter_sem);
 971         efx->type->reconfigure_mac(efx);
 972         up_read(&efx->filter_sem);
 973 }
 974 
 975 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
 976  * the MAC appropriately. All other PHY configuration changes are pushed
 977  * through phy_op->set_link_ksettings(), and pushed asynchronously to the MAC
 978  * through ef4_monitor().
 979  *
 980  * Callers must hold the mac_lock
 981  */
 982 int __ef4_reconfigure_port(struct ef4_nic *efx)
 983 {
 984         enum ef4_phy_mode phy_mode;
 985         int rc;
 986 
 987         WARN_ON(!mutex_is_locked(&efx->mac_lock));
 988 
 989         /* Disable PHY transmit in mac level loopbacks */
 990         phy_mode = efx->phy_mode;
 991         if (LOOPBACK_INTERNAL(efx))
 992                 efx->phy_mode |= PHY_MODE_TX_DISABLED;
 993         else
 994                 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
 995 
 996         rc = efx->type->reconfigure_port(efx);
 997 
 998         if (rc)
 999                 efx->phy_mode = phy_mode;
1000 
1001         return rc;
1002 }
1003 
1004 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1005  * disabled. */
1006 int ef4_reconfigure_port(struct ef4_nic *efx)
1007 {
1008         int rc;
1009 
1010         EF4_ASSERT_RESET_SERIALISED(efx);
1011 
1012         mutex_lock(&efx->mac_lock);
1013         rc = __ef4_reconfigure_port(efx);
1014         mutex_unlock(&efx->mac_lock);
1015 
1016         return rc;
1017 }
1018 
1019 /* Asynchronous work item for changing MAC promiscuity and multicast
1020  * hash.  Avoid a drain/rx_ingress enable by reconfiguring the current
1021  * MAC directly. */
1022 static void ef4_mac_work(struct work_struct *data)
1023 {
1024         struct ef4_nic *efx = container_of(data, struct ef4_nic, mac_work);
1025 
1026         mutex_lock(&efx->mac_lock);
1027         if (efx->port_enabled)
1028                 ef4_mac_reconfigure(efx);
1029         mutex_unlock(&efx->mac_lock);
1030 }
1031 
1032 static int ef4_probe_port(struct ef4_nic *efx)
1033 {
1034         int rc;
1035 
1036         netif_dbg(efx, probe, efx->net_dev, "create port\n");
1037 
1038         if (phy_flash_cfg)
1039                 efx->phy_mode = PHY_MODE_SPECIAL;
1040 
1041         /* Connect up MAC/PHY operations table */
1042         rc = efx->type->probe_port(efx);
1043         if (rc)
1044                 return rc;
1045 
1046         /* Initialise MAC address to permanent address */
1047         ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1048 
1049         return 0;
1050 }
1051 
1052 static int ef4_init_port(struct ef4_nic *efx)
1053 {
1054         int rc;
1055 
1056         netif_dbg(efx, drv, efx->net_dev, "init port\n");
1057 
1058         mutex_lock(&efx->mac_lock);
1059 
1060         rc = efx->phy_op->init(efx);
1061         if (rc)
1062                 goto fail1;
1063 
1064         efx->port_initialized = true;
1065 
1066         /* Reconfigure the MAC before creating dma queues (required for
1067          * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1068         ef4_mac_reconfigure(efx);
1069 
1070         /* Ensure the PHY advertises the correct flow control settings */
1071         rc = efx->phy_op->reconfigure(efx);
1072         if (rc && rc != -EPERM)
1073                 goto fail2;
1074 
1075         mutex_unlock(&efx->mac_lock);
1076         return 0;
1077 
1078 fail2:
1079         efx->phy_op->fini(efx);
1080 fail1:
1081         mutex_unlock(&efx->mac_lock);
1082         return rc;
1083 }
1084 
1085 static void ef4_start_port(struct ef4_nic *efx)
1086 {
1087         netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1088         BUG_ON(efx->port_enabled);
1089 
1090         mutex_lock(&efx->mac_lock);
1091         efx->port_enabled = true;
1092 
1093         /* Ensure MAC ingress/egress is enabled */
1094         ef4_mac_reconfigure(efx);
1095 
1096         mutex_unlock(&efx->mac_lock);
1097 }
1098 
1099 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1100  * and the async self-test, wait for them to finish and prevent them
1101  * being scheduled again.  This doesn't cover online resets, which
1102  * should only be cancelled when removing the device.
1103  */
1104 static void ef4_stop_port(struct ef4_nic *efx)
1105 {
1106         netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1107 
1108         EF4_ASSERT_RESET_SERIALISED(efx);
1109 
1110         mutex_lock(&efx->mac_lock);
1111         efx->port_enabled = false;
1112         mutex_unlock(&efx->mac_lock);
1113 
1114         /* Serialise against ef4_set_multicast_list() */
1115         netif_addr_lock_bh(efx->net_dev);
1116         netif_addr_unlock_bh(efx->net_dev);
1117 
1118         cancel_delayed_work_sync(&efx->monitor_work);
1119         ef4_selftest_async_cancel(efx);
1120         cancel_work_sync(&efx->mac_work);
1121 }
1122 
1123 static void ef4_fini_port(struct ef4_nic *efx)
1124 {
1125         netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1126 
1127         if (!efx->port_initialized)
1128                 return;
1129 
1130         efx->phy_op->fini(efx);
1131         efx->port_initialized = false;
1132 
1133         efx->link_state.up = false;
1134         ef4_link_status_changed(efx);
1135 }
1136 
1137 static void ef4_remove_port(struct ef4_nic *efx)
1138 {
1139         netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1140 
1141         efx->type->remove_port(efx);
1142 }
1143 
1144 /**************************************************************************
1145  *
1146  * NIC handling
1147  *
1148  **************************************************************************/
1149 
1150 static LIST_HEAD(ef4_primary_list);
1151 static LIST_HEAD(ef4_unassociated_list);
1152 
1153 static bool ef4_same_controller(struct ef4_nic *left, struct ef4_nic *right)
1154 {
1155         return left->type == right->type &&
1156                 left->vpd_sn && right->vpd_sn &&
1157                 !strcmp(left->vpd_sn, right->vpd_sn);
1158 }
1159 
1160 static void ef4_associate(struct ef4_nic *efx)
1161 {
1162         struct ef4_nic *other, *next;
1163 
1164         if (efx->primary == efx) {
1165                 /* Adding primary function; look for secondaries */
1166 
1167                 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1168                 list_add_tail(&efx->node, &ef4_primary_list);
1169 
1170                 list_for_each_entry_safe(other, next, &ef4_unassociated_list,
1171                                          node) {
1172                         if (ef4_same_controller(efx, other)) {
1173                                 list_del(&other->node);
1174                                 netif_dbg(other, probe, other->net_dev,
1175                                           "moving to secondary list of %s %s\n",
1176                                           pci_name(efx->pci_dev),
1177                                           efx->net_dev->name);
1178                                 list_add_tail(&other->node,
1179                                               &efx->secondary_list);
1180                                 other->primary = efx;
1181                         }
1182                 }
1183         } else {
1184                 /* Adding secondary function; look for primary */
1185 
1186                 list_for_each_entry(other, &ef4_primary_list, node) {
1187                         if (ef4_same_controller(efx, other)) {
1188                                 netif_dbg(efx, probe, efx->net_dev,
1189                                           "adding to secondary list of %s %s\n",
1190                                           pci_name(other->pci_dev),
1191                                           other->net_dev->name);
1192                                 list_add_tail(&efx->node,
1193                                               &other->secondary_list);
1194                                 efx->primary = other;
1195                                 return;
1196                         }
1197                 }
1198 
1199                 netif_dbg(efx, probe, efx->net_dev,
1200                           "adding to unassociated list\n");
1201                 list_add_tail(&efx->node, &ef4_unassociated_list);
1202         }
1203 }
1204 
1205 static void ef4_dissociate(struct ef4_nic *efx)
1206 {
1207         struct ef4_nic *other, *next;
1208 
1209         list_del(&efx->node);
1210         efx->primary = NULL;
1211 
1212         list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1213                 list_del(&other->node);
1214                 netif_dbg(other, probe, other->net_dev,
1215                           "moving to unassociated list\n");
1216                 list_add_tail(&other->node, &ef4_unassociated_list);
1217                 other->primary = NULL;
1218         }
1219 }
1220 
1221 /* This configures the PCI device to enable I/O and DMA. */
1222 static int ef4_init_io(struct ef4_nic *efx)
1223 {
1224         struct pci_dev *pci_dev = efx->pci_dev;
1225         dma_addr_t dma_mask = efx->type->max_dma_mask;
1226         unsigned int mem_map_size = efx->type->mem_map_size(efx);
1227         int rc, bar;
1228 
1229         netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1230 
1231         bar = efx->type->mem_bar;
1232 
1233         rc = pci_enable_device(pci_dev);
1234         if (rc) {
1235                 netif_err(efx, probe, efx->net_dev,
1236                           "failed to enable PCI device\n");
1237                 goto fail1;
1238         }
1239 
1240         pci_set_master(pci_dev);
1241 
1242         /* Set the PCI DMA mask.  Try all possibilities from our genuine mask
1243          * down to 32 bits, because some architectures will allow 40 bit
1244          * masks event though they reject 46 bit masks.
1245          */
1246         while (dma_mask > 0x7fffffffUL) {
1247                 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1248                 if (rc == 0)
1249                         break;
1250                 dma_mask >>= 1;
1251         }
1252         if (rc) {
1253                 netif_err(efx, probe, efx->net_dev,
1254                           "could not find a suitable DMA mask\n");
1255                 goto fail2;
1256         }
1257         netif_dbg(efx, probe, efx->net_dev,
1258                   "using DMA mask %llx\n", (unsigned long long) dma_mask);
1259 
1260         efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1261         rc = pci_request_region(pci_dev, bar, "sfc");
1262         if (rc) {
1263                 netif_err(efx, probe, efx->net_dev,
1264                           "request for memory BAR failed\n");
1265                 rc = -EIO;
1266                 goto fail3;
1267         }
1268         efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1269         if (!efx->membase) {
1270                 netif_err(efx, probe, efx->net_dev,
1271                           "could not map memory BAR at %llx+%x\n",
1272                           (unsigned long long)efx->membase_phys, mem_map_size);
1273                 rc = -ENOMEM;
1274                 goto fail4;
1275         }
1276         netif_dbg(efx, probe, efx->net_dev,
1277                   "memory BAR at %llx+%x (virtual %p)\n",
1278                   (unsigned long long)efx->membase_phys, mem_map_size,
1279                   efx->membase);
1280 
1281         return 0;
1282 
1283  fail4:
1284         pci_release_region(efx->pci_dev, bar);
1285  fail3:
1286         efx->membase_phys = 0;
1287  fail2:
1288         pci_disable_device(efx->pci_dev);
1289  fail1:
1290         return rc;
1291 }
1292 
1293 static void ef4_fini_io(struct ef4_nic *efx)
1294 {
1295         int bar;
1296 
1297         netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1298 
1299         if (efx->membase) {
1300                 iounmap(efx->membase);
1301                 efx->membase = NULL;
1302         }
1303 
1304         if (efx->membase_phys) {
1305                 bar = efx->type->mem_bar;
1306                 pci_release_region(efx->pci_dev, bar);
1307                 efx->membase_phys = 0;
1308         }
1309 
1310         /* Don't disable bus-mastering if VFs are assigned */
1311         if (!pci_vfs_assigned(efx->pci_dev))
1312                 pci_disable_device(efx->pci_dev);
1313 }
1314 
1315 void ef4_set_default_rx_indir_table(struct ef4_nic *efx)
1316 {
1317         size_t i;
1318 
1319         for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1320                 efx->rx_indir_table[i] =
1321                         ethtool_rxfh_indir_default(i, efx->rss_spread);
1322 }
1323 
1324 static unsigned int ef4_wanted_parallelism(struct ef4_nic *efx)
1325 {
1326         cpumask_var_t thread_mask;
1327         unsigned int count;
1328         int cpu;
1329 
1330         if (rss_cpus) {
1331                 count = rss_cpus;
1332         } else {
1333                 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1334                         netif_warn(efx, probe, efx->net_dev,
1335                                    "RSS disabled due to allocation failure\n");
1336                         return 1;
1337                 }
1338 
1339                 count = 0;
1340                 for_each_online_cpu(cpu) {
1341                         if (!cpumask_test_cpu(cpu, thread_mask)) {
1342                                 ++count;
1343                                 cpumask_or(thread_mask, thread_mask,
1344                                            topology_sibling_cpumask(cpu));
1345                         }
1346                 }
1347 
1348                 free_cpumask_var(thread_mask);
1349         }
1350 
1351         if (count > EF4_MAX_RX_QUEUES) {
1352                 netif_cond_dbg(efx, probe, efx->net_dev, !rss_cpus, warn,
1353                                "Reducing number of rx queues from %u to %u.\n",
1354                                count, EF4_MAX_RX_QUEUES);
1355                 count = EF4_MAX_RX_QUEUES;
1356         }
1357 
1358         return count;
1359 }
1360 
1361 /* Probe the number and type of interrupts we are able to obtain, and
1362  * the resulting numbers of channels and RX queues.
1363  */
1364 static int ef4_probe_interrupts(struct ef4_nic *efx)
1365 {
1366         unsigned int extra_channels = 0;
1367         unsigned int i, j;
1368         int rc;
1369 
1370         for (i = 0; i < EF4_MAX_EXTRA_CHANNELS; i++)
1371                 if (efx->extra_channel_type[i])
1372                         ++extra_channels;
1373 
1374         if (efx->interrupt_mode == EF4_INT_MODE_MSIX) {
1375                 struct msix_entry xentries[EF4_MAX_CHANNELS];
1376                 unsigned int n_channels;
1377 
1378                 n_channels = ef4_wanted_parallelism(efx);
1379                 if (ef4_separate_tx_channels)
1380                         n_channels *= 2;
1381                 n_channels += extra_channels;
1382                 n_channels = min(n_channels, efx->max_channels);
1383 
1384                 for (i = 0; i < n_channels; i++)
1385                         xentries[i].entry = i;
1386                 rc = pci_enable_msix_range(efx->pci_dev,
1387                                            xentries, 1, n_channels);
1388                 if (rc < 0) {
1389                         /* Fall back to single channel MSI */
1390                         efx->interrupt_mode = EF4_INT_MODE_MSI;
1391                         netif_err(efx, drv, efx->net_dev,
1392                                   "could not enable MSI-X\n");
1393                 } else if (rc < n_channels) {
1394                         netif_err(efx, drv, efx->net_dev,
1395                                   "WARNING: Insufficient MSI-X vectors"
1396                                   " available (%d < %u).\n", rc, n_channels);
1397                         netif_err(efx, drv, efx->net_dev,
1398                                   "WARNING: Performance may be reduced.\n");
1399                         n_channels = rc;
1400                 }
1401 
1402                 if (rc > 0) {
1403                         efx->n_channels = n_channels;
1404                         if (n_channels > extra_channels)
1405                                 n_channels -= extra_channels;
1406                         if (ef4_separate_tx_channels) {
1407                                 efx->n_tx_channels = min(max(n_channels / 2,
1408                                                              1U),
1409                                                          efx->max_tx_channels);
1410                                 efx->n_rx_channels = max(n_channels -
1411                                                          efx->n_tx_channels,
1412                                                          1U);
1413                         } else {
1414                                 efx->n_tx_channels = min(n_channels,
1415                                                          efx->max_tx_channels);
1416                                 efx->n_rx_channels = n_channels;
1417                         }
1418                         for (i = 0; i < efx->n_channels; i++)
1419                                 ef4_get_channel(efx, i)->irq =
1420                                         xentries[i].vector;
1421                 }
1422         }
1423 
1424         /* Try single interrupt MSI */
1425         if (efx->interrupt_mode == EF4_INT_MODE_MSI) {
1426                 efx->n_channels = 1;
1427                 efx->n_rx_channels = 1;
1428                 efx->n_tx_channels = 1;
1429                 rc = pci_enable_msi(efx->pci_dev);
1430                 if (rc == 0) {
1431                         ef4_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1432                 } else {
1433                         netif_err(efx, drv, efx->net_dev,
1434                                   "could not enable MSI\n");
1435                         efx->interrupt_mode = EF4_INT_MODE_LEGACY;
1436                 }
1437         }
1438 
1439         /* Assume legacy interrupts */
1440         if (efx->interrupt_mode == EF4_INT_MODE_LEGACY) {
1441                 efx->n_channels = 1 + (ef4_separate_tx_channels ? 1 : 0);
1442                 efx->n_rx_channels = 1;
1443                 efx->n_tx_channels = 1;
1444                 efx->legacy_irq = efx->pci_dev->irq;
1445         }
1446 
1447         /* Assign extra channels if possible */
1448         j = efx->n_channels;
1449         for (i = 0; i < EF4_MAX_EXTRA_CHANNELS; i++) {
1450                 if (!efx->extra_channel_type[i])
1451                         continue;
1452                 if (efx->interrupt_mode != EF4_INT_MODE_MSIX ||
1453                     efx->n_channels <= extra_channels) {
1454                         efx->extra_channel_type[i]->handle_no_channel(efx);
1455                 } else {
1456                         --j;
1457                         ef4_get_channel(efx, j)->type =
1458                                 efx->extra_channel_type[i];
1459                 }
1460         }
1461 
1462         efx->rss_spread = efx->n_rx_channels;
1463 
1464         return 0;
1465 }
1466 
1467 static int ef4_soft_enable_interrupts(struct ef4_nic *efx)
1468 {
1469         struct ef4_channel *channel, *end_channel;
1470         int rc;
1471 
1472         BUG_ON(efx->state == STATE_DISABLED);
1473 
1474         efx->irq_soft_enabled = true;
1475         smp_wmb();
1476 
1477         ef4_for_each_channel(channel, efx) {
1478                 if (!channel->type->keep_eventq) {
1479                         rc = ef4_init_eventq(channel);
1480                         if (rc)
1481                                 goto fail;
1482                 }
1483                 ef4_start_eventq(channel);
1484         }
1485 
1486         return 0;
1487 fail:
1488         end_channel = channel;
1489         ef4_for_each_channel(channel, efx) {
1490                 if (channel == end_channel)
1491                         break;
1492                 ef4_stop_eventq(channel);
1493                 if (!channel->type->keep_eventq)
1494                         ef4_fini_eventq(channel);
1495         }
1496 
1497         return rc;
1498 }
1499 
1500 static void ef4_soft_disable_interrupts(struct ef4_nic *efx)
1501 {
1502         struct ef4_channel *channel;
1503 
1504         if (efx->state == STATE_DISABLED)
1505                 return;
1506 
1507         efx->irq_soft_enabled = false;
1508         smp_wmb();
1509 
1510         if (efx->legacy_irq)
1511                 synchronize_irq(efx->legacy_irq);
1512 
1513         ef4_for_each_channel(channel, efx) {
1514                 if (channel->irq)
1515                         synchronize_irq(channel->irq);
1516 
1517                 ef4_stop_eventq(channel);
1518                 if (!channel->type->keep_eventq)
1519                         ef4_fini_eventq(channel);
1520         }
1521 }
1522 
1523 static int ef4_enable_interrupts(struct ef4_nic *efx)
1524 {
1525         struct ef4_channel *channel, *end_channel;
1526         int rc;
1527 
1528         BUG_ON(efx->state == STATE_DISABLED);
1529 
1530         if (efx->eeh_disabled_legacy_irq) {
1531                 enable_irq(efx->legacy_irq);
1532                 efx->eeh_disabled_legacy_irq = false;
1533         }
1534 
1535         efx->type->irq_enable_master(efx);
1536 
1537         ef4_for_each_channel(channel, efx) {
1538                 if (channel->type->keep_eventq) {
1539                         rc = ef4_init_eventq(channel);
1540                         if (rc)
1541                                 goto fail;
1542                 }
1543         }
1544 
1545         rc = ef4_soft_enable_interrupts(efx);
1546         if (rc)
1547                 goto fail;
1548 
1549         return 0;
1550 
1551 fail:
1552         end_channel = channel;
1553         ef4_for_each_channel(channel, efx) {
1554                 if (channel == end_channel)
1555                         break;
1556                 if (channel->type->keep_eventq)
1557                         ef4_fini_eventq(channel);
1558         }
1559 
1560         efx->type->irq_disable_non_ev(efx);
1561 
1562         return rc;
1563 }
1564 
1565 static void ef4_disable_interrupts(struct ef4_nic *efx)
1566 {
1567         struct ef4_channel *channel;
1568 
1569         ef4_soft_disable_interrupts(efx);
1570 
1571         ef4_for_each_channel(channel, efx) {
1572                 if (channel->type->keep_eventq)
1573                         ef4_fini_eventq(channel);
1574         }
1575 
1576         efx->type->irq_disable_non_ev(efx);
1577 }
1578 
1579 static void ef4_remove_interrupts(struct ef4_nic *efx)
1580 {
1581         struct ef4_channel *channel;
1582 
1583         /* Remove MSI/MSI-X interrupts */
1584         ef4_for_each_channel(channel, efx)
1585                 channel->irq = 0;
1586         pci_disable_msi(efx->pci_dev);
1587         pci_disable_msix(efx->pci_dev);
1588 
1589         /* Remove legacy interrupt */
1590         efx->legacy_irq = 0;
1591 }
1592 
1593 static void ef4_set_channels(struct ef4_nic *efx)
1594 {
1595         struct ef4_channel *channel;
1596         struct ef4_tx_queue *tx_queue;
1597 
1598         efx->tx_channel_offset =
1599                 ef4_separate_tx_channels ?
1600                 efx->n_channels - efx->n_tx_channels : 0;
1601 
1602         /* We need to mark which channels really have RX and TX
1603          * queues, and adjust the TX queue numbers if we have separate
1604          * RX-only and TX-only channels.
1605          */
1606         ef4_for_each_channel(channel, efx) {
1607                 if (channel->channel < efx->n_rx_channels)
1608                         channel->rx_queue.core_index = channel->channel;
1609                 else
1610                         channel->rx_queue.core_index = -1;
1611 
1612                 ef4_for_each_channel_tx_queue(tx_queue, channel)
1613                         tx_queue->queue -= (efx->tx_channel_offset *
1614                                             EF4_TXQ_TYPES);
1615         }
1616 }
1617 
1618 static int ef4_probe_nic(struct ef4_nic *efx)
1619 {
1620         int rc;
1621 
1622         netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1623 
1624         /* Carry out hardware-type specific initialisation */
1625         rc = efx->type->probe(efx);
1626         if (rc)
1627                 return rc;
1628 
1629         do {
1630                 if (!efx->max_channels || !efx->max_tx_channels) {
1631                         netif_err(efx, drv, efx->net_dev,
1632                                   "Insufficient resources to allocate"
1633                                   " any channels\n");
1634                         rc = -ENOSPC;
1635                         goto fail1;
1636                 }
1637 
1638                 /* Determine the number of channels and queues by trying
1639                  * to hook in MSI-X interrupts.
1640                  */
1641                 rc = ef4_probe_interrupts(efx);
1642                 if (rc)
1643                         goto fail1;
1644 
1645                 ef4_set_channels(efx);
1646 
1647                 /* dimension_resources can fail with EAGAIN */
1648                 rc = efx->type->dimension_resources(efx);
1649                 if (rc != 0 && rc != -EAGAIN)
1650                         goto fail2;
1651 
1652                 if (rc == -EAGAIN)
1653                         /* try again with new max_channels */
1654                         ef4_remove_interrupts(efx);
1655 
1656         } while (rc == -EAGAIN);
1657 
1658         if (efx->n_channels > 1)
1659                 netdev_rss_key_fill(&efx->rx_hash_key,
1660                                     sizeof(efx->rx_hash_key));
1661         ef4_set_default_rx_indir_table(efx);
1662 
1663         netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1664         netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1665 
1666         /* Initialise the interrupt moderation settings */
1667         efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000);
1668         ef4_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1669                                 true);
1670 
1671         return 0;
1672 
1673 fail2:
1674         ef4_remove_interrupts(efx);
1675 fail1:
1676         efx->type->remove(efx);
1677         return rc;
1678 }
1679 
1680 static void ef4_remove_nic(struct ef4_nic *efx)
1681 {
1682         netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1683 
1684         ef4_remove_interrupts(efx);
1685         efx->type->remove(efx);
1686 }
1687 
1688 static int ef4_probe_filters(struct ef4_nic *efx)
1689 {
1690         int rc;
1691 
1692         spin_lock_init(&efx->filter_lock);
1693         init_rwsem(&efx->filter_sem);
1694         mutex_lock(&efx->mac_lock);
1695         down_write(&efx->filter_sem);
1696         rc = efx->type->filter_table_probe(efx);
1697         if (rc)
1698                 goto out_unlock;
1699 
1700 #ifdef CONFIG_RFS_ACCEL
1701         if (efx->type->offload_features & NETIF_F_NTUPLE) {
1702                 struct ef4_channel *channel;
1703                 int i, success = 1;
1704 
1705                 ef4_for_each_channel(channel, efx) {
1706                         channel->rps_flow_id =
1707                                 kcalloc(efx->type->max_rx_ip_filters,
1708                                         sizeof(*channel->rps_flow_id),
1709                                         GFP_KERNEL);
1710                         if (!channel->rps_flow_id)
1711                                 success = 0;
1712                         else
1713                                 for (i = 0;
1714                                      i < efx->type->max_rx_ip_filters;
1715                                      ++i)
1716                                         channel->rps_flow_id[i] =
1717                                                 RPS_FLOW_ID_INVALID;
1718                 }
1719 
1720                 if (!success) {
1721                         ef4_for_each_channel(channel, efx)
1722                                 kfree(channel->rps_flow_id);
1723                         efx->type->filter_table_remove(efx);
1724                         rc = -ENOMEM;
1725                         goto out_unlock;
1726                 }
1727 
1728                 efx->rps_expire_index = efx->rps_expire_channel = 0;
1729         }
1730 #endif
1731 out_unlock:
1732         up_write(&efx->filter_sem);
1733         mutex_unlock(&efx->mac_lock);
1734         return rc;
1735 }
1736 
1737 static void ef4_remove_filters(struct ef4_nic *efx)
1738 {
1739 #ifdef CONFIG_RFS_ACCEL
1740         struct ef4_channel *channel;
1741 
1742         ef4_for_each_channel(channel, efx)
1743                 kfree(channel->rps_flow_id);
1744 #endif
1745         down_write(&efx->filter_sem);
1746         efx->type->filter_table_remove(efx);
1747         up_write(&efx->filter_sem);
1748 }
1749 
1750 static void ef4_restore_filters(struct ef4_nic *efx)
1751 {
1752         down_read(&efx->filter_sem);
1753         efx->type->filter_table_restore(efx);
1754         up_read(&efx->filter_sem);
1755 }
1756 
1757 /**************************************************************************
1758  *
1759  * NIC startup/shutdown
1760  *
1761  *************************************************************************/
1762 
1763 static int ef4_probe_all(struct ef4_nic *efx)
1764 {
1765         int rc;
1766 
1767         rc = ef4_probe_nic(efx);
1768         if (rc) {
1769                 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1770                 goto fail1;
1771         }
1772 
1773         rc = ef4_probe_port(efx);
1774         if (rc) {
1775                 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1776                 goto fail2;
1777         }
1778 
1779         BUILD_BUG_ON(EF4_DEFAULT_DMAQ_SIZE < EF4_RXQ_MIN_ENT);
1780         if (WARN_ON(EF4_DEFAULT_DMAQ_SIZE < EF4_TXQ_MIN_ENT(efx))) {
1781                 rc = -EINVAL;
1782                 goto fail3;
1783         }
1784         efx->rxq_entries = efx->txq_entries = EF4_DEFAULT_DMAQ_SIZE;
1785 
1786         rc = ef4_probe_filters(efx);
1787         if (rc) {
1788                 netif_err(efx, probe, efx->net_dev,
1789                           "failed to create filter tables\n");
1790                 goto fail4;
1791         }
1792 
1793         rc = ef4_probe_channels(efx);
1794         if (rc)
1795                 goto fail5;
1796 
1797         return 0;
1798 
1799  fail5:
1800         ef4_remove_filters(efx);
1801  fail4:
1802  fail3:
1803         ef4_remove_port(efx);
1804  fail2:
1805         ef4_remove_nic(efx);
1806  fail1:
1807         return rc;
1808 }
1809 
1810 /* If the interface is supposed to be running but is not, start
1811  * the hardware and software data path, regular activity for the port
1812  * (MAC statistics, link polling, etc.) and schedule the port to be
1813  * reconfigured.  Interrupts must already be enabled.  This function
1814  * is safe to call multiple times, so long as the NIC is not disabled.
1815  * Requires the RTNL lock.
1816  */
1817 static void ef4_start_all(struct ef4_nic *efx)
1818 {
1819         EF4_ASSERT_RESET_SERIALISED(efx);
1820         BUG_ON(efx->state == STATE_DISABLED);
1821 
1822         /* Check that it is appropriate to restart the interface. All
1823          * of these flags are safe to read under just the rtnl lock */
1824         if (efx->port_enabled || !netif_running(efx->net_dev) ||
1825             efx->reset_pending)
1826                 return;
1827 
1828         ef4_start_port(efx);
1829         ef4_start_datapath(efx);
1830 
1831         /* Start the hardware monitor if there is one */
1832         if (efx->type->monitor != NULL)
1833                 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1834                                    ef4_monitor_interval);
1835 
1836         efx->type->start_stats(efx);
1837         efx->type->pull_stats(efx);
1838         spin_lock_bh(&efx->stats_lock);
1839         efx->type->update_stats(efx, NULL, NULL);
1840         spin_unlock_bh(&efx->stats_lock);
1841 }
1842 
1843 /* Quiesce the hardware and software data path, and regular activity
1844  * for the port without bringing the link down.  Safe to call multiple
1845  * times with the NIC in almost any state, but interrupts should be
1846  * enabled.  Requires the RTNL lock.
1847  */
1848 static void ef4_stop_all(struct ef4_nic *efx)
1849 {
1850         EF4_ASSERT_RESET_SERIALISED(efx);
1851 
1852         /* port_enabled can be read safely under the rtnl lock */
1853         if (!efx->port_enabled)
1854                 return;
1855 
1856         /* update stats before we go down so we can accurately count
1857          * rx_nodesc_drops
1858          */
1859         efx->type->pull_stats(efx);
1860         spin_lock_bh(&efx->stats_lock);
1861         efx->type->update_stats(efx, NULL, NULL);
1862         spin_unlock_bh(&efx->stats_lock);
1863         efx->type->stop_stats(efx);
1864         ef4_stop_port(efx);
1865 
1866         /* Stop the kernel transmit interface.  This is only valid if
1867          * the device is stopped or detached; otherwise the watchdog
1868          * may fire immediately.
1869          */
1870         WARN_ON(netif_running(efx->net_dev) &&
1871                 netif_device_present(efx->net_dev));
1872         netif_tx_disable(efx->net_dev);
1873 
1874         ef4_stop_datapath(efx);
1875 }
1876 
1877 static void ef4_remove_all(struct ef4_nic *efx)
1878 {
1879         ef4_remove_channels(efx);
1880         ef4_remove_filters(efx);
1881         ef4_remove_port(efx);
1882         ef4_remove_nic(efx);
1883 }
1884 
1885 /**************************************************************************
1886  *
1887  * Interrupt moderation
1888  *
1889  **************************************************************************/
1890 unsigned int ef4_usecs_to_ticks(struct ef4_nic *efx, unsigned int usecs)
1891 {
1892         if (usecs == 0)
1893                 return 0;
1894         if (usecs * 1000 < efx->timer_quantum_ns)
1895                 return 1; /* never round down to 0 */
1896         return usecs * 1000 / efx->timer_quantum_ns;
1897 }
1898 
1899 unsigned int ef4_ticks_to_usecs(struct ef4_nic *efx, unsigned int ticks)
1900 {
1901         /* We must round up when converting ticks to microseconds
1902          * because we round down when converting the other way.
1903          */
1904         return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000);
1905 }
1906 
1907 /* Set interrupt moderation parameters */
1908 int ef4_init_irq_moderation(struct ef4_nic *efx, unsigned int tx_usecs,
1909                             unsigned int rx_usecs, bool rx_adaptive,
1910                             bool rx_may_override_tx)
1911 {
1912         struct ef4_channel *channel;
1913         unsigned int timer_max_us;
1914 
1915         EF4_ASSERT_RESET_SERIALISED(efx);
1916 
1917         timer_max_us = efx->timer_max_ns / 1000;
1918 
1919         if (tx_usecs > timer_max_us || rx_usecs > timer_max_us)
1920                 return -EINVAL;
1921 
1922         if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 &&
1923             !rx_may_override_tx) {
1924                 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1925                           "RX and TX IRQ moderation must be equal\n");
1926                 return -EINVAL;
1927         }
1928 
1929         efx->irq_rx_adaptive = rx_adaptive;
1930         efx->irq_rx_moderation_us = rx_usecs;
1931         ef4_for_each_channel(channel, efx) {
1932                 if (ef4_channel_has_rx_queue(channel))
1933                         channel->irq_moderation_us = rx_usecs;
1934                 else if (ef4_channel_has_tx_queues(channel))
1935                         channel->irq_moderation_us = tx_usecs;
1936         }
1937 
1938         return 0;
1939 }
1940 
1941 void ef4_get_irq_moderation(struct ef4_nic *efx, unsigned int *tx_usecs,
1942                             unsigned int *rx_usecs, bool *rx_adaptive)
1943 {
1944         *rx_adaptive = efx->irq_rx_adaptive;
1945         *rx_usecs = efx->irq_rx_moderation_us;
1946 
1947         /* If channels are shared between RX and TX, so is IRQ
1948          * moderation.  Otherwise, IRQ moderation is the same for all
1949          * TX channels and is not adaptive.
1950          */
1951         if (efx->tx_channel_offset == 0) {
1952                 *tx_usecs = *rx_usecs;
1953         } else {
1954                 struct ef4_channel *tx_channel;
1955 
1956                 tx_channel = efx->channel[efx->tx_channel_offset];
1957                 *tx_usecs = tx_channel->irq_moderation_us;
1958         }
1959 }
1960 
1961 /**************************************************************************
1962  *
1963  * Hardware monitor
1964  *
1965  **************************************************************************/
1966 
1967 /* Run periodically off the general workqueue */
1968 static void ef4_monitor(struct work_struct *data)
1969 {
1970         struct ef4_nic *efx = container_of(data, struct ef4_nic,
1971                                            monitor_work.work);
1972 
1973         netif_vdbg(efx, timer, efx->net_dev,
1974                    "hardware monitor executing on CPU %d\n",
1975                    raw_smp_processor_id());
1976         BUG_ON(efx->type->monitor == NULL);
1977 
1978         /* If the mac_lock is already held then it is likely a port
1979          * reconfiguration is already in place, which will likely do
1980          * most of the work of monitor() anyway. */
1981         if (mutex_trylock(&efx->mac_lock)) {
1982                 if (efx->port_enabled)
1983                         efx->type->monitor(efx);
1984                 mutex_unlock(&efx->mac_lock);
1985         }
1986 
1987         queue_delayed_work(efx->workqueue, &efx->monitor_work,
1988                            ef4_monitor_interval);
1989 }
1990 
1991 /**************************************************************************
1992  *
1993  * ioctls
1994  *
1995  *************************************************************************/
1996 
1997 /* Net device ioctl
1998  * Context: process, rtnl_lock() held.
1999  */
2000 static int ef4_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
2001 {
2002         struct ef4_nic *efx = netdev_priv(net_dev);
2003         struct mii_ioctl_data *data = if_mii(ifr);
2004 
2005         /* Convert phy_id from older PRTAD/DEVAD format */
2006         if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
2007             (data->phy_id & 0xfc00) == 0x0400)
2008                 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
2009 
2010         return mdio_mii_ioctl(&efx->mdio, data, cmd);
2011 }
2012 
2013 /**************************************************************************
2014  *
2015  * NAPI interface
2016  *
2017  **************************************************************************/
2018 
2019 static void ef4_init_napi_channel(struct ef4_channel *channel)
2020 {
2021         struct ef4_nic *efx = channel->efx;
2022 
2023         channel->napi_dev = efx->net_dev;
2024         netif_napi_add(channel->napi_dev, &channel->napi_str,
2025                        ef4_poll, napi_weight);
2026 }
2027 
2028 static void ef4_init_napi(struct ef4_nic *efx)
2029 {
2030         struct ef4_channel *channel;
2031 
2032         ef4_for_each_channel(channel, efx)
2033                 ef4_init_napi_channel(channel);
2034 }
2035 
2036 static void ef4_fini_napi_channel(struct ef4_channel *channel)
2037 {
2038         if (channel->napi_dev)
2039                 netif_napi_del(&channel->napi_str);
2040 
2041         channel->napi_dev = NULL;
2042 }
2043 
2044 static void ef4_fini_napi(struct ef4_nic *efx)
2045 {
2046         struct ef4_channel *channel;
2047 
2048         ef4_for_each_channel(channel, efx)
2049                 ef4_fini_napi_channel(channel);
2050 }
2051 
2052 /**************************************************************************
2053  *
2054  * Kernel net device interface
2055  *
2056  *************************************************************************/
2057 
2058 /* Context: process, rtnl_lock() held. */
2059 int ef4_net_open(struct net_device *net_dev)
2060 {
2061         struct ef4_nic *efx = netdev_priv(net_dev);
2062         int rc;
2063 
2064         netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2065                   raw_smp_processor_id());
2066 
2067         rc = ef4_check_disabled(efx);
2068         if (rc)
2069                 return rc;
2070         if (efx->phy_mode & PHY_MODE_SPECIAL)
2071                 return -EBUSY;
2072 
2073         /* Notify the kernel of the link state polled during driver load,
2074          * before the monitor starts running */
2075         ef4_link_status_changed(efx);
2076 
2077         ef4_start_all(efx);
2078         ef4_selftest_async_start(efx);
2079         return 0;
2080 }
2081 
2082 /* Context: process, rtnl_lock() held.
2083  * Note that the kernel will ignore our return code; this method
2084  * should really be a void.
2085  */
2086 int ef4_net_stop(struct net_device *net_dev)
2087 {
2088         struct ef4_nic *efx = netdev_priv(net_dev);
2089 
2090         netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2091                   raw_smp_processor_id());
2092 
2093         /* Stop the device and flush all the channels */
2094         ef4_stop_all(efx);
2095 
2096         return 0;
2097 }
2098 
2099 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2100 static void ef4_net_stats(struct net_device *net_dev,
2101                           struct rtnl_link_stats64 *stats)
2102 {
2103         struct ef4_nic *efx = netdev_priv(net_dev);
2104 
2105         spin_lock_bh(&efx->stats_lock);
2106         efx->type->update_stats(efx, NULL, stats);
2107         spin_unlock_bh(&efx->stats_lock);
2108 }
2109 
2110 /* Context: netif_tx_lock held, BHs disabled. */
2111 static void ef4_watchdog(struct net_device *net_dev)
2112 {
2113         struct ef4_nic *efx = netdev_priv(net_dev);
2114 
2115         netif_err(efx, tx_err, efx->net_dev,
2116                   "TX stuck with port_enabled=%d: resetting channels\n",
2117                   efx->port_enabled);
2118 
2119         ef4_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2120 }
2121 
2122 
2123 /* Context: process, rtnl_lock() held. */
2124 static int ef4_change_mtu(struct net_device *net_dev, int new_mtu)
2125 {
2126         struct ef4_nic *efx = netdev_priv(net_dev);
2127         int rc;
2128 
2129         rc = ef4_check_disabled(efx);
2130         if (rc)
2131                 return rc;
2132 
2133         netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2134 
2135         ef4_device_detach_sync(efx);
2136         ef4_stop_all(efx);
2137 
2138         mutex_lock(&efx->mac_lock);
2139         net_dev->mtu = new_mtu;
2140         ef4_mac_reconfigure(efx);
2141         mutex_unlock(&efx->mac_lock);
2142 
2143         ef4_start_all(efx);
2144         netif_device_attach(efx->net_dev);
2145         return 0;
2146 }
2147 
2148 static int ef4_set_mac_address(struct net_device *net_dev, void *data)
2149 {
2150         struct ef4_nic *efx = netdev_priv(net_dev);
2151         struct sockaddr *addr = data;
2152         u8 *new_addr = addr->sa_data;
2153         u8 old_addr[6];
2154         int rc;
2155 
2156         if (!is_valid_ether_addr(new_addr)) {
2157                 netif_err(efx, drv, efx->net_dev,
2158                           "invalid ethernet MAC address requested: %pM\n",
2159                           new_addr);
2160                 return -EADDRNOTAVAIL;
2161         }
2162 
2163         /* save old address */
2164         ether_addr_copy(old_addr, net_dev->dev_addr);
2165         ether_addr_copy(net_dev->dev_addr, new_addr);
2166         if (efx->type->set_mac_address) {
2167                 rc = efx->type->set_mac_address(efx);
2168                 if (rc) {
2169                         ether_addr_copy(net_dev->dev_addr, old_addr);
2170                         return rc;
2171                 }
2172         }
2173 
2174         /* Reconfigure the MAC */
2175         mutex_lock(&efx->mac_lock);
2176         ef4_mac_reconfigure(efx);
2177         mutex_unlock(&efx->mac_lock);
2178 
2179         return 0;
2180 }
2181 
2182 /* Context: netif_addr_lock held, BHs disabled. */
2183 static void ef4_set_rx_mode(struct net_device *net_dev)
2184 {
2185         struct ef4_nic *efx = netdev_priv(net_dev);
2186 
2187         if (efx->port_enabled)
2188                 queue_work(efx->workqueue, &efx->mac_work);
2189         /* Otherwise ef4_start_port() will do this */
2190 }
2191 
2192 static int ef4_set_features(struct net_device *net_dev, netdev_features_t data)
2193 {
2194         struct ef4_nic *efx = netdev_priv(net_dev);
2195         int rc;
2196 
2197         /* If disabling RX n-tuple filtering, clear existing filters */
2198         if (net_dev->features & ~data & NETIF_F_NTUPLE) {
2199                 rc = efx->type->filter_clear_rx(efx, EF4_FILTER_PRI_MANUAL);
2200                 if (rc)
2201                         return rc;
2202         }
2203 
2204         /* If Rx VLAN filter is changed, update filters via mac_reconfigure */
2205         if ((net_dev->features ^ data) & NETIF_F_HW_VLAN_CTAG_FILTER) {
2206                 /* ef4_set_rx_mode() will schedule MAC work to update filters
2207                  * when a new features are finally set in net_dev.
2208                  */
2209                 ef4_set_rx_mode(net_dev);
2210         }
2211 
2212         return 0;
2213 }
2214 
2215 static const struct net_device_ops ef4_netdev_ops = {
2216         .ndo_open               = ef4_net_open,
2217         .ndo_stop               = ef4_net_stop,
2218         .ndo_get_stats64        = ef4_net_stats,
2219         .ndo_tx_timeout         = ef4_watchdog,
2220         .ndo_start_xmit         = ef4_hard_start_xmit,
2221         .ndo_validate_addr      = eth_validate_addr,
2222         .ndo_do_ioctl           = ef4_ioctl,
2223         .ndo_change_mtu         = ef4_change_mtu,
2224         .ndo_set_mac_address    = ef4_set_mac_address,
2225         .ndo_set_rx_mode        = ef4_set_rx_mode,
2226         .ndo_set_features       = ef4_set_features,
2227         .ndo_setup_tc           = ef4_setup_tc,
2228 #ifdef CONFIG_RFS_ACCEL
2229         .ndo_rx_flow_steer      = ef4_filter_rfs,
2230 #endif
2231 };
2232 
2233 static void ef4_update_name(struct ef4_nic *efx)
2234 {
2235         strcpy(efx->name, efx->net_dev->name);
2236         ef4_mtd_rename(efx);
2237         ef4_set_channel_names(efx);
2238 }
2239 
2240 static int ef4_netdev_event(struct notifier_block *this,
2241                             unsigned long event, void *ptr)
2242 {
2243         struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2244 
2245         if ((net_dev->netdev_ops == &ef4_netdev_ops) &&
2246             event == NETDEV_CHANGENAME)
2247                 ef4_update_name(netdev_priv(net_dev));
2248 
2249         return NOTIFY_DONE;
2250 }
2251 
2252 static struct notifier_block ef4_netdev_notifier = {
2253         .notifier_call = ef4_netdev_event,
2254 };
2255 
2256 static ssize_t
2257 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2258 {
2259         struct ef4_nic *efx = dev_get_drvdata(dev);
2260         return sprintf(buf, "%d\n", efx->phy_type);
2261 }
2262 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2263 
2264 static int ef4_register_netdev(struct ef4_nic *efx)
2265 {
2266         struct net_device *net_dev = efx->net_dev;
2267         struct ef4_channel *channel;
2268         int rc;
2269 
2270         net_dev->watchdog_timeo = 5 * HZ;
2271         net_dev->irq = efx->pci_dev->irq;
2272         net_dev->netdev_ops = &ef4_netdev_ops;
2273         net_dev->ethtool_ops = &ef4_ethtool_ops;
2274         net_dev->gso_max_segs = EF4_TSO_MAX_SEGS;
2275         net_dev->min_mtu = EF4_MIN_MTU;
2276         net_dev->max_mtu = EF4_MAX_MTU;
2277 
2278         rtnl_lock();
2279 
2280         /* Enable resets to be scheduled and check whether any were
2281          * already requested.  If so, the NIC is probably hosed so we
2282          * abort.
2283          */
2284         efx->state = STATE_READY;
2285         smp_mb(); /* ensure we change state before checking reset_pending */
2286         if (efx->reset_pending) {
2287                 netif_err(efx, probe, efx->net_dev,
2288                           "aborting probe due to scheduled reset\n");
2289                 rc = -EIO;
2290                 goto fail_locked;
2291         }
2292 
2293         rc = dev_alloc_name(net_dev, net_dev->name);
2294         if (rc < 0)
2295                 goto fail_locked;
2296         ef4_update_name(efx);
2297 
2298         /* Always start with carrier off; PHY events will detect the link */
2299         netif_carrier_off(net_dev);
2300 
2301         rc = register_netdevice(net_dev);
2302         if (rc)
2303                 goto fail_locked;
2304 
2305         ef4_for_each_channel(channel, efx) {
2306                 struct ef4_tx_queue *tx_queue;
2307                 ef4_for_each_channel_tx_queue(tx_queue, channel)
2308                         ef4_init_tx_queue_core_txq(tx_queue);
2309         }
2310 
2311         ef4_associate(efx);
2312 
2313         rtnl_unlock();
2314 
2315         rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2316         if (rc) {
2317                 netif_err(efx, drv, efx->net_dev,
2318                           "failed to init net dev attributes\n");
2319                 goto fail_registered;
2320         }
2321         return 0;
2322 
2323 fail_registered:
2324         rtnl_lock();
2325         ef4_dissociate(efx);
2326         unregister_netdevice(net_dev);
2327 fail_locked:
2328         efx->state = STATE_UNINIT;
2329         rtnl_unlock();
2330         netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2331         return rc;
2332 }
2333 
2334 static void ef4_unregister_netdev(struct ef4_nic *efx)
2335 {
2336         if (!efx->net_dev)
2337                 return;
2338 
2339         BUG_ON(netdev_priv(efx->net_dev) != efx);
2340 
2341         if (ef4_dev_registered(efx)) {
2342                 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2343                 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2344                 unregister_netdev(efx->net_dev);
2345         }
2346 }
2347 
2348 /**************************************************************************
2349  *
2350  * Device reset and suspend
2351  *
2352  **************************************************************************/
2353 
2354 /* Tears down the entire software state and most of the hardware state
2355  * before reset.  */
2356 void ef4_reset_down(struct ef4_nic *efx, enum reset_type method)
2357 {
2358         EF4_ASSERT_RESET_SERIALISED(efx);
2359 
2360         ef4_stop_all(efx);
2361         ef4_disable_interrupts(efx);
2362 
2363         mutex_lock(&efx->mac_lock);
2364         if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2365             method != RESET_TYPE_DATAPATH)
2366                 efx->phy_op->fini(efx);
2367         efx->type->fini(efx);
2368 }
2369 
2370 /* This function will always ensure that the locks acquired in
2371  * ef4_reset_down() are released. A failure return code indicates
2372  * that we were unable to reinitialise the hardware, and the
2373  * driver should be disabled. If ok is false, then the rx and tx
2374  * engines are not restarted, pending a RESET_DISABLE. */
2375 int ef4_reset_up(struct ef4_nic *efx, enum reset_type method, bool ok)
2376 {
2377         int rc;
2378 
2379         EF4_ASSERT_RESET_SERIALISED(efx);
2380 
2381         /* Ensure that SRAM is initialised even if we're disabling the device */
2382         rc = efx->type->init(efx);
2383         if (rc) {
2384                 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2385                 goto fail;
2386         }
2387 
2388         if (!ok)
2389                 goto fail;
2390 
2391         if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2392             method != RESET_TYPE_DATAPATH) {
2393                 rc = efx->phy_op->init(efx);
2394                 if (rc)
2395                         goto fail;
2396                 rc = efx->phy_op->reconfigure(efx);
2397                 if (rc && rc != -EPERM)
2398                         netif_err(efx, drv, efx->net_dev,
2399                                   "could not restore PHY settings\n");
2400         }
2401 
2402         rc = ef4_enable_interrupts(efx);
2403         if (rc)
2404                 goto fail;
2405 
2406         down_read(&efx->filter_sem);
2407         ef4_restore_filters(efx);
2408         up_read(&efx->filter_sem);
2409 
2410         mutex_unlock(&efx->mac_lock);
2411 
2412         ef4_start_all(efx);
2413 
2414         return 0;
2415 
2416 fail:
2417         efx->port_initialized = false;
2418 
2419         mutex_unlock(&efx->mac_lock);
2420 
2421         return rc;
2422 }
2423 
2424 /* Reset the NIC using the specified method.  Note that the reset may
2425  * fail, in which case the card will be left in an unusable state.
2426  *
2427  * Caller must hold the rtnl_lock.
2428  */
2429 int ef4_reset(struct ef4_nic *efx, enum reset_type method)
2430 {
2431         int rc, rc2;
2432         bool disabled;
2433 
2434         netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2435                    RESET_TYPE(method));
2436 
2437         ef4_device_detach_sync(efx);
2438         ef4_reset_down(efx, method);
2439 
2440         rc = efx->type->reset(efx, method);
2441         if (rc) {
2442                 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2443                 goto out;
2444         }
2445 
2446         /* Clear flags for the scopes we covered.  We assume the NIC and
2447          * driver are now quiescent so that there is no race here.
2448          */
2449         if (method < RESET_TYPE_MAX_METHOD)
2450                 efx->reset_pending &= -(1 << (method + 1));
2451         else /* it doesn't fit into the well-ordered scope hierarchy */
2452                 __clear_bit(method, &efx->reset_pending);
2453 
2454         /* Reinitialise bus-mastering, which may have been turned off before
2455          * the reset was scheduled. This is still appropriate, even in the
2456          * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2457          * can respond to requests. */
2458         pci_set_master(efx->pci_dev);
2459 
2460 out:
2461         /* Leave device stopped if necessary */
2462         disabled = rc ||
2463                 method == RESET_TYPE_DISABLE ||
2464                 method == RESET_TYPE_RECOVER_OR_DISABLE;
2465         rc2 = ef4_reset_up(efx, method, !disabled);
2466         if (rc2) {
2467                 disabled = true;
2468                 if (!rc)
2469                         rc = rc2;
2470         }
2471 
2472         if (disabled) {
2473                 dev_close(efx->net_dev);
2474                 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2475                 efx->state = STATE_DISABLED;
2476         } else {
2477                 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2478                 netif_device_attach(efx->net_dev);
2479         }
2480         return rc;
2481 }
2482 
2483 /* Try recovery mechanisms.
2484  * For now only EEH is supported.
2485  * Returns 0 if the recovery mechanisms are unsuccessful.
2486  * Returns a non-zero value otherwise.
2487  */
2488 int ef4_try_recovery(struct ef4_nic *efx)
2489 {
2490 #ifdef CONFIG_EEH
2491         /* A PCI error can occur and not be seen by EEH because nothing
2492          * happens on the PCI bus. In this case the driver may fail and
2493          * schedule a 'recover or reset', leading to this recovery handler.
2494          * Manually call the eeh failure check function.
2495          */
2496         struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
2497         if (eeh_dev_check_failure(eehdev)) {
2498                 /* The EEH mechanisms will handle the error and reset the
2499                  * device if necessary.
2500                  */
2501                 return 1;
2502         }
2503 #endif
2504         return 0;
2505 }
2506 
2507 /* The worker thread exists so that code that cannot sleep can
2508  * schedule a reset for later.
2509  */
2510 static void ef4_reset_work(struct work_struct *data)
2511 {
2512         struct ef4_nic *efx = container_of(data, struct ef4_nic, reset_work);
2513         unsigned long pending;
2514         enum reset_type method;
2515 
2516         pending = READ_ONCE(efx->reset_pending);
2517         method = fls(pending) - 1;
2518 
2519         if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2520              method == RESET_TYPE_RECOVER_OR_ALL) &&
2521             ef4_try_recovery(efx))
2522                 return;
2523 
2524         if (!pending)
2525                 return;
2526 
2527         rtnl_lock();
2528 
2529         /* We checked the state in ef4_schedule_reset() but it may
2530          * have changed by now.  Now that we have the RTNL lock,
2531          * it cannot change again.
2532          */
2533         if (efx->state == STATE_READY)
2534                 (void)ef4_reset(efx, method);
2535 
2536         rtnl_unlock();
2537 }
2538 
2539 void ef4_schedule_reset(struct ef4_nic *efx, enum reset_type type)
2540 {
2541         enum reset_type method;
2542 
2543         if (efx->state == STATE_RECOVERY) {
2544                 netif_dbg(efx, drv, efx->net_dev,
2545                           "recovering: skip scheduling %s reset\n",
2546                           RESET_TYPE(type));
2547                 return;
2548         }
2549 
2550         switch (type) {
2551         case RESET_TYPE_INVISIBLE:
2552         case RESET_TYPE_ALL:
2553         case RESET_TYPE_RECOVER_OR_ALL:
2554         case RESET_TYPE_WORLD:
2555         case RESET_TYPE_DISABLE:
2556         case RESET_TYPE_RECOVER_OR_DISABLE:
2557         case RESET_TYPE_DATAPATH:
2558                 method = type;
2559                 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2560                           RESET_TYPE(method));
2561                 break;
2562         default:
2563                 method = efx->type->map_reset_reason(type);
2564                 netif_dbg(efx, drv, efx->net_dev,
2565                           "scheduling %s reset for %s\n",
2566                           RESET_TYPE(method), RESET_TYPE(type));
2567                 break;
2568         }
2569 
2570         set_bit(method, &efx->reset_pending);
2571         smp_mb(); /* ensure we change reset_pending before checking state */
2572 
2573         /* If we're not READY then just leave the flags set as the cue
2574          * to abort probing or reschedule the reset later.
2575          */
2576         if (READ_ONCE(efx->state) != STATE_READY)
2577                 return;
2578 
2579         queue_work(reset_workqueue, &efx->reset_work);
2580 }
2581 
2582 /**************************************************************************
2583  *
2584  * List of NICs we support
2585  *
2586  **************************************************************************/
2587 
2588 /* PCI device ID table */
2589 static const struct pci_device_id ef4_pci_table[] = {
2590         {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2591                     PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2592          .driver_data = (unsigned long) &falcon_a1_nic_type},
2593         {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2594                     PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2595          .driver_data = (unsigned long) &falcon_b0_nic_type},
2596         {0}                     /* end of list */
2597 };
2598 
2599 /**************************************************************************
2600  *
2601  * Dummy PHY/MAC operations
2602  *
2603  * Can be used for some unimplemented operations
2604  * Needed so all function pointers are valid and do not have to be tested
2605  * before use
2606  *
2607  **************************************************************************/
2608 int ef4_port_dummy_op_int(struct ef4_nic *efx)
2609 {
2610         return 0;
2611 }
2612 void ef4_port_dummy_op_void(struct ef4_nic *efx) {}
2613 
2614 static bool ef4_port_dummy_op_poll(struct ef4_nic *efx)
2615 {
2616         return false;
2617 }
2618 
2619 static const struct ef4_phy_operations ef4_dummy_phy_operations = {
2620         .init            = ef4_port_dummy_op_int,
2621         .reconfigure     = ef4_port_dummy_op_int,
2622         .poll            = ef4_port_dummy_op_poll,
2623         .fini            = ef4_port_dummy_op_void,
2624 };
2625 
2626 /**************************************************************************
2627  *
2628  * Data housekeeping
2629  *
2630  **************************************************************************/
2631 
2632 /* This zeroes out and then fills in the invariants in a struct
2633  * ef4_nic (including all sub-structures).
2634  */
2635 static int ef4_init_struct(struct ef4_nic *efx,
2636                            struct pci_dev *pci_dev, struct net_device *net_dev)
2637 {
2638         int i;
2639 
2640         /* Initialise common structures */
2641         INIT_LIST_HEAD(&efx->node);
2642         INIT_LIST_HEAD(&efx->secondary_list);
2643         spin_lock_init(&efx->biu_lock);
2644 #ifdef CONFIG_SFC_FALCON_MTD
2645         INIT_LIST_HEAD(&efx->mtd_list);
2646 #endif
2647         INIT_WORK(&efx->reset_work, ef4_reset_work);
2648         INIT_DELAYED_WORK(&efx->monitor_work, ef4_monitor);
2649         INIT_DELAYED_WORK(&efx->selftest_work, ef4_selftest_async_work);
2650         efx->pci_dev = pci_dev;
2651         efx->msg_enable = debug;
2652         efx->state = STATE_UNINIT;
2653         strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2654 
2655         efx->net_dev = net_dev;
2656         efx->rx_prefix_size = efx->type->rx_prefix_size;
2657         efx->rx_ip_align =
2658                 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2659         efx->rx_packet_hash_offset =
2660                 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2661         efx->rx_packet_ts_offset =
2662                 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2663         spin_lock_init(&efx->stats_lock);
2664         mutex_init(&efx->mac_lock);
2665         efx->phy_op = &ef4_dummy_phy_operations;
2666         efx->mdio.dev = net_dev;
2667         INIT_WORK(&efx->mac_work, ef4_mac_work);
2668         init_waitqueue_head(&efx->flush_wq);
2669 
2670         for (i = 0; i < EF4_MAX_CHANNELS; i++) {
2671                 efx->channel[i] = ef4_alloc_channel(efx, i, NULL);
2672                 if (!efx->channel[i])
2673                         goto fail;
2674                 efx->msi_context[i].efx = efx;
2675                 efx->msi_context[i].index = i;
2676         }
2677 
2678         /* Higher numbered interrupt modes are less capable! */
2679         efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2680                                   interrupt_mode);
2681 
2682         /* Would be good to use the net_dev name, but we're too early */
2683         snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2684                  pci_name(pci_dev));
2685         efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2686         if (!efx->workqueue)
2687                 goto fail;
2688 
2689         return 0;
2690 
2691 fail:
2692         ef4_fini_struct(efx);
2693         return -ENOMEM;
2694 }
2695 
2696 static void ef4_fini_struct(struct ef4_nic *efx)
2697 {
2698         int i;
2699 
2700         for (i = 0; i < EF4_MAX_CHANNELS; i++)
2701                 kfree(efx->channel[i]);
2702 
2703         kfree(efx->vpd_sn);
2704 
2705         if (efx->workqueue) {
2706                 destroy_workqueue(efx->workqueue);
2707                 efx->workqueue = NULL;
2708         }
2709 }
2710 
2711 void ef4_update_sw_stats(struct ef4_nic *efx, u64 *stats)
2712 {
2713         u64 n_rx_nodesc_trunc = 0;
2714         struct ef4_channel *channel;
2715 
2716         ef4_for_each_channel(channel, efx)
2717                 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
2718         stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
2719         stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
2720 }
2721 
2722 /**************************************************************************
2723  *
2724  * PCI interface
2725  *
2726  **************************************************************************/
2727 
2728 /* Main body of final NIC shutdown code
2729  * This is called only at module unload (or hotplug removal).
2730  */
2731 static void ef4_pci_remove_main(struct ef4_nic *efx)
2732 {
2733         /* Flush reset_work. It can no longer be scheduled since we
2734          * are not READY.
2735          */
2736         BUG_ON(efx->state == STATE_READY);
2737         cancel_work_sync(&efx->reset_work);
2738 
2739         ef4_disable_interrupts(efx);
2740         ef4_nic_fini_interrupt(efx);
2741         ef4_fini_port(efx);
2742         efx->type->fini(efx);
2743         ef4_fini_napi(efx);
2744         ef4_remove_all(efx);
2745 }
2746 
2747 /* Final NIC shutdown
2748  * This is called only at module unload (or hotplug removal).  A PF can call
2749  * this on its VFs to ensure they are unbound first.
2750  */
2751 static void ef4_pci_remove(struct pci_dev *pci_dev)
2752 {
2753         struct ef4_nic *efx;
2754 
2755         efx = pci_get_drvdata(pci_dev);
2756         if (!efx)
2757                 return;
2758 
2759         /* Mark the NIC as fini, then stop the interface */
2760         rtnl_lock();
2761         ef4_dissociate(efx);
2762         dev_close(efx->net_dev);
2763         ef4_disable_interrupts(efx);
2764         efx->state = STATE_UNINIT;
2765         rtnl_unlock();
2766 
2767         ef4_unregister_netdev(efx);
2768 
2769         ef4_mtd_remove(efx);
2770 
2771         ef4_pci_remove_main(efx);
2772 
2773         ef4_fini_io(efx);
2774         netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2775 
2776         ef4_fini_struct(efx);
2777         free_netdev(efx->net_dev);
2778 
2779         pci_disable_pcie_error_reporting(pci_dev);
2780 };
2781 
2782 /* NIC VPD information
2783  * Called during probe to display the part number of the
2784  * installed NIC.  VPD is potentially very large but this should
2785  * always appear within the first 512 bytes.
2786  */
2787 #define SFC_VPD_LEN 512
2788 static void ef4_probe_vpd_strings(struct ef4_nic *efx)
2789 {
2790         struct pci_dev *dev = efx->pci_dev;
2791         char vpd_data[SFC_VPD_LEN];
2792         ssize_t vpd_size;
2793         int ro_start, ro_size, i, j;
2794 
2795         /* Get the vpd data from the device */
2796         vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2797         if (vpd_size <= 0) {
2798                 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2799                 return;
2800         }
2801 
2802         /* Get the Read only section */
2803         ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2804         if (ro_start < 0) {
2805                 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2806                 return;
2807         }
2808 
2809         ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
2810         j = ro_size;
2811         i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
2812         if (i + j > vpd_size)
2813                 j = vpd_size - i;
2814 
2815         /* Get the Part number */
2816         i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2817         if (i < 0) {
2818                 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2819                 return;
2820         }
2821 
2822         j = pci_vpd_info_field_size(&vpd_data[i]);
2823         i += PCI_VPD_INFO_FLD_HDR_SIZE;
2824         if (i + j > vpd_size) {
2825                 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2826                 return;
2827         }
2828 
2829         netif_info(efx, drv, efx->net_dev,
2830                    "Part Number : %.*s\n", j, &vpd_data[i]);
2831 
2832         i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
2833         j = ro_size;
2834         i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
2835         if (i < 0) {
2836                 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
2837                 return;
2838         }
2839 
2840         j = pci_vpd_info_field_size(&vpd_data[i]);
2841         i += PCI_VPD_INFO_FLD_HDR_SIZE;
2842         if (i + j > vpd_size) {
2843                 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
2844                 return;
2845         }
2846 
2847         efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
2848         if (!efx->vpd_sn)
2849                 return;
2850 
2851         snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
2852 }
2853 
2854 
2855 /* Main body of NIC initialisation
2856  * This is called at module load (or hotplug insertion, theoretically).
2857  */
2858 static int ef4_pci_probe_main(struct ef4_nic *efx)
2859 {
2860         int rc;
2861 
2862         /* Do start-of-day initialisation */
2863         rc = ef4_probe_all(efx);
2864         if (rc)
2865                 goto fail1;
2866 
2867         ef4_init_napi(efx);
2868 
2869         rc = efx->type->init(efx);
2870         if (rc) {
2871                 netif_err(efx, probe, efx->net_dev,
2872                           "failed to initialise NIC\n");
2873                 goto fail3;
2874         }
2875 
2876         rc = ef4_init_port(efx);
2877         if (rc) {
2878                 netif_err(efx, probe, efx->net_dev,
2879                           "failed to initialise port\n");
2880                 goto fail4;
2881         }
2882 
2883         rc = ef4_nic_init_interrupt(efx);
2884         if (rc)
2885                 goto fail5;
2886         rc = ef4_enable_interrupts(efx);
2887         if (rc)
2888                 goto fail6;
2889 
2890         return 0;
2891 
2892  fail6:
2893         ef4_nic_fini_interrupt(efx);
2894  fail5:
2895         ef4_fini_port(efx);
2896  fail4:
2897         efx->type->fini(efx);
2898  fail3:
2899         ef4_fini_napi(efx);
2900         ef4_remove_all(efx);
2901  fail1:
2902         return rc;
2903 }
2904 
2905 /* NIC initialisation
2906  *
2907  * This is called at module load (or hotplug insertion,
2908  * theoretically).  It sets up PCI mappings, resets the NIC,
2909  * sets up and registers the network devices with the kernel and hooks
2910  * the interrupt service routine.  It does not prepare the device for
2911  * transmission; this is left to the first time one of the network
2912  * interfaces is brought up (i.e. ef4_net_open).
2913  */
2914 static int ef4_pci_probe(struct pci_dev *pci_dev,
2915                          const struct pci_device_id *entry)
2916 {
2917         struct net_device *net_dev;
2918         struct ef4_nic *efx;
2919         int rc;
2920 
2921         /* Allocate and initialise a struct net_device and struct ef4_nic */
2922         net_dev = alloc_etherdev_mqs(sizeof(*efx), EF4_MAX_CORE_TX_QUEUES,
2923                                      EF4_MAX_RX_QUEUES);
2924         if (!net_dev)
2925                 return -ENOMEM;
2926         efx = netdev_priv(net_dev);
2927         efx->type = (const struct ef4_nic_type *) entry->driver_data;
2928         efx->fixed_features |= NETIF_F_HIGHDMA;
2929 
2930         pci_set_drvdata(pci_dev, efx);
2931         SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2932         rc = ef4_init_struct(efx, pci_dev, net_dev);
2933         if (rc)
2934                 goto fail1;
2935 
2936         netif_info(efx, probe, efx->net_dev,
2937                    "Solarflare NIC detected\n");
2938 
2939         ef4_probe_vpd_strings(efx);
2940 
2941         /* Set up basic I/O (BAR mappings etc) */
2942         rc = ef4_init_io(efx);
2943         if (rc)
2944                 goto fail2;
2945 
2946         rc = ef4_pci_probe_main(efx);
2947         if (rc)
2948                 goto fail3;
2949 
2950         net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2951                               NETIF_F_RXCSUM);
2952         /* Mask for features that also apply to VLAN devices */
2953         net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG |
2954                                    NETIF_F_HIGHDMA | NETIF_F_RXCSUM);
2955 
2956         net_dev->hw_features = net_dev->features & ~efx->fixed_features;
2957 
2958         /* Disable VLAN filtering by default.  It may be enforced if
2959          * the feature is fixed (i.e. VLAN filters are required to
2960          * receive VLAN tagged packets due to vPort restrictions).
2961          */
2962         net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
2963         net_dev->features |= efx->fixed_features;
2964 
2965         rc = ef4_register_netdev(efx);
2966         if (rc)
2967                 goto fail4;
2968 
2969         netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2970 
2971         /* Try to create MTDs, but allow this to fail */
2972         rtnl_lock();
2973         rc = ef4_mtd_probe(efx);
2974         rtnl_unlock();
2975         if (rc && rc != -EPERM)
2976                 netif_warn(efx, probe, efx->net_dev,
2977                            "failed to create MTDs (%d)\n", rc);
2978 
2979         rc = pci_enable_pcie_error_reporting(pci_dev);
2980         if (rc && rc != -EINVAL)
2981                 netif_notice(efx, probe, efx->net_dev,
2982                              "PCIE error reporting unavailable (%d).\n",
2983                              rc);
2984 
2985         return 0;
2986 
2987  fail4:
2988         ef4_pci_remove_main(efx);
2989  fail3:
2990         ef4_fini_io(efx);
2991  fail2:
2992         ef4_fini_struct(efx);
2993  fail1:
2994         WARN_ON(rc > 0);
2995         netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2996         free_netdev(net_dev);
2997         return rc;
2998 }
2999 
3000 static int ef4_pm_freeze(struct device *dev)
3001 {
3002         struct ef4_nic *efx = dev_get_drvdata(dev);
3003 
3004         rtnl_lock();
3005 
3006         if (efx->state != STATE_DISABLED) {
3007                 efx->state = STATE_UNINIT;
3008 
3009                 ef4_device_detach_sync(efx);
3010 
3011                 ef4_stop_all(efx);
3012                 ef4_disable_interrupts(efx);
3013         }
3014 
3015         rtnl_unlock();
3016 
3017         return 0;
3018 }
3019 
3020 static int ef4_pm_thaw(struct device *dev)
3021 {
3022         int rc;
3023         struct ef4_nic *efx = dev_get_drvdata(dev);
3024 
3025         rtnl_lock();
3026 
3027         if (efx->state != STATE_DISABLED) {
3028                 rc = ef4_enable_interrupts(efx);
3029                 if (rc)
3030                         goto fail;
3031 
3032                 mutex_lock(&efx->mac_lock);
3033                 efx->phy_op->reconfigure(efx);
3034                 mutex_unlock(&efx->mac_lock);
3035 
3036                 ef4_start_all(efx);
3037 
3038                 netif_device_attach(efx->net_dev);
3039 
3040                 efx->state = STATE_READY;
3041 
3042                 efx->type->resume_wol(efx);
3043         }
3044 
3045         rtnl_unlock();
3046 
3047         /* Reschedule any quenched resets scheduled during ef4_pm_freeze() */
3048         queue_work(reset_workqueue, &efx->reset_work);
3049 
3050         return 0;
3051 
3052 fail:
3053         rtnl_unlock();
3054 
3055         return rc;
3056 }
3057 
3058 static int ef4_pm_poweroff(struct device *dev)
3059 {
3060         struct pci_dev *pci_dev = to_pci_dev(dev);
3061         struct ef4_nic *efx = pci_get_drvdata(pci_dev);
3062 
3063         efx->type->fini(efx);
3064 
3065         efx->reset_pending = 0;
3066 
3067         pci_save_state(pci_dev);
3068         return pci_set_power_state(pci_dev, PCI_D3hot);
3069 }
3070 
3071 /* Used for both resume and restore */
3072 static int ef4_pm_resume(struct device *dev)
3073 {
3074         struct pci_dev *pci_dev = to_pci_dev(dev);
3075         struct ef4_nic *efx = pci_get_drvdata(pci_dev);
3076         int rc;
3077 
3078         rc = pci_set_power_state(pci_dev, PCI_D0);
3079         if (rc)
3080                 return rc;
3081         pci_restore_state(pci_dev);
3082         rc = pci_enable_device(pci_dev);
3083         if (rc)
3084                 return rc;
3085         pci_set_master(efx->pci_dev);
3086         rc = efx->type->reset(efx, RESET_TYPE_ALL);
3087         if (rc)
3088                 return rc;
3089         rc = efx->type->init(efx);
3090         if (rc)
3091                 return rc;
3092         rc = ef4_pm_thaw(dev);
3093         return rc;
3094 }
3095 
3096 static int ef4_pm_suspend(struct device *dev)
3097 {
3098         int rc;
3099 
3100         ef4_pm_freeze(dev);
3101         rc = ef4_pm_poweroff(dev);
3102         if (rc)
3103                 ef4_pm_resume(dev);
3104         return rc;
3105 }
3106 
3107 static const struct dev_pm_ops ef4_pm_ops = {
3108         .suspend        = ef4_pm_suspend,
3109         .resume         = ef4_pm_resume,
3110         .freeze         = ef4_pm_freeze,
3111         .thaw           = ef4_pm_thaw,
3112         .poweroff       = ef4_pm_poweroff,
3113         .restore        = ef4_pm_resume,
3114 };
3115 
3116 /* A PCI error affecting this device was detected.
3117  * At this point MMIO and DMA may be disabled.
3118  * Stop the software path and request a slot reset.
3119  */
3120 static pci_ers_result_t ef4_io_error_detected(struct pci_dev *pdev,
3121                                               enum pci_channel_state state)
3122 {
3123         pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3124         struct ef4_nic *efx = pci_get_drvdata(pdev);
3125 
3126         if (state == pci_channel_io_perm_failure)
3127                 return PCI_ERS_RESULT_DISCONNECT;
3128 
3129         rtnl_lock();
3130 
3131         if (efx->state != STATE_DISABLED) {
3132                 efx->state = STATE_RECOVERY;
3133                 efx->reset_pending = 0;
3134 
3135                 ef4_device_detach_sync(efx);
3136 
3137                 ef4_stop_all(efx);
3138                 ef4_disable_interrupts(efx);
3139 
3140                 status = PCI_ERS_RESULT_NEED_RESET;
3141         } else {
3142                 /* If the interface is disabled we don't want to do anything
3143                  * with it.
3144                  */
3145                 status = PCI_ERS_RESULT_RECOVERED;
3146         }
3147 
3148         rtnl_unlock();
3149 
3150         pci_disable_device(pdev);
3151 
3152         return status;
3153 }
3154 
3155 /* Fake a successful reset, which will be performed later in ef4_io_resume. */
3156 static pci_ers_result_t ef4_io_slot_reset(struct pci_dev *pdev)
3157 {
3158         struct ef4_nic *efx = pci_get_drvdata(pdev);
3159         pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3160 
3161         if (pci_enable_device(pdev)) {
3162                 netif_err(efx, hw, efx->net_dev,
3163                           "Cannot re-enable PCI device after reset.\n");
3164                 status =  PCI_ERS_RESULT_DISCONNECT;
3165         }
3166 
3167         return status;
3168 }
3169 
3170 /* Perform the actual reset and resume I/O operations. */
3171 static void ef4_io_resume(struct pci_dev *pdev)
3172 {
3173         struct ef4_nic *efx = pci_get_drvdata(pdev);
3174         int rc;
3175 
3176         rtnl_lock();
3177 
3178         if (efx->state == STATE_DISABLED)
3179                 goto out;
3180 
3181         rc = ef4_reset(efx, RESET_TYPE_ALL);
3182         if (rc) {
3183                 netif_err(efx, hw, efx->net_dev,
3184                           "ef4_reset failed after PCI error (%d)\n", rc);
3185         } else {
3186                 efx->state = STATE_READY;
3187                 netif_dbg(efx, hw, efx->net_dev,
3188                           "Done resetting and resuming IO after PCI error.\n");
3189         }
3190 
3191 out:
3192         rtnl_unlock();
3193 }
3194 
3195 /* For simplicity and reliability, we always require a slot reset and try to
3196  * reset the hardware when a pci error affecting the device is detected.
3197  * We leave both the link_reset and mmio_enabled callback unimplemented:
3198  * with our request for slot reset the mmio_enabled callback will never be
3199  * called, and the link_reset callback is not used by AER or EEH mechanisms.
3200  */
3201 static const struct pci_error_handlers ef4_err_handlers = {
3202         .error_detected = ef4_io_error_detected,
3203         .slot_reset     = ef4_io_slot_reset,
3204         .resume         = ef4_io_resume,
3205 };
3206 
3207 static struct pci_driver ef4_pci_driver = {
3208         .name           = KBUILD_MODNAME,
3209         .id_table       = ef4_pci_table,
3210         .probe          = ef4_pci_probe,
3211         .remove         = ef4_pci_remove,
3212         .driver.pm      = &ef4_pm_ops,
3213         .err_handler    = &ef4_err_handlers,
3214 };
3215 
3216 /**************************************************************************
3217  *
3218  * Kernel module interface
3219  *
3220  *************************************************************************/
3221 
3222 module_param(interrupt_mode, uint, 0444);
3223 MODULE_PARM_DESC(interrupt_mode,
3224                  "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3225 
3226 static int __init ef4_init_module(void)
3227 {
3228         int rc;
3229 
3230         printk(KERN_INFO "Solarflare Falcon driver v" EF4_DRIVER_VERSION "\n");
3231 
3232         rc = register_netdevice_notifier(&ef4_netdev_notifier);
3233         if (rc)
3234                 goto err_notifier;
3235 
3236         reset_workqueue = create_singlethread_workqueue("sfc_reset");
3237         if (!reset_workqueue) {
3238                 rc = -ENOMEM;
3239                 goto err_reset;
3240         }
3241 
3242         rc = pci_register_driver(&ef4_pci_driver);
3243         if (rc < 0)
3244                 goto err_pci;
3245 
3246         return 0;
3247 
3248  err_pci:
3249         destroy_workqueue(reset_workqueue);
3250  err_reset:
3251         unregister_netdevice_notifier(&ef4_netdev_notifier);
3252  err_notifier:
3253         return rc;
3254 }
3255 
3256 static void __exit ef4_exit_module(void)
3257 {
3258         printk(KERN_INFO "Solarflare Falcon driver unloading\n");
3259 
3260         pci_unregister_driver(&ef4_pci_driver);
3261         destroy_workqueue(reset_workqueue);
3262         unregister_netdevice_notifier(&ef4_netdev_notifier);
3263 
3264 }
3265 
3266 module_init(ef4_init_module);
3267 module_exit(ef4_exit_module);
3268 
3269 MODULE_AUTHOR("Solarflare Communications and "
3270               "Michael Brown <mbrown@fensystems.co.uk>");
3271 MODULE_DESCRIPTION("Solarflare Falcon network driver");
3272 MODULE_LICENSE("GPL");
3273 MODULE_DEVICE_TABLE(pci, ef4_pci_table);
3274 MODULE_VERSION(EF4_DRIVER_VERSION);

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