This source file includes following definitions.
- ef4_tx_get_copy_buffer
- ef4_tx_get_copy_buffer_limited
- ef4_dequeue_buffer
- ef4_tx_max_skb_descs
- ef4_tx_maybe_stop_queue
- ef4_enqueue_skb_copy
- ef4_tx_map_chunk
- ef4_tx_map_data
- ef4_enqueue_unwind
- ef4_enqueue_skb
- ef4_dequeue_buffers
- ef4_hard_start_xmit
- ef4_init_tx_queue_core_txq
- ef4_setup_tc
- ef4_xmit_done
- ef4_tx_cb_page_count
- ef4_probe_tx_queue
- ef4_init_tx_queue
- ef4_fini_tx_queue
- ef4_remove_tx_queue
1
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5
6
7
8 #include <linux/pci.h>
9 #include <linux/tcp.h>
10 #include <linux/ip.h>
11 #include <linux/in.h>
12 #include <linux/ipv6.h>
13 #include <linux/slab.h>
14 #include <net/ipv6.h>
15 #include <linux/if_ether.h>
16 #include <linux/highmem.h>
17 #include <linux/cache.h>
18 #include "net_driver.h"
19 #include "efx.h"
20 #include "io.h"
21 #include "nic.h"
22 #include "tx.h"
23 #include "workarounds.h"
24
25 static inline u8 *ef4_tx_get_copy_buffer(struct ef4_tx_queue *tx_queue,
26 struct ef4_tx_buffer *buffer)
27 {
28 unsigned int index = ef4_tx_queue_get_insert_index(tx_queue);
29 struct ef4_buffer *page_buf =
30 &tx_queue->cb_page[index >> (PAGE_SHIFT - EF4_TX_CB_ORDER)];
31 unsigned int offset =
32 ((index << EF4_TX_CB_ORDER) + NET_IP_ALIGN) & (PAGE_SIZE - 1);
33
34 if (unlikely(!page_buf->addr) &&
35 ef4_nic_alloc_buffer(tx_queue->efx, page_buf, PAGE_SIZE,
36 GFP_ATOMIC))
37 return NULL;
38 buffer->dma_addr = page_buf->dma_addr + offset;
39 buffer->unmap_len = 0;
40 return (u8 *)page_buf->addr + offset;
41 }
42
43 u8 *ef4_tx_get_copy_buffer_limited(struct ef4_tx_queue *tx_queue,
44 struct ef4_tx_buffer *buffer, size_t len)
45 {
46 if (len > EF4_TX_CB_SIZE)
47 return NULL;
48 return ef4_tx_get_copy_buffer(tx_queue, buffer);
49 }
50
51 static void ef4_dequeue_buffer(struct ef4_tx_queue *tx_queue,
52 struct ef4_tx_buffer *buffer,
53 unsigned int *pkts_compl,
54 unsigned int *bytes_compl)
55 {
56 if (buffer->unmap_len) {
57 struct device *dma_dev = &tx_queue->efx->pci_dev->dev;
58 dma_addr_t unmap_addr = buffer->dma_addr - buffer->dma_offset;
59 if (buffer->flags & EF4_TX_BUF_MAP_SINGLE)
60 dma_unmap_single(dma_dev, unmap_addr, buffer->unmap_len,
61 DMA_TO_DEVICE);
62 else
63 dma_unmap_page(dma_dev, unmap_addr, buffer->unmap_len,
64 DMA_TO_DEVICE);
65 buffer->unmap_len = 0;
66 }
67
68 if (buffer->flags & EF4_TX_BUF_SKB) {
69 (*pkts_compl)++;
70 (*bytes_compl) += buffer->skb->len;
71 dev_consume_skb_any((struct sk_buff *)buffer->skb);
72 netif_vdbg(tx_queue->efx, tx_done, tx_queue->efx->net_dev,
73 "TX queue %d transmission id %x complete\n",
74 tx_queue->queue, tx_queue->read_count);
75 }
76
77 buffer->len = 0;
78 buffer->flags = 0;
79 }
80
81 unsigned int ef4_tx_max_skb_descs(struct ef4_nic *efx)
82 {
83
84
85
86
87
88
89
90 unsigned int max_descs = EF4_TSO_MAX_SEGS * 2 + MAX_SKB_FRAGS;
91
92
93
94
95 if (EF4_WORKAROUND_5391(efx))
96 max_descs += EF4_TSO_MAX_SEGS;
97
98
99 if (PAGE_SIZE > EF4_PAGE_SIZE)
100 max_descs += max_t(unsigned int, MAX_SKB_FRAGS,
101 DIV_ROUND_UP(GSO_MAX_SIZE, EF4_PAGE_SIZE));
102
103 return max_descs;
104 }
105
106 static void ef4_tx_maybe_stop_queue(struct ef4_tx_queue *txq1)
107 {
108
109 struct ef4_tx_queue *txq2 = ef4_tx_queue_partner(txq1);
110 struct ef4_nic *efx = txq1->efx;
111 unsigned int fill_level;
112
113 fill_level = max(txq1->insert_count - txq1->old_read_count,
114 txq2->insert_count - txq2->old_read_count);
115 if (likely(fill_level < efx->txq_stop_thresh))
116 return;
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132 netif_tx_stop_queue(txq1->core_txq);
133 smp_mb();
134 txq1->old_read_count = READ_ONCE(txq1->read_count);
135 txq2->old_read_count = READ_ONCE(txq2->read_count);
136
137 fill_level = max(txq1->insert_count - txq1->old_read_count,
138 txq2->insert_count - txq2->old_read_count);
139 EF4_BUG_ON_PARANOID(fill_level >= efx->txq_entries);
140 if (likely(fill_level < efx->txq_stop_thresh)) {
141 smp_mb();
142 if (likely(!efx->loopback_selftest))
143 netif_tx_start_queue(txq1->core_txq);
144 }
145 }
146
147 static int ef4_enqueue_skb_copy(struct ef4_tx_queue *tx_queue,
148 struct sk_buff *skb)
149 {
150 unsigned int min_len = tx_queue->tx_min_size;
151 unsigned int copy_len = skb->len;
152 struct ef4_tx_buffer *buffer;
153 u8 *copy_buffer;
154 int rc;
155
156 EF4_BUG_ON_PARANOID(copy_len > EF4_TX_CB_SIZE);
157
158 buffer = ef4_tx_queue_get_insert_buffer(tx_queue);
159
160 copy_buffer = ef4_tx_get_copy_buffer(tx_queue, buffer);
161 if (unlikely(!copy_buffer))
162 return -ENOMEM;
163
164 rc = skb_copy_bits(skb, 0, copy_buffer, copy_len);
165 EF4_WARN_ON_PARANOID(rc);
166 if (unlikely(copy_len < min_len)) {
167 memset(copy_buffer + copy_len, 0, min_len - copy_len);
168 buffer->len = min_len;
169 } else {
170 buffer->len = copy_len;
171 }
172
173 buffer->skb = skb;
174 buffer->flags = EF4_TX_BUF_SKB;
175
176 ++tx_queue->insert_count;
177 return rc;
178 }
179
180 static struct ef4_tx_buffer *ef4_tx_map_chunk(struct ef4_tx_queue *tx_queue,
181 dma_addr_t dma_addr,
182 size_t len)
183 {
184 const struct ef4_nic_type *nic_type = tx_queue->efx->type;
185 struct ef4_tx_buffer *buffer;
186 unsigned int dma_len;
187
188
189 do {
190 buffer = ef4_tx_queue_get_insert_buffer(tx_queue);
191 dma_len = nic_type->tx_limit_len(tx_queue, dma_addr, len);
192
193 buffer->len = dma_len;
194 buffer->dma_addr = dma_addr;
195 buffer->flags = EF4_TX_BUF_CONT;
196 len -= dma_len;
197 dma_addr += dma_len;
198 ++tx_queue->insert_count;
199 } while (len);
200
201 return buffer;
202 }
203
204
205
206 static int ef4_tx_map_data(struct ef4_tx_queue *tx_queue, struct sk_buff *skb)
207 {
208 struct ef4_nic *efx = tx_queue->efx;
209 struct device *dma_dev = &efx->pci_dev->dev;
210 unsigned int frag_index, nr_frags;
211 dma_addr_t dma_addr, unmap_addr;
212 unsigned short dma_flags;
213 size_t len, unmap_len;
214
215 nr_frags = skb_shinfo(skb)->nr_frags;
216 frag_index = 0;
217
218
219 len = skb_headlen(skb);
220 dma_addr = dma_map_single(dma_dev, skb->data, len, DMA_TO_DEVICE);
221 dma_flags = EF4_TX_BUF_MAP_SINGLE;
222 unmap_len = len;
223 unmap_addr = dma_addr;
224
225 if (unlikely(dma_mapping_error(dma_dev, dma_addr)))
226 return -EIO;
227
228
229 do {
230 struct ef4_tx_buffer *buffer;
231 skb_frag_t *fragment;
232
233 buffer = ef4_tx_map_chunk(tx_queue, dma_addr, len);
234
235
236
237
238 buffer->flags = EF4_TX_BUF_CONT | dma_flags;
239 buffer->unmap_len = unmap_len;
240 buffer->dma_offset = buffer->dma_addr - unmap_addr;
241
242 if (frag_index >= nr_frags) {
243
244
245
246 buffer->skb = skb;
247 buffer->flags = EF4_TX_BUF_SKB | dma_flags;
248 return 0;
249 }
250
251
252 fragment = &skb_shinfo(skb)->frags[frag_index++];
253 len = skb_frag_size(fragment);
254 dma_addr = skb_frag_dma_map(dma_dev, fragment,
255 0, len, DMA_TO_DEVICE);
256 dma_flags = 0;
257 unmap_len = len;
258 unmap_addr = dma_addr;
259
260 if (unlikely(dma_mapping_error(dma_dev, dma_addr)))
261 return -EIO;
262 } while (1);
263 }
264
265
266
267
268 static void ef4_enqueue_unwind(struct ef4_tx_queue *tx_queue)
269 {
270 struct ef4_tx_buffer *buffer;
271
272
273 while (tx_queue->insert_count != tx_queue->write_count) {
274 --tx_queue->insert_count;
275 buffer = __ef4_tx_queue_get_insert_buffer(tx_queue);
276 ef4_dequeue_buffer(tx_queue, buffer, NULL, NULL);
277 }
278 }
279
280
281
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290
291
292
293
294
295
296 netdev_tx_t ef4_enqueue_skb(struct ef4_tx_queue *tx_queue, struct sk_buff *skb)
297 {
298 bool data_mapped = false;
299 unsigned int skb_len;
300
301 skb_len = skb->len;
302 EF4_WARN_ON_PARANOID(skb_is_gso(skb));
303
304 if (skb_len < tx_queue->tx_min_size ||
305 (skb->data_len && skb_len <= EF4_TX_CB_SIZE)) {
306
307 if (ef4_enqueue_skb_copy(tx_queue, skb))
308 goto err;
309 tx_queue->cb_packets++;
310 data_mapped = true;
311 }
312
313
314 if (!data_mapped && (ef4_tx_map_data(tx_queue, skb)))
315 goto err;
316
317
318 netdev_tx_sent_queue(tx_queue->core_txq, skb_len);
319
320
321 if (!netdev_xmit_more() || netif_xmit_stopped(tx_queue->core_txq)) {
322 struct ef4_tx_queue *txq2 = ef4_tx_queue_partner(tx_queue);
323
324
325
326
327
328 if (txq2->xmit_more_available)
329 ef4_nic_push_buffers(txq2);
330
331 ef4_nic_push_buffers(tx_queue);
332 } else {
333 tx_queue->xmit_more_available = netdev_xmit_more();
334 }
335
336 tx_queue->tx_packets++;
337
338 ef4_tx_maybe_stop_queue(tx_queue);
339
340 return NETDEV_TX_OK;
341
342
343 err:
344 ef4_enqueue_unwind(tx_queue);
345 dev_kfree_skb_any(skb);
346 return NETDEV_TX_OK;
347 }
348
349
350
351
352
353
354 static void ef4_dequeue_buffers(struct ef4_tx_queue *tx_queue,
355 unsigned int index,
356 unsigned int *pkts_compl,
357 unsigned int *bytes_compl)
358 {
359 struct ef4_nic *efx = tx_queue->efx;
360 unsigned int stop_index, read_ptr;
361
362 stop_index = (index + 1) & tx_queue->ptr_mask;
363 read_ptr = tx_queue->read_count & tx_queue->ptr_mask;
364
365 while (read_ptr != stop_index) {
366 struct ef4_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
367
368 if (!(buffer->flags & EF4_TX_BUF_OPTION) &&
369 unlikely(buffer->len == 0)) {
370 netif_err(efx, tx_err, efx->net_dev,
371 "TX queue %d spurious TX completion id %x\n",
372 tx_queue->queue, read_ptr);
373 ef4_schedule_reset(efx, RESET_TYPE_TX_SKIP);
374 return;
375 }
376
377 ef4_dequeue_buffer(tx_queue, buffer, pkts_compl, bytes_compl);
378
379 ++tx_queue->read_count;
380 read_ptr = tx_queue->read_count & tx_queue->ptr_mask;
381 }
382 }
383
384
385
386
387
388
389
390
391
392
393 netdev_tx_t ef4_hard_start_xmit(struct sk_buff *skb,
394 struct net_device *net_dev)
395 {
396 struct ef4_nic *efx = netdev_priv(net_dev);
397 struct ef4_tx_queue *tx_queue;
398 unsigned index, type;
399
400 EF4_WARN_ON_PARANOID(!netif_device_present(net_dev));
401
402 index = skb_get_queue_mapping(skb);
403 type = skb->ip_summed == CHECKSUM_PARTIAL ? EF4_TXQ_TYPE_OFFLOAD : 0;
404 if (index >= efx->n_tx_channels) {
405 index -= efx->n_tx_channels;
406 type |= EF4_TXQ_TYPE_HIGHPRI;
407 }
408 tx_queue = ef4_get_tx_queue(efx, index, type);
409
410 return ef4_enqueue_skb(tx_queue, skb);
411 }
412
413 void ef4_init_tx_queue_core_txq(struct ef4_tx_queue *tx_queue)
414 {
415 struct ef4_nic *efx = tx_queue->efx;
416
417
418 tx_queue->core_txq =
419 netdev_get_tx_queue(efx->net_dev,
420 tx_queue->queue / EF4_TXQ_TYPES +
421 ((tx_queue->queue & EF4_TXQ_TYPE_HIGHPRI) ?
422 efx->n_tx_channels : 0));
423 }
424
425 int ef4_setup_tc(struct net_device *net_dev, enum tc_setup_type type,
426 void *type_data)
427 {
428 struct ef4_nic *efx = netdev_priv(net_dev);
429 struct tc_mqprio_qopt *mqprio = type_data;
430 struct ef4_channel *channel;
431 struct ef4_tx_queue *tx_queue;
432 unsigned tc, num_tc;
433 int rc;
434
435 if (type != TC_SETUP_QDISC_MQPRIO)
436 return -EOPNOTSUPP;
437
438 num_tc = mqprio->num_tc;
439
440 if (ef4_nic_rev(efx) < EF4_REV_FALCON_B0 || num_tc > EF4_MAX_TX_TC)
441 return -EINVAL;
442
443 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
444
445 if (num_tc == net_dev->num_tc)
446 return 0;
447
448 for (tc = 0; tc < num_tc; tc++) {
449 net_dev->tc_to_txq[tc].offset = tc * efx->n_tx_channels;
450 net_dev->tc_to_txq[tc].count = efx->n_tx_channels;
451 }
452
453 if (num_tc > net_dev->num_tc) {
454
455 ef4_for_each_channel(channel, efx) {
456 ef4_for_each_possible_channel_tx_queue(tx_queue,
457 channel) {
458 if (!(tx_queue->queue & EF4_TXQ_TYPE_HIGHPRI))
459 continue;
460 if (!tx_queue->buffer) {
461 rc = ef4_probe_tx_queue(tx_queue);
462 if (rc)
463 return rc;
464 }
465 if (!tx_queue->initialised)
466 ef4_init_tx_queue(tx_queue);
467 ef4_init_tx_queue_core_txq(tx_queue);
468 }
469 }
470 } else {
471
472 net_dev->num_tc = num_tc;
473 }
474
475 rc = netif_set_real_num_tx_queues(net_dev,
476 max_t(int, num_tc, 1) *
477 efx->n_tx_channels);
478 if (rc)
479 return rc;
480
481
482
483
484
485
486
487 net_dev->num_tc = num_tc;
488 return 0;
489 }
490
491 void ef4_xmit_done(struct ef4_tx_queue *tx_queue, unsigned int index)
492 {
493 unsigned fill_level;
494 struct ef4_nic *efx = tx_queue->efx;
495 struct ef4_tx_queue *txq2;
496 unsigned int pkts_compl = 0, bytes_compl = 0;
497
498 EF4_BUG_ON_PARANOID(index > tx_queue->ptr_mask);
499
500 ef4_dequeue_buffers(tx_queue, index, &pkts_compl, &bytes_compl);
501 tx_queue->pkts_compl += pkts_compl;
502 tx_queue->bytes_compl += bytes_compl;
503
504 if (pkts_compl > 1)
505 ++tx_queue->merge_events;
506
507
508
509
510
511 smp_mb();
512 if (unlikely(netif_tx_queue_stopped(tx_queue->core_txq)) &&
513 likely(efx->port_enabled) &&
514 likely(netif_device_present(efx->net_dev))) {
515 txq2 = ef4_tx_queue_partner(tx_queue);
516 fill_level = max(tx_queue->insert_count - tx_queue->read_count,
517 txq2->insert_count - txq2->read_count);
518 if (fill_level <= efx->txq_wake_thresh)
519 netif_tx_wake_queue(tx_queue->core_txq);
520 }
521
522
523 if ((int)(tx_queue->read_count - tx_queue->old_write_count) >= 0) {
524 tx_queue->old_write_count = READ_ONCE(tx_queue->write_count);
525 if (tx_queue->read_count == tx_queue->old_write_count) {
526 smp_mb();
527 tx_queue->empty_read_count =
528 tx_queue->read_count | EF4_EMPTY_COUNT_VALID;
529 }
530 }
531 }
532
533 static unsigned int ef4_tx_cb_page_count(struct ef4_tx_queue *tx_queue)
534 {
535 return DIV_ROUND_UP(tx_queue->ptr_mask + 1, PAGE_SIZE >> EF4_TX_CB_ORDER);
536 }
537
538 int ef4_probe_tx_queue(struct ef4_tx_queue *tx_queue)
539 {
540 struct ef4_nic *efx = tx_queue->efx;
541 unsigned int entries;
542 int rc;
543
544
545 entries = max(roundup_pow_of_two(efx->txq_entries), EF4_MIN_DMAQ_SIZE);
546 EF4_BUG_ON_PARANOID(entries > EF4_MAX_DMAQ_SIZE);
547 tx_queue->ptr_mask = entries - 1;
548
549 netif_dbg(efx, probe, efx->net_dev,
550 "creating TX queue %d size %#x mask %#x\n",
551 tx_queue->queue, efx->txq_entries, tx_queue->ptr_mask);
552
553
554 tx_queue->buffer = kcalloc(entries, sizeof(*tx_queue->buffer),
555 GFP_KERNEL);
556 if (!tx_queue->buffer)
557 return -ENOMEM;
558
559 tx_queue->cb_page = kcalloc(ef4_tx_cb_page_count(tx_queue),
560 sizeof(tx_queue->cb_page[0]), GFP_KERNEL);
561 if (!tx_queue->cb_page) {
562 rc = -ENOMEM;
563 goto fail1;
564 }
565
566
567 rc = ef4_nic_probe_tx(tx_queue);
568 if (rc)
569 goto fail2;
570
571 return 0;
572
573 fail2:
574 kfree(tx_queue->cb_page);
575 tx_queue->cb_page = NULL;
576 fail1:
577 kfree(tx_queue->buffer);
578 tx_queue->buffer = NULL;
579 return rc;
580 }
581
582 void ef4_init_tx_queue(struct ef4_tx_queue *tx_queue)
583 {
584 struct ef4_nic *efx = tx_queue->efx;
585
586 netif_dbg(efx, drv, efx->net_dev,
587 "initialising TX queue %d\n", tx_queue->queue);
588
589 tx_queue->insert_count = 0;
590 tx_queue->write_count = 0;
591 tx_queue->old_write_count = 0;
592 tx_queue->read_count = 0;
593 tx_queue->old_read_count = 0;
594 tx_queue->empty_read_count = 0 | EF4_EMPTY_COUNT_VALID;
595 tx_queue->xmit_more_available = false;
596
597
598 tx_queue->tx_min_size = EF4_WORKAROUND_15592(efx) ? 33 : 0;
599
600
601 ef4_nic_init_tx(tx_queue);
602
603 tx_queue->initialised = true;
604 }
605
606 void ef4_fini_tx_queue(struct ef4_tx_queue *tx_queue)
607 {
608 struct ef4_tx_buffer *buffer;
609
610 netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev,
611 "shutting down TX queue %d\n", tx_queue->queue);
612
613 if (!tx_queue->buffer)
614 return;
615
616
617 while (tx_queue->read_count != tx_queue->write_count) {
618 unsigned int pkts_compl = 0, bytes_compl = 0;
619 buffer = &tx_queue->buffer[tx_queue->read_count & tx_queue->ptr_mask];
620 ef4_dequeue_buffer(tx_queue, buffer, &pkts_compl, &bytes_compl);
621
622 ++tx_queue->read_count;
623 }
624 tx_queue->xmit_more_available = false;
625 netdev_tx_reset_queue(tx_queue->core_txq);
626 }
627
628 void ef4_remove_tx_queue(struct ef4_tx_queue *tx_queue)
629 {
630 int i;
631
632 if (!tx_queue->buffer)
633 return;
634
635 netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev,
636 "destroying TX queue %d\n", tx_queue->queue);
637 ef4_nic_remove_tx(tx_queue);
638
639 if (tx_queue->cb_page) {
640 for (i = 0; i < ef4_tx_cb_page_count(tx_queue); i++)
641 ef4_nic_free_buffer(tx_queue->efx,
642 &tx_queue->cb_page[i]);
643 kfree(tx_queue->cb_page);
644 tx_queue->cb_page = NULL;
645 }
646
647 kfree(tx_queue->buffer);
648 tx_queue->buffer = NULL;
649 }