This source file includes following definitions.
- ixgbevf_write_msg_read_ack
- ixgbevf_start_hw_vf
- ixgbevf_init_hw_vf
- ixgbevf_reset_hw_vf
- ixgbevf_hv_reset_hw_vf
- ixgbevf_stop_hw_vf
- ixgbevf_mta_vector
- ixgbevf_get_mac_addr_vf
- ixgbevf_set_uc_addr_vf
- ixgbevf_hv_set_uc_addr_vf
- ixgbevf_get_reta_locked
- ixgbevf_get_rss_key_locked
- ixgbevf_set_rar_vf
- ixgbevf_hv_set_rar_vf
- ixgbevf_update_mc_addr_list_vf
- ixgbevf_hv_update_mc_addr_list_vf
- ixgbevf_update_xcast_mode
- ixgbevf_hv_update_xcast_mode
- ixgbevf_set_vfta_vf
- ixgbevf_hv_set_vfta_vf
- ixgbevf_setup_mac_link_vf
- ixgbevf_check_mac_link_vf
- ixgbevf_hv_check_mac_link_vf
- ixgbevf_set_rlpml_vf
- ixgbevf_hv_set_rlpml_vf
- ixgbevf_negotiate_api_version_vf
- ixgbevf_hv_negotiate_api_version_vf
- ixgbevf_get_queues
1
2
3
4 #include "vf.h"
5 #include "ixgbevf.h"
6
7
8
9
10
11 #define IXGBE_HV_RESET_OFFSET 0x201
12
13 static inline s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
14 u32 *retmsg, u16 size)
15 {
16 struct ixgbe_mbx_info *mbx = &hw->mbx;
17 s32 retval = mbx->ops.write_posted(hw, msg, size);
18
19 if (retval)
20 return retval;
21
22 return mbx->ops.read_posted(hw, retmsg, size);
23 }
24
25
26
27
28
29
30
31
32
33
34 static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw)
35 {
36
37 hw->adapter_stopped = false;
38
39 return 0;
40 }
41
42
43
44
45
46
47
48
49 static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw)
50 {
51 s32 status = hw->mac.ops.start_hw(hw);
52
53 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
54
55 return status;
56 }
57
58
59
60
61
62
63
64
65 static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw)
66 {
67 struct ixgbe_mbx_info *mbx = &hw->mbx;
68 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
69 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
70 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
71 u8 *addr = (u8 *)(&msgbuf[1]);
72
73
74 hw->mac.ops.stop_adapter(hw);
75
76
77 hw->api_version = ixgbe_mbox_api_10;
78
79 IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
80 IXGBE_WRITE_FLUSH(hw);
81
82
83 while (!mbx->ops.check_for_rst(hw) && timeout) {
84 timeout--;
85 udelay(5);
86 }
87
88 if (!timeout)
89 return IXGBE_ERR_RESET_FAILED;
90
91
92 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
93
94 msgbuf[0] = IXGBE_VF_RESET;
95 mbx->ops.write_posted(hw, msgbuf, 1);
96
97 mdelay(10);
98
99
100
101
102
103 ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN);
104 if (ret_val)
105 return ret_val;
106
107
108
109
110
111 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) &&
112 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
113 return IXGBE_ERR_INVALID_MAC_ADDR;
114
115 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
116 ether_addr_copy(hw->mac.perm_addr, addr);
117
118 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
119
120 return 0;
121 }
122
123
124
125
126
127
128 static s32 ixgbevf_hv_reset_hw_vf(struct ixgbe_hw *hw)
129 {
130 #if IS_ENABLED(CONFIG_PCI_MMCONFIG)
131 struct ixgbevf_adapter *adapter = hw->back;
132 int i;
133
134 for (i = 0; i < 6; i++)
135 pci_read_config_byte(adapter->pdev,
136 (i + IXGBE_HV_RESET_OFFSET),
137 &hw->mac.perm_addr[i]);
138 return 0;
139 #else
140 pr_err("PCI_MMCONFIG needs to be enabled for Hyper-V\n");
141 return -EOPNOTSUPP;
142 #endif
143 }
144
145
146
147
148
149
150
151
152
153
154 static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw)
155 {
156 u32 number_of_queues;
157 u32 reg_val;
158 u16 i;
159
160
161
162
163 hw->adapter_stopped = true;
164
165
166 number_of_queues = hw->mac.max_rx_queues;
167 for (i = 0; i < number_of_queues; i++) {
168 reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
169 if (reg_val & IXGBE_RXDCTL_ENABLE) {
170 reg_val &= ~IXGBE_RXDCTL_ENABLE;
171 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
172 }
173 }
174
175 IXGBE_WRITE_FLUSH(hw);
176
177
178 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
179
180
181 IXGBE_READ_REG(hw, IXGBE_VTEICR);
182
183
184 number_of_queues = hw->mac.max_tx_queues;
185 for (i = 0; i < number_of_queues; i++) {
186 reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
187 if (reg_val & IXGBE_TXDCTL_ENABLE) {
188 reg_val &= ~IXGBE_TXDCTL_ENABLE;
189 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
190 }
191 }
192
193 return 0;
194 }
195
196
197
198
199
200
201
202
203
204
205
206
207
208 static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
209 {
210 u32 vector = 0;
211
212 switch (hw->mac.mc_filter_type) {
213 case 0:
214 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
215 break;
216 case 1:
217 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
218 break;
219 case 2:
220 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
221 break;
222 case 3:
223 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
224 break;
225 default:
226 break;
227 }
228
229
230 vector &= 0xFFF;
231 return vector;
232 }
233
234
235
236
237
238
239 static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
240 {
241 ether_addr_copy(mac_addr, hw->mac.perm_addr);
242
243 return 0;
244 }
245
246 static s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
247 {
248 u32 msgbuf[3], msgbuf_chk;
249 u8 *msg_addr = (u8 *)(&msgbuf[1]);
250 s32 ret_val;
251
252 memset(msgbuf, 0, sizeof(msgbuf));
253
254
255
256
257
258 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
259 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
260 msgbuf_chk = msgbuf[0];
261
262 if (addr)
263 ether_addr_copy(msg_addr, addr);
264
265 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,
266 ARRAY_SIZE(msgbuf));
267 if (!ret_val) {
268 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
269
270 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK))
271 return -ENOMEM;
272 }
273
274 return ret_val;
275 }
276
277 static s32 ixgbevf_hv_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
278 {
279 return -EOPNOTSUPP;
280 }
281
282
283
284
285
286
287
288
289
290
291
292
293 int ixgbevf_get_reta_locked(struct ixgbe_hw *hw, u32 *reta, int num_rx_queues)
294 {
295 int err, i, j;
296 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
297 u32 *hw_reta = &msgbuf[1];
298 u32 mask = 0;
299
300
301
302
303
304
305 int dwords = IXGBEVF_82599_RETA_SIZE / 16;
306
307
308
309
310
311 switch (hw->api_version) {
312 case ixgbe_mbox_api_14:
313 case ixgbe_mbox_api_13:
314 case ixgbe_mbox_api_12:
315 if (hw->mac.type < ixgbe_mac_X550_vf)
316 break;
317
318 default:
319 return -EOPNOTSUPP;
320 }
321
322 msgbuf[0] = IXGBE_VF_GET_RETA;
323
324 err = hw->mbx.ops.write_posted(hw, msgbuf, 1);
325
326 if (err)
327 return err;
328
329 err = hw->mbx.ops.read_posted(hw, msgbuf, dwords + 1);
330
331 if (err)
332 return err;
333
334 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
335
336
337 if (msgbuf[0] == (IXGBE_VF_GET_RETA | IXGBE_VT_MSGTYPE_NACK))
338 return -EPERM;
339
340
341
342
343
344 if (msgbuf[0] != (IXGBE_VF_GET_RETA | IXGBE_VT_MSGTYPE_ACK))
345 return IXGBE_ERR_MBX;
346
347
348 if (num_rx_queues > 1)
349 mask = 0x1;
350
351 for (i = 0; i < dwords; i++)
352 for (j = 0; j < 16; j++)
353 reta[i * 16 + j] = (hw_reta[i] >> (2 * j)) & mask;
354
355 return 0;
356 }
357
358
359
360
361
362
363
364
365
366
367
368 int ixgbevf_get_rss_key_locked(struct ixgbe_hw *hw, u8 *rss_key)
369 {
370 int err;
371 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
372
373
374
375
376
377
378
379 switch (hw->api_version) {
380 case ixgbe_mbox_api_14:
381 case ixgbe_mbox_api_13:
382 case ixgbe_mbox_api_12:
383 if (hw->mac.type < ixgbe_mac_X550_vf)
384 break;
385
386 default:
387 return -EOPNOTSUPP;
388 }
389
390 msgbuf[0] = IXGBE_VF_GET_RSS_KEY;
391 err = hw->mbx.ops.write_posted(hw, msgbuf, 1);
392
393 if (err)
394 return err;
395
396 err = hw->mbx.ops.read_posted(hw, msgbuf, 11);
397
398 if (err)
399 return err;
400
401 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
402
403
404 if (msgbuf[0] == (IXGBE_VF_GET_RSS_KEY | IXGBE_VT_MSGTYPE_NACK))
405 return -EPERM;
406
407
408
409
410
411 if (msgbuf[0] != (IXGBE_VF_GET_RSS_KEY | IXGBE_VT_MSGTYPE_ACK))
412 return IXGBE_ERR_MBX;
413
414 memcpy(rss_key, msgbuf + 1, IXGBEVF_RSS_HASH_KEY_SIZE);
415
416 return 0;
417 }
418
419
420
421
422
423
424
425
426 static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,
427 u32 vmdq)
428 {
429 u32 msgbuf[3];
430 u8 *msg_addr = (u8 *)(&msgbuf[1]);
431 s32 ret_val;
432
433 memset(msgbuf, 0, sizeof(msgbuf));
434 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
435 ether_addr_copy(msg_addr, addr);
436
437 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,
438 ARRAY_SIZE(msgbuf));
439 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
440
441
442 if (!ret_val &&
443 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) {
444 ixgbevf_get_mac_addr_vf(hw, hw->mac.addr);
445 return IXGBE_ERR_MBX;
446 }
447
448 return ret_val;
449 }
450
451
452
453
454
455
456
457
458
459
460
461
462 static s32 ixgbevf_hv_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,
463 u32 vmdq)
464 {
465 if (ether_addr_equal(addr, hw->mac.perm_addr))
466 return 0;
467
468 return -EOPNOTSUPP;
469 }
470
471
472
473
474
475
476
477
478 static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw,
479 struct net_device *netdev)
480 {
481 struct netdev_hw_addr *ha;
482 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
483 u16 *vector_list = (u16 *)&msgbuf[1];
484 u32 cnt, i;
485
486
487
488
489
490
491
492
493
494
495 cnt = netdev_mc_count(netdev);
496 if (cnt > 30)
497 cnt = 30;
498 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
499 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
500
501 i = 0;
502 netdev_for_each_mc_addr(ha, netdev) {
503 if (i == cnt)
504 break;
505 if (is_link_local_ether_addr(ha->addr))
506 continue;
507
508 vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr);
509 }
510
511 return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,
512 IXGBE_VFMAILBOX_SIZE);
513 }
514
515
516
517
518
519
520 static s32 ixgbevf_hv_update_mc_addr_list_vf(struct ixgbe_hw *hw,
521 struct net_device *netdev)
522 {
523 return -EOPNOTSUPP;
524 }
525
526
527
528
529
530
531
532
533 static s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
534 {
535 u32 msgbuf[2];
536 s32 err;
537
538 switch (hw->api_version) {
539 case ixgbe_mbox_api_12:
540
541 if (xcast_mode == IXGBEVF_XCAST_MODE_PROMISC)
542 return -EOPNOTSUPP;
543
544 case ixgbe_mbox_api_14:
545 case ixgbe_mbox_api_13:
546 break;
547 default:
548 return -EOPNOTSUPP;
549 }
550
551 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
552 msgbuf[1] = xcast_mode;
553
554 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,
555 ARRAY_SIZE(msgbuf));
556 if (err)
557 return err;
558
559 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
560 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK))
561 return -EPERM;
562
563 return 0;
564 }
565
566
567
568
569
570
571 static s32 ixgbevf_hv_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
572 {
573 return -EOPNOTSUPP;
574 }
575
576
577
578
579
580
581
582
583 static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
584 bool vlan_on)
585 {
586 u32 msgbuf[2];
587 s32 err;
588
589 msgbuf[0] = IXGBE_VF_SET_VLAN;
590 msgbuf[1] = vlan;
591
592 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
593
594 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,
595 ARRAY_SIZE(msgbuf));
596 if (err)
597 goto mbx_err;
598
599
600 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
601 msgbuf[0] &= ~(0xFF << IXGBE_VT_MSGINFO_SHIFT);
602
603 if (msgbuf[0] != (IXGBE_VF_SET_VLAN | IXGBE_VT_MSGTYPE_ACK))
604 err = IXGBE_ERR_INVALID_ARGUMENT;
605
606 mbx_err:
607 return err;
608 }
609
610
611
612
613
614
615
616
617 static s32 ixgbevf_hv_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
618 bool vlan_on)
619 {
620 return -EOPNOTSUPP;
621 }
622
623
624
625
626
627
628
629
630
631
632
633 static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw,
634 ixgbe_link_speed speed, bool autoneg,
635 bool autoneg_wait_to_complete)
636 {
637 return 0;
638 }
639
640
641
642
643
644
645
646
647
648
649 static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,
650 ixgbe_link_speed *speed,
651 bool *link_up,
652 bool autoneg_wait_to_complete)
653 {
654 struct ixgbe_mbx_info *mbx = &hw->mbx;
655 struct ixgbe_mac_info *mac = &hw->mac;
656 s32 ret_val = 0;
657 u32 links_reg;
658 u32 in_msg = 0;
659
660
661 if (!mbx->ops.check_for_rst(hw) || !mbx->timeout)
662 mac->get_link_status = true;
663
664 if (!mac->get_link_status)
665 goto out;
666
667
668 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
669 if (!(links_reg & IXGBE_LINKS_UP))
670 goto out;
671
672
673
674
675 if (mac->type == ixgbe_mac_82599_vf) {
676 int i;
677
678 for (i = 0; i < 5; i++) {
679 udelay(100);
680 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
681
682 if (!(links_reg & IXGBE_LINKS_UP))
683 goto out;
684 }
685 }
686
687 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
688 case IXGBE_LINKS_SPEED_10G_82599:
689 *speed = IXGBE_LINK_SPEED_10GB_FULL;
690 break;
691 case IXGBE_LINKS_SPEED_1G_82599:
692 *speed = IXGBE_LINK_SPEED_1GB_FULL;
693 break;
694 case IXGBE_LINKS_SPEED_100_82599:
695 *speed = IXGBE_LINK_SPEED_100_FULL;
696 break;
697 }
698
699
700
701
702 if (mbx->ops.read(hw, &in_msg, 1))
703 goto out;
704
705 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
706
707 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
708 ret_val = -1;
709 goto out;
710 }
711
712
713 if (!mbx->timeout) {
714 ret_val = -1;
715 goto out;
716 }
717
718
719
720
721 mac->get_link_status = false;
722
723 out:
724 *link_up = !mac->get_link_status;
725 return ret_val;
726 }
727
728
729
730
731
732
733
734
735 static s32 ixgbevf_hv_check_mac_link_vf(struct ixgbe_hw *hw,
736 ixgbe_link_speed *speed,
737 bool *link_up,
738 bool autoneg_wait_to_complete)
739 {
740 struct ixgbe_mbx_info *mbx = &hw->mbx;
741 struct ixgbe_mac_info *mac = &hw->mac;
742 u32 links_reg;
743
744
745 if (!mbx->ops.check_for_rst(hw) || !mbx->timeout)
746 mac->get_link_status = true;
747
748 if (!mac->get_link_status)
749 goto out;
750
751
752 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
753 if (!(links_reg & IXGBE_LINKS_UP))
754 goto out;
755
756
757
758
759 if (mac->type == ixgbe_mac_82599_vf) {
760 int i;
761
762 for (i = 0; i < 5; i++) {
763 udelay(100);
764 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
765
766 if (!(links_reg & IXGBE_LINKS_UP))
767 goto out;
768 }
769 }
770
771 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
772 case IXGBE_LINKS_SPEED_10G_82599:
773 *speed = IXGBE_LINK_SPEED_10GB_FULL;
774 break;
775 case IXGBE_LINKS_SPEED_1G_82599:
776 *speed = IXGBE_LINK_SPEED_1GB_FULL;
777 break;
778 case IXGBE_LINKS_SPEED_100_82599:
779 *speed = IXGBE_LINK_SPEED_100_FULL;
780 break;
781 }
782
783
784
785
786 mac->get_link_status = false;
787
788 out:
789 *link_up = !mac->get_link_status;
790 return 0;
791 }
792
793
794
795
796
797
798 static s32 ixgbevf_set_rlpml_vf(struct ixgbe_hw *hw, u16 max_size)
799 {
800 u32 msgbuf[2];
801 s32 ret_val;
802
803 msgbuf[0] = IXGBE_VF_SET_LPE;
804 msgbuf[1] = max_size;
805
806 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,
807 ARRAY_SIZE(msgbuf));
808 if (ret_val)
809 return ret_val;
810 if ((msgbuf[0] & IXGBE_VF_SET_LPE) &&
811 (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK))
812 return IXGBE_ERR_MBX;
813
814 return 0;
815 }
816
817
818
819
820
821
822
823 static s32 ixgbevf_hv_set_rlpml_vf(struct ixgbe_hw *hw, u16 max_size)
824 {
825 u32 reg;
826
827
828
829
830 reg = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(0));
831
832 reg |= ((max_size + 4) | IXGBE_RXDCTL_RLPML_EN);
833 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(0), reg);
834
835 return 0;
836 }
837
838
839
840
841
842
843 static int ixgbevf_negotiate_api_version_vf(struct ixgbe_hw *hw, int api)
844 {
845 int err;
846 u32 msg[3];
847
848
849 msg[0] = IXGBE_VF_API_NEGOTIATE;
850 msg[1] = api;
851 msg[2] = 0;
852
853 err = ixgbevf_write_msg_read_ack(hw, msg, msg, ARRAY_SIZE(msg));
854 if (!err) {
855 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
856
857
858 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
859 hw->api_version = api;
860 return 0;
861 }
862
863 err = IXGBE_ERR_INVALID_ARGUMENT;
864 }
865
866 return err;
867 }
868
869
870
871
872
873
874
875 static int ixgbevf_hv_negotiate_api_version_vf(struct ixgbe_hw *hw, int api)
876 {
877
878 if (api != ixgbe_mbox_api_10)
879 return IXGBE_ERR_INVALID_ARGUMENT;
880
881 return 0;
882 }
883
884 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
885 unsigned int *default_tc)
886 {
887 int err;
888 u32 msg[5];
889
890
891 switch (hw->api_version) {
892 case ixgbe_mbox_api_11:
893 case ixgbe_mbox_api_12:
894 case ixgbe_mbox_api_13:
895 case ixgbe_mbox_api_14:
896 break;
897 default:
898 return 0;
899 }
900
901
902 msg[0] = IXGBE_VF_GET_QUEUE;
903 msg[1] = msg[2] = msg[3] = msg[4] = 0;
904
905 err = ixgbevf_write_msg_read_ack(hw, msg, msg, ARRAY_SIZE(msg));
906 if (!err) {
907 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
908
909
910
911
912
913 if (msg[0] != (IXGBE_VF_GET_QUEUE | IXGBE_VT_MSGTYPE_ACK))
914 return IXGBE_ERR_MBX;
915
916
917 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
918 if (hw->mac.max_tx_queues == 0 ||
919 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
920 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
921
922 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
923 if (hw->mac.max_rx_queues == 0 ||
924 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
925 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
926
927 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
928
929 if (*num_tcs > hw->mac.max_rx_queues)
930 *num_tcs = 1;
931
932 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
933
934 if (*default_tc >= hw->mac.max_tx_queues)
935 *default_tc = 0;
936 }
937
938 return err;
939 }
940
941 static const struct ixgbe_mac_operations ixgbevf_mac_ops = {
942 .init_hw = ixgbevf_init_hw_vf,
943 .reset_hw = ixgbevf_reset_hw_vf,
944 .start_hw = ixgbevf_start_hw_vf,
945 .get_mac_addr = ixgbevf_get_mac_addr_vf,
946 .stop_adapter = ixgbevf_stop_hw_vf,
947 .setup_link = ixgbevf_setup_mac_link_vf,
948 .check_link = ixgbevf_check_mac_link_vf,
949 .negotiate_api_version = ixgbevf_negotiate_api_version_vf,
950 .set_rar = ixgbevf_set_rar_vf,
951 .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf,
952 .update_xcast_mode = ixgbevf_update_xcast_mode,
953 .set_uc_addr = ixgbevf_set_uc_addr_vf,
954 .set_vfta = ixgbevf_set_vfta_vf,
955 .set_rlpml = ixgbevf_set_rlpml_vf,
956 };
957
958 static const struct ixgbe_mac_operations ixgbevf_hv_mac_ops = {
959 .init_hw = ixgbevf_init_hw_vf,
960 .reset_hw = ixgbevf_hv_reset_hw_vf,
961 .start_hw = ixgbevf_start_hw_vf,
962 .get_mac_addr = ixgbevf_get_mac_addr_vf,
963 .stop_adapter = ixgbevf_stop_hw_vf,
964 .setup_link = ixgbevf_setup_mac_link_vf,
965 .check_link = ixgbevf_hv_check_mac_link_vf,
966 .negotiate_api_version = ixgbevf_hv_negotiate_api_version_vf,
967 .set_rar = ixgbevf_hv_set_rar_vf,
968 .update_mc_addr_list = ixgbevf_hv_update_mc_addr_list_vf,
969 .update_xcast_mode = ixgbevf_hv_update_xcast_mode,
970 .set_uc_addr = ixgbevf_hv_set_uc_addr_vf,
971 .set_vfta = ixgbevf_hv_set_vfta_vf,
972 .set_rlpml = ixgbevf_hv_set_rlpml_vf,
973 };
974
975 const struct ixgbevf_info ixgbevf_82599_vf_info = {
976 .mac = ixgbe_mac_82599_vf,
977 .mac_ops = &ixgbevf_mac_ops,
978 };
979
980 const struct ixgbevf_info ixgbevf_82599_vf_hv_info = {
981 .mac = ixgbe_mac_82599_vf,
982 .mac_ops = &ixgbevf_hv_mac_ops,
983 };
984
985 const struct ixgbevf_info ixgbevf_X540_vf_info = {
986 .mac = ixgbe_mac_X540_vf,
987 .mac_ops = &ixgbevf_mac_ops,
988 };
989
990 const struct ixgbevf_info ixgbevf_X540_vf_hv_info = {
991 .mac = ixgbe_mac_X540_vf,
992 .mac_ops = &ixgbevf_hv_mac_ops,
993 };
994
995 const struct ixgbevf_info ixgbevf_X550_vf_info = {
996 .mac = ixgbe_mac_X550_vf,
997 .mac_ops = &ixgbevf_mac_ops,
998 };
999
1000 const struct ixgbevf_info ixgbevf_X550_vf_hv_info = {
1001 .mac = ixgbe_mac_X550_vf,
1002 .mac_ops = &ixgbevf_hv_mac_ops,
1003 };
1004
1005 const struct ixgbevf_info ixgbevf_X550EM_x_vf_info = {
1006 .mac = ixgbe_mac_X550EM_x_vf,
1007 .mac_ops = &ixgbevf_mac_ops,
1008 };
1009
1010 const struct ixgbevf_info ixgbevf_X550EM_x_vf_hv_info = {
1011 .mac = ixgbe_mac_X550EM_x_vf,
1012 .mac_ops = &ixgbevf_hv_mac_ops,
1013 };
1014
1015 const struct ixgbevf_info ixgbevf_x550em_a_vf_info = {
1016 .mac = ixgbe_mac_x550em_a_vf,
1017 .mac_ops = &ixgbevf_mac_ops,
1018 };