drivers/net/ethernet/intel/ice/ice.h

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This source file includes following definitions.
ice_irq_dynamic_ena
ice_netdev_to_pf
ice_get_main_vsi
   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Copyright (c) 2018, Intel Corporation. */
   3 
   4 #ifndef _ICE_H_
   5 #define _ICE_H_
   6 
   7 #include <linux/types.h>
   8 #include <linux/errno.h>
   9 #include <linux/kernel.h>
  10 #include <linux/module.h>
  11 #include <linux/firmware.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/compiler.h>
  14 #include <linux/etherdevice.h>
  15 #include <linux/skbuff.h>
  16 #include <linux/cpumask.h>
  17 #include <linux/rtnetlink.h>
  18 #include <linux/if_vlan.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/pci.h>
  21 #include <linux/workqueue.h>
  22 #include <linux/aer.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/ethtool.h>
  25 #include <linux/timer.h>
  26 #include <linux/delay.h>
  27 #include <linux/bitmap.h>
  28 #include <linux/log2.h>
  29 #include <linux/ip.h>
  30 #include <linux/sctp.h>
  31 #include <linux/ipv6.h>
  32 #include <linux/if_bridge.h>
  33 #include <linux/ctype.h>
  34 #include <linux/avf/virtchnl.h>
  35 #include <net/ipv6.h>
  36 #include "ice_devids.h"
  37 #include "ice_type.h"
  38 #include "ice_txrx.h"
  39 #include "ice_dcb.h"
  40 #include "ice_switch.h"
  41 #include "ice_common.h"
  42 #include "ice_sched.h"
  43 #include "ice_virtchnl_pf.h"
  44 #include "ice_sriov.h"
  45 
  46 extern const char ice_drv_ver[];
  47 #define ICE_BAR0                0
  48 #define ICE_REQ_DESC_MULTIPLE   32
  49 #define ICE_MIN_NUM_DESC        64
  50 #define ICE_MAX_NUM_DESC        8160
  51 #define ICE_DFLT_MIN_RX_DESC    512
  52 #define ICE_DFLT_NUM_TX_DESC    256
  53 #define ICE_DFLT_NUM_RX_DESC    2048
  54 
  55 #define ICE_DFLT_TRAFFIC_CLASS  BIT(0)
  56 #define ICE_INT_NAME_STR_LEN    (IFNAMSIZ + 16)
  57 #define ICE_AQ_LEN              64
  58 #define ICE_MBXSQ_LEN           64
  59 #define ICE_MBXRQ_LEN           512
  60 #define ICE_MIN_MSIX            2
  61 #define ICE_NO_VSI              0xffff
  62 #define ICE_VSI_MAP_CONTIG      0
  63 #define ICE_VSI_MAP_SCATTER     1
  64 #define ICE_MAX_SCATTER_TXQS    16
  65 #define ICE_MAX_SCATTER_RXQS    16
  66 #define ICE_Q_WAIT_RETRY_LIMIT  10
  67 #define ICE_Q_WAIT_MAX_RETRY    (5 * ICE_Q_WAIT_RETRY_LIMIT)
  68 #define ICE_MAX_LG_RSS_QS       256
  69 #define ICE_MAX_SMALL_RSS_QS    8
  70 #define ICE_RES_VALID_BIT       0x8000
  71 #define ICE_RES_MISC_VEC_ID     (ICE_RES_VALID_BIT - 1)
  72 #define ICE_INVAL_Q_INDEX       0xffff
  73 #define ICE_INVAL_VFID          256
  74 
  75 #define ICE_MAX_RESET_WAIT              20
  76 
  77 #define ICE_VSIQF_HKEY_ARRAY_SIZE       ((VSIQF_HKEY_MAX_INDEX + 1) *   4)
  78 
  79 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
  80 
  81 #define ICE_MAX_MTU     (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \
  82                         (ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2)))
  83 
  84 #define ICE_UP_TABLE_TRANSLATE(val, i) \
  85                 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
  86                   ICE_AQ_VSI_UP_TABLE_UP##i##_M)
  87 
  88 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
  89 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
  90 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
  91 
  92 /* Macro for each VSI in a PF */
  93 #define ice_for_each_vsi(pf, i) \
  94         for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
  95 
  96 /* Macros for each Tx/Rx ring in a VSI */
  97 #define ice_for_each_txq(vsi, i) \
  98         for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
  99 
 100 #define ice_for_each_rxq(vsi, i) \
 101         for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
 102 
 103 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
 104 #define ice_for_each_alloc_txq(vsi, i) \
 105         for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
 106 
 107 #define ice_for_each_alloc_rxq(vsi, i) \
 108         for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
 109 
 110 #define ice_for_each_q_vector(vsi, i) \
 111         for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
 112 
 113 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \
 114                                 ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX)
 115 
 116 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
 117                                      ICE_PROMISC_MCAST_TX | \
 118                                      ICE_PROMISC_UCAST_RX | \
 119                                      ICE_PROMISC_MCAST_RX | \
 120                                      ICE_PROMISC_VLAN_TX  | \
 121                                      ICE_PROMISC_VLAN_RX)
 122 
 123 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
 124 
 125 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
 126                                      ICE_PROMISC_MCAST_RX | \
 127                                      ICE_PROMISC_VLAN_TX  | \
 128                                      ICE_PROMISC_VLAN_RX)
 129 
 130 struct ice_tc_info {
 131         u16 qoffset;
 132         u16 qcount_tx;
 133         u16 qcount_rx;
 134         u8 netdev_tc;
 135 };
 136 
 137 struct ice_tc_cfg {
 138         u8 numtc; /* Total number of enabled TCs */
 139         u8 ena_tc; /* Tx map */
 140         struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
 141 };
 142 
 143 struct ice_res_tracker {
 144         u16 num_entries;
 145         u16 end;
 146         u16 list[1];
 147 };
 148 
 149 struct ice_qs_cfg {
 150         struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
 151         unsigned long *pf_map;
 152         unsigned long pf_map_size;
 153         unsigned int q_count;
 154         unsigned int scatter_count;
 155         u16 *vsi_map;
 156         u16 vsi_map_offset;
 157         u8 mapping_mode;
 158 };
 159 
 160 struct ice_sw {
 161         struct ice_pf *pf;
 162         u16 sw_id;              /* switch ID for this switch */
 163         u16 bridge_mode;        /* VEB/VEPA/Port Virtualizer */
 164 };
 165 
 166 enum ice_state {
 167         __ICE_TESTING,
 168         __ICE_DOWN,
 169         __ICE_NEEDS_RESTART,
 170         __ICE_PREPARED_FOR_RESET,       /* set by driver when prepared */
 171         __ICE_RESET_OICR_RECV,          /* set by driver after rcv reset OICR */
 172         __ICE_PFR_REQ,                  /* set by driver and peers */
 173         __ICE_CORER_REQ,                /* set by driver and peers */
 174         __ICE_GLOBR_REQ,                /* set by driver and peers */
 175         __ICE_CORER_RECV,               /* set by OICR handler */
 176         __ICE_GLOBR_RECV,               /* set by OICR handler */
 177         __ICE_EMPR_RECV,                /* set by OICR handler */
 178         __ICE_SUSPENDED,                /* set on module remove path */
 179         __ICE_RESET_FAILED,             /* set by reset/rebuild */
 180         /* When checking for the PF to be in a nominal operating state, the
 181          * bits that are grouped at the beginning of the list need to be
 182          * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will
 183          * be checked. If you need to add a bit into consideration for nominal
 184          * operating state, it must be added before
 185          * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
 186          * without appropriate consideration.
 187          */
 188         __ICE_STATE_NOMINAL_CHECK_BITS,
 189         __ICE_ADMINQ_EVENT_PENDING,
 190         __ICE_MAILBOXQ_EVENT_PENDING,
 191         __ICE_MDD_EVENT_PENDING,
 192         __ICE_VFLR_EVENT_PENDING,
 193         __ICE_FLTR_OVERFLOW_PROMISC,
 194         __ICE_VF_DIS,
 195         __ICE_CFG_BUSY,
 196         __ICE_SERVICE_SCHED,
 197         __ICE_SERVICE_DIS,
 198         __ICE_OICR_INTR_DIS,            /* Global OICR interrupt disabled */
 199         __ICE_STATE_NBITS               /* must be last */
 200 };
 201 
 202 enum ice_vsi_flags {
 203         ICE_VSI_FLAG_UMAC_FLTR_CHANGED,
 204         ICE_VSI_FLAG_MMAC_FLTR_CHANGED,
 205         ICE_VSI_FLAG_VLAN_FLTR_CHANGED,
 206         ICE_VSI_FLAG_PROMISC_CHANGED,
 207         ICE_VSI_FLAG_NBITS              /* must be last */
 208 };
 209 
 210 /* struct that defines a VSI, associated with a dev */
 211 struct ice_vsi {
 212         struct net_device *netdev;
 213         struct ice_sw *vsw;              /* switch this VSI is on */
 214         struct ice_pf *back;             /* back pointer to PF */
 215         struct ice_port_info *port_info; /* back pointer to port_info */
 216         struct ice_ring **rx_rings;      /* Rx ring array */
 217         struct ice_ring **tx_rings;      /* Tx ring array */
 218         struct ice_q_vector **q_vectors; /* q_vector array */
 219 
 220         irqreturn_t (*irq_handler)(int irq, void *data);
 221 
 222         u64 tx_linearize;
 223         DECLARE_BITMAP(state, __ICE_STATE_NBITS);
 224         DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS);
 225         unsigned int current_netdev_flags;
 226         u32 tx_restart;
 227         u32 tx_busy;
 228         u32 rx_buf_failed;
 229         u32 rx_page_failed;
 230         int num_q_vectors;
 231         int base_vector;                /* IRQ base for OS reserved vectors */
 232         enum ice_vsi_type type;
 233         u16 vsi_num;                    /* HW (absolute) index of this VSI */
 234         u16 idx;                        /* software index in pf->vsi[] */
 235 
 236         s16 vf_id;                      /* VF ID for SR-IOV VSIs */
 237 
 238         u16 ethtype;                    /* Ethernet protocol for pause frame */
 239 
 240         /* RSS config */
 241         u16 rss_table_size;     /* HW RSS table size */
 242         u16 rss_size;           /* Allocated RSS queues */
 243         u8 *rss_hkey_user;      /* User configured hash keys */
 244         u8 *rss_lut_user;       /* User configured lookup table entries */
 245         u8 rss_lut_type;        /* used to configure Get/Set RSS LUT AQ call */
 246 
 247         u16 max_frame;
 248         u16 rx_buf_len;
 249 
 250         struct ice_aqc_vsi_props info;   /* VSI properties */
 251 
 252         /* VSI stats */
 253         struct rtnl_link_stats64 net_stats;
 254         struct ice_eth_stats eth_stats;
 255         struct ice_eth_stats eth_stats_prev;
 256 
 257         struct list_head tmp_sync_list;         /* MAC filters to be synced */
 258         struct list_head tmp_unsync_list;       /* MAC filters to be unsynced */
 259 
 260         u8 irqs_ready:1;
 261         u8 current_isup:1;               /* Sync 'link up' logging */
 262         u8 stat_offsets_loaded:1;
 263         u8 vlan_ena:1;
 264 
 265         /* queue information */
 266         u8 tx_mapping_mode;              /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 267         u8 rx_mapping_mode;              /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 268         u16 *txq_map;                    /* index in pf->avail_txqs */
 269         u16 *rxq_map;                    /* index in pf->avail_rxqs */
 270         u16 alloc_txq;                   /* Allocated Tx queues */
 271         u16 num_txq;                     /* Used Tx queues */
 272         u16 alloc_rxq;                   /* Allocated Rx queues */
 273         u16 num_rxq;                     /* Used Rx queues */
 274         u16 num_rx_desc;
 275         u16 num_tx_desc;
 276         struct ice_tc_cfg tc_cfg;
 277 } ____cacheline_internodealigned_in_smp;
 278 
 279 /* struct that defines an interrupt vector */
 280 struct ice_q_vector {
 281         struct ice_vsi *vsi;
 282 
 283         u16 v_idx;                      /* index in the vsi->q_vector array. */
 284         u16 reg_idx;
 285         u8 num_ring_rx;                 /* total number of Rx rings in vector */
 286         u8 num_ring_tx;                 /* total number of Tx rings in vector */
 287         u8 itr_countdown;               /* when 0 should adjust adaptive ITR */
 288         /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
 289          * value to the device
 290          */
 291         u8 intrl;
 292 
 293         struct napi_struct napi;
 294 
 295         struct ice_ring_container rx;
 296         struct ice_ring_container tx;
 297 
 298         cpumask_t affinity_mask;
 299         struct irq_affinity_notify affinity_notify;
 300 
 301         char name[ICE_INT_NAME_STR_LEN];
 302 } ____cacheline_internodealigned_in_smp;
 303 
 304 enum ice_pf_flags {
 305         ICE_FLAG_FLTR_SYNC,
 306         ICE_FLAG_RSS_ENA,
 307         ICE_FLAG_SRIOV_ENA,
 308         ICE_FLAG_SRIOV_CAPABLE,
 309         ICE_FLAG_DCB_CAPABLE,
 310         ICE_FLAG_DCB_ENA,
 311         ICE_FLAG_ADV_FEATURES,
 312         ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
 313         ICE_FLAG_NO_MEDIA,
 314         ICE_FLAG_FW_LLDP_AGENT,
 315         ICE_FLAG_ETHTOOL_CTXT,          /* set when ethtool holds RTNL lock */
 316         ICE_PF_FLAGS_NBITS              /* must be last */
 317 };
 318 
 319 struct ice_pf {
 320         struct pci_dev *pdev;
 321 
 322         /* OS reserved IRQ details */
 323         struct msix_entry *msix_entries;
 324         struct ice_res_tracker *irq_tracker;
 325         /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
 326          * number of MSIX vectors needed for all SR-IOV VFs from the number of
 327          * MSIX vectors allowed on this PF.
 328          */
 329         u16 sriov_base_vector;
 330 
 331         struct ice_vsi **vsi;           /* VSIs created by the driver */
 332         struct ice_sw *first_sw;        /* first switch created by firmware */
 333         /* Virtchnl/SR-IOV config info */
 334         struct ice_vf *vf;
 335         int num_alloc_vfs;              /* actual number of VFs allocated */
 336         u16 num_vfs_supported;          /* num VFs supported for this PF */
 337         u16 num_vf_qps;                 /* num queue pairs per VF */
 338         u16 num_vf_msix;                /* num vectors per VF */
 339         DECLARE_BITMAP(state, __ICE_STATE_NBITS);
 340         DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
 341         unsigned long *avail_txqs;      /* bitmap to track PF Tx queue usage */
 342         unsigned long *avail_rxqs;      /* bitmap to track PF Rx queue usage */
 343         unsigned long serv_tmr_period;
 344         unsigned long serv_tmr_prev;
 345         struct timer_list serv_tmr;
 346         struct work_struct serv_task;
 347         struct mutex avail_q_mutex;     /* protects access to avail_[rx|tx]qs */
 348         struct mutex sw_mutex;          /* lock for protecting VSI alloc flow */
 349         u32 msg_enable;
 350         u32 hw_csum_rx_error;
 351         u32 oicr_idx;           /* Other interrupt cause MSIX vector index */
 352         u32 num_avail_sw_msix;  /* remaining MSIX SW vectors left unclaimed */
 353         u16 max_pf_txqs;        /* Total Tx queues PF wide */
 354         u16 max_pf_rxqs;        /* Total Rx queues PF wide */
 355         u32 num_lan_msix;       /* Total MSIX vectors for base driver */
 356         u16 num_lan_tx;         /* num LAN Tx queues setup */
 357         u16 num_lan_rx;         /* num LAN Rx queues setup */
 358         u16 next_vsi;           /* Next free slot in pf->vsi[] - 0-based! */
 359         u16 num_alloc_vsi;
 360         u16 corer_count;        /* Core reset count */
 361         u16 globr_count;        /* Global reset count */
 362         u16 empr_count;         /* EMP reset count */
 363         u16 pfr_count;          /* PF reset count */
 364 
 365         struct ice_hw_port_stats stats;
 366         struct ice_hw_port_stats stats_prev;
 367         struct ice_hw hw;
 368         u8 stat_prev_loaded:1; /* has previous stats been loaded */
 369 #ifdef CONFIG_DCB
 370         u16 dcbx_cap;
 371 #endif /* CONFIG_DCB */
 372         u32 tx_timeout_count;
 373         unsigned long tx_timeout_last_recovery;
 374         u32 tx_timeout_recovery_level;
 375         char int_name[ICE_INT_NAME_STR_LEN];
 376         u32 sw_int_count;
 377 };
 378 
 379 struct ice_netdev_priv {
 380         struct ice_vsi *vsi;
 381 };
 382 
 383 /**
 384  * ice_irq_dynamic_ena - Enable default interrupt generation settings
 385  * @hw: pointer to HW struct
 386  * @vsi: pointer to VSI struct, can be NULL
 387  * @q_vector: pointer to q_vector, can be NULL
 388  */
 389 static inline void
 390 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
 391                     struct ice_q_vector *q_vector)
 392 {
 393         u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
 394                                 ((struct ice_pf *)hw->back)->oicr_idx;
 395         int itr = ICE_ITR_NONE;
 396         u32 val;
 397 
 398         /* clear the PBA here, as this function is meant to clean out all
 399          * previous interrupts and enable the interrupt
 400          */
 401         val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
 402               (itr << GLINT_DYN_CTL_ITR_INDX_S);
 403         if (vsi)
 404                 if (test_bit(__ICE_DOWN, vsi->state))
 405                         return;
 406         wr32(hw, GLINT_DYN_CTL(vector), val);
 407 }
 408 
 409 /**
 410  * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
 411  * @netdev: pointer to the netdev struct
 412  */
 413 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
 414 {
 415         struct ice_netdev_priv *np = netdev_priv(netdev);
 416 
 417         return np->vsi->back;
 418 }
 419 
 420 /**
 421  * ice_get_main_vsi - Get the PF VSI
 422  * @pf: PF instance
 423  *
 424  * returns pf->vsi[0], which by definition is the PF VSI
 425  */
 426 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
 427 {
 428         if (pf->vsi)
 429                 return pf->vsi[0];
 430 
 431         return NULL;
 432 }
 433 
 434 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
 435 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
 436 void ice_set_ethtool_ops(struct net_device *netdev);
 437 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
 438 u16 ice_get_avail_txq_count(struct ice_pf *pf);
 439 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
 440 void ice_update_vsi_stats(struct ice_vsi *vsi);
 441 void ice_update_pf_stats(struct ice_pf *pf);
 442 int ice_up(struct ice_vsi *vsi);
 443 int ice_down(struct ice_vsi *vsi);
 444 int ice_vsi_cfg(struct ice_vsi *vsi);
 445 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
 446 int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
 447 int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
 448 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
 449 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
 450 #ifdef CONFIG_DCB
 451 int ice_pf_ena_all_vsi(struct ice_pf *pf, bool locked);
 452 void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked);
 453 #endif /* CONFIG_DCB */
 454 int ice_open(struct net_device *netdev);
 455 int ice_stop(struct net_device *netdev);
 456 
 457 #endif /* _ICE_H_ */
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/net/ethernet/intel/ice/ice.h

INCLUDED FROM

DEFINITIONS
