This source file includes following definitions.
- fm10k_read_pci_cfg_word
- fm10k_read_reg
- fm10k_hw_ready
- fm10k_macvlan_schedule
- fm10k_stop_macvlan_task
- fm10k_resume_macvlan_task
- fm10k_service_event_schedule
- fm10k_service_event_complete
- fm10k_stop_service_event
- fm10k_start_service_event
- fm10k_service_timer
- fm10k_prepare_for_reset
- fm10k_handle_reset
- fm10k_detach_subtask
- fm10k_reset_subtask
- fm10k_configure_swpri_map
- fm10k_watchdog_update_host_state
- fm10k_mbx_subtask
- fm10k_watchdog_host_is_ready
- fm10k_watchdog_host_not_ready
- fm10k_update_stats
- fm10k_watchdog_flush_tx
- fm10k_watchdog_subtask
- fm10k_check_hang_subtask
- fm10k_service_task
- fm10k_macvlan_task
- fm10k_configure_tx_ring
- fm10k_enable_tx_ring
- fm10k_configure_tx
- fm10k_configure_rx_ring
- fm10k_update_rx_drop_en
- fm10k_configure_dglort
- fm10k_configure_rx
- fm10k_napi_enable_all
- fm10k_msix_clean_rings
- fm10k_msix_mbx_vf
- fm10k_handle_fault
- fm10k_report_fault
- fm10k_reset_drop_on_empty
- fm10k_msix_mbx_pf
- fm10k_mbx_free_irq
- fm10k_mbx_mac_addr
- fm10k_mbx_error
- fm10k_mbx_request_irq_vf
- fm10k_lport_map
- fm10k_update_pvid
- fm10k_mbx_request_irq_pf
- fm10k_mbx_request_irq
- fm10k_qv_free_irq
- fm10k_qv_request_irq
- fm10k_up
- fm10k_napi_disable_all
- fm10k_down
- fm10k_sw_init
- fm10k_probe
- fm10k_remove
- fm10k_prepare_suspend
- fm10k_handle_resume
- fm10k_resume
- fm10k_suspend
- fm10k_io_error_detected
- fm10k_io_slot_reset
- fm10k_io_resume
- fm10k_io_reset_prepare
- fm10k_io_reset_done
- fm10k_register_pci_driver
- fm10k_unregister_pci_driver
1
2
3
4 #include <linux/module.h>
5 #include <linux/interrupt.h>
6 #include <linux/aer.h>
7
8 #include "fm10k.h"
9
10 static const struct fm10k_info *fm10k_info_tbl[] = {
11 [fm10k_device_pf] = &fm10k_pf_info,
12 [fm10k_device_vf] = &fm10k_vf_info,
13 };
14
15
16
17
18
19
20
21
22
23
24 static const struct pci_device_id fm10k_pci_tbl[] = {
25 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_PF), fm10k_device_pf },
26 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_SDI_FM10420_QDA2), fm10k_device_pf },
27 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_SDI_FM10420_DA2), fm10k_device_pf },
28 { PCI_VDEVICE(INTEL, FM10K_DEV_ID_VF), fm10k_device_vf },
29
30 { 0, }
31 };
32 MODULE_DEVICE_TABLE(pci, fm10k_pci_tbl);
33
34 u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg)
35 {
36 struct fm10k_intfc *interface = hw->back;
37 u16 value = 0;
38
39 if (FM10K_REMOVED(hw->hw_addr))
40 return ~value;
41
42 pci_read_config_word(interface->pdev, reg, &value);
43 if (value == 0xFFFF)
44 fm10k_write_flush(hw);
45
46 return value;
47 }
48
49 u32 fm10k_read_reg(struct fm10k_hw *hw, int reg)
50 {
51 u32 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
52 u32 value = 0;
53
54 if (FM10K_REMOVED(hw_addr))
55 return ~value;
56
57 value = readl(&hw_addr[reg]);
58 if (!(~value) && (!reg || !(~readl(hw_addr)))) {
59 struct fm10k_intfc *interface = hw->back;
60 struct net_device *netdev = interface->netdev;
61
62 hw->hw_addr = NULL;
63 netif_device_detach(netdev);
64 netdev_err(netdev, "PCIe link lost, device now detached\n");
65 }
66
67 return value;
68 }
69
70 static int fm10k_hw_ready(struct fm10k_intfc *interface)
71 {
72 struct fm10k_hw *hw = &interface->hw;
73
74 fm10k_write_flush(hw);
75
76 return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0;
77 }
78
79
80
81
82
83
84
85
86 void fm10k_macvlan_schedule(struct fm10k_intfc *interface)
87 {
88
89
90
91 if (!test_bit(__FM10K_MACVLAN_DISABLE, interface->state) &&
92 !test_and_set_bit(__FM10K_MACVLAN_SCHED, interface->state)) {
93 clear_bit(__FM10K_MACVLAN_REQUEST, interface->state);
94
95
96
97
98
99 queue_delayed_work(fm10k_workqueue,
100 &interface->macvlan_task, 10);
101 } else {
102 set_bit(__FM10K_MACVLAN_REQUEST, interface->state);
103 }
104 }
105
106
107
108
109
110
111
112
113 static void fm10k_stop_macvlan_task(struct fm10k_intfc *interface)
114 {
115
116 set_bit(__FM10K_MACVLAN_DISABLE, interface->state);
117
118
119 cancel_delayed_work_sync(&interface->macvlan_task);
120
121
122
123
124
125
126
127 clear_bit(__FM10K_MACVLAN_SCHED, interface->state);
128 }
129
130
131
132
133
134
135
136
137 static void fm10k_resume_macvlan_task(struct fm10k_intfc *interface)
138 {
139
140 clear_bit(__FM10K_MACVLAN_DISABLE, interface->state);
141
142
143
144
145 if (test_bit(__FM10K_MACVLAN_REQUEST, interface->state))
146 fm10k_macvlan_schedule(interface);
147 }
148
149 void fm10k_service_event_schedule(struct fm10k_intfc *interface)
150 {
151 if (!test_bit(__FM10K_SERVICE_DISABLE, interface->state) &&
152 !test_and_set_bit(__FM10K_SERVICE_SCHED, interface->state)) {
153 clear_bit(__FM10K_SERVICE_REQUEST, interface->state);
154 queue_work(fm10k_workqueue, &interface->service_task);
155 } else {
156 set_bit(__FM10K_SERVICE_REQUEST, interface->state);
157 }
158 }
159
160 static void fm10k_service_event_complete(struct fm10k_intfc *interface)
161 {
162 WARN_ON(!test_bit(__FM10K_SERVICE_SCHED, interface->state));
163
164
165 smp_mb__before_atomic();
166 clear_bit(__FM10K_SERVICE_SCHED, interface->state);
167
168
169
170
171
172 if (test_bit(__FM10K_SERVICE_REQUEST, interface->state))
173 fm10k_service_event_schedule(interface);
174 }
175
176 static void fm10k_stop_service_event(struct fm10k_intfc *interface)
177 {
178 set_bit(__FM10K_SERVICE_DISABLE, interface->state);
179 cancel_work_sync(&interface->service_task);
180
181
182
183
184
185
186
187
188 clear_bit(__FM10K_SERVICE_SCHED, interface->state);
189 }
190
191 static void fm10k_start_service_event(struct fm10k_intfc *interface)
192 {
193 clear_bit(__FM10K_SERVICE_DISABLE, interface->state);
194 fm10k_service_event_schedule(interface);
195 }
196
197
198
199
200
201 static void fm10k_service_timer(struct timer_list *t)
202 {
203 struct fm10k_intfc *interface = from_timer(interface, t,
204 service_timer);
205
206
207 mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
208
209 fm10k_service_event_schedule(interface);
210 }
211
212
213
214
215
216
217
218
219
220 static bool fm10k_prepare_for_reset(struct fm10k_intfc *interface)
221 {
222 struct net_device *netdev = interface->netdev;
223
224 WARN_ON(in_interrupt());
225
226
227 netif_trans_update(netdev);
228
229
230 if (test_and_set_bit(__FM10K_RESETTING, interface->state))
231 return false;
232
233
234
235
236
237 fm10k_stop_macvlan_task(interface);
238
239 rtnl_lock();
240
241 fm10k_iov_suspend(interface->pdev);
242
243 if (netif_running(netdev))
244 fm10k_close(netdev);
245
246 fm10k_mbx_free_irq(interface);
247
248
249 fm10k_clear_queueing_scheme(interface);
250
251
252 interface->last_reset = jiffies + (10 * HZ);
253
254 rtnl_unlock();
255
256 return true;
257 }
258
259 static int fm10k_handle_reset(struct fm10k_intfc *interface)
260 {
261 struct net_device *netdev = interface->netdev;
262 struct fm10k_hw *hw = &interface->hw;
263 int err;
264
265 WARN_ON(!test_bit(__FM10K_RESETTING, interface->state));
266
267 rtnl_lock();
268
269 pci_set_master(interface->pdev);
270
271
272 err = hw->mac.ops.reset_hw(hw);
273 if (err) {
274 dev_err(&interface->pdev->dev, "reset_hw failed: %d\n", err);
275 goto reinit_err;
276 }
277
278 err = hw->mac.ops.init_hw(hw);
279 if (err) {
280 dev_err(&interface->pdev->dev, "init_hw failed: %d\n", err);
281 goto reinit_err;
282 }
283
284 err = fm10k_init_queueing_scheme(interface);
285 if (err) {
286 dev_err(&interface->pdev->dev,
287 "init_queueing_scheme failed: %d\n", err);
288 goto reinit_err;
289 }
290
291
292 err = fm10k_mbx_request_irq(interface);
293 if (err)
294 goto err_mbx_irq;
295
296 err = fm10k_hw_ready(interface);
297 if (err)
298 goto err_open;
299
300
301 if (hw->mac.type == fm10k_mac_vf) {
302 if (is_valid_ether_addr(hw->mac.perm_addr)) {
303 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
304 ether_addr_copy(netdev->perm_addr, hw->mac.perm_addr);
305 ether_addr_copy(netdev->dev_addr, hw->mac.perm_addr);
306 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
307 }
308
309 if (hw->mac.vlan_override)
310 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
311 else
312 netdev->features |= NETIF_F_HW_VLAN_CTAG_RX;
313 }
314
315 err = netif_running(netdev) ? fm10k_open(netdev) : 0;
316 if (err)
317 goto err_open;
318
319 fm10k_iov_resume(interface->pdev);
320
321 rtnl_unlock();
322
323 fm10k_resume_macvlan_task(interface);
324
325 clear_bit(__FM10K_RESETTING, interface->state);
326
327 return err;
328 err_open:
329 fm10k_mbx_free_irq(interface);
330 err_mbx_irq:
331 fm10k_clear_queueing_scheme(interface);
332 reinit_err:
333 netif_device_detach(netdev);
334
335 rtnl_unlock();
336
337 clear_bit(__FM10K_RESETTING, interface->state);
338
339 return err;
340 }
341
342 static void fm10k_detach_subtask(struct fm10k_intfc *interface)
343 {
344 struct net_device *netdev = interface->netdev;
345 u32 __iomem *hw_addr;
346 u32 value;
347
348
349 if (netif_device_present(netdev) || interface->hw.hw_addr)
350 return;
351
352
353
354
355
356
357 if (fm10k_prepare_for_reset(interface))
358 set_bit(__FM10K_RESET_DETACHED, interface->state);
359
360
361 hw_addr = READ_ONCE(interface->uc_addr);
362 value = readl(hw_addr);
363 if (~value) {
364 int err;
365
366
367
368
369 if (!test_and_clear_bit(__FM10K_RESET_DETACHED,
370 interface->state))
371 return;
372
373
374 interface->hw.hw_addr = interface->uc_addr;
375
376
377
378
379 err = fm10k_handle_reset(interface);
380 if (err) {
381 netdev_err(netdev, "Unable to reset device: %d\n", err);
382 interface->hw.hw_addr = NULL;
383 return;
384 }
385
386
387 netif_device_attach(netdev);
388 netdev_warn(netdev, "PCIe link restored, device now attached\n");
389 return;
390 }
391 }
392
393 static void fm10k_reset_subtask(struct fm10k_intfc *interface)
394 {
395 int err;
396
397 if (!test_and_clear_bit(FM10K_FLAG_RESET_REQUESTED,
398 interface->flags))
399 return;
400
401
402
403
404
405
406
407
408 if (!fm10k_prepare_for_reset(interface))
409 return;
410
411 netdev_err(interface->netdev, "Reset interface\n");
412
413 err = fm10k_handle_reset(interface);
414 if (err)
415 dev_err(&interface->pdev->dev,
416 "fm10k_handle_reset failed: %d\n", err);
417 }
418
419
420
421
422
423
424
425 static void fm10k_configure_swpri_map(struct fm10k_intfc *interface)
426 {
427 struct net_device *netdev = interface->netdev;
428 struct fm10k_hw *hw = &interface->hw;
429 int i;
430
431
432 clear_bit(FM10K_FLAG_SWPRI_CONFIG, interface->flags);
433
434
435 if (hw->mac.type != fm10k_mac_pf)
436 return;
437
438
439 for (i = 0; i < FM10K_SWPRI_MAX; i++)
440 fm10k_write_reg(hw, FM10K_SWPRI_MAP(i),
441 netdev_get_prio_tc_map(netdev, i));
442 }
443
444
445
446
447
448 static void fm10k_watchdog_update_host_state(struct fm10k_intfc *interface)
449 {
450 struct fm10k_hw *hw = &interface->hw;
451 s32 err;
452
453 if (test_bit(__FM10K_LINK_DOWN, interface->state)) {
454 interface->host_ready = false;
455 if (time_is_after_jiffies(interface->link_down_event))
456 return;
457 clear_bit(__FM10K_LINK_DOWN, interface->state);
458 }
459
460 if (test_bit(FM10K_FLAG_SWPRI_CONFIG, interface->flags)) {
461 if (rtnl_trylock()) {
462 fm10k_configure_swpri_map(interface);
463 rtnl_unlock();
464 }
465 }
466
467
468 fm10k_mbx_lock(interface);
469
470 err = hw->mac.ops.get_host_state(hw, &interface->host_ready);
471 if (err && time_is_before_jiffies(interface->last_reset))
472 set_bit(FM10K_FLAG_RESET_REQUESTED, interface->flags);
473
474
475 fm10k_mbx_unlock(interface);
476 }
477
478
479
480
481
482
483
484 static void fm10k_mbx_subtask(struct fm10k_intfc *interface)
485 {
486
487 if (test_bit(__FM10K_RESETTING, interface->state))
488 return;
489
490
491 fm10k_watchdog_update_host_state(interface);
492
493
494 fm10k_iov_mbx(interface);
495 }
496
497
498
499
500
501 static void fm10k_watchdog_host_is_ready(struct fm10k_intfc *interface)
502 {
503 struct net_device *netdev = interface->netdev;
504
505
506 if (netif_carrier_ok(netdev))
507 return;
508
509 netif_info(interface, drv, netdev, "NIC Link is up\n");
510
511 netif_carrier_on(netdev);
512 netif_tx_wake_all_queues(netdev);
513 }
514
515
516
517
518
519 static void fm10k_watchdog_host_not_ready(struct fm10k_intfc *interface)
520 {
521 struct net_device *netdev = interface->netdev;
522
523
524 if (!netif_carrier_ok(netdev))
525 return;
526
527 netif_info(interface, drv, netdev, "NIC Link is down\n");
528
529 netif_carrier_off(netdev);
530 netif_tx_stop_all_queues(netdev);
531 }
532
533
534
535
536
537 void fm10k_update_stats(struct fm10k_intfc *interface)
538 {
539 struct net_device_stats *net_stats = &interface->netdev->stats;
540 struct fm10k_hw *hw = &interface->hw;
541 u64 hw_csum_tx_good = 0, hw_csum_rx_good = 0, rx_length_errors = 0;
542 u64 rx_switch_errors = 0, rx_drops = 0, rx_pp_errors = 0;
543 u64 rx_link_errors = 0;
544 u64 rx_errors = 0, rx_csum_errors = 0, tx_csum_errors = 0;
545 u64 restart_queue = 0, tx_busy = 0, alloc_failed = 0;
546 u64 rx_bytes_nic = 0, rx_pkts_nic = 0, rx_drops_nic = 0;
547 u64 tx_bytes_nic = 0, tx_pkts_nic = 0;
548 u64 bytes, pkts;
549 int i;
550
551
552 if (test_and_set_bit(__FM10K_UPDATING_STATS, interface->state))
553 return;
554
555
556 interface->next_stats_update = jiffies + HZ;
557
558
559 for (bytes = 0, pkts = 0, i = 0; i < interface->num_tx_queues; i++) {
560 struct fm10k_ring *tx_ring = READ_ONCE(interface->tx_ring[i]);
561
562 if (!tx_ring)
563 continue;
564
565 restart_queue += tx_ring->tx_stats.restart_queue;
566 tx_busy += tx_ring->tx_stats.tx_busy;
567 tx_csum_errors += tx_ring->tx_stats.csum_err;
568 bytes += tx_ring->stats.bytes;
569 pkts += tx_ring->stats.packets;
570 hw_csum_tx_good += tx_ring->tx_stats.csum_good;
571 }
572
573 interface->restart_queue = restart_queue;
574 interface->tx_busy = tx_busy;
575 net_stats->tx_bytes = bytes;
576 net_stats->tx_packets = pkts;
577 interface->tx_csum_errors = tx_csum_errors;
578 interface->hw_csum_tx_good = hw_csum_tx_good;
579
580
581 for (bytes = 0, pkts = 0, i = 0; i < interface->num_rx_queues; i++) {
582 struct fm10k_ring *rx_ring = READ_ONCE(interface->rx_ring[i]);
583
584 if (!rx_ring)
585 continue;
586
587 bytes += rx_ring->stats.bytes;
588 pkts += rx_ring->stats.packets;
589 alloc_failed += rx_ring->rx_stats.alloc_failed;
590 rx_csum_errors += rx_ring->rx_stats.csum_err;
591 rx_errors += rx_ring->rx_stats.errors;
592 hw_csum_rx_good += rx_ring->rx_stats.csum_good;
593 rx_switch_errors += rx_ring->rx_stats.switch_errors;
594 rx_drops += rx_ring->rx_stats.drops;
595 rx_pp_errors += rx_ring->rx_stats.pp_errors;
596 rx_link_errors += rx_ring->rx_stats.link_errors;
597 rx_length_errors += rx_ring->rx_stats.length_errors;
598 }
599
600 net_stats->rx_bytes = bytes;
601 net_stats->rx_packets = pkts;
602 interface->alloc_failed = alloc_failed;
603 interface->rx_csum_errors = rx_csum_errors;
604 interface->hw_csum_rx_good = hw_csum_rx_good;
605 interface->rx_switch_errors = rx_switch_errors;
606 interface->rx_drops = rx_drops;
607 interface->rx_pp_errors = rx_pp_errors;
608 interface->rx_link_errors = rx_link_errors;
609 interface->rx_length_errors = rx_length_errors;
610
611 hw->mac.ops.update_hw_stats(hw, &interface->stats);
612
613 for (i = 0; i < hw->mac.max_queues; i++) {
614 struct fm10k_hw_stats_q *q = &interface->stats.q[i];
615
616 tx_bytes_nic += q->tx_bytes.count;
617 tx_pkts_nic += q->tx_packets.count;
618 rx_bytes_nic += q->rx_bytes.count;
619 rx_pkts_nic += q->rx_packets.count;
620 rx_drops_nic += q->rx_drops.count;
621 }
622
623 interface->tx_bytes_nic = tx_bytes_nic;
624 interface->tx_packets_nic = tx_pkts_nic;
625 interface->rx_bytes_nic = rx_bytes_nic;
626 interface->rx_packets_nic = rx_pkts_nic;
627 interface->rx_drops_nic = rx_drops_nic;
628
629
630 net_stats->rx_errors = rx_errors;
631 net_stats->rx_dropped = interface->stats.nodesc_drop.count;
632
633 clear_bit(__FM10K_UPDATING_STATS, interface->state);
634 }
635
636
637
638
639
640 static void fm10k_watchdog_flush_tx(struct fm10k_intfc *interface)
641 {
642 int some_tx_pending = 0;
643 int i;
644
645
646 if (netif_carrier_ok(interface->netdev))
647 return;
648
649 for (i = 0; i < interface->num_tx_queues; i++) {
650 struct fm10k_ring *tx_ring = interface->tx_ring[i];
651
652 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
653 some_tx_pending = 1;
654 break;
655 }
656 }
657
658
659
660
661
662 if (some_tx_pending)
663 set_bit(FM10K_FLAG_RESET_REQUESTED, interface->flags);
664 }
665
666
667
668
669
670 static void fm10k_watchdog_subtask(struct fm10k_intfc *interface)
671 {
672
673 if (test_bit(__FM10K_DOWN, interface->state) ||
674 test_bit(__FM10K_RESETTING, interface->state))
675 return;
676
677 if (interface->host_ready)
678 fm10k_watchdog_host_is_ready(interface);
679 else
680 fm10k_watchdog_host_not_ready(interface);
681
682
683 if (time_is_before_jiffies(interface->next_stats_update))
684 fm10k_update_stats(interface);
685
686
687 fm10k_watchdog_flush_tx(interface);
688 }
689
690
691
692
693
694
695
696
697
698
699 static void fm10k_check_hang_subtask(struct fm10k_intfc *interface)
700 {
701
702 if (test_bit(__FM10K_DOWN, interface->state) ||
703 test_bit(__FM10K_RESETTING, interface->state))
704 return;
705
706
707 if (time_is_after_eq_jiffies(interface->next_tx_hang_check))
708 return;
709 interface->next_tx_hang_check = jiffies + (2 * HZ);
710
711 if (netif_carrier_ok(interface->netdev)) {
712 int i;
713
714
715 for (i = 0; i < interface->num_tx_queues; i++)
716 set_check_for_tx_hang(interface->tx_ring[i]);
717
718
719 for (i = 0; i < interface->num_q_vectors; i++) {
720 struct fm10k_q_vector *qv = interface->q_vector[i];
721
722 if (!qv->tx.count && !qv->rx.count)
723 continue;
724 writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr);
725 }
726 }
727 }
728
729
730
731
732
733 static void fm10k_service_task(struct work_struct *work)
734 {
735 struct fm10k_intfc *interface;
736
737 interface = container_of(work, struct fm10k_intfc, service_task);
738
739
740 fm10k_detach_subtask(interface);
741
742
743 fm10k_mbx_subtask(interface);
744 fm10k_reset_subtask(interface);
745
746
747 fm10k_watchdog_subtask(interface);
748 fm10k_check_hang_subtask(interface);
749
750
751 fm10k_service_event_complete(interface);
752 }
753
754
755
756
757
758
759
760
761
762
763
764
765 static void fm10k_macvlan_task(struct work_struct *work)
766 {
767 struct fm10k_macvlan_request *item;
768 struct fm10k_intfc *interface;
769 struct delayed_work *dwork;
770 struct list_head *requests;
771 struct fm10k_hw *hw;
772 unsigned long flags;
773
774 dwork = to_delayed_work(work);
775 interface = container_of(dwork, struct fm10k_intfc, macvlan_task);
776 hw = &interface->hw;
777 requests = &interface->macvlan_requests;
778
779 do {
780
781 spin_lock_irqsave(&interface->macvlan_lock, flags);
782 item = list_first_entry_or_null(requests,
783 struct fm10k_macvlan_request,
784 list);
785 if (item)
786 list_del_init(&item->list);
787
788 spin_unlock_irqrestore(&interface->macvlan_lock, flags);
789
790
791 if (!item)
792 goto done;
793
794 fm10k_mbx_lock(interface);
795
796
797
798
799
800
801 if (!hw->mbx.ops.tx_ready(&hw->mbx, FM10K_VFMBX_MSG_MTU + 5)) {
802 hw->mbx.ops.process(hw, &hw->mbx);
803 set_bit(__FM10K_MACVLAN_REQUEST, interface->state);
804 fm10k_mbx_unlock(interface);
805
806
807 spin_lock_irqsave(&interface->macvlan_lock, flags);
808 list_add(&item->list, requests);
809 spin_unlock_irqrestore(&interface->macvlan_lock, flags);
810 break;
811 }
812
813 switch (item->type) {
814 case FM10K_MC_MAC_REQUEST:
815 hw->mac.ops.update_mc_addr(hw,
816 item->mac.glort,
817 item->mac.addr,
818 item->mac.vid,
819 item->set);
820 break;
821 case FM10K_UC_MAC_REQUEST:
822 hw->mac.ops.update_uc_addr(hw,
823 item->mac.glort,
824 item->mac.addr,
825 item->mac.vid,
826 item->set,
827 0);
828 break;
829 case FM10K_VLAN_REQUEST:
830 hw->mac.ops.update_vlan(hw,
831 item->vlan.vid,
832 item->vlan.vsi,
833 item->set);
834 break;
835 default:
836 break;
837 }
838
839 fm10k_mbx_unlock(interface);
840
841
842 kfree(item);
843 } while (true);
844
845 done:
846 WARN_ON(!test_bit(__FM10K_MACVLAN_SCHED, interface->state));
847
848
849 smp_mb__before_atomic();
850 clear_bit(__FM10K_MACVLAN_SCHED, interface->state);
851
852
853
854
855
856 if (test_bit(__FM10K_MACVLAN_REQUEST, interface->state))
857 fm10k_macvlan_schedule(interface);
858 }
859
860
861
862
863
864
865
866
867 static void fm10k_configure_tx_ring(struct fm10k_intfc *interface,
868 struct fm10k_ring *ring)
869 {
870 struct fm10k_hw *hw = &interface->hw;
871 u64 tdba = ring->dma;
872 u32 size = ring->count * sizeof(struct fm10k_tx_desc);
873 u32 txint = FM10K_INT_MAP_DISABLE;
874 u32 txdctl = BIT(FM10K_TXDCTL_MAX_TIME_SHIFT) | FM10K_TXDCTL_ENABLE;
875 u8 reg_idx = ring->reg_idx;
876
877
878 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0);
879 fm10k_write_flush(hw);
880
881
882
883
884 fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
885 fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32);
886 fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size);
887
888
889 fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0);
890 fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0);
891
892
893 ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)];
894
895
896 ring->next_to_clean = 0;
897 ring->next_to_use = 0;
898
899
900 if (ring->q_vector) {
901 txint = ring->q_vector->v_idx + NON_Q_VECTORS;
902 txint |= FM10K_INT_MAP_TIMER0;
903 }
904
905 fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txint);
906
907
908 fm10k_write_reg(hw, FM10K_PFVTCTL(reg_idx),
909 FM10K_PFVTCTL_FTAG_DESC_ENABLE);
910
911
912 if (!test_and_set_bit(__FM10K_TX_XPS_INIT_DONE, ring->state) &&
913 ring->q_vector)
914 netif_set_xps_queue(ring->netdev,
915 &ring->q_vector->affinity_mask,
916 ring->queue_index);
917
918
919 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl);
920 }
921
922
923
924
925
926
927
928
929 static void fm10k_enable_tx_ring(struct fm10k_intfc *interface,
930 struct fm10k_ring *ring)
931 {
932 struct fm10k_hw *hw = &interface->hw;
933 int wait_loop = 10;
934 u32 txdctl;
935 u8 reg_idx = ring->reg_idx;
936
937
938 if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE)
939 return;
940
941
942 do {
943 usleep_range(1000, 2000);
944 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx));
945 } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop);
946 if (!wait_loop)
947 netif_err(interface, drv, interface->netdev,
948 "Could not enable Tx Queue %d\n", reg_idx);
949 }
950
951
952
953
954
955
956
957 static void fm10k_configure_tx(struct fm10k_intfc *interface)
958 {
959 int i;
960
961
962 for (i = 0; i < interface->num_tx_queues; i++)
963 fm10k_configure_tx_ring(interface, interface->tx_ring[i]);
964
965
966 for (i = 0; i < interface->num_tx_queues; i++)
967 fm10k_enable_tx_ring(interface, interface->tx_ring[i]);
968 }
969
970
971
972
973
974
975
976
977 static void fm10k_configure_rx_ring(struct fm10k_intfc *interface,
978 struct fm10k_ring *ring)
979 {
980 u64 rdba = ring->dma;
981 struct fm10k_hw *hw = &interface->hw;
982 u32 size = ring->count * sizeof(union fm10k_rx_desc);
983 u32 rxqctl, rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
984 u32 srrctl = FM10K_SRRCTL_BUFFER_CHAINING_EN;
985 u32 rxint = FM10K_INT_MAP_DISABLE;
986 u8 rx_pause = interface->rx_pause;
987 u8 reg_idx = ring->reg_idx;
988
989
990 rxqctl = fm10k_read_reg(hw, FM10K_RXQCTL(reg_idx));
991 rxqctl &= ~FM10K_RXQCTL_ENABLE;
992 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl);
993 fm10k_write_flush(hw);
994
995
996
997
998 fm10k_write_reg(hw, FM10K_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
999 fm10k_write_reg(hw, FM10K_RDBAH(reg_idx), rdba >> 32);
1000 fm10k_write_reg(hw, FM10K_RDLEN(reg_idx), size);
1001
1002
1003 fm10k_write_reg(hw, FM10K_RDH(reg_idx), 0);
1004 fm10k_write_reg(hw, FM10K_RDT(reg_idx), 0);
1005
1006
1007 ring->tail = &interface->uc_addr[FM10K_RDT(reg_idx)];
1008
1009
1010 ring->next_to_clean = 0;
1011 ring->next_to_use = 0;
1012 ring->next_to_alloc = 0;
1013
1014
1015 srrctl |= FM10K_RX_BUFSZ >> FM10K_SRRCTL_BSIZEPKT_SHIFT;
1016
1017
1018 srrctl |= FM10K_SRRCTL_LOOPBACK_SUPPRESS;
1019 fm10k_write_reg(hw, FM10K_SRRCTL(reg_idx), srrctl);
1020
1021
1022 #ifdef CONFIG_DCB
1023 if (interface->pfc_en)
1024 rx_pause = interface->pfc_en;
1025 #endif
1026 if (!(rx_pause & BIT(ring->qos_pc)))
1027 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
1028
1029 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
1030
1031
1032 ring->vid = hw->mac.default_vid;
1033
1034
1035 if (test_bit(hw->mac.default_vid, interface->active_vlans))
1036 ring->vid |= FM10K_VLAN_CLEAR;
1037
1038
1039 if (ring->q_vector) {
1040 rxint = ring->q_vector->v_idx + NON_Q_VECTORS;
1041 rxint |= FM10K_INT_MAP_TIMER1;
1042 }
1043
1044 fm10k_write_reg(hw, FM10K_RXINT(reg_idx), rxint);
1045
1046
1047 rxqctl = fm10k_read_reg(hw, FM10K_RXQCTL(reg_idx));
1048 rxqctl |= FM10K_RXQCTL_ENABLE;
1049 fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl);
1050
1051
1052 fm10k_alloc_rx_buffers(ring, fm10k_desc_unused(ring));
1053 }
1054
1055
1056
1057
1058
1059
1060
1061 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface)
1062 {
1063 struct fm10k_hw *hw = &interface->hw;
1064 u8 rx_pause = interface->rx_pause;
1065 int i;
1066
1067 #ifdef CONFIG_DCB
1068 if (interface->pfc_en)
1069 rx_pause = interface->pfc_en;
1070
1071 #endif
1072 for (i = 0; i < interface->num_rx_queues; i++) {
1073 struct fm10k_ring *ring = interface->rx_ring[i];
1074 u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
1075 u8 reg_idx = ring->reg_idx;
1076
1077 if (!(rx_pause & BIT(ring->qos_pc)))
1078 rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
1079
1080 fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
1081 }
1082 }
1083
1084
1085
1086
1087
1088
1089
1090 static void fm10k_configure_dglort(struct fm10k_intfc *interface)
1091 {
1092 struct fm10k_dglort_cfg dglort = { 0 };
1093 struct fm10k_hw *hw = &interface->hw;
1094 int i;
1095 u32 mrqc;
1096
1097
1098 for (i = 0; i < FM10K_RSSRK_SIZE; i++)
1099 fm10k_write_reg(hw, FM10K_RSSRK(0, i), interface->rssrk[i]);
1100
1101
1102 for (i = 0; i < FM10K_RETA_SIZE; i++)
1103 fm10k_write_reg(hw, FM10K_RETA(0, i), interface->reta[i]);
1104
1105
1106
1107
1108 mrqc = FM10K_MRQC_IPV4 |
1109 FM10K_MRQC_TCP_IPV4 |
1110 FM10K_MRQC_IPV6 |
1111 FM10K_MRQC_TCP_IPV6;
1112
1113 if (test_bit(FM10K_FLAG_RSS_FIELD_IPV4_UDP, interface->flags))
1114 mrqc |= FM10K_MRQC_UDP_IPV4;
1115 if (test_bit(FM10K_FLAG_RSS_FIELD_IPV6_UDP, interface->flags))
1116 mrqc |= FM10K_MRQC_UDP_IPV6;
1117
1118 fm10k_write_reg(hw, FM10K_MRQC(0), mrqc);
1119
1120
1121 dglort.inner_rss = 1;
1122 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
1123 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
1124 hw->mac.ops.configure_dglort_map(hw, &dglort);
1125
1126
1127 if (interface->glort_count > 64) {
1128 memset(&dglort, 0, sizeof(dglort));
1129 dglort.inner_rss = 1;
1130 dglort.glort = interface->glort + 64;
1131 dglort.idx = fm10k_dglort_pf_queue;
1132 dglort.queue_l = fls(interface->num_rx_queues - 1);
1133 hw->mac.ops.configure_dglort_map(hw, &dglort);
1134 }
1135
1136
1137 memset(&dglort, 0, sizeof(dglort));
1138 dglort.inner_rss = 1;
1139 dglort.glort = interface->glort;
1140 dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
1141 dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
1142
1143 dglort.idx = fm10k_dglort_pf_rss;
1144 if (interface->l2_accel)
1145 dglort.shared_l = fls(interface->l2_accel->size);
1146 hw->mac.ops.configure_dglort_map(hw, &dglort);
1147 }
1148
1149
1150
1151
1152
1153
1154
1155 static void fm10k_configure_rx(struct fm10k_intfc *interface)
1156 {
1157 int i;
1158
1159
1160 fm10k_configure_swpri_map(interface);
1161
1162
1163 fm10k_configure_dglort(interface);
1164
1165
1166 for (i = 0; i < interface->num_rx_queues; i++)
1167 fm10k_configure_rx_ring(interface, interface->rx_ring[i]);
1168
1169
1170 }
1171
1172 static void fm10k_napi_enable_all(struct fm10k_intfc *interface)
1173 {
1174 struct fm10k_q_vector *q_vector;
1175 int q_idx;
1176
1177 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
1178 q_vector = interface->q_vector[q_idx];
1179 napi_enable(&q_vector->napi);
1180 }
1181 }
1182
1183 static irqreturn_t fm10k_msix_clean_rings(int __always_unused irq, void *data)
1184 {
1185 struct fm10k_q_vector *q_vector = data;
1186
1187 if (q_vector->rx.count || q_vector->tx.count)
1188 napi_schedule_irqoff(&q_vector->napi);
1189
1190 return IRQ_HANDLED;
1191 }
1192
1193 static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data)
1194 {
1195 struct fm10k_intfc *interface = data;
1196 struct fm10k_hw *hw = &interface->hw;
1197 struct fm10k_mbx_info *mbx = &hw->mbx;
1198
1199
1200 fm10k_write_reg(hw, FM10K_VFITR(FM10K_MBX_VECTOR),
1201 (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
1202 FM10K_ITR_ENABLE);
1203
1204
1205 if (fm10k_mbx_trylock(interface)) {
1206 mbx->ops.process(hw, mbx);
1207 fm10k_mbx_unlock(interface);
1208 }
1209
1210 hw->mac.get_host_state = true;
1211 fm10k_service_event_schedule(interface);
1212
1213 return IRQ_HANDLED;
1214 }
1215
1216 #define FM10K_ERR_MSG(type) case (type): error = #type; break
1217 static void fm10k_handle_fault(struct fm10k_intfc *interface, int type,
1218 struct fm10k_fault *fault)
1219 {
1220 struct pci_dev *pdev = interface->pdev;
1221 struct fm10k_hw *hw = &interface->hw;
1222 struct fm10k_iov_data *iov_data = interface->iov_data;
1223 char *error;
1224
1225 switch (type) {
1226 case FM10K_PCA_FAULT:
1227 switch (fault->type) {
1228 default:
1229 error = "Unknown PCA error";
1230 break;
1231 FM10K_ERR_MSG(PCA_NO_FAULT);
1232 FM10K_ERR_MSG(PCA_UNMAPPED_ADDR);
1233 FM10K_ERR_MSG(PCA_BAD_QACCESS_PF);
1234 FM10K_ERR_MSG(PCA_BAD_QACCESS_VF);
1235 FM10K_ERR_MSG(PCA_MALICIOUS_REQ);
1236 FM10K_ERR_MSG(PCA_POISONED_TLP);
1237 FM10K_ERR_MSG(PCA_TLP_ABORT);
1238 }
1239 break;
1240 case FM10K_THI_FAULT:
1241 switch (fault->type) {
1242 default:
1243 error = "Unknown THI error";
1244 break;
1245 FM10K_ERR_MSG(THI_NO_FAULT);
1246 FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT);
1247 }
1248 break;
1249 case FM10K_FUM_FAULT:
1250 switch (fault->type) {
1251 default:
1252 error = "Unknown FUM error";
1253 break;
1254 FM10K_ERR_MSG(FUM_NO_FAULT);
1255 FM10K_ERR_MSG(FUM_UNMAPPED_ADDR);
1256 FM10K_ERR_MSG(FUM_BAD_VF_QACCESS);
1257 FM10K_ERR_MSG(FUM_ADD_DECODE_ERR);
1258 FM10K_ERR_MSG(FUM_RO_ERROR);
1259 FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR);
1260 FM10K_ERR_MSG(FUM_CSR_TIMEOUT);
1261 FM10K_ERR_MSG(FUM_INVALID_TYPE);
1262 FM10K_ERR_MSG(FUM_INVALID_LENGTH);
1263 FM10K_ERR_MSG(FUM_INVALID_BE);
1264 FM10K_ERR_MSG(FUM_INVALID_ALIGN);
1265 }
1266 break;
1267 default:
1268 error = "Undocumented fault";
1269 break;
1270 }
1271
1272 dev_warn(&pdev->dev,
1273 "%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n",
1274 error, fault->address, fault->specinfo,
1275 PCI_SLOT(fault->func), PCI_FUNC(fault->func));
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286 if (fault->func && iov_data) {
1287 int vf = fault->func - 1;
1288 struct fm10k_vf_info *vf_info = &iov_data->vf_info[vf];
1289
1290 hw->iov.ops.reset_lport(hw, vf_info);
1291 hw->iov.ops.reset_resources(hw, vf_info);
1292
1293
1294 hw->iov.ops.set_lport(hw, vf_info, vf,
1295 FM10K_VF_FLAG_MULTI_CAPABLE);
1296
1297
1298 vf_info->mbx.ops.connect(hw, &vf_info->mbx);
1299 }
1300 }
1301
1302 static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr)
1303 {
1304 struct fm10k_hw *hw = &interface->hw;
1305 struct fm10k_fault fault = { 0 };
1306 int type, err;
1307
1308 for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT;
1309 eicr;
1310 eicr >>= 1, type += FM10K_FAULT_SIZE) {
1311
1312 if (!(eicr & 0x1))
1313 continue;
1314
1315
1316 err = hw->mac.ops.get_fault(hw, type, &fault);
1317 if (err) {
1318 dev_err(&interface->pdev->dev,
1319 "error reading fault\n");
1320 continue;
1321 }
1322
1323 fm10k_handle_fault(interface, type, &fault);
1324 }
1325 }
1326
1327 static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr)
1328 {
1329 struct fm10k_hw *hw = &interface->hw;
1330 const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
1331 u32 maxholdq;
1332 int q;
1333
1334 if (!(eicr & FM10K_EICR_MAXHOLDTIME))
1335 return;
1336
1337 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7));
1338 if (maxholdq)
1339 fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq);
1340 for (q = 255;;) {
1341 if (maxholdq & BIT(31)) {
1342 if (q < FM10K_MAX_QUEUES_PF) {
1343 interface->rx_overrun_pf++;
1344 fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl);
1345 } else {
1346 interface->rx_overrun_vf++;
1347 }
1348 }
1349
1350 maxholdq *= 2;
1351 if (!maxholdq)
1352 q &= ~(32 - 1);
1353
1354 if (!q)
1355 break;
1356
1357 if (q-- % 32)
1358 continue;
1359
1360 maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32));
1361 if (maxholdq)
1362 fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq);
1363 }
1364 }
1365
1366 static irqreturn_t fm10k_msix_mbx_pf(int __always_unused irq, void *data)
1367 {
1368 struct fm10k_intfc *interface = data;
1369 struct fm10k_hw *hw = &interface->hw;
1370 struct fm10k_mbx_info *mbx = &hw->mbx;
1371 u32 eicr;
1372 s32 err = 0;
1373
1374
1375 eicr = fm10k_read_reg(hw, FM10K_EICR);
1376 fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX |
1377 FM10K_EICR_SWITCHREADY |
1378 FM10K_EICR_SWITCHNOTREADY));
1379
1380
1381 fm10k_report_fault(interface, eicr);
1382
1383
1384 fm10k_reset_drop_on_empty(interface, eicr);
1385
1386
1387 if (fm10k_mbx_trylock(interface)) {
1388 err = mbx->ops.process(hw, mbx);
1389
1390 fm10k_iov_event(interface);
1391 fm10k_mbx_unlock(interface);
1392 }
1393
1394 if (err == FM10K_ERR_RESET_REQUESTED)
1395 set_bit(FM10K_FLAG_RESET_REQUESTED, interface->flags);
1396
1397
1398 if (eicr & FM10K_EICR_SWITCHNOTREADY) {
1399
1400 interface->link_down_event = jiffies + (4 * HZ);
1401 set_bit(__FM10K_LINK_DOWN, interface->state);
1402
1403
1404 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
1405 }
1406
1407
1408 hw->mac.get_host_state = true;
1409
1410
1411 fm10k_service_event_schedule(interface);
1412
1413
1414 fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR),
1415 (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
1416 FM10K_ITR_ENABLE);
1417
1418 return IRQ_HANDLED;
1419 }
1420
1421 void fm10k_mbx_free_irq(struct fm10k_intfc *interface)
1422 {
1423 struct fm10k_hw *hw = &interface->hw;
1424 struct msix_entry *entry;
1425 int itr_reg;
1426
1427
1428 if (!interface->msix_entries)
1429 return;
1430
1431 entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1432
1433
1434 hw->mbx.ops.disconnect(hw, &hw->mbx);
1435
1436
1437 if (hw->mac.type == fm10k_mac_pf) {
1438 fm10k_write_reg(hw, FM10K_EIMR,
1439 FM10K_EIMR_DISABLE(PCA_FAULT) |
1440 FM10K_EIMR_DISABLE(FUM_FAULT) |
1441 FM10K_EIMR_DISABLE(MAILBOX) |
1442 FM10K_EIMR_DISABLE(SWITCHREADY) |
1443 FM10K_EIMR_DISABLE(SWITCHNOTREADY) |
1444 FM10K_EIMR_DISABLE(SRAMERROR) |
1445 FM10K_EIMR_DISABLE(VFLR) |
1446 FM10K_EIMR_DISABLE(MAXHOLDTIME));
1447 itr_reg = FM10K_ITR(FM10K_MBX_VECTOR);
1448 } else {
1449 itr_reg = FM10K_VFITR(FM10K_MBX_VECTOR);
1450 }
1451
1452 fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET);
1453
1454 free_irq(entry->vector, interface);
1455 }
1456
1457 static s32 fm10k_mbx_mac_addr(struct fm10k_hw *hw, u32 **results,
1458 struct fm10k_mbx_info *mbx)
1459 {
1460 bool vlan_override = hw->mac.vlan_override;
1461 u16 default_vid = hw->mac.default_vid;
1462 struct fm10k_intfc *interface;
1463 s32 err;
1464
1465 err = fm10k_msg_mac_vlan_vf(hw, results, mbx);
1466 if (err)
1467 return err;
1468
1469 interface = container_of(hw, struct fm10k_intfc, hw);
1470
1471
1472 if (is_valid_ether_addr(hw->mac.perm_addr) &&
1473 !ether_addr_equal(hw->mac.perm_addr, hw->mac.addr))
1474 set_bit(FM10K_FLAG_RESET_REQUESTED, interface->flags);
1475
1476
1477 if ((vlan_override != hw->mac.vlan_override) ||
1478 (default_vid != hw->mac.default_vid))
1479 set_bit(FM10K_FLAG_RESET_REQUESTED, interface->flags);
1480
1481 return 0;
1482 }
1483
1484
1485 static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results,
1486 struct fm10k_mbx_info __always_unused *mbx)
1487 {
1488 struct fm10k_intfc *interface;
1489 struct pci_dev *pdev;
1490
1491 interface = container_of(hw, struct fm10k_intfc, hw);
1492 pdev = interface->pdev;
1493
1494 dev_err(&pdev->dev, "Unknown message ID %u\n",
1495 **results & FM10K_TLV_ID_MASK);
1496
1497 return 0;
1498 }
1499
1500 static const struct fm10k_msg_data vf_mbx_data[] = {
1501 FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test),
1502 FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_mbx_mac_addr),
1503 FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf),
1504 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
1505 };
1506
1507 static int fm10k_mbx_request_irq_vf(struct fm10k_intfc *interface)
1508 {
1509 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1510 struct net_device *dev = interface->netdev;
1511 struct fm10k_hw *hw = &interface->hw;
1512 int err;
1513
1514
1515 u32 itr = entry->entry | FM10K_INT_MAP_TIMER0;
1516
1517
1518 err = hw->mbx.ops.register_handlers(&hw->mbx, vf_mbx_data);
1519 if (err)
1520 return err;
1521
1522
1523 err = request_irq(entry->vector, fm10k_msix_mbx_vf, 0,
1524 dev->name, interface);
1525 if (err) {
1526 netif_err(interface, probe, dev,
1527 "request_irq for msix_mbx failed: %d\n", err);
1528 return err;
1529 }
1530
1531
1532 fm10k_write_reg(hw, FM10K_VFINT_MAP, itr);
1533
1534
1535 fm10k_write_reg(hw, FM10K_VFITR(entry->entry), FM10K_ITR_ENABLE);
1536
1537 return 0;
1538 }
1539
1540 static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results,
1541 struct fm10k_mbx_info *mbx)
1542 {
1543 struct fm10k_intfc *interface;
1544 u32 dglort_map = hw->mac.dglort_map;
1545 s32 err;
1546
1547 interface = container_of(hw, struct fm10k_intfc, hw);
1548
1549 err = fm10k_msg_err_pf(hw, results, mbx);
1550 if (!err && hw->swapi.status) {
1551
1552 interface->link_down_event = jiffies + (2 * HZ);
1553 set_bit(__FM10K_LINK_DOWN, interface->state);
1554
1555
1556 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
1557
1558 fm10k_service_event_schedule(interface);
1559
1560
1561 if (interface->lport_map_failed)
1562 return 0;
1563
1564 interface->lport_map_failed = true;
1565
1566 if (hw->swapi.status == FM10K_MSG_ERR_PEP_NOT_SCHEDULED)
1567 dev_warn(&interface->pdev->dev,
1568 "cannot obtain link because the host interface is configured for a PCIe host interface bandwidth of zero\n");
1569 dev_warn(&interface->pdev->dev,
1570 "request logical port map failed: %d\n",
1571 hw->swapi.status);
1572
1573 return 0;
1574 }
1575
1576 err = fm10k_msg_lport_map_pf(hw, results, mbx);
1577 if (err)
1578 return err;
1579
1580 interface->lport_map_failed = false;
1581
1582
1583 if (dglort_map != hw->mac.dglort_map)
1584 set_bit(FM10K_FLAG_RESET_REQUESTED, interface->flags);
1585
1586 return 0;
1587 }
1588
1589 static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results,
1590 struct fm10k_mbx_info __always_unused *mbx)
1591 {
1592 struct fm10k_intfc *interface;
1593 u16 glort, pvid;
1594 u32 pvid_update;
1595 s32 err;
1596
1597 err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID],
1598 &pvid_update);
1599 if (err)
1600 return err;
1601
1602
1603 glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT);
1604 pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID);
1605
1606
1607 if (!fm10k_glort_valid_pf(hw, glort))
1608 return FM10K_ERR_PARAM;
1609
1610
1611 if (pvid >= FM10K_VLAN_TABLE_VID_MAX)
1612 return FM10K_ERR_PARAM;
1613
1614 interface = container_of(hw, struct fm10k_intfc, hw);
1615
1616
1617 err = fm10k_iov_update_pvid(interface, glort, pvid);
1618 if (!err)
1619 return 0;
1620
1621
1622 if (pvid != hw->mac.default_vid)
1623 set_bit(FM10K_FLAG_RESET_REQUESTED, interface->flags);
1624
1625 hw->mac.default_vid = pvid;
1626
1627 return 0;
1628 }
1629
1630 static const struct fm10k_msg_data pf_mbx_data[] = {
1631 FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf),
1632 FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf),
1633 FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map),
1634 FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf),
1635 FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf),
1636 FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid),
1637 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
1638 };
1639
1640 static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface)
1641 {
1642 struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
1643 struct net_device *dev = interface->netdev;
1644 struct fm10k_hw *hw = &interface->hw;
1645 int err;
1646
1647
1648 u32 mbx_itr = entry->entry | FM10K_INT_MAP_TIMER0;
1649 u32 other_itr = entry->entry | FM10K_INT_MAP_IMMEDIATE;
1650
1651
1652 err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data);
1653 if (err)
1654 return err;
1655
1656
1657 err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0,
1658 dev->name, interface);
1659 if (err) {
1660 netif_err(interface, probe, dev,
1661 "request_irq for msix_mbx failed: %d\n", err);
1662 return err;
1663 }
1664
1665
1666 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_pcie_fault), other_itr);
1667 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_switch_up_down), other_itr);
1668 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_sram), other_itr);
1669 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_max_hold_time), other_itr);
1670 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_vflr), other_itr);
1671
1672
1673 fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_mailbox), mbx_itr);
1674
1675
1676 fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) |
1677 FM10K_EIMR_ENABLE(FUM_FAULT) |
1678 FM10K_EIMR_ENABLE(MAILBOX) |
1679 FM10K_EIMR_ENABLE(SWITCHREADY) |
1680 FM10K_EIMR_ENABLE(SWITCHNOTREADY) |
1681 FM10K_EIMR_ENABLE(SRAMERROR) |
1682 FM10K_EIMR_ENABLE(VFLR) |
1683 FM10K_EIMR_ENABLE(MAXHOLDTIME));
1684
1685
1686 fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE);
1687
1688 return 0;
1689 }
1690
1691 int fm10k_mbx_request_irq(struct fm10k_intfc *interface)
1692 {
1693 struct fm10k_hw *hw = &interface->hw;
1694 int err;
1695
1696
1697 if (hw->mac.type == fm10k_mac_pf)
1698 err = fm10k_mbx_request_irq_pf(interface);
1699 else
1700 err = fm10k_mbx_request_irq_vf(interface);
1701 if (err)
1702 return err;
1703
1704
1705 err = hw->mbx.ops.connect(hw, &hw->mbx);
1706
1707
1708 if (err)
1709 fm10k_mbx_free_irq(interface);
1710
1711 return err;
1712 }
1713
1714
1715
1716
1717
1718
1719
1720 void fm10k_qv_free_irq(struct fm10k_intfc *interface)
1721 {
1722 int vector = interface->num_q_vectors;
1723 struct msix_entry *entry;
1724
1725 entry = &interface->msix_entries[NON_Q_VECTORS + vector];
1726
1727 while (vector) {
1728 struct fm10k_q_vector *q_vector;
1729
1730 vector--;
1731 entry--;
1732 q_vector = interface->q_vector[vector];
1733
1734 if (!q_vector->tx.count && !q_vector->rx.count)
1735 continue;
1736
1737
1738 irq_set_affinity_hint(entry->vector, NULL);
1739
1740
1741 writel(FM10K_ITR_MASK_SET, q_vector->itr);
1742
1743 free_irq(entry->vector, q_vector);
1744 }
1745 }
1746
1747
1748
1749
1750
1751
1752
1753
1754 int fm10k_qv_request_irq(struct fm10k_intfc *interface)
1755 {
1756 struct net_device *dev = interface->netdev;
1757 struct fm10k_hw *hw = &interface->hw;
1758 struct msix_entry *entry;
1759 unsigned int ri = 0, ti = 0;
1760 int vector, err;
1761
1762 entry = &interface->msix_entries[NON_Q_VECTORS];
1763
1764 for (vector = 0; vector < interface->num_q_vectors; vector++) {
1765 struct fm10k_q_vector *q_vector = interface->q_vector[vector];
1766
1767
1768 if (q_vector->tx.count && q_vector->rx.count) {
1769 snprintf(q_vector->name, sizeof(q_vector->name),
1770 "%s-TxRx-%u", dev->name, ri++);
1771 ti++;
1772 } else if (q_vector->rx.count) {
1773 snprintf(q_vector->name, sizeof(q_vector->name),
1774 "%s-rx-%u", dev->name, ri++);
1775 } else if (q_vector->tx.count) {
1776 snprintf(q_vector->name, sizeof(q_vector->name),
1777 "%s-tx-%u", dev->name, ti++);
1778 } else {
1779
1780 continue;
1781 }
1782
1783
1784 q_vector->itr = (hw->mac.type == fm10k_mac_pf) ?
1785 &interface->uc_addr[FM10K_ITR(entry->entry)] :
1786 &interface->uc_addr[FM10K_VFITR(entry->entry)];
1787
1788
1789 err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0,
1790 q_vector->name, q_vector);
1791 if (err) {
1792 netif_err(interface, probe, dev,
1793 "request_irq failed for MSIX interrupt Error: %d\n",
1794 err);
1795 goto err_out;
1796 }
1797
1798
1799 irq_set_affinity_hint(entry->vector, &q_vector->affinity_mask);
1800
1801
1802 writel(FM10K_ITR_ENABLE, q_vector->itr);
1803
1804 entry++;
1805 }
1806
1807 return 0;
1808
1809 err_out:
1810
1811 while (vector) {
1812 struct fm10k_q_vector *q_vector;
1813
1814 entry--;
1815 vector--;
1816 q_vector = interface->q_vector[vector];
1817
1818 if (!q_vector->tx.count && !q_vector->rx.count)
1819 continue;
1820
1821
1822 irq_set_affinity_hint(entry->vector, NULL);
1823
1824
1825 writel(FM10K_ITR_MASK_SET, q_vector->itr);
1826
1827 free_irq(entry->vector, q_vector);
1828 }
1829
1830 return err;
1831 }
1832
1833 void fm10k_up(struct fm10k_intfc *interface)
1834 {
1835 struct fm10k_hw *hw = &interface->hw;
1836
1837
1838 hw->mac.ops.start_hw(hw);
1839
1840
1841 fm10k_configure_tx(interface);
1842
1843
1844 fm10k_configure_rx(interface);
1845
1846
1847 hw->mac.ops.update_int_moderator(hw);
1848
1849
1850 clear_bit(__FM10K_UPDATING_STATS, interface->state);
1851
1852
1853 clear_bit(__FM10K_DOWN, interface->state);
1854
1855
1856 fm10k_napi_enable_all(interface);
1857
1858
1859 fm10k_restore_rx_state(interface);
1860
1861
1862 netif_tx_start_all_queues(interface->netdev);
1863
1864
1865 hw->mac.get_host_state = true;
1866 mod_timer(&interface->service_timer, jiffies);
1867 }
1868
1869 static void fm10k_napi_disable_all(struct fm10k_intfc *interface)
1870 {
1871 struct fm10k_q_vector *q_vector;
1872 int q_idx;
1873
1874 for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
1875 q_vector = interface->q_vector[q_idx];
1876 napi_disable(&q_vector->napi);
1877 }
1878 }
1879
1880 void fm10k_down(struct fm10k_intfc *interface)
1881 {
1882 struct net_device *netdev = interface->netdev;
1883 struct fm10k_hw *hw = &interface->hw;
1884 int err, i = 0, count = 0;
1885
1886
1887 if (test_and_set_bit(__FM10K_DOWN, interface->state))
1888 return;
1889
1890
1891 netif_carrier_off(netdev);
1892
1893
1894 netif_tx_stop_all_queues(netdev);
1895 netif_tx_disable(netdev);
1896
1897
1898 fm10k_reset_rx_state(interface);
1899
1900
1901 fm10k_napi_disable_all(interface);
1902
1903
1904 fm10k_update_stats(interface);
1905
1906
1907 while (test_and_set_bit(__FM10K_UPDATING_STATS, interface->state))
1908 usleep_range(1000, 2000);
1909
1910
1911 if (FM10K_REMOVED(hw->hw_addr))
1912 goto skip_tx_dma_drain;
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922 err = hw->mac.ops.stop_hw(hw);
1923 if (err != FM10K_ERR_REQUESTS_PENDING)
1924 goto skip_tx_dma_drain;
1925
1926 #define TX_DMA_DRAIN_RETRIES 25
1927 for (count = 0; count < TX_DMA_DRAIN_RETRIES; count++) {
1928 usleep_range(10000, 20000);
1929
1930
1931 for (; i < interface->num_tx_queues; i++)
1932 if (fm10k_get_tx_pending(interface->tx_ring[i], false))
1933 break;
1934
1935
1936 if (i == interface->num_tx_queues)
1937 break;
1938 }
1939
1940 if (count >= TX_DMA_DRAIN_RETRIES)
1941 dev_err(&interface->pdev->dev,
1942 "Tx queues failed to drain after %d tries. Tx DMA is probably hung.\n",
1943 count);
1944 skip_tx_dma_drain:
1945
1946 err = hw->mac.ops.stop_hw(hw);
1947 if (err == FM10K_ERR_REQUESTS_PENDING)
1948 dev_err(&interface->pdev->dev,
1949 "due to pending requests hw was not shut down gracefully\n");
1950 else if (err)
1951 dev_err(&interface->pdev->dev, "stop_hw failed: %d\n", err);
1952
1953
1954 fm10k_clean_all_tx_rings(interface);
1955 fm10k_clean_all_rx_rings(interface);
1956 }
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967 static int fm10k_sw_init(struct fm10k_intfc *interface,
1968 const struct pci_device_id *ent)
1969 {
1970 const struct fm10k_info *fi = fm10k_info_tbl[ent->driver_data];
1971 struct fm10k_hw *hw = &interface->hw;
1972 struct pci_dev *pdev = interface->pdev;
1973 struct net_device *netdev = interface->netdev;
1974 u32 rss_key[FM10K_RSSRK_SIZE];
1975 unsigned int rss;
1976 int err;
1977
1978
1979 hw->back = interface;
1980 hw->hw_addr = interface->uc_addr;
1981
1982
1983 hw->vendor_id = pdev->vendor;
1984 hw->device_id = pdev->device;
1985 hw->revision_id = pdev->revision;
1986 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1987 hw->subsystem_device_id = pdev->subsystem_device;
1988
1989
1990 memcpy(&hw->mac.ops, fi->mac_ops, sizeof(hw->mac.ops));
1991 hw->mac.type = fi->mac;
1992
1993
1994 if (fi->iov_ops)
1995 memcpy(&hw->iov.ops, fi->iov_ops, sizeof(hw->iov.ops));
1996
1997
1998 rss = min_t(int, FM10K_MAX_RSS_INDICES, num_online_cpus());
1999 interface->ring_feature[RING_F_RSS].limit = rss;
2000 fi->get_invariants(hw);
2001
2002
2003 if (hw->mac.ops.get_bus_info)
2004 hw->mac.ops.get_bus_info(hw);
2005
2006
2007 if (hw->mac.ops.set_dma_mask)
2008 hw->mac.ops.set_dma_mask(hw, dma_get_mask(&pdev->dev));
2009
2010
2011 if (dma_get_mask(&pdev->dev) > DMA_BIT_MASK(32)) {
2012 netdev->features |= NETIF_F_HIGHDMA;
2013 netdev->vlan_features |= NETIF_F_HIGHDMA;
2014 }
2015
2016
2017 err = hw->mac.ops.reset_hw(hw);
2018 if (err) {
2019 dev_err(&pdev->dev, "reset_hw failed: %d\n", err);
2020 return err;
2021 }
2022
2023 err = hw->mac.ops.init_hw(hw);
2024 if (err) {
2025 dev_err(&pdev->dev, "init_hw failed: %d\n", err);
2026 return err;
2027 }
2028
2029
2030 hw->mac.ops.update_hw_stats(hw, &interface->stats);
2031
2032
2033 pci_sriov_set_totalvfs(pdev, hw->iov.total_vfs);
2034
2035
2036 eth_random_addr(hw->mac.addr);
2037
2038
2039 err = hw->mac.ops.read_mac_addr(hw);
2040 if (err) {
2041 dev_warn(&pdev->dev,
2042 "Failed to obtain MAC address defaulting to random\n");
2043
2044 netdev->addr_assign_type |= NET_ADDR_RANDOM;
2045 }
2046
2047 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
2048 ether_addr_copy(netdev->perm_addr, hw->mac.addr);
2049
2050 if (!is_valid_ether_addr(netdev->perm_addr)) {
2051 dev_err(&pdev->dev, "Invalid MAC Address\n");
2052 return -EIO;
2053 }
2054
2055
2056 fm10k_dcbnl_set_ops(netdev);
2057
2058
2059 interface->tx_ring_count = FM10K_DEFAULT_TXD;
2060 interface->rx_ring_count = FM10K_DEFAULT_RXD;
2061
2062
2063 interface->tx_itr = FM10K_TX_ITR_DEFAULT;
2064 interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_RX_ITR_DEFAULT;
2065
2066
2067 INIT_LIST_HEAD(&interface->vxlan_port);
2068 INIT_LIST_HEAD(&interface->geneve_port);
2069
2070
2071 INIT_LIST_HEAD(&interface->macvlan_requests);
2072
2073 netdev_rss_key_fill(rss_key, sizeof(rss_key));
2074 memcpy(interface->rssrk, rss_key, sizeof(rss_key));
2075
2076
2077 spin_lock_init(&interface->mbx_lock);
2078 spin_lock_init(&interface->macvlan_lock);
2079
2080
2081 set_bit(__FM10K_DOWN, interface->state);
2082 set_bit(__FM10K_UPDATING_STATS, interface->state);
2083
2084 return 0;
2085 }
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098 static int fm10k_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2099 {
2100 struct net_device *netdev;
2101 struct fm10k_intfc *interface;
2102 int err;
2103
2104 if (pdev->error_state != pci_channel_io_normal) {
2105 dev_err(&pdev->dev,
2106 "PCI device still in an error state. Unable to load...\n");
2107 return -EIO;
2108 }
2109
2110 err = pci_enable_device_mem(pdev);
2111 if (err) {
2112 dev_err(&pdev->dev,
2113 "PCI enable device failed: %d\n", err);
2114 return err;
2115 }
2116
2117 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));
2118 if (err)
2119 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2120 if (err) {
2121 dev_err(&pdev->dev,
2122 "DMA configuration failed: %d\n", err);
2123 goto err_dma;
2124 }
2125
2126 err = pci_request_mem_regions(pdev, fm10k_driver_name);
2127 if (err) {
2128 dev_err(&pdev->dev,
2129 "pci_request_selected_regions failed: %d\n", err);
2130 goto err_pci_reg;
2131 }
2132
2133 pci_enable_pcie_error_reporting(pdev);
2134
2135 pci_set_master(pdev);
2136 pci_save_state(pdev);
2137
2138 netdev = fm10k_alloc_netdev(fm10k_info_tbl[ent->driver_data]);
2139 if (!netdev) {
2140 err = -ENOMEM;
2141 goto err_alloc_netdev;
2142 }
2143
2144 SET_NETDEV_DEV(netdev, &pdev->dev);
2145
2146 interface = netdev_priv(netdev);
2147 pci_set_drvdata(pdev, interface);
2148
2149 interface->netdev = netdev;
2150 interface->pdev = pdev;
2151
2152 interface->uc_addr = ioremap(pci_resource_start(pdev, 0),
2153 FM10K_UC_ADDR_SIZE);
2154 if (!interface->uc_addr) {
2155 err = -EIO;
2156 goto err_ioremap;
2157 }
2158
2159 err = fm10k_sw_init(interface, ent);
2160 if (err)
2161 goto err_sw_init;
2162
2163
2164 fm10k_dbg_intfc_init(interface);
2165
2166 err = fm10k_init_queueing_scheme(interface);
2167 if (err)
2168 goto err_sw_init;
2169
2170
2171
2172
2173
2174 set_bit(__FM10K_SERVICE_DISABLE, interface->state);
2175
2176 err = fm10k_mbx_request_irq(interface);
2177 if (err)
2178 goto err_mbx_interrupt;
2179
2180
2181 err = fm10k_hw_ready(interface);
2182 if (err)
2183 goto err_register;
2184
2185 err = register_netdev(netdev);
2186 if (err)
2187 goto err_register;
2188
2189
2190 netif_carrier_off(netdev);
2191
2192
2193 netif_tx_stop_all_queues(netdev);
2194
2195
2196
2197
2198 timer_setup(&interface->service_timer, fm10k_service_timer, 0);
2199 INIT_WORK(&interface->service_task, fm10k_service_task);
2200
2201
2202 INIT_DELAYED_WORK(&interface->macvlan_task, fm10k_macvlan_task);
2203
2204
2205 mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
2206
2207
2208 pcie_print_link_status(interface->pdev);
2209
2210
2211 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
2212
2213
2214 fm10k_iov_configure(pdev, 0);
2215
2216
2217 clear_bit(__FM10K_SERVICE_DISABLE, interface->state);
2218 fm10k_service_event_schedule(interface);
2219
2220 return 0;
2221
2222 err_register:
2223 fm10k_mbx_free_irq(interface);
2224 err_mbx_interrupt:
2225 fm10k_clear_queueing_scheme(interface);
2226 err_sw_init:
2227 if (interface->sw_addr)
2228 iounmap(interface->sw_addr);
2229 iounmap(interface->uc_addr);
2230 err_ioremap:
2231 free_netdev(netdev);
2232 err_alloc_netdev:
2233 pci_release_mem_regions(pdev);
2234 err_pci_reg:
2235 err_dma:
2236 pci_disable_device(pdev);
2237 return err;
2238 }
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249 static void fm10k_remove(struct pci_dev *pdev)
2250 {
2251 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2252 struct net_device *netdev = interface->netdev;
2253
2254 del_timer_sync(&interface->service_timer);
2255
2256 fm10k_stop_service_event(interface);
2257 fm10k_stop_macvlan_task(interface);
2258
2259
2260 fm10k_clear_macvlan_queue(interface, interface->glort, true);
2261
2262
2263 if (netdev->reg_state == NETREG_REGISTERED)
2264 unregister_netdev(netdev);
2265
2266
2267 fm10k_iov_disable(pdev);
2268
2269
2270 fm10k_mbx_free_irq(interface);
2271
2272
2273 fm10k_clear_queueing_scheme(interface);
2274
2275
2276 fm10k_dbg_intfc_exit(interface);
2277
2278 if (interface->sw_addr)
2279 iounmap(interface->sw_addr);
2280 iounmap(interface->uc_addr);
2281
2282 free_netdev(netdev);
2283
2284 pci_release_mem_regions(pdev);
2285
2286 pci_disable_pcie_error_reporting(pdev);
2287
2288 pci_disable_device(pdev);
2289 }
2290
2291 static void fm10k_prepare_suspend(struct fm10k_intfc *interface)
2292 {
2293
2294
2295
2296
2297
2298
2299
2300
2301 fm10k_stop_service_event(interface);
2302
2303 if (fm10k_prepare_for_reset(interface))
2304 set_bit(__FM10K_RESET_SUSPENDED, interface->state);
2305 }
2306
2307 static int fm10k_handle_resume(struct fm10k_intfc *interface)
2308 {
2309 struct fm10k_hw *hw = &interface->hw;
2310 int err;
2311
2312
2313
2314
2315 if (!test_and_clear_bit(__FM10K_RESET_SUSPENDED, interface->state))
2316 dev_warn(&interface->pdev->dev,
2317 "Device was shut down as part of suspend... Attempting to recover\n");
2318
2319
2320 hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
2321
2322 err = fm10k_handle_reset(interface);
2323 if (err)
2324 return err;
2325
2326
2327
2328
2329 interface->host_ready = false;
2330 fm10k_watchdog_host_not_ready(interface);
2331
2332
2333 interface->link_down_event = jiffies + (HZ);
2334 set_bit(__FM10K_LINK_DOWN, interface->state);
2335
2336
2337 fm10k_start_service_event(interface);
2338
2339
2340 fm10k_macvlan_schedule(interface);
2341
2342 return 0;
2343 }
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353 static int __maybe_unused fm10k_resume(struct device *dev)
2354 {
2355 struct fm10k_intfc *interface = dev_get_drvdata(dev);
2356 struct net_device *netdev = interface->netdev;
2357 struct fm10k_hw *hw = &interface->hw;
2358 int err;
2359
2360
2361 hw->hw_addr = interface->uc_addr;
2362
2363 err = fm10k_handle_resume(interface);
2364 if (err)
2365 return err;
2366
2367 netif_device_attach(netdev);
2368
2369 return 0;
2370 }
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380 static int __maybe_unused fm10k_suspend(struct device *dev)
2381 {
2382 struct fm10k_intfc *interface = dev_get_drvdata(dev);
2383 struct net_device *netdev = interface->netdev;
2384
2385 netif_device_detach(netdev);
2386
2387 fm10k_prepare_suspend(interface);
2388
2389 return 0;
2390 }
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400 static pci_ers_result_t fm10k_io_error_detected(struct pci_dev *pdev,
2401 pci_channel_state_t state)
2402 {
2403 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2404 struct net_device *netdev = interface->netdev;
2405
2406 netif_device_detach(netdev);
2407
2408 if (state == pci_channel_io_perm_failure)
2409 return PCI_ERS_RESULT_DISCONNECT;
2410
2411 fm10k_prepare_suspend(interface);
2412
2413
2414 return PCI_ERS_RESULT_NEED_RESET;
2415 }
2416
2417
2418
2419
2420
2421
2422
2423 static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev)
2424 {
2425 pci_ers_result_t result;
2426
2427 if (pci_reenable_device(pdev)) {
2428 dev_err(&pdev->dev,
2429 "Cannot re-enable PCI device after reset.\n");
2430 result = PCI_ERS_RESULT_DISCONNECT;
2431 } else {
2432 pci_set_master(pdev);
2433 pci_restore_state(pdev);
2434
2435
2436
2437
2438 pci_save_state(pdev);
2439
2440 pci_wake_from_d3(pdev, false);
2441
2442 result = PCI_ERS_RESULT_RECOVERED;
2443 }
2444
2445 return result;
2446 }
2447
2448
2449
2450
2451
2452
2453
2454
2455 static void fm10k_io_resume(struct pci_dev *pdev)
2456 {
2457 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2458 struct net_device *netdev = interface->netdev;
2459 int err;
2460
2461 err = fm10k_handle_resume(interface);
2462
2463 if (err)
2464 dev_warn(&pdev->dev,
2465 "%s failed: %d\n", __func__, err);
2466 else
2467 netif_device_attach(netdev);
2468 }
2469
2470
2471
2472
2473
2474
2475
2476
2477 static void fm10k_io_reset_prepare(struct pci_dev *pdev)
2478 {
2479
2480 if (pci_num_vf(pdev))
2481 dev_warn(&pdev->dev,
2482 "PCIe FLR may cause issues for any active VF devices\n");
2483 fm10k_prepare_suspend(pci_get_drvdata(pdev));
2484 }
2485
2486
2487
2488
2489
2490
2491
2492
2493 static void fm10k_io_reset_done(struct pci_dev *pdev)
2494 {
2495 struct fm10k_intfc *interface = pci_get_drvdata(pdev);
2496 int err = fm10k_handle_resume(interface);
2497
2498 if (err) {
2499 dev_warn(&pdev->dev,
2500 "%s failed: %d\n", __func__, err);
2501 netif_device_detach(interface->netdev);
2502 }
2503 }
2504
2505 static const struct pci_error_handlers fm10k_err_handler = {
2506 .error_detected = fm10k_io_error_detected,
2507 .slot_reset = fm10k_io_slot_reset,
2508 .resume = fm10k_io_resume,
2509 .reset_prepare = fm10k_io_reset_prepare,
2510 .reset_done = fm10k_io_reset_done,
2511 };
2512
2513 static SIMPLE_DEV_PM_OPS(fm10k_pm_ops, fm10k_suspend, fm10k_resume);
2514
2515 static struct pci_driver fm10k_driver = {
2516 .name = fm10k_driver_name,
2517 .id_table = fm10k_pci_tbl,
2518 .probe = fm10k_probe,
2519 .remove = fm10k_remove,
2520 .driver = {
2521 .pm = &fm10k_pm_ops,
2522 },
2523 .sriov_configure = fm10k_iov_configure,
2524 .err_handler = &fm10k_err_handler
2525 };
2526
2527
2528
2529
2530
2531
2532 int fm10k_register_pci_driver(void)
2533 {
2534 return pci_register_driver(&fm10k_driver);
2535 }
2536
2537
2538
2539
2540
2541
2542 void fm10k_unregister_pci_driver(void)
2543 {
2544 pci_unregister_driver(&fm10k_driver);
2545 }