root/drivers/net/ethernet/intel/ixgbe/ixgbe_model.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. ixgbe_mat_prgm_sip
  2. ixgbe_mat_prgm_dip
  3. ixgbe_mat_prgm_ports

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3 
   4 #ifndef _IXGBE_MODEL_H_
   5 #define _IXGBE_MODEL_H_
   6 
   7 #include "ixgbe.h"
   8 #include "ixgbe_type.h"
   9 
  10 struct ixgbe_mat_field {
  11         unsigned int off;
  12         int (*val)(struct ixgbe_fdir_filter *input,
  13                    union ixgbe_atr_input *mask,
  14                    u32 val, u32 m);
  15         unsigned int type;
  16 };
  17 
  18 struct ixgbe_jump_table {
  19         struct ixgbe_mat_field *mat;
  20         struct ixgbe_fdir_filter *input;
  21         union ixgbe_atr_input *mask;
  22         u32 link_hdl;
  23         unsigned long child_loc_map[32];
  24 };
  25 
  26 #define IXGBE_MAX_HW_ENTRIES 2045
  27 
  28 static inline int ixgbe_mat_prgm_sip(struct ixgbe_fdir_filter *input,
  29                                      union ixgbe_atr_input *mask,
  30                                      u32 val, u32 m)
  31 {
  32         input->filter.formatted.src_ip[0] = (__force __be32)val;
  33         mask->formatted.src_ip[0] = (__force __be32)m;
  34         return 0;
  35 }
  36 
  37 static inline int ixgbe_mat_prgm_dip(struct ixgbe_fdir_filter *input,
  38                                      union ixgbe_atr_input *mask,
  39                                      u32 val, u32 m)
  40 {
  41         input->filter.formatted.dst_ip[0] = (__force __be32)val;
  42         mask->formatted.dst_ip[0] = (__force __be32)m;
  43         return 0;
  44 }
  45 
  46 static struct ixgbe_mat_field ixgbe_ipv4_fields[] = {
  47         { .off = 12, .val = ixgbe_mat_prgm_sip,
  48           .type = IXGBE_ATR_FLOW_TYPE_IPV4},
  49         { .off = 16, .val = ixgbe_mat_prgm_dip,
  50           .type = IXGBE_ATR_FLOW_TYPE_IPV4},
  51         { .val = NULL } /* terminal node */
  52 };
  53 
  54 static inline int ixgbe_mat_prgm_ports(struct ixgbe_fdir_filter *input,
  55                                        union ixgbe_atr_input *mask,
  56                                        u32 val, u32 m)
  57 {
  58         input->filter.formatted.src_port = (__force __be16)(val & 0xffff);
  59         mask->formatted.src_port = (__force __be16)(m & 0xffff);
  60         input->filter.formatted.dst_port = (__force __be16)(val >> 16);
  61         mask->formatted.dst_port = (__force __be16)(m >> 16);
  62 
  63         return 0;
  64 };
  65 
  66 static struct ixgbe_mat_field ixgbe_tcp_fields[] = {
  67         {.off = 0, .val = ixgbe_mat_prgm_ports,
  68          .type = IXGBE_ATR_FLOW_TYPE_TCPV4},
  69         { .val = NULL } /* terminal node */
  70 };
  71 
  72 static struct ixgbe_mat_field ixgbe_udp_fields[] = {
  73         {.off = 0, .val = ixgbe_mat_prgm_ports,
  74          .type = IXGBE_ATR_FLOW_TYPE_UDPV4},
  75         { .val = NULL } /* terminal node */
  76 };
  77 
  78 struct ixgbe_nexthdr {
  79         /* offset, shift, and mask of position to next header */
  80         unsigned int o;
  81         u32 s;
  82         u32 m;
  83         /* match criteria to make this jump*/
  84         unsigned int off;
  85         u32 val;
  86         u32 mask;
  87         /* location of jump to make */
  88         struct ixgbe_mat_field *jump;
  89 };
  90 
  91 static struct ixgbe_nexthdr ixgbe_ipv4_jumps[] = {
  92         { .o = 0, .s = 6, .m = 0xf,
  93           .off = 8, .val = 0x600, .mask = 0xff00, .jump = ixgbe_tcp_fields},
  94         { .o = 0, .s = 6, .m = 0xf,
  95           .off = 8, .val = 0x1100, .mask = 0xff00, .jump = ixgbe_udp_fields},
  96         { .jump = NULL } /* terminal node */
  97 };
  98 #endif /* _IXGBE_MODEL_H_ */

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