1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2008 Intel Corporation. */
3
4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
5
6 #include "ixgb_hw.h"
7 #include "ixgb_ee.h"
8 /* Local prototypes */
9 static u16 ixgb_shift_in_bits(struct ixgb_hw *hw);
10
11 static void ixgb_shift_out_bits(struct ixgb_hw *hw,
12 u16 data,
13 u16 count);
14 static void ixgb_standby_eeprom(struct ixgb_hw *hw);
15
16 static bool ixgb_wait_eeprom_command(struct ixgb_hw *hw);
17
18 static void ixgb_cleanup_eeprom(struct ixgb_hw *hw);
19
20 /******************************************************************************
21 * Raises the EEPROM's clock input.
22 *
23 * hw - Struct containing variables accessed by shared code
24 * eecd_reg - EECD's current value
25 *****************************************************************************/
26 static void
27 ixgb_raise_clock(struct ixgb_hw *hw,
28 u32 *eecd_reg)
29 {
30 /* Raise the clock input to the EEPROM (by setting the SK bit), and then
31 * wait 50 microseconds.
32 */
33 *eecd_reg = *eecd_reg | IXGB_EECD_SK;
34 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
35 IXGB_WRITE_FLUSH(hw);
36 udelay(50);
37 }
38
39 /******************************************************************************
40 * Lowers the EEPROM's clock input.
41 *
42 * hw - Struct containing variables accessed by shared code
43 * eecd_reg - EECD's current value
44 *****************************************************************************/
45 static void
46 ixgb_lower_clock(struct ixgb_hw *hw,
47 u32 *eecd_reg)
48 {
49 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then
50 * wait 50 microseconds.
51 */
52 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK;
53 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
54 IXGB_WRITE_FLUSH(hw);
55 udelay(50);
56 }
57
58 /******************************************************************************
59 * Shift data bits out to the EEPROM.
60 *
61 * hw - Struct containing variables accessed by shared code
62 * data - data to send to the EEPROM
63 * count - number of bits to shift out
64 *****************************************************************************/
65 static void
66 ixgb_shift_out_bits(struct ixgb_hw *hw,
67 u16 data,
68 u16 count)
69 {
70 u32 eecd_reg;
71 u32 mask;
72
73 /* We need to shift "count" bits out to the EEPROM. So, value in the
74 * "data" parameter will be shifted out to the EEPROM one bit at a time.
75 * In order to do this, "data" must be broken down into bits.
76 */
77 mask = 0x01 << (count - 1);
78 eecd_reg = IXGB_READ_REG(hw, EECD);
79 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
80 do {
81 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1",
82 * and then raising and then lowering the clock (the SK bit controls
83 * the clock input to the EEPROM). A "0" is shifted out to the EEPROM
84 * by setting "DI" to "0" and then raising and then lowering the clock.
85 */
86 eecd_reg &= ~IXGB_EECD_DI;
87
88 if (data & mask)
89 eecd_reg |= IXGB_EECD_DI;
90
91 IXGB_WRITE_REG(hw, EECD, eecd_reg);
92 IXGB_WRITE_FLUSH(hw);
93
94 udelay(50);
95
96 ixgb_raise_clock(hw, &eecd_reg);
97 ixgb_lower_clock(hw, &eecd_reg);
98
99 mask = mask >> 1;
100
101 } while (mask);
102
103 /* We leave the "DI" bit set to "0" when we leave this routine. */
104 eecd_reg &= ~IXGB_EECD_DI;
105 IXGB_WRITE_REG(hw, EECD, eecd_reg);
106 }
107
108 /******************************************************************************
109 * Shift data bits in from the EEPROM
110 *
111 * hw - Struct containing variables accessed by shared code
112 *****************************************************************************/
113 static u16
114 ixgb_shift_in_bits(struct ixgb_hw *hw)
115 {
116 u32 eecd_reg;
117 u32 i;
118 u16 data;
119
120 /* In order to read a register from the EEPROM, we need to shift 16 bits
121 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
122 * the EEPROM (setting the SK bit), and then reading the value of the "DO"
123 * bit. During this "shifting in" process the "DI" bit should always be
124 * clear..
125 */
126
127 eecd_reg = IXGB_READ_REG(hw, EECD);
128
129 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
130 data = 0;
131
132 for (i = 0; i < 16; i++) {
133 data = data << 1;
134 ixgb_raise_clock(hw, &eecd_reg);
135
136 eecd_reg = IXGB_READ_REG(hw, EECD);
137
138 eecd_reg &= ~(IXGB_EECD_DI);
139 if (eecd_reg & IXGB_EECD_DO)
140 data |= 1;
141
142 ixgb_lower_clock(hw, &eecd_reg);
143 }
144
145 return data;
146 }
147
148 /******************************************************************************
149 * Prepares EEPROM for access
150 *
151 * hw - Struct containing variables accessed by shared code
152 *
153 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
154 * function should be called before issuing a command to the EEPROM.
155 *****************************************************************************/
156 static void
157 ixgb_setup_eeprom(struct ixgb_hw *hw)
158 {
159 u32 eecd_reg;
160
161 eecd_reg = IXGB_READ_REG(hw, EECD);
162
163 /* Clear SK and DI */
164 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI);
165 IXGB_WRITE_REG(hw, EECD, eecd_reg);
166
167 /* Set CS */
168 eecd_reg |= IXGB_EECD_CS;
169 IXGB_WRITE_REG(hw, EECD, eecd_reg);
170 }
171
172 /******************************************************************************
173 * Returns EEPROM to a "standby" state
174 *
175 * hw - Struct containing variables accessed by shared code
176 *****************************************************************************/
177 static void
178 ixgb_standby_eeprom(struct ixgb_hw *hw)
179 {
180 u32 eecd_reg;
181
182 eecd_reg = IXGB_READ_REG(hw, EECD);
183
184 /* Deselect EEPROM */
185 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK);
186 IXGB_WRITE_REG(hw, EECD, eecd_reg);
187 IXGB_WRITE_FLUSH(hw);
188 udelay(50);
189
190 /* Clock high */
191 eecd_reg |= IXGB_EECD_SK;
192 IXGB_WRITE_REG(hw, EECD, eecd_reg);
193 IXGB_WRITE_FLUSH(hw);
194 udelay(50);
195
196 /* Select EEPROM */
197 eecd_reg |= IXGB_EECD_CS;
198 IXGB_WRITE_REG(hw, EECD, eecd_reg);
199 IXGB_WRITE_FLUSH(hw);
200 udelay(50);
201
202 /* Clock low */
203 eecd_reg &= ~IXGB_EECD_SK;
204 IXGB_WRITE_REG(hw, EECD, eecd_reg);
205 IXGB_WRITE_FLUSH(hw);
206 udelay(50);
207 }
208
209 /******************************************************************************
210 * Raises then lowers the EEPROM's clock pin
211 *
212 * hw - Struct containing variables accessed by shared code
213 *****************************************************************************/
214 static void
215 ixgb_clock_eeprom(struct ixgb_hw *hw)
216 {
217 u32 eecd_reg;
218
219 eecd_reg = IXGB_READ_REG(hw, EECD);
220
221 /* Rising edge of clock */
222 eecd_reg |= IXGB_EECD_SK;
223 IXGB_WRITE_REG(hw, EECD, eecd_reg);
224 IXGB_WRITE_FLUSH(hw);
225 udelay(50);
226
227 /* Falling edge of clock */
228 eecd_reg &= ~IXGB_EECD_SK;
229 IXGB_WRITE_REG(hw, EECD, eecd_reg);
230 IXGB_WRITE_FLUSH(hw);
231 udelay(50);
232 }
233
234 /******************************************************************************
235 * Terminates a command by lowering the EEPROM's chip select pin
236 *
237 * hw - Struct containing variables accessed by shared code
238 *****************************************************************************/
239 static void
240 ixgb_cleanup_eeprom(struct ixgb_hw *hw)
241 {
242 u32 eecd_reg;
243
244 eecd_reg = IXGB_READ_REG(hw, EECD);
245
246 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI);
247
248 IXGB_WRITE_REG(hw, EECD, eecd_reg);
249
250 ixgb_clock_eeprom(hw);
251 }
252
253 /******************************************************************************
254 * Waits for the EEPROM to finish the current command.
255 *
256 * hw - Struct containing variables accessed by shared code
257 *
258 * The command is done when the EEPROM's data out pin goes high.
259 *
260 * Returns:
261 * true: EEPROM data pin is high before timeout.
262 * false: Time expired.
263 *****************************************************************************/
264 static bool
265 ixgb_wait_eeprom_command(struct ixgb_hw *hw)
266 {
267 u32 eecd_reg;
268 u32 i;
269
270 /* Toggle the CS line. This in effect tells to EEPROM to actually execute
271 * the command in question.
272 */
273 ixgb_standby_eeprom(hw);
274
275 /* Now read DO repeatedly until is high (equal to '1'). The EEPROM will
276 * signal that the command has been completed by raising the DO signal.
277 * If DO does not go high in 10 milliseconds, then error out.
278 */
279 for (i = 0; i < 200; i++) {
280 eecd_reg = IXGB_READ_REG(hw, EECD);
281
282 if (eecd_reg & IXGB_EECD_DO)
283 return true;
284
285 udelay(50);
286 }
287 ASSERT(0);
288 return false;
289 }
290
291 /******************************************************************************
292 * Verifies that the EEPROM has a valid checksum
293 *
294 * hw - Struct containing variables accessed by shared code
295 *
296 * Reads the first 64 16 bit words of the EEPROM and sums the values read.
297 * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
298 * valid.
299 *
300 * Returns:
301 * true: Checksum is valid
302 * false: Checksum is not valid.
303 *****************************************************************************/
304 bool
305 ixgb_validate_eeprom_checksum(struct ixgb_hw *hw)
306 {
307 u16 checksum = 0;
308 u16 i;
309
310 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
311 checksum += ixgb_read_eeprom(hw, i);
312
313 if (checksum == (u16) EEPROM_SUM)
314 return true;
315 else
316 return false;
317 }
318
319 /******************************************************************************
320 * Calculates the EEPROM checksum and writes it to the EEPROM
321 *
322 * hw - Struct containing variables accessed by shared code
323 *
324 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
325 * Writes the difference to word offset 63 of the EEPROM.
326 *****************************************************************************/
327 void
328 ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
329 {
330 u16 checksum = 0;
331 u16 i;
332
333 for (i = 0; i < EEPROM_CHECKSUM_REG; i++)
334 checksum += ixgb_read_eeprom(hw, i);
335
336 checksum = (u16) EEPROM_SUM - checksum;
337
338 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
339 }
340
341 /******************************************************************************
342 * Writes a 16 bit word to a given offset in the EEPROM.
343 *
344 * hw - Struct containing variables accessed by shared code
345 * reg - offset within the EEPROM to be written to
346 * data - 16 bit word to be written to the EEPROM
347 *
348 * If ixgb_update_eeprom_checksum is not called after this function, the
349 * EEPROM will most likely contain an invalid checksum.
350 *
351 *****************************************************************************/
352 void
353 ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data)
354 {
355 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
356
357 /* Prepare the EEPROM for writing */
358 ixgb_setup_eeprom(hw);
359
360 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode
361 * plus 4-bit dummy). This puts the EEPROM into write/erase mode.
362 */
363 ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5);
364 ixgb_shift_out_bits(hw, 0, 4);
365
366 /* Prepare the EEPROM */
367 ixgb_standby_eeprom(hw);
368
369 /* Send the Write command (3-bit opcode + 6-bit addr) */
370 ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3);
371 ixgb_shift_out_bits(hw, offset, 6);
372
373 /* Send the data */
374 ixgb_shift_out_bits(hw, data, 16);
375
376 ixgb_wait_eeprom_command(hw);
377
378 /* Recover from write */
379 ixgb_standby_eeprom(hw);
380
381 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit
382 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase
383 * mode.
384 */
385 ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5);
386 ixgb_shift_out_bits(hw, 0, 4);
387
388 /* Done with writing */
389 ixgb_cleanup_eeprom(hw);
390
391 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */
392 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
393 }
394
395 /******************************************************************************
396 * Reads a 16 bit word from the EEPROM.
397 *
398 * hw - Struct containing variables accessed by shared code
399 * offset - offset of 16 bit word in the EEPROM to read
400 *
401 * Returns:
402 * The 16-bit value read from the eeprom
403 *****************************************************************************/
404 u16
405 ixgb_read_eeprom(struct ixgb_hw *hw,
406 u16 offset)
407 {
408 u16 data;
409
410 /* Prepare the EEPROM for reading */
411 ixgb_setup_eeprom(hw);
412
413 /* Send the READ command (opcode + addr) */
414 ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3);
415 /*
416 * We have a 64 word EEPROM, there are 6 address bits
417 */
418 ixgb_shift_out_bits(hw, offset, 6);
419
420 /* Read the data */
421 data = ixgb_shift_in_bits(hw);
422
423 /* End this read operation */
424 ixgb_standby_eeprom(hw);
425
426 return data;
427 }
428
429 /******************************************************************************
430 * Reads eeprom and stores data in shared structure.
431 * Validates eeprom checksum and eeprom signature.
432 *
433 * hw - Struct containing variables accessed by shared code
434 *
435 * Returns:
436 * true: if eeprom read is successful
437 * false: otherwise.
438 *****************************************************************************/
439 bool
440 ixgb_get_eeprom_data(struct ixgb_hw *hw)
441 {
442 u16 i;
443 u16 checksum = 0;
444 struct ixgb_ee_map_type *ee_map;
445
446 ENTER();
447
448 ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
449
450 pr_debug("Reading eeprom data\n");
451 for (i = 0; i < IXGB_EEPROM_SIZE ; i++) {
452 u16 ee_data;
453 ee_data = ixgb_read_eeprom(hw, i);
454 checksum += ee_data;
455 hw->eeprom[i] = cpu_to_le16(ee_data);
456 }
457
458 if (checksum != (u16) EEPROM_SUM) {
459 pr_debug("Checksum invalid\n");
460 /* clear the init_ctrl_reg_1 to signify that the cache is
461 * invalidated */
462 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
463 return false;
464 }
465
466 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
467 != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
468 pr_debug("Signature invalid\n");
469 return false;
470 }
471
472 return true;
473 }
474
475 /******************************************************************************
476 * Local function to check if the eeprom signature is good
477 * If the eeprom signature is good, calls ixgb)get_eeprom_data.
478 *
479 * hw - Struct containing variables accessed by shared code
480 *
481 * Returns:
482 * true: eeprom signature was good and the eeprom read was successful
483 * false: otherwise.
484 ******************************************************************************/
485 static bool
486 ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw)
487 {
488 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
489
490 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
491 == cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
492 return true;
493 } else {
494 return ixgb_get_eeprom_data(hw);
495 }
496 }
497
498 /******************************************************************************
499 * return a word from the eeprom
500 *
501 * hw - Struct containing variables accessed by shared code
502 * index - Offset of eeprom word
503 *
504 * Returns:
505 * Word at indexed offset in eeprom, if valid, 0 otherwise.
506 ******************************************************************************/
507 __le16
508 ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index)
509 {
510
511 if (index < IXGB_EEPROM_SIZE && ixgb_check_and_get_eeprom_data(hw))
512 return hw->eeprom[index];
513
514 return 0;
515 }
516
517 /******************************************************************************
518 * return the mac address from EEPROM
519 *
520 * hw - Struct containing variables accessed by shared code
521 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise
522 *
523 * Returns: None.
524 ******************************************************************************/
525 void
526 ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
527 u8 *mac_addr)
528 {
529 int i;
530 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
531
532 ENTER();
533
534 if (ixgb_check_and_get_eeprom_data(hw)) {
535 for (i = 0; i < ETH_ALEN; i++) {
536 mac_addr[i] = ee_map->mac_addr[i];
537 }
538 pr_debug("eeprom mac address = %pM\n", mac_addr);
539 }
540 }
541
542
543 /******************************************************************************
544 * return the Printed Board Assembly number from EEPROM
545 *
546 * hw - Struct containing variables accessed by shared code
547 *
548 * Returns:
549 * PBA number if EEPROM contents are valid, 0 otherwise
550 ******************************************************************************/
551 u32
552 ixgb_get_ee_pba_number(struct ixgb_hw *hw)
553 {
554 if (ixgb_check_and_get_eeprom_data(hw))
555 return le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
556 | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16);
557
558 return 0;
559 }
560
561
562 /******************************************************************************
563 * return the Device Id from EEPROM
564 *
565 * hw - Struct containing variables accessed by shared code
566 *
567 * Returns:
568 * Device Id if EEPROM contents are valid, 0 otherwise
569 ******************************************************************************/
570 u16
571 ixgb_get_ee_device_id(struct ixgb_hw *hw)
572 {
573 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
574
575 if (ixgb_check_and_get_eeprom_data(hw))
576 return le16_to_cpu(ee_map->device_id);
577
578 return 0;
579 }
580