root/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

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DEFINITIONS

This source file includes following definitions.
  1. mlx5e_ethtool_get_drvinfo
  2. mlx5e_get_drvinfo
  3. mlx5e_build_ptys2ethtool_map
  4. mlx5e_ethtool_get_speed_arr
  5. mlx5e_ethtool_get_sset_count
  6. mlx5e_get_sset_count
  7. mlx5e_fill_stats_strings
  8. mlx5e_ethtool_get_strings
  9. mlx5e_get_strings
  10. mlx5e_ethtool_get_ethtool_stats
  11. mlx5e_get_ethtool_stats
  12. mlx5e_ethtool_get_ringparam
  13. mlx5e_get_ringparam
  14. mlx5e_ethtool_set_ringparam
  15. mlx5e_set_ringparam
  16. mlx5e_ethtool_get_channels
  17. mlx5e_get_channels
  18. mlx5e_ethtool_set_channels
  19. mlx5e_set_channels
  20. mlx5e_ethtool_get_coalesce
  21. mlx5e_get_coalesce
  22. mlx5e_set_priv_channels_coalesce
  23. mlx5e_ethtool_set_coalesce
  24. mlx5e_set_coalesce
  25. ptys2ethtool_supported_link
  26. ptys2ethtool_adver_link
  27. pplm2ethtool_fec
  28. ethtool_fec2ethtool_caps
  29. get_fec_supported_advertised
  30. ptys2ethtool_supported_advertised_port
  31. get_speed_duplex
  32. get_supported
  33. get_advertising
  34. get_connector_port
  35. get_lp_advertising
  36. mlx5e_ethtool_get_link_ksettings
  37. mlx5e_get_link_ksettings
  38. mlx5e_ethtool2ptys_adver_link
  39. mlx5e_ethtool2ptys_ext_adver_link
  40. ext_link_mode_requested
  41. ext_requested
  42. mlx5e_ethtool_set_link_ksettings
  43. mlx5e_set_link_ksettings
  44. mlx5e_ethtool_get_rxfh_key_size
  45. mlx5e_get_rxfh_key_size
  46. mlx5e_ethtool_get_rxfh_indir_size
  47. mlx5e_get_rxfh_indir_size
  48. mlx5e_get_rxfh
  49. mlx5e_set_rxfh
  50. mlx5e_get_pfc_prevention_tout
  51. mlx5e_set_pfc_prevention_tout
  52. mlx5e_get_tunable
  53. mlx5e_set_tunable
  54. mlx5e_ethtool_get_pauseparam
  55. mlx5e_get_pauseparam
  56. mlx5e_ethtool_set_pauseparam
  57. mlx5e_set_pauseparam
  58. mlx5e_ethtool_get_ts_info
  59. mlx5e_get_ts_info
  60. mlx5e_get_wol_supported
  61. mlx5e_reformat_wol_mode_mlx5_to_linux
  62. mlx5e_reformat_wol_mode_linux_to_mlx5
  63. mlx5e_get_wol
  64. mlx5e_set_wol
  65. mlx5e_get_fecparam
  66. mlx5e_set_fecparam
  67. mlx5e_get_msglevel
  68. mlx5e_set_msglevel
  69. mlx5e_set_phys_id
  70. mlx5e_get_module_info
  71. mlx5e_get_module_eeprom
  72. mlx5e_ethtool_flash_device
  73. mlx5e_flash_device
  74. set_pflag_cqe_based_moder
  75. set_pflag_tx_cqe_based_moder
  76. set_pflag_rx_cqe_based_moder
  77. mlx5e_modify_rx_cqe_compression_locked
  78. set_pflag_rx_cqe_compress
  79. set_pflag_rx_striding_rq
  80. set_pflag_rx_no_csum_complete
  81. set_pflag_xdp_tx_mpwqe
  82. mlx5e_handle_pflag
  83. mlx5e_set_priv_flags
  84. mlx5e_get_priv_flags
  85. mlx5e_get_rxnfc
  86. mlx5e_set_rxnfc

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 
  33 #include "en.h"
  34 #include "en/port.h"
  35 #include "en/xsk/umem.h"
  36 #include "lib/clock.h"
  37 
  38 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
  39                                struct ethtool_drvinfo *drvinfo)
  40 {
  41         struct mlx5_core_dev *mdev = priv->mdev;
  42 
  43         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
  44         strlcpy(drvinfo->version, DRIVER_VERSION,
  45                 sizeof(drvinfo->version));
  46         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  47                  "%d.%d.%04d (%.16s)",
  48                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
  49                  mdev->board_id);
  50         strlcpy(drvinfo->bus_info, dev_name(mdev->device),
  51                 sizeof(drvinfo->bus_info));
  52 }
  53 
  54 static void mlx5e_get_drvinfo(struct net_device *dev,
  55                               struct ethtool_drvinfo *drvinfo)
  56 {
  57         struct mlx5e_priv *priv = netdev_priv(dev);
  58 
  59         mlx5e_ethtool_get_drvinfo(priv, drvinfo);
  60 }
  61 
  62 struct ptys2ethtool_config {
  63         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  64         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
  65 };
  66 
  67 static
  68 struct ptys2ethtool_config ptys2legacy_ethtool_table[MLX5E_LINK_MODES_NUMBER];
  69 static
  70 struct ptys2ethtool_config ptys2ext_ethtool_table[MLX5E_EXT_LINK_MODES_NUMBER];
  71 
  72 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, table, ...)                  \
  73         ({                                                              \
  74                 struct ptys2ethtool_config *cfg;                        \
  75                 const unsigned int modes[] = { __VA_ARGS__ };           \
  76                 unsigned int i, bit, idx;                               \
  77                 cfg = &ptys2##table##_ethtool_table[reg_];              \
  78                 bitmap_zero(cfg->supported,                             \
  79                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  80                 bitmap_zero(cfg->advertised,                            \
  81                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  82                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
  83                         bit = modes[i] % 64;                            \
  84                         idx = modes[i] / 64;                            \
  85                         __set_bit(bit, &cfg->supported[idx]);           \
  86                         __set_bit(bit, &cfg->advertised[idx]);          \
  87                 }                                                       \
  88         })
  89 
  90 void mlx5e_build_ptys2ethtool_map(void)
  91 {
  92         memset(ptys2legacy_ethtool_table, 0, sizeof(ptys2legacy_ethtool_table));
  93         memset(ptys2ext_ethtool_table, 0, sizeof(ptys2ext_ethtool_table));
  94         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, legacy,
  95                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  96         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, legacy,
  97                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  98         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, legacy,
  99                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 100         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, legacy,
 101                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 102         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, legacy,
 103                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 104         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, legacy,
 105                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
 106         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, legacy,
 107                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
 108         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, legacy,
 109                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
 110         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, legacy,
 111                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
 112         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, legacy,
 113                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 114         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, legacy,
 115                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 116         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, legacy,
 117                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 118         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, legacy,
 119                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
 120         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, legacy,
 121                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 122         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, legacy,
 123                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 124         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, legacy,
 125                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
 126         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, legacy,
 127                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
 128         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, legacy,
 129                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
 130         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, legacy,
 131                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 132         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, legacy,
 133                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
 134         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, legacy,
 135                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
 136         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, legacy,
 137                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
 138         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, legacy,
 139                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 140         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, legacy,
 141                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
 142         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, legacy,
 143                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
 144         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_SGMII_100M, ext,
 145                                        ETHTOOL_LINK_MODE_100baseT_Full_BIT);
 146         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_X_SGMII, ext,
 147                                        ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
 148                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
 149                                        ETHTOOL_LINK_MODE_1000baseX_Full_BIT);
 150         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_5GBASE_R, ext,
 151                                        ETHTOOL_LINK_MODE_5000baseT_Full_BIT);
 152         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_XFI_XAUI_1, ext,
 153                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
 154                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
 155                                        ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
 156                                        ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
 157                                        ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
 158                                        ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
 159                                        ETHTOOL_LINK_MODE_10000baseER_Full_BIT);
 160         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_XLAUI_4_XLPPI_4, ext,
 161                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
 162                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
 163                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
 164                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 165         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GAUI_1_25GBASE_CR_KR, ext,
 166                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
 167                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
 168                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 169         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2,
 170                                        ext,
 171                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
 172                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
 173                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 174         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR, ext,
 175                                        ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
 176                                        ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
 177                                        ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
 178                                        ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 179                                        ETHTOOL_LINK_MODE_50000baseDR_Full_BIT);
 180         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_CAUI_4_100GBASE_CR4_KR4, ext,
 181                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
 182                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
 183                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
 184                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 185         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_2_100GBASE_CR2_KR2, ext,
 186                                        ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,
 187                                        ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,
 188                                        ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,
 189                                        ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 190                                        ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT);
 191         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_4_200GBASE_CR4_KR4, ext,
 192                                        ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
 193                                        ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
 194                                        ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 195                                        ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT,
 196                                        ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT);
 197 }
 198 
 199 static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev,
 200                                         struct ptys2ethtool_config **arr,
 201                                         u32 *size)
 202 {
 203         bool ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);
 204 
 205         *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
 206         *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
 207                       ARRAY_SIZE(ptys2legacy_ethtool_table);
 208 }
 209 
 210 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
 211 
 212 struct pflag_desc {
 213         char name[ETH_GSTRING_LEN];
 214         mlx5e_pflag_handler handler;
 215 };
 216 
 217 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS];
 218 
 219 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
 220 {
 221         int i, num_stats = 0;
 222 
 223         switch (sset) {
 224         case ETH_SS_STATS:
 225                 for (i = 0; i < mlx5e_num_stats_grps; i++)
 226                         num_stats += mlx5e_stats_grps[i].get_num_stats(priv);
 227                 return num_stats;
 228         case ETH_SS_PRIV_FLAGS:
 229                 return MLX5E_NUM_PFLAGS;
 230         case ETH_SS_TEST:
 231                 return mlx5e_self_test_num(priv);
 232         /* fallthrough */
 233         default:
 234                 return -EOPNOTSUPP;
 235         }
 236 }
 237 
 238 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
 239 {
 240         struct mlx5e_priv *priv = netdev_priv(dev);
 241 
 242         return mlx5e_ethtool_get_sset_count(priv, sset);
 243 }
 244 
 245 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, u8 *data)
 246 {
 247         int i, idx = 0;
 248 
 249         for (i = 0; i < mlx5e_num_stats_grps; i++)
 250                 idx = mlx5e_stats_grps[i].fill_strings(priv, data, idx);
 251 }
 252 
 253 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
 254 {
 255         int i;
 256 
 257         switch (stringset) {
 258         case ETH_SS_PRIV_FLAGS:
 259                 for (i = 0; i < MLX5E_NUM_PFLAGS; i++)
 260                         strcpy(data + i * ETH_GSTRING_LEN,
 261                                mlx5e_priv_flags[i].name);
 262                 break;
 263 
 264         case ETH_SS_TEST:
 265                 for (i = 0; i < mlx5e_self_test_num(priv); i++)
 266                         strcpy(data + i * ETH_GSTRING_LEN,
 267                                mlx5e_self_tests[i]);
 268                 break;
 269 
 270         case ETH_SS_STATS:
 271                 mlx5e_fill_stats_strings(priv, data);
 272                 break;
 273         }
 274 }
 275 
 276 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 277 {
 278         struct mlx5e_priv *priv = netdev_priv(dev);
 279 
 280         mlx5e_ethtool_get_strings(priv, stringset, data);
 281 }
 282 
 283 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
 284                                      struct ethtool_stats *stats, u64 *data)
 285 {
 286         int i, idx = 0;
 287 
 288         mutex_lock(&priv->state_lock);
 289         mlx5e_update_stats(priv);
 290         mutex_unlock(&priv->state_lock);
 291 
 292         for (i = 0; i < mlx5e_num_stats_grps; i++)
 293                 idx = mlx5e_stats_grps[i].fill_stats(priv, data, idx);
 294 }
 295 
 296 static void mlx5e_get_ethtool_stats(struct net_device *dev,
 297                                     struct ethtool_stats *stats,
 298                                     u64 *data)
 299 {
 300         struct mlx5e_priv *priv = netdev_priv(dev);
 301 
 302         mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
 303 }
 304 
 305 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
 306                                  struct ethtool_ringparam *param)
 307 {
 308         param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
 309         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
 310         param->rx_pending     = 1 << priv->channels.params.log_rq_mtu_frames;
 311         param->tx_pending     = 1 << priv->channels.params.log_sq_size;
 312 }
 313 
 314 static void mlx5e_get_ringparam(struct net_device *dev,
 315                                 struct ethtool_ringparam *param)
 316 {
 317         struct mlx5e_priv *priv = netdev_priv(dev);
 318 
 319         mlx5e_ethtool_get_ringparam(priv, param);
 320 }
 321 
 322 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
 323                                 struct ethtool_ringparam *param)
 324 {
 325         struct mlx5e_channels new_channels = {};
 326         u8 log_rq_size;
 327         u8 log_sq_size;
 328         int err = 0;
 329 
 330         if (param->rx_jumbo_pending) {
 331                 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
 332                             __func__);
 333                 return -EINVAL;
 334         }
 335         if (param->rx_mini_pending) {
 336                 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
 337                             __func__);
 338                 return -EINVAL;
 339         }
 340 
 341         if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
 342                 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
 343                             __func__, param->rx_pending,
 344                             1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
 345                 return -EINVAL;
 346         }
 347 
 348         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
 349                 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
 350                             __func__, param->tx_pending,
 351                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
 352                 return -EINVAL;
 353         }
 354 
 355         log_rq_size = order_base_2(param->rx_pending);
 356         log_sq_size = order_base_2(param->tx_pending);
 357 
 358         if (log_rq_size == priv->channels.params.log_rq_mtu_frames &&
 359             log_sq_size == priv->channels.params.log_sq_size)
 360                 return 0;
 361 
 362         mutex_lock(&priv->state_lock);
 363 
 364         new_channels.params = priv->channels.params;
 365         new_channels.params.log_rq_mtu_frames = log_rq_size;
 366         new_channels.params.log_sq_size = log_sq_size;
 367 
 368         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 369                 priv->channels.params = new_channels.params;
 370                 goto unlock;
 371         }
 372 
 373         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL);
 374 
 375 unlock:
 376         mutex_unlock(&priv->state_lock);
 377 
 378         return err;
 379 }
 380 
 381 static int mlx5e_set_ringparam(struct net_device *dev,
 382                                struct ethtool_ringparam *param)
 383 {
 384         struct mlx5e_priv *priv = netdev_priv(dev);
 385 
 386         return mlx5e_ethtool_set_ringparam(priv, param);
 387 }
 388 
 389 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
 390                                 struct ethtool_channels *ch)
 391 {
 392         mutex_lock(&priv->state_lock);
 393 
 394         ch->max_combined   = priv->max_nch;
 395         ch->combined_count = priv->channels.params.num_channels;
 396         if (priv->xsk.refcnt) {
 397                 /* The upper half are XSK queues. */
 398                 ch->max_combined *= 2;
 399                 ch->combined_count *= 2;
 400         }
 401 
 402         mutex_unlock(&priv->state_lock);
 403 }
 404 
 405 static void mlx5e_get_channels(struct net_device *dev,
 406                                struct ethtool_channels *ch)
 407 {
 408         struct mlx5e_priv *priv = netdev_priv(dev);
 409 
 410         mlx5e_ethtool_get_channels(priv, ch);
 411 }
 412 
 413 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
 414                                struct ethtool_channels *ch)
 415 {
 416         struct mlx5e_params *cur_params = &priv->channels.params;
 417         unsigned int count = ch->combined_count;
 418         struct mlx5e_channels new_channels = {};
 419         bool arfs_enabled;
 420         int err = 0;
 421 
 422         if (!count) {
 423                 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
 424                             __func__);
 425                 return -EINVAL;
 426         }
 427 
 428         if (cur_params->num_channels == count)
 429                 return 0;
 430 
 431         mutex_lock(&priv->state_lock);
 432 
 433         /* Don't allow changing the number of channels if there is an active
 434          * XSK, because the numeration of the XSK and regular RQs will change.
 435          */
 436         if (priv->xsk.refcnt) {
 437                 err = -EINVAL;
 438                 netdev_err(priv->netdev, "%s: AF_XDP is active, cannot change the number of channels\n",
 439                            __func__);
 440                 goto out;
 441         }
 442 
 443         new_channels.params = priv->channels.params;
 444         new_channels.params.num_channels = count;
 445 
 446         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 447                 *cur_params = new_channels.params;
 448                 mlx5e_num_channels_changed(priv);
 449                 goto out;
 450         }
 451 
 452         arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
 453         if (arfs_enabled)
 454                 mlx5e_arfs_disable(priv);
 455 
 456         /* Switch to new channels, set new parameters and close old ones */
 457         err = mlx5e_safe_switch_channels(priv, &new_channels, mlx5e_num_channels_changed);
 458 
 459         if (arfs_enabled) {
 460                 int err2 = mlx5e_arfs_enable(priv);
 461 
 462                 if (err2)
 463                         netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
 464                                    __func__, err2);
 465         }
 466 
 467 out:
 468         mutex_unlock(&priv->state_lock);
 469 
 470         return err;
 471 }
 472 
 473 static int mlx5e_set_channels(struct net_device *dev,
 474                               struct ethtool_channels *ch)
 475 {
 476         struct mlx5e_priv *priv = netdev_priv(dev);
 477 
 478         return mlx5e_ethtool_set_channels(priv, ch);
 479 }
 480 
 481 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
 482                                struct ethtool_coalesce *coal)
 483 {
 484         struct dim_cq_moder *rx_moder, *tx_moder;
 485 
 486         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
 487                 return -EOPNOTSUPP;
 488 
 489         rx_moder = &priv->channels.params.rx_cq_moderation;
 490         coal->rx_coalesce_usecs         = rx_moder->usec;
 491         coal->rx_max_coalesced_frames   = rx_moder->pkts;
 492         coal->use_adaptive_rx_coalesce  = priv->channels.params.rx_dim_enabled;
 493 
 494         tx_moder = &priv->channels.params.tx_cq_moderation;
 495         coal->tx_coalesce_usecs         = tx_moder->usec;
 496         coal->tx_max_coalesced_frames   = tx_moder->pkts;
 497         coal->use_adaptive_tx_coalesce  = priv->channels.params.tx_dim_enabled;
 498 
 499         return 0;
 500 }
 501 
 502 static int mlx5e_get_coalesce(struct net_device *netdev,
 503                               struct ethtool_coalesce *coal)
 504 {
 505         struct mlx5e_priv *priv = netdev_priv(netdev);
 506 
 507         return mlx5e_ethtool_get_coalesce(priv, coal);
 508 }
 509 
 510 #define MLX5E_MAX_COAL_TIME             MLX5_MAX_CQ_PERIOD
 511 #define MLX5E_MAX_COAL_FRAMES           MLX5_MAX_CQ_COUNT
 512 
 513 static void
 514 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
 515 {
 516         struct mlx5_core_dev *mdev = priv->mdev;
 517         int tc;
 518         int i;
 519 
 520         for (i = 0; i < priv->channels.num; ++i) {
 521                 struct mlx5e_channel *c = priv->channels.c[i];
 522 
 523                 for (tc = 0; tc < c->num_tc; tc++) {
 524                         mlx5_core_modify_cq_moderation(mdev,
 525                                                 &c->sq[tc].cq.mcq,
 526                                                 coal->tx_coalesce_usecs,
 527                                                 coal->tx_max_coalesced_frames);
 528                 }
 529 
 530                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
 531                                                coal->rx_coalesce_usecs,
 532                                                coal->rx_max_coalesced_frames);
 533         }
 534 }
 535 
 536 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
 537                                struct ethtool_coalesce *coal)
 538 {
 539         struct dim_cq_moder *rx_moder, *tx_moder;
 540         struct mlx5_core_dev *mdev = priv->mdev;
 541         struct mlx5e_channels new_channels = {};
 542         int err = 0;
 543         bool reset;
 544 
 545         if (!MLX5_CAP_GEN(mdev, cq_moderation))
 546                 return -EOPNOTSUPP;
 547 
 548         if (coal->tx_coalesce_usecs > MLX5E_MAX_COAL_TIME ||
 549             coal->rx_coalesce_usecs > MLX5E_MAX_COAL_TIME) {
 550                 netdev_info(priv->netdev, "%s: maximum coalesce time supported is %lu usecs\n",
 551                             __func__, MLX5E_MAX_COAL_TIME);
 552                 return -ERANGE;
 553         }
 554 
 555         if (coal->tx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES ||
 556             coal->rx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES) {
 557                 netdev_info(priv->netdev, "%s: maximum coalesced frames supported is %lu\n",
 558                             __func__, MLX5E_MAX_COAL_FRAMES);
 559                 return -ERANGE;
 560         }
 561 
 562         mutex_lock(&priv->state_lock);
 563         new_channels.params = priv->channels.params;
 564 
 565         rx_moder          = &new_channels.params.rx_cq_moderation;
 566         rx_moder->usec    = coal->rx_coalesce_usecs;
 567         rx_moder->pkts    = coal->rx_max_coalesced_frames;
 568         new_channels.params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
 569 
 570         tx_moder          = &new_channels.params.tx_cq_moderation;
 571         tx_moder->usec    = coal->tx_coalesce_usecs;
 572         tx_moder->pkts    = coal->tx_max_coalesced_frames;
 573         new_channels.params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
 574 
 575         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 576                 priv->channels.params = new_channels.params;
 577                 goto out;
 578         }
 579         /* we are opened */
 580 
 581         reset = (!!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled) ||
 582                 (!!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled);
 583 
 584         if (!reset) {
 585                 mlx5e_set_priv_channels_coalesce(priv, coal);
 586                 priv->channels.params = new_channels.params;
 587                 goto out;
 588         }
 589 
 590         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL);
 591 
 592 out:
 593         mutex_unlock(&priv->state_lock);
 594         return err;
 595 }
 596 
 597 static int mlx5e_set_coalesce(struct net_device *netdev,
 598                               struct ethtool_coalesce *coal)
 599 {
 600         struct mlx5e_priv *priv    = netdev_priv(netdev);
 601 
 602         return mlx5e_ethtool_set_coalesce(priv, coal);
 603 }
 604 
 605 static void ptys2ethtool_supported_link(struct mlx5_core_dev *mdev,
 606                                         unsigned long *supported_modes,
 607                                         u32 eth_proto_cap)
 608 {
 609         unsigned long proto_cap = eth_proto_cap;
 610         struct ptys2ethtool_config *table;
 611         u32 max_size;
 612         int proto;
 613 
 614         mlx5e_ethtool_get_speed_arr(mdev, &table, &max_size);
 615         for_each_set_bit(proto, &proto_cap, max_size)
 616                 bitmap_or(supported_modes, supported_modes,
 617                           table[proto].supported,
 618                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 619 }
 620 
 621 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
 622                                     u32 eth_proto_cap, bool ext)
 623 {
 624         unsigned long proto_cap = eth_proto_cap;
 625         struct ptys2ethtool_config *table;
 626         u32 max_size;
 627         int proto;
 628 
 629         table = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
 630         max_size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
 631                          ARRAY_SIZE(ptys2legacy_ethtool_table);
 632 
 633         for_each_set_bit(proto, &proto_cap, max_size)
 634                 bitmap_or(advertising_modes, advertising_modes,
 635                           table[proto].advertised,
 636                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 637 }
 638 
 639 static const u32 pplm_fec_2_ethtool[] = {
 640         [MLX5E_FEC_NOFEC] = ETHTOOL_FEC_OFF,
 641         [MLX5E_FEC_FIRECODE] = ETHTOOL_FEC_BASER,
 642         [MLX5E_FEC_RS_528_514] = ETHTOOL_FEC_RS,
 643 };
 644 
 645 static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size)
 646 {
 647         int mode = 0;
 648 
 649         if (!fec_mode)
 650                 return ETHTOOL_FEC_AUTO;
 651 
 652         mode = find_first_bit(&fec_mode, size);
 653 
 654         if (mode < ARRAY_SIZE(pplm_fec_2_ethtool))
 655                 return pplm_fec_2_ethtool[mode];
 656 
 657         return 0;
 658 }
 659 
 660 /* we use ETHTOOL_FEC_* offset and apply it to ETHTOOL_LINK_MODE_FEC_*_BIT */
 661 static u32 ethtool_fec2ethtool_caps(u_long ethtool_fec_code)
 662 {
 663         u32 offset;
 664 
 665         offset = find_first_bit(&ethtool_fec_code, sizeof(u32));
 666         offset -= ETHTOOL_FEC_OFF_BIT;
 667         offset += ETHTOOL_LINK_MODE_FEC_NONE_BIT;
 668 
 669         return offset;
 670 }
 671 
 672 static int get_fec_supported_advertised(struct mlx5_core_dev *dev,
 673                                         struct ethtool_link_ksettings *link_ksettings)
 674 {
 675         u_long fec_caps = 0;
 676         u32 active_fec = 0;
 677         u32 offset;
 678         u32 bitn;
 679         int err;
 680 
 681         err = mlx5e_get_fec_caps(dev, (u8 *)&fec_caps);
 682         if (err)
 683                 return (err == -EOPNOTSUPP) ? 0 : err;
 684 
 685         err = mlx5e_get_fec_mode(dev, &active_fec, NULL);
 686         if (err)
 687                 return err;
 688 
 689         for_each_set_bit(bitn, &fec_caps, ARRAY_SIZE(pplm_fec_2_ethtool)) {
 690                 u_long ethtool_bitmask = pplm_fec_2_ethtool[bitn];
 691 
 692                 offset = ethtool_fec2ethtool_caps(ethtool_bitmask);
 693                 __set_bit(offset, link_ksettings->link_modes.supported);
 694         }
 695 
 696         active_fec = pplm2ethtool_fec(active_fec, sizeof(u32) * BITS_PER_BYTE);
 697         offset = ethtool_fec2ethtool_caps(active_fec);
 698         __set_bit(offset, link_ksettings->link_modes.advertising);
 699 
 700         return 0;
 701 }
 702 
 703 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
 704                                                    u32 eth_proto_cap,
 705                                                    u8 connector_type, bool ext)
 706 {
 707         if ((!connector_type && !ext) || connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
 708                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 709                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 710                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 711                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 712                                    | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 713                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 714                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 715                                                              supported,
 716                                                              FIBRE);
 717                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 718                                                              advertising,
 719                                                              FIBRE);
 720                 }
 721 
 722                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
 723                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 724                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 725                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 726                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
 727                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 728                                                              supported,
 729                                                              Backplane);
 730                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 731                                                              advertising,
 732                                                              Backplane);
 733                 }
 734                 return;
 735         }
 736 
 737         switch (connector_type) {
 738         case MLX5E_PORT_TP:
 739                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 740                                                      supported, TP);
 741                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 742                                                      advertising, TP);
 743                 break;
 744         case MLX5E_PORT_AUI:
 745                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 746                                                      supported, AUI);
 747                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 748                                                      advertising, AUI);
 749                 break;
 750         case MLX5E_PORT_BNC:
 751                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 752                                                      supported, BNC);
 753                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 754                                                      advertising, BNC);
 755                 break;
 756         case MLX5E_PORT_MII:
 757                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 758                                                      supported, MII);
 759                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 760                                                      advertising, MII);
 761                 break;
 762         case MLX5E_PORT_FIBRE:
 763                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 764                                                      supported, FIBRE);
 765                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 766                                                      advertising, FIBRE);
 767                 break;
 768         case MLX5E_PORT_DA:
 769                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 770                                                      supported, Backplane);
 771                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 772                                                      advertising, Backplane);
 773                 break;
 774         case MLX5E_PORT_NONE:
 775         case MLX5E_PORT_OTHER:
 776         default:
 777                 break;
 778         }
 779 }
 780 
 781 static void get_speed_duplex(struct net_device *netdev,
 782                              u32 eth_proto_oper, bool force_legacy,
 783                              struct ethtool_link_ksettings *link_ksettings)
 784 {
 785         struct mlx5e_priv *priv = netdev_priv(netdev);
 786         u32 speed = SPEED_UNKNOWN;
 787         u8 duplex = DUPLEX_UNKNOWN;
 788 
 789         if (!netif_carrier_ok(netdev))
 790                 goto out;
 791 
 792         speed = mlx5e_port_ptys2speed(priv->mdev, eth_proto_oper, force_legacy);
 793         if (!speed) {
 794                 speed = SPEED_UNKNOWN;
 795                 goto out;
 796         }
 797 
 798         duplex = DUPLEX_FULL;
 799 
 800 out:
 801         link_ksettings->base.speed = speed;
 802         link_ksettings->base.duplex = duplex;
 803 }
 804 
 805 static void get_supported(struct mlx5_core_dev *mdev, u32 eth_proto_cap,
 806                           struct ethtool_link_ksettings *link_ksettings)
 807 {
 808         unsigned long *supported = link_ksettings->link_modes.supported;
 809         ptys2ethtool_supported_link(mdev, supported, eth_proto_cap);
 810 
 811         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
 812 }
 813 
 814 static void get_advertising(u32 eth_proto_cap, u8 tx_pause, u8 rx_pause,
 815                             struct ethtool_link_ksettings *link_ksettings,
 816                             bool ext)
 817 {
 818         unsigned long *advertising = link_ksettings->link_modes.advertising;
 819         ptys2ethtool_adver_link(advertising, eth_proto_cap, ext);
 820 
 821         if (rx_pause)
 822                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
 823         if (tx_pause ^ rx_pause)
 824                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
 825 }
 826 
 827 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
 828                 [MLX5E_PORT_UNKNOWN]            = PORT_OTHER,
 829                 [MLX5E_PORT_NONE]               = PORT_NONE,
 830                 [MLX5E_PORT_TP]                 = PORT_TP,
 831                 [MLX5E_PORT_AUI]                = PORT_AUI,
 832                 [MLX5E_PORT_BNC]                = PORT_BNC,
 833                 [MLX5E_PORT_MII]                = PORT_MII,
 834                 [MLX5E_PORT_FIBRE]              = PORT_FIBRE,
 835                 [MLX5E_PORT_DA]                 = PORT_DA,
 836                 [MLX5E_PORT_OTHER]              = PORT_OTHER,
 837         };
 838 
 839 static u8 get_connector_port(u32 eth_proto, u8 connector_type, bool ext)
 840 {
 841         if ((connector_type || ext) && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
 842                 return ptys2connector_type[connector_type];
 843 
 844         if (eth_proto &
 845             (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)   |
 846              MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)  |
 847              MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
 848              MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 849                 return PORT_FIBRE;
 850         }
 851 
 852         if (eth_proto &
 853             (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
 854              MLX5E_PROT_MASK(MLX5E_10GBASE_CR)  |
 855              MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
 856                 return PORT_DA;
 857         }
 858 
 859         if (eth_proto &
 860             (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
 861              MLX5E_PROT_MASK(MLX5E_10GBASE_KR)  |
 862              MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
 863              MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
 864                 return PORT_NONE;
 865         }
 866 
 867         return PORT_OTHER;
 868 }
 869 
 870 static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp,
 871                                struct ethtool_link_ksettings *link_ksettings)
 872 {
 873         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
 874         bool ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);
 875 
 876         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);
 877 }
 878 
 879 int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
 880                                      struct ethtool_link_ksettings *link_ksettings)
 881 {
 882         struct mlx5_core_dev *mdev = priv->mdev;
 883         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
 884         u32 rx_pause = 0;
 885         u32 tx_pause = 0;
 886         u32 eth_proto_cap;
 887         u32 eth_proto_admin;
 888         u32 eth_proto_lp;
 889         u32 eth_proto_oper;
 890         u8 an_disable_admin;
 891         u8 an_status;
 892         u8 connector_type;
 893         bool admin_ext;
 894         bool ext;
 895         int err;
 896 
 897         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
 898         if (err) {
 899                 netdev_err(priv->netdev, "%s: query port ptys failed: %d\n",
 900                            __func__, err);
 901                 goto err_query_regs;
 902         }
 903         ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);
 904         eth_proto_cap    = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
 905                                               eth_proto_capability);
 906         eth_proto_admin  = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
 907                                               eth_proto_admin);
 908         /* Fields: eth_proto_admin and ext_eth_proto_admin  are
 909          * mutually exclusive. Hence try reading legacy advertising
 910          * when extended advertising is zero.
 911          * admin_ext indicates which proto_admin (ext vs. legacy)
 912          * should be read and interpreted
 913          */
 914         admin_ext = ext;
 915         if (ext && !eth_proto_admin) {
 916                 eth_proto_admin  = MLX5_GET_ETH_PROTO(ptys_reg, out, false,
 917                                                       eth_proto_admin);
 918                 admin_ext = false;
 919         }
 920 
 921         eth_proto_oper   = MLX5_GET_ETH_PROTO(ptys_reg, out, admin_ext,
 922                                               eth_proto_oper);
 923         eth_proto_lp        = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
 924         an_disable_admin    = MLX5_GET(ptys_reg, out, an_disable_admin);
 925         an_status           = MLX5_GET(ptys_reg, out, an_status);
 926         connector_type      = MLX5_GET(ptys_reg, out, connector_type);
 927 
 928         mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
 929 
 930         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
 931         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
 932 
 933         get_supported(mdev, eth_proto_cap, link_ksettings);
 934         get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,
 935                         admin_ext);
 936         get_speed_duplex(priv->netdev, eth_proto_oper, !admin_ext,
 937                          link_ksettings);
 938 
 939         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
 940 
 941         link_ksettings->base.port = get_connector_port(eth_proto_oper,
 942                                                        connector_type, ext);
 943         ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
 944                                                connector_type, ext);
 945         get_lp_advertising(mdev, eth_proto_lp, link_ksettings);
 946 
 947         if (an_status == MLX5_AN_COMPLETE)
 948                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 949                                                      lp_advertising, Autoneg);
 950 
 951         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
 952                                                           AUTONEG_ENABLE;
 953         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
 954                                              Autoneg);
 955 
 956         err = get_fec_supported_advertised(mdev, link_ksettings);
 957         if (err) {
 958                 netdev_dbg(priv->netdev, "%s: FEC caps query failed: %d\n",
 959                            __func__, err);
 960                 err = 0; /* don't fail caps query because of FEC error */
 961         }
 962 
 963         if (!an_disable_admin)
 964                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 965                                                      advertising, Autoneg);
 966 
 967 err_query_regs:
 968         return err;
 969 }
 970 
 971 static int mlx5e_get_link_ksettings(struct net_device *netdev,
 972                                     struct ethtool_link_ksettings *link_ksettings)
 973 {
 974         struct mlx5e_priv *priv = netdev_priv(netdev);
 975 
 976         return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings);
 977 }
 978 
 979 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
 980 {
 981         u32 i, ptys_modes = 0;
 982 
 983         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
 984                 if (*ptys2legacy_ethtool_table[i].advertised == 0)
 985                         continue;
 986                 if (bitmap_intersects(ptys2legacy_ethtool_table[i].advertised,
 987                                       link_modes,
 988                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
 989                         ptys_modes |= MLX5E_PROT_MASK(i);
 990         }
 991 
 992         return ptys_modes;
 993 }
 994 
 995 static u32 mlx5e_ethtool2ptys_ext_adver_link(const unsigned long *link_modes)
 996 {
 997         u32 i, ptys_modes = 0;
 998         unsigned long modes[2];
 999 
1000         for (i = 0; i < MLX5E_EXT_LINK_MODES_NUMBER; ++i) {
1001                 if (*ptys2ext_ethtool_table[i].advertised == 0)
1002                         continue;
1003                 memset(modes, 0, sizeof(modes));
1004                 bitmap_and(modes, ptys2ext_ethtool_table[i].advertised,
1005                            link_modes, __ETHTOOL_LINK_MODE_MASK_NBITS);
1006 
1007                 if (modes[0] == ptys2ext_ethtool_table[i].advertised[0] &&
1008                     modes[1] == ptys2ext_ethtool_table[i].advertised[1])
1009                         ptys_modes |= MLX5E_PROT_MASK(i);
1010         }
1011         return ptys_modes;
1012 }
1013 
1014 static bool ext_link_mode_requested(const unsigned long *adver)
1015 {
1016 #define MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
1017         int size = __ETHTOOL_LINK_MODE_MASK_NBITS - MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT;
1018         __ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = {0,};
1019 
1020         bitmap_set(modes, MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT, size);
1021         return bitmap_intersects(modes, adver, __ETHTOOL_LINK_MODE_MASK_NBITS);
1022 }
1023 
1024 static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_supported)
1025 {
1026         bool ext_link_mode = ext_link_mode_requested(adver);
1027 
1028         return  autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;
1029 }
1030 
1031 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
1032                                      const struct ethtool_link_ksettings *link_ksettings)
1033 {
1034         struct mlx5_core_dev *mdev = priv->mdev;
1035         struct mlx5e_port_eth_proto eproto;
1036         const unsigned long *adver;
1037         bool an_changes = false;
1038         u8 an_disable_admin;
1039         bool ext_supported;
1040         u8 an_disable_cap;
1041         bool an_disable;
1042         u32 link_modes;
1043         u8 an_status;
1044         u8 autoneg;
1045         u32 speed;
1046         bool ext;
1047         int err;
1048 
1049         u32 (*ethtool2ptys_adver_func)(const unsigned long *adver);
1050 
1051         adver = link_ksettings->link_modes.advertising;
1052         autoneg = link_ksettings->base.autoneg;
1053         speed = link_ksettings->base.speed;
1054 
1055         ext_supported = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);
1056         ext = ext_requested(autoneg, adver, ext_supported);
1057         if (!ext_supported && ext)
1058                 return -EOPNOTSUPP;
1059 
1060         ethtool2ptys_adver_func = ext ? mlx5e_ethtool2ptys_ext_adver_link :
1061                                   mlx5e_ethtool2ptys_adver_link;
1062         err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
1063         if (err) {
1064                 netdev_err(priv->netdev, "%s: query port eth proto failed: %d\n",
1065                            __func__, err);
1066                 goto out;
1067         }
1068         link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :
1069                 mlx5e_port_speed2linkmodes(mdev, speed, !ext);
1070 
1071         if ((link_modes & MLX5E_PROT_MASK(MLX5E_56GBASE_R4)) &&
1072             autoneg != AUTONEG_ENABLE) {
1073                 netdev_err(priv->netdev, "%s: 56G link speed requires autoneg enabled\n",
1074                            __func__);
1075                 err = -EINVAL;
1076                 goto out;
1077         }
1078 
1079         link_modes = link_modes & eproto.cap;
1080         if (!link_modes) {
1081                 netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",
1082                            __func__);
1083                 err = -EINVAL;
1084                 goto out;
1085         }
1086 
1087         mlx5_port_query_eth_autoneg(mdev, &an_status, &an_disable_cap,
1088                                     &an_disable_admin);
1089 
1090         an_disable = autoneg == AUTONEG_DISABLE;
1091         an_changes = ((!an_disable && an_disable_admin) ||
1092                       (an_disable && !an_disable_admin));
1093 
1094         if (!an_changes && link_modes == eproto.admin)
1095                 goto out;
1096 
1097         mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
1098         mlx5_toggle_port_link(mdev);
1099 
1100 out:
1101         return err;
1102 }
1103 
1104 static int mlx5e_set_link_ksettings(struct net_device *netdev,
1105                                     const struct ethtool_link_ksettings *link_ksettings)
1106 {
1107         struct mlx5e_priv *priv = netdev_priv(netdev);
1108 
1109         return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings);
1110 }
1111 
1112 u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv)
1113 {
1114         return sizeof(priv->rss_params.toeplitz_hash_key);
1115 }
1116 
1117 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
1118 {
1119         struct mlx5e_priv *priv = netdev_priv(netdev);
1120 
1121         return mlx5e_ethtool_get_rxfh_key_size(priv);
1122 }
1123 
1124 u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv)
1125 {
1126         return MLX5E_INDIR_RQT_SIZE;
1127 }
1128 
1129 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
1130 {
1131         struct mlx5e_priv *priv = netdev_priv(netdev);
1132 
1133         return mlx5e_ethtool_get_rxfh_indir_size(priv);
1134 }
1135 
1136 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
1137                           u8 *hfunc)
1138 {
1139         struct mlx5e_priv *priv = netdev_priv(netdev);
1140         struct mlx5e_rss_params *rss = &priv->rss_params;
1141 
1142         if (indir)
1143                 memcpy(indir, rss->indirection_rqt,
1144                        sizeof(rss->indirection_rqt));
1145 
1146         if (key)
1147                 memcpy(key, rss->toeplitz_hash_key,
1148                        sizeof(rss->toeplitz_hash_key));
1149 
1150         if (hfunc)
1151                 *hfunc = rss->hfunc;
1152 
1153         return 0;
1154 }
1155 
1156 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
1157                           const u8 *key, const u8 hfunc)
1158 {
1159         struct mlx5e_priv *priv = netdev_priv(dev);
1160         struct mlx5e_rss_params *rss = &priv->rss_params;
1161         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
1162         bool hash_changed = false;
1163         void *in;
1164 
1165         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1166             (hfunc != ETH_RSS_HASH_XOR) &&
1167             (hfunc != ETH_RSS_HASH_TOP))
1168                 return -EINVAL;
1169 
1170         in = kvzalloc(inlen, GFP_KERNEL);
1171         if (!in)
1172                 return -ENOMEM;
1173 
1174         mutex_lock(&priv->state_lock);
1175 
1176         if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != rss->hfunc) {
1177                 rss->hfunc = hfunc;
1178                 hash_changed = true;
1179         }
1180 
1181         if (indir) {
1182                 memcpy(rss->indirection_rqt, indir,
1183                        sizeof(rss->indirection_rqt));
1184 
1185                 if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1186                         u32 rqtn = priv->indir_rqt.rqtn;
1187                         struct mlx5e_redirect_rqt_param rrp = {
1188                                 .is_rss = true,
1189                                 {
1190                                         .rss = {
1191                                                 .hfunc = rss->hfunc,
1192                                                 .channels  = &priv->channels,
1193                                         },
1194                                 },
1195                         };
1196 
1197                         mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
1198                 }
1199         }
1200 
1201         if (key) {
1202                 memcpy(rss->toeplitz_hash_key, key,
1203                        sizeof(rss->toeplitz_hash_key));
1204                 hash_changed = hash_changed || rss->hfunc == ETH_RSS_HASH_TOP;
1205         }
1206 
1207         if (hash_changed)
1208                 mlx5e_modify_tirs_hash(priv, in, inlen);
1209 
1210         mutex_unlock(&priv->state_lock);
1211 
1212         kvfree(in);
1213 
1214         return 0;
1215 }
1216 
1217 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC         100
1218 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC          8000
1219 #define MLX5E_PFC_PREVEN_MINOR_PRECENT          85
1220 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC          80
1221 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
1222         max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
1223               (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
1224 
1225 static int mlx5e_get_pfc_prevention_tout(struct net_device *netdev,
1226                                          u16 *pfc_prevention_tout)
1227 {
1228         struct mlx5e_priv *priv    = netdev_priv(netdev);
1229         struct mlx5_core_dev *mdev = priv->mdev;
1230 
1231         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1232             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1233                 return -EOPNOTSUPP;
1234 
1235         return mlx5_query_port_stall_watermark(mdev, pfc_prevention_tout, NULL);
1236 }
1237 
1238 static int mlx5e_set_pfc_prevention_tout(struct net_device *netdev,
1239                                          u16 pfc_preven)
1240 {
1241         struct mlx5e_priv *priv = netdev_priv(netdev);
1242         struct mlx5_core_dev *mdev = priv->mdev;
1243         u16 critical_tout;
1244         u16 minor;
1245 
1246         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1247             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1248                 return -EOPNOTSUPP;
1249 
1250         critical_tout = (pfc_preven == PFC_STORM_PREVENTION_AUTO) ?
1251                         MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC :
1252                         pfc_preven;
1253 
1254         if (critical_tout != PFC_STORM_PREVENTION_DISABLE &&
1255             (critical_tout > MLX5E_PFC_PREVEN_TOUT_MAX_MSEC ||
1256              critical_tout < MLX5E_PFC_PREVEN_TOUT_MIN_MSEC)) {
1257                 netdev_info(netdev, "%s: pfc prevention tout not in range (%d-%d)\n",
1258                             __func__, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC,
1259                             MLX5E_PFC_PREVEN_TOUT_MAX_MSEC);
1260                 return -EINVAL;
1261         }
1262 
1263         minor = MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout);
1264         return mlx5_set_port_stall_watermark(mdev, critical_tout,
1265                                              minor);
1266 }
1267 
1268 static int mlx5e_get_tunable(struct net_device *dev,
1269                              const struct ethtool_tunable *tuna,
1270                              void *data)
1271 {
1272         int err;
1273 
1274         switch (tuna->id) {
1275         case ETHTOOL_PFC_PREVENTION_TOUT:
1276                 err = mlx5e_get_pfc_prevention_tout(dev, data);
1277                 break;
1278         default:
1279                 err = -EINVAL;
1280                 break;
1281         }
1282 
1283         return err;
1284 }
1285 
1286 static int mlx5e_set_tunable(struct net_device *dev,
1287                              const struct ethtool_tunable *tuna,
1288                              const void *data)
1289 {
1290         struct mlx5e_priv *priv = netdev_priv(dev);
1291         int err;
1292 
1293         mutex_lock(&priv->state_lock);
1294 
1295         switch (tuna->id) {
1296         case ETHTOOL_PFC_PREVENTION_TOUT:
1297                 err = mlx5e_set_pfc_prevention_tout(dev, *(u16 *)data);
1298                 break;
1299         default:
1300                 err = -EINVAL;
1301                 break;
1302         }
1303 
1304         mutex_unlock(&priv->state_lock);
1305         return err;
1306 }
1307 
1308 void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
1309                                   struct ethtool_pauseparam *pauseparam)
1310 {
1311         struct mlx5_core_dev *mdev = priv->mdev;
1312         int err;
1313 
1314         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1315                                     &pauseparam->tx_pause);
1316         if (err) {
1317                 netdev_err(priv->netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1318                            __func__, err);
1319         }
1320 }
1321 
1322 static void mlx5e_get_pauseparam(struct net_device *netdev,
1323                                  struct ethtool_pauseparam *pauseparam)
1324 {
1325         struct mlx5e_priv *priv = netdev_priv(netdev);
1326 
1327         mlx5e_ethtool_get_pauseparam(priv, pauseparam);
1328 }
1329 
1330 int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
1331                                  struct ethtool_pauseparam *pauseparam)
1332 {
1333         struct mlx5_core_dev *mdev = priv->mdev;
1334         int err;
1335 
1336         if (!MLX5_CAP_GEN(mdev, vport_group_manager))
1337                 return -EOPNOTSUPP;
1338 
1339         if (pauseparam->autoneg)
1340                 return -EINVAL;
1341 
1342         err = mlx5_set_port_pause(mdev,
1343                                   pauseparam->rx_pause ? 1 : 0,
1344                                   pauseparam->tx_pause ? 1 : 0);
1345         if (err) {
1346                 netdev_err(priv->netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1347                            __func__, err);
1348         }
1349 
1350         return err;
1351 }
1352 
1353 static int mlx5e_set_pauseparam(struct net_device *netdev,
1354                                 struct ethtool_pauseparam *pauseparam)
1355 {
1356         struct mlx5e_priv *priv = netdev_priv(netdev);
1357 
1358         return mlx5e_ethtool_set_pauseparam(priv, pauseparam);
1359 }
1360 
1361 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1362                               struct ethtool_ts_info *info)
1363 {
1364         struct mlx5_core_dev *mdev = priv->mdev;
1365 
1366         info->phc_index = mlx5_clock_get_ptp_index(mdev);
1367 
1368         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
1369             info->phc_index == -1)
1370                 return 0;
1371 
1372         info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1373                                 SOF_TIMESTAMPING_RX_HARDWARE |
1374                                 SOF_TIMESTAMPING_RAW_HARDWARE;
1375 
1376         info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1377                          BIT(HWTSTAMP_TX_ON);
1378 
1379         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1380                            BIT(HWTSTAMP_FILTER_ALL);
1381 
1382         return 0;
1383 }
1384 
1385 static int mlx5e_get_ts_info(struct net_device *dev,
1386                              struct ethtool_ts_info *info)
1387 {
1388         struct mlx5e_priv *priv = netdev_priv(dev);
1389 
1390         return mlx5e_ethtool_get_ts_info(priv, info);
1391 }
1392 
1393 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1394 {
1395         __u32 ret = 0;
1396 
1397         if (MLX5_CAP_GEN(mdev, wol_g))
1398                 ret |= WAKE_MAGIC;
1399 
1400         if (MLX5_CAP_GEN(mdev, wol_s))
1401                 ret |= WAKE_MAGICSECURE;
1402 
1403         if (MLX5_CAP_GEN(mdev, wol_a))
1404                 ret |= WAKE_ARP;
1405 
1406         if (MLX5_CAP_GEN(mdev, wol_b))
1407                 ret |= WAKE_BCAST;
1408 
1409         if (MLX5_CAP_GEN(mdev, wol_m))
1410                 ret |= WAKE_MCAST;
1411 
1412         if (MLX5_CAP_GEN(mdev, wol_u))
1413                 ret |= WAKE_UCAST;
1414 
1415         if (MLX5_CAP_GEN(mdev, wol_p))
1416                 ret |= WAKE_PHY;
1417 
1418         return ret;
1419 }
1420 
1421 static __u32 mlx5e_reformat_wol_mode_mlx5_to_linux(u8 mode)
1422 {
1423         __u32 ret = 0;
1424 
1425         if (mode & MLX5_WOL_MAGIC)
1426                 ret |= WAKE_MAGIC;
1427 
1428         if (mode & MLX5_WOL_SECURED_MAGIC)
1429                 ret |= WAKE_MAGICSECURE;
1430 
1431         if (mode & MLX5_WOL_ARP)
1432                 ret |= WAKE_ARP;
1433 
1434         if (mode & MLX5_WOL_BROADCAST)
1435                 ret |= WAKE_BCAST;
1436 
1437         if (mode & MLX5_WOL_MULTICAST)
1438                 ret |= WAKE_MCAST;
1439 
1440         if (mode & MLX5_WOL_UNICAST)
1441                 ret |= WAKE_UCAST;
1442 
1443         if (mode & MLX5_WOL_PHY_ACTIVITY)
1444                 ret |= WAKE_PHY;
1445 
1446         return ret;
1447 }
1448 
1449 static u8 mlx5e_reformat_wol_mode_linux_to_mlx5(__u32 mode)
1450 {
1451         u8 ret = 0;
1452 
1453         if (mode & WAKE_MAGIC)
1454                 ret |= MLX5_WOL_MAGIC;
1455 
1456         if (mode & WAKE_MAGICSECURE)
1457                 ret |= MLX5_WOL_SECURED_MAGIC;
1458 
1459         if (mode & WAKE_ARP)
1460                 ret |= MLX5_WOL_ARP;
1461 
1462         if (mode & WAKE_BCAST)
1463                 ret |= MLX5_WOL_BROADCAST;
1464 
1465         if (mode & WAKE_MCAST)
1466                 ret |= MLX5_WOL_MULTICAST;
1467 
1468         if (mode & WAKE_UCAST)
1469                 ret |= MLX5_WOL_UNICAST;
1470 
1471         if (mode & WAKE_PHY)
1472                 ret |= MLX5_WOL_PHY_ACTIVITY;
1473 
1474         return ret;
1475 }
1476 
1477 static void mlx5e_get_wol(struct net_device *netdev,
1478                           struct ethtool_wolinfo *wol)
1479 {
1480         struct mlx5e_priv *priv = netdev_priv(netdev);
1481         struct mlx5_core_dev *mdev = priv->mdev;
1482         u8 mlx5_wol_mode;
1483         int err;
1484 
1485         memset(wol, 0, sizeof(*wol));
1486 
1487         wol->supported = mlx5e_get_wol_supported(mdev);
1488         if (!wol->supported)
1489                 return;
1490 
1491         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1492         if (err)
1493                 return;
1494 
1495         wol->wolopts = mlx5e_reformat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1496 }
1497 
1498 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1499 {
1500         struct mlx5e_priv *priv = netdev_priv(netdev);
1501         struct mlx5_core_dev *mdev = priv->mdev;
1502         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1503         u32 mlx5_wol_mode;
1504 
1505         if (!wol_supported)
1506                 return -EOPNOTSUPP;
1507 
1508         if (wol->wolopts & ~wol_supported)
1509                 return -EINVAL;
1510 
1511         mlx5_wol_mode = mlx5e_reformat_wol_mode_linux_to_mlx5(wol->wolopts);
1512 
1513         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1514 }
1515 
1516 static int mlx5e_get_fecparam(struct net_device *netdev,
1517                               struct ethtool_fecparam *fecparam)
1518 {
1519         struct mlx5e_priv *priv = netdev_priv(netdev);
1520         struct mlx5_core_dev *mdev = priv->mdev;
1521         u8 fec_configured = 0;
1522         u32 fec_active = 0;
1523         int err;
1524 
1525         err = mlx5e_get_fec_mode(mdev, &fec_active, &fec_configured);
1526 
1527         if (err)
1528                 return err;
1529 
1530         fecparam->active_fec = pplm2ethtool_fec((u_long)fec_active,
1531                                                 sizeof(u32) * BITS_PER_BYTE);
1532 
1533         if (!fecparam->active_fec)
1534                 return -EOPNOTSUPP;
1535 
1536         fecparam->fec = pplm2ethtool_fec((u_long)fec_configured,
1537                                          sizeof(u8) * BITS_PER_BYTE);
1538 
1539         return 0;
1540 }
1541 
1542 static int mlx5e_set_fecparam(struct net_device *netdev,
1543                               struct ethtool_fecparam *fecparam)
1544 {
1545         struct mlx5e_priv *priv = netdev_priv(netdev);
1546         struct mlx5_core_dev *mdev = priv->mdev;
1547         u8 fec_policy = 0;
1548         int mode;
1549         int err;
1550 
1551         if (bitmap_weight((unsigned long *)&fecparam->fec,
1552                           ETHTOOL_FEC_BASER_BIT + 1) > 1)
1553                 return -EOPNOTSUPP;
1554 
1555         for (mode = 0; mode < ARRAY_SIZE(pplm_fec_2_ethtool); mode++) {
1556                 if (!(pplm_fec_2_ethtool[mode] & fecparam->fec))
1557                         continue;
1558                 fec_policy |= (1 << mode);
1559                 break;
1560         }
1561 
1562         err = mlx5e_set_fec_mode(mdev, fec_policy);
1563 
1564         if (err)
1565                 return err;
1566 
1567         mlx5_toggle_port_link(mdev);
1568 
1569         return 0;
1570 }
1571 
1572 static u32 mlx5e_get_msglevel(struct net_device *dev)
1573 {
1574         return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1575 }
1576 
1577 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1578 {
1579         ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1580 }
1581 
1582 static int mlx5e_set_phys_id(struct net_device *dev,
1583                              enum ethtool_phys_id_state state)
1584 {
1585         struct mlx5e_priv *priv = netdev_priv(dev);
1586         struct mlx5_core_dev *mdev = priv->mdev;
1587         u16 beacon_duration;
1588 
1589         if (!MLX5_CAP_GEN(mdev, beacon_led))
1590                 return -EOPNOTSUPP;
1591 
1592         switch (state) {
1593         case ETHTOOL_ID_ACTIVE:
1594                 beacon_duration = MLX5_BEACON_DURATION_INF;
1595                 break;
1596         case ETHTOOL_ID_INACTIVE:
1597                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1598                 break;
1599         default:
1600                 return -EOPNOTSUPP;
1601         }
1602 
1603         return mlx5_set_port_beacon(mdev, beacon_duration);
1604 }
1605 
1606 static int mlx5e_get_module_info(struct net_device *netdev,
1607                                  struct ethtool_modinfo *modinfo)
1608 {
1609         struct mlx5e_priv *priv = netdev_priv(netdev);
1610         struct mlx5_core_dev *dev = priv->mdev;
1611         int size_read = 0;
1612         u8 data[4] = {0};
1613 
1614         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1615         if (size_read < 2)
1616                 return -EIO;
1617 
1618         /* data[0] = identifier byte */
1619         switch (data[0]) {
1620         case MLX5_MODULE_ID_QSFP:
1621                 modinfo->type       = ETH_MODULE_SFF_8436;
1622                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1623                 break;
1624         case MLX5_MODULE_ID_QSFP_PLUS:
1625         case MLX5_MODULE_ID_QSFP28:
1626                 /* data[1] = revision id */
1627                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1628                         modinfo->type       = ETH_MODULE_SFF_8636;
1629                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_MAX_LEN;
1630                 } else {
1631                         modinfo->type       = ETH_MODULE_SFF_8436;
1632                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1633                 }
1634                 break;
1635         case MLX5_MODULE_ID_SFP:
1636                 modinfo->type       = ETH_MODULE_SFF_8472;
1637                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1638                 break;
1639         default:
1640                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1641                            __func__, data[0]);
1642                 return -EINVAL;
1643         }
1644 
1645         return 0;
1646 }
1647 
1648 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1649                                    struct ethtool_eeprom *ee,
1650                                    u8 *data)
1651 {
1652         struct mlx5e_priv *priv = netdev_priv(netdev);
1653         struct mlx5_core_dev *mdev = priv->mdev;
1654         int offset = ee->offset;
1655         int size_read;
1656         int i = 0;
1657 
1658         if (!ee->len)
1659                 return -EINVAL;
1660 
1661         memset(data, 0, ee->len);
1662 
1663         while (i < ee->len) {
1664                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1665                                                      data + i);
1666 
1667                 if (!size_read)
1668                         /* Done reading */
1669                         return 0;
1670 
1671                 if (size_read < 0) {
1672                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1673                                    __func__, size_read);
1674                         return 0;
1675                 }
1676 
1677                 i += size_read;
1678                 offset += size_read;
1679         }
1680 
1681         return 0;
1682 }
1683 
1684 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1685                                struct ethtool_flash *flash)
1686 {
1687         struct mlx5_core_dev *mdev = priv->mdev;
1688         struct net_device *dev = priv->netdev;
1689         const struct firmware *fw;
1690         int err;
1691 
1692         if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1693                 return -EOPNOTSUPP;
1694 
1695         err = request_firmware_direct(&fw, flash->data, &dev->dev);
1696         if (err)
1697                 return err;
1698 
1699         dev_hold(dev);
1700         rtnl_unlock();
1701 
1702         err = mlx5_firmware_flash(mdev, fw, NULL);
1703         release_firmware(fw);
1704 
1705         rtnl_lock();
1706         dev_put(dev);
1707         return err;
1708 }
1709 
1710 static int mlx5e_flash_device(struct net_device *dev,
1711                               struct ethtool_flash *flash)
1712 {
1713         struct mlx5e_priv *priv = netdev_priv(dev);
1714 
1715         return mlx5e_ethtool_flash_device(priv, flash);
1716 }
1717 
1718 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1719                                      bool is_rx_cq)
1720 {
1721         struct mlx5e_priv *priv = netdev_priv(netdev);
1722         struct mlx5_core_dev *mdev = priv->mdev;
1723         struct mlx5e_channels new_channels = {};
1724         bool mode_changed;
1725         u8 cq_period_mode, current_cq_period_mode;
1726 
1727         cq_period_mode = enable ?
1728                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1729                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1730         current_cq_period_mode = is_rx_cq ?
1731                 priv->channels.params.rx_cq_moderation.cq_period_mode :
1732                 priv->channels.params.tx_cq_moderation.cq_period_mode;
1733         mode_changed = cq_period_mode != current_cq_period_mode;
1734 
1735         if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1736             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1737                 return -EOPNOTSUPP;
1738 
1739         if (!mode_changed)
1740                 return 0;
1741 
1742         new_channels.params = priv->channels.params;
1743         if (is_rx_cq)
1744                 mlx5e_set_rx_cq_mode_params(&new_channels.params, cq_period_mode);
1745         else
1746                 mlx5e_set_tx_cq_mode_params(&new_channels.params, cq_period_mode);
1747 
1748         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1749                 priv->channels.params = new_channels.params;
1750                 return 0;
1751         }
1752 
1753         return mlx5e_safe_switch_channels(priv, &new_channels, NULL);
1754 }
1755 
1756 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1757 {
1758         return set_pflag_cqe_based_moder(netdev, enable, false);
1759 }
1760 
1761 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1762 {
1763         return set_pflag_cqe_based_moder(netdev, enable, true);
1764 }
1765 
1766 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1767 {
1768         bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1769         struct mlx5e_channels new_channels = {};
1770         int err = 0;
1771 
1772         if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1773                 return new_val ? -EOPNOTSUPP : 0;
1774 
1775         if (curr_val == new_val)
1776                 return 0;
1777 
1778         new_channels.params = priv->channels.params;
1779         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1780 
1781         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1782                 priv->channels.params = new_channels.params;
1783                 return 0;
1784         }
1785 
1786         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL);
1787         if (err)
1788                 return err;
1789 
1790         mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1791                   MLX5E_GET_PFLAG(&priv->channels.params,
1792                                   MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1793 
1794         return 0;
1795 }
1796 
1797 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1798                                      bool enable)
1799 {
1800         struct mlx5e_priv *priv = netdev_priv(netdev);
1801         struct mlx5_core_dev *mdev = priv->mdev;
1802 
1803         if (!MLX5_CAP_GEN(mdev, cqe_compression))
1804                 return -EOPNOTSUPP;
1805 
1806         if (enable && priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE) {
1807                 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
1808                 return -EINVAL;
1809         }
1810 
1811         mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1812         priv->channels.params.rx_cqe_compress_def = enable;
1813 
1814         return 0;
1815 }
1816 
1817 static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)
1818 {
1819         struct mlx5e_priv *priv = netdev_priv(netdev);
1820         struct mlx5_core_dev *mdev = priv->mdev;
1821         struct mlx5e_channels new_channels = {};
1822 
1823         if (enable) {
1824                 if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
1825                         return -EOPNOTSUPP;
1826                 if (!mlx5e_striding_rq_possible(mdev, &priv->channels.params))
1827                         return -EINVAL;
1828         } else if (priv->channels.params.lro_en) {
1829                 netdev_warn(netdev, "Can't set legacy RQ with LRO, disable LRO first\n");
1830                 return -EINVAL;
1831         }
1832 
1833         new_channels.params = priv->channels.params;
1834 
1835         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);
1836         mlx5e_set_rq_type(mdev, &new_channels.params);
1837 
1838         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1839                 priv->channels.params = new_channels.params;
1840                 return 0;
1841         }
1842 
1843         return mlx5e_safe_switch_channels(priv, &new_channels, NULL);
1844 }
1845 
1846 static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
1847 {
1848         struct mlx5e_priv *priv = netdev_priv(netdev);
1849         struct mlx5e_channels *channels = &priv->channels;
1850         struct mlx5e_channel *c;
1851         int i;
1852 
1853         if (!test_bit(MLX5E_STATE_OPENED, &priv->state) ||
1854             priv->channels.params.xdp_prog)
1855                 return 0;
1856 
1857         for (i = 0; i < channels->num; i++) {
1858                 c = channels->c[i];
1859                 if (enable)
1860                         __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1861                 else
1862                         __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1863         }
1864 
1865         return 0;
1866 }
1867 
1868 static int set_pflag_xdp_tx_mpwqe(struct net_device *netdev, bool enable)
1869 {
1870         struct mlx5e_priv *priv = netdev_priv(netdev);
1871         struct mlx5_core_dev *mdev = priv->mdev;
1872         struct mlx5e_channels new_channels = {};
1873         int err;
1874 
1875         if (enable && !MLX5_CAP_ETH(mdev, enhanced_multi_pkt_send_wqe))
1876                 return -EOPNOTSUPP;
1877 
1878         new_channels.params = priv->channels.params;
1879 
1880         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_XDP_TX_MPWQE, enable);
1881 
1882         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1883                 priv->channels.params = new_channels.params;
1884                 return 0;
1885         }
1886 
1887         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL);
1888         return err;
1889 }
1890 
1891 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS] = {
1892         { "rx_cqe_moder",        set_pflag_rx_cqe_based_moder },
1893         { "tx_cqe_moder",        set_pflag_tx_cqe_based_moder },
1894         { "rx_cqe_compress",     set_pflag_rx_cqe_compress },
1895         { "rx_striding_rq",      set_pflag_rx_striding_rq },
1896         { "rx_no_csum_complete", set_pflag_rx_no_csum_complete },
1897         { "xdp_tx_mpwqe",        set_pflag_xdp_tx_mpwqe },
1898 };
1899 
1900 static int mlx5e_handle_pflag(struct net_device *netdev,
1901                               u32 wanted_flags,
1902                               enum mlx5e_priv_flag flag)
1903 {
1904         struct mlx5e_priv *priv = netdev_priv(netdev);
1905         bool enable = !!(wanted_flags & BIT(flag));
1906         u32 changes = wanted_flags ^ priv->channels.params.pflags;
1907         int err;
1908 
1909         if (!(changes & BIT(flag)))
1910                 return 0;
1911 
1912         err = mlx5e_priv_flags[flag].handler(netdev, enable);
1913         if (err) {
1914                 netdev_err(netdev, "%s private flag '%s' failed err %d\n",
1915                            enable ? "Enable" : "Disable", mlx5e_priv_flags[flag].name, err);
1916                 return err;
1917         }
1918 
1919         MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
1920         return 0;
1921 }
1922 
1923 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1924 {
1925         struct mlx5e_priv *priv = netdev_priv(netdev);
1926         enum mlx5e_priv_flag pflag;
1927         int err;
1928 
1929         mutex_lock(&priv->state_lock);
1930 
1931         for (pflag = 0; pflag < MLX5E_NUM_PFLAGS; pflag++) {
1932                 err = mlx5e_handle_pflag(netdev, pflags, pflag);
1933                 if (err)
1934                         break;
1935         }
1936 
1937         mutex_unlock(&priv->state_lock);
1938 
1939         /* Need to fix some features.. */
1940         netdev_update_features(netdev);
1941 
1942         return err;
1943 }
1944 
1945 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1946 {
1947         struct mlx5e_priv *priv = netdev_priv(netdev);
1948 
1949         return priv->channels.params.pflags;
1950 }
1951 
1952 static int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, u32 *rule_locs)
1953 {
1954         struct mlx5e_priv *priv = netdev_priv(dev);
1955 
1956         /* ETHTOOL_GRXRINGS is needed by ethtool -x which is not part
1957          * of rxnfc. We keep this logic out of mlx5e_ethtool_get_rxnfc,
1958          * to avoid breaking "ethtool -x" when mlx5e_ethtool_get_rxnfc
1959          * is compiled out via CONFIG_MLX5_EN_RXNFC=n.
1960          */
1961         if (info->cmd == ETHTOOL_GRXRINGS) {
1962                 info->data = priv->channels.params.num_channels;
1963                 return 0;
1964         }
1965 
1966         return mlx5e_ethtool_get_rxnfc(dev, info, rule_locs);
1967 }
1968 
1969 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1970 {
1971         return mlx5e_ethtool_set_rxnfc(dev, cmd);
1972 }
1973 
1974 const struct ethtool_ops mlx5e_ethtool_ops = {
1975         .get_drvinfo       = mlx5e_get_drvinfo,
1976         .get_link          = ethtool_op_get_link,
1977         .get_strings       = mlx5e_get_strings,
1978         .get_sset_count    = mlx5e_get_sset_count,
1979         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1980         .get_ringparam     = mlx5e_get_ringparam,
1981         .set_ringparam     = mlx5e_set_ringparam,
1982         .get_channels      = mlx5e_get_channels,
1983         .set_channels      = mlx5e_set_channels,
1984         .get_coalesce      = mlx5e_get_coalesce,
1985         .set_coalesce      = mlx5e_set_coalesce,
1986         .get_link_ksettings  = mlx5e_get_link_ksettings,
1987         .set_link_ksettings  = mlx5e_set_link_ksettings,
1988         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1989         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1990         .get_rxfh          = mlx5e_get_rxfh,
1991         .set_rxfh          = mlx5e_set_rxfh,
1992         .get_rxnfc         = mlx5e_get_rxnfc,
1993         .set_rxnfc         = mlx5e_set_rxnfc,
1994         .get_tunable       = mlx5e_get_tunable,
1995         .set_tunable       = mlx5e_set_tunable,
1996         .get_pauseparam    = mlx5e_get_pauseparam,
1997         .set_pauseparam    = mlx5e_set_pauseparam,
1998         .get_ts_info       = mlx5e_get_ts_info,
1999         .set_phys_id       = mlx5e_set_phys_id,
2000         .get_wol           = mlx5e_get_wol,
2001         .set_wol           = mlx5e_set_wol,
2002         .get_module_info   = mlx5e_get_module_info,
2003         .get_module_eeprom = mlx5e_get_module_eeprom,
2004         .flash_device      = mlx5e_flash_device,
2005         .get_priv_flags    = mlx5e_get_priv_flags,
2006         .set_priv_flags    = mlx5e_set_priv_flags,
2007         .self_test         = mlx5e_self_test,
2008         .get_msglevel      = mlx5e_get_msglevel,
2009         .set_msglevel      = mlx5e_set_msglevel,
2010         .get_fecparam      = mlx5e_get_fecparam,
2011         .set_fecparam      = mlx5e_set_fecparam,
2012 };

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