root/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c

DEFINITIONS

1. mlx5e_channel_no_affinity_change
2. mlx5e_handle_tx_dim
3. mlx5e_handle_rx_dim
4. mlx5e_trigger_irq
5. mlx5e_napi_xsk_post
6. mlx5e_napi_poll
7. mlx5e_completion_event
8. mlx5e_cq_error_event

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 
  33 #include <linux/irq.h>
  34 #include "en.h"
  35 #include "en/xdp.h"
  36 #include "en/xsk/rx.h"
  37 #include "en/xsk/tx.h"
  38 
  39 static inline bool mlx5e_channel_no_affinity_change(struct mlx5e_channel *c)
  40 {
  41         int current_cpu = smp_processor_id();
  42         const struct cpumask *aff;
  43         struct irq_data *idata;
  44 
  45         idata = irq_desc_get_irq_data(c->irq_desc);
  46         aff = irq_data_get_affinity_mask(idata);
  47         return cpumask_test_cpu(current_cpu, aff);
  48 }
  49 
  50 static void mlx5e_handle_tx_dim(struct mlx5e_txqsq *sq)
  51 {
  52         struct mlx5e_sq_stats *stats = sq->stats;
  53         struct dim_sample dim_sample = {};
  54 
  55         if (unlikely(!test_bit(MLX5E_SQ_STATE_AM, &sq->state)))
  56                 return;
  57 
  58         dim_update_sample(sq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample);
  59         net_dim(&sq->dim, dim_sample);
  60 }
  61 
  62 static void mlx5e_handle_rx_dim(struct mlx5e_rq *rq)
  63 {
  64         struct mlx5e_rq_stats *stats = rq->stats;
  65         struct dim_sample dim_sample = {};
  66 
  67         if (unlikely(!test_bit(MLX5E_RQ_STATE_AM, &rq->state)))
  68                 return;
  69 
  70         dim_update_sample(rq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample);
  71         net_dim(&rq->dim, dim_sample);
  72 }
  73 
  74 void mlx5e_trigger_irq(struct mlx5e_icosq *sq)
  75 {
  76         struct mlx5_wq_cyc *wq = &sq->wq;
  77         struct mlx5e_tx_wqe *nopwqe;
  78         u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
  79 
  80         sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP;
  81         sq->db.ico_wqe[pi].num_wqebbs = 1;
  82         nopwqe = mlx5e_post_nop(wq, sq->sqn, &sq->pc);
  83         mlx5e_notify_hw(wq, sq->pc, sq->uar_map, &nopwqe->ctrl);
  84 }
  85 
  86 static bool mlx5e_napi_xsk_post(struct mlx5e_xdpsq *xsksq, struct mlx5e_rq *xskrq)
  87 {
  88         bool busy_xsk = false, xsk_rx_alloc_err;
  89 
  90         /* Handle the race between the application querying need_wakeup and the
  91          * driver setting it:
  92          * 1. Update need_wakeup both before and after the TX. If it goes to
  93          * "yes", it can only happen with the first update.
  94          * 2. If the application queried need_wakeup before we set it, the
  95          * packets will be transmitted anyway, even w/o a wakeup.
  96          * 3. Give a chance to clear need_wakeup after new packets were queued
  97          * for TX.
  98          */
  99         mlx5e_xsk_update_tx_wakeup(xsksq);
 100         busy_xsk |= mlx5e_xsk_tx(xsksq, MLX5E_TX_XSK_POLL_BUDGET);
 101         mlx5e_xsk_update_tx_wakeup(xsksq);
 102 
 103         xsk_rx_alloc_err = xskrq->post_wqes(xskrq);
 104         busy_xsk |= mlx5e_xsk_update_rx_wakeup(xskrq, xsk_rx_alloc_err);
 105 
 106         return busy_xsk;
 107 }
 108 
 109 int mlx5e_napi_poll(struct napi_struct *napi, int budget)
 110 {
 111         struct mlx5e_channel *c = container_of(napi, struct mlx5e_channel,
 112                                                napi);
 113         struct mlx5e_ch_stats *ch_stats = c->stats;
 114         struct mlx5e_xdpsq *xsksq = &c->xsksq;
 115         struct mlx5e_rq *xskrq = &c->xskrq;
 116         struct mlx5e_rq *rq = &c->rq;
 117         bool xsk_open = test_bit(MLX5E_CHANNEL_STATE_XSK, c->state);
 118         bool aff_change = false;
 119         bool busy_xsk = false;
 120         bool busy = false;
 121         int work_done = 0;
 122         int i;
 123 
 124         ch_stats->poll++;
 125 
 126         for (i = 0; i < c->num_tc; i++)
 127                 busy |= mlx5e_poll_tx_cq(&c->sq[i].cq, budget);
 128 
 129         busy |= mlx5e_poll_xdpsq_cq(&c->xdpsq.cq);
 130 
 131         if (c->xdp)
 132                 busy |= mlx5e_poll_xdpsq_cq(&c->rq_xdpsq.cq);
 133 
 134         if (likely(budget)) { /* budget=0 means: don't poll rx rings */
 135                 if (xsk_open)
 136                         work_done = mlx5e_poll_rx_cq(&xskrq->cq, budget);
 137 
 138                 if (likely(budget - work_done))
 139                         work_done += mlx5e_poll_rx_cq(&rq->cq, budget - work_done);
 140 
 141                 busy |= work_done == budget;
 142         }
 143 
 144         mlx5e_poll_ico_cq(&c->icosq.cq);
 145 
 146         busy |= rq->post_wqes(rq);
 147         if (xsk_open) {
 148                 if (mlx5e_poll_ico_cq(&c->xskicosq.cq))
 149                         /* Don't clear the flag if nothing was polled to prevent
 150                          * queueing more WQEs and overflowing XSKICOSQ.
 151                          */
 152                         clear_bit(MLX5E_SQ_STATE_PENDING_XSK_TX, &c->xskicosq.state);
 153                 busy |= mlx5e_poll_xdpsq_cq(&xsksq->cq);
 154                 busy_xsk |= mlx5e_napi_xsk_post(xsksq, xskrq);
 155         }
 156 
 157         busy |= busy_xsk;
 158 
 159         if (busy) {
 160                 if (likely(mlx5e_channel_no_affinity_change(c)))
 161                         return budget;
 162                 ch_stats->aff_change++;
 163                 aff_change = true;
 164                 if (budget && work_done == budget)
 165                         work_done--;
 166         }
 167 
 168         if (unlikely(!napi_complete_done(napi, work_done)))
 169                 return work_done;
 170 
 171         ch_stats->arm++;
 172 
 173         for (i = 0; i < c->num_tc; i++) {
 174                 mlx5e_handle_tx_dim(&c->sq[i]);
 175                 mlx5e_cq_arm(&c->sq[i].cq);
 176         }
 177 
 178         mlx5e_handle_rx_dim(rq);
 179 
 180         mlx5e_cq_arm(&rq->cq);
 181         mlx5e_cq_arm(&c->icosq.cq);
 182         mlx5e_cq_arm(&c->xdpsq.cq);
 183 
 184         if (xsk_open) {
 185                 mlx5e_handle_rx_dim(xskrq);
 186                 mlx5e_cq_arm(&c->xskicosq.cq);
 187                 mlx5e_cq_arm(&xsksq->cq);
 188                 mlx5e_cq_arm(&xskrq->cq);
 189         }
 190 
 191         if (unlikely(aff_change && busy_xsk)) {
 192                 mlx5e_trigger_irq(&c->icosq);
 193                 ch_stats->force_irq++;
 194         }
 195 
 196         return work_done;
 197 }
 198 
 199 void mlx5e_completion_event(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
 200 {
 201         struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
 202 
 203         napi_schedule(cq->napi);
 204         cq->event_ctr++;
 205         cq->channel->stats->events++;
 206 }
 207 
 208 void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event)
 209 {
 210         struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
 211         struct mlx5e_channel *c = cq->channel;
 212         struct net_device *netdev = c->netdev;
 213 
 214         netdev_err(netdev, "%s: cqn=0x%.6x event=0x%.2x\n",
 215                    __func__, mcq->cqn, event);
 216 }