root/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.h

INCLUDED FROM

   1 /*
   2  * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  */
  33 
  34 #ifndef __MLX5_FPGA_IPSEC_H__
  35 #define __MLX5_FPGA_IPSEC_H__
  36 
  37 #include "accel/ipsec.h"
  38 #include "fs_cmd.h"
  39 
  40 u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev);
  41 unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev);
  42 int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
  43                                   unsigned int counters_count);
  44 
  45 void *mlx5_fpga_ipsec_create_sa_ctx(struct mlx5_core_dev *mdev,
  46                                     struct mlx5_accel_esp_xfrm *accel_xfrm,
  47                                     const __be32 saddr[4],
  48                                     const __be32 daddr[4],
  49                                     const __be32 spi, bool is_ipv6);
  50 void mlx5_fpga_ipsec_delete_sa_ctx(void *context);
  51 
  52 int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev);
  53 void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev);
  54 void mlx5_fpga_ipsec_build_fs_cmds(void);
  55 
  56 struct mlx5_accel_esp_xfrm *
  57 mlx5_fpga_esp_create_xfrm(struct mlx5_core_dev *mdev,
  58                           const struct mlx5_accel_esp_xfrm_attrs *attrs,
  59                           u32 flags);
  60 void mlx5_fpga_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm);
  61 int mlx5_fpga_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
  62                               const struct mlx5_accel_esp_xfrm_attrs *attrs);
  63 
  64 const struct mlx5_flow_cmds *
  65 mlx5_fs_cmd_get_default_ipsec_fpga_cmds(enum fs_flow_table_type type);
  66 
  67 #endif  /* __MLX5_FPGA_SADB_H__ */