root/drivers/net/ethernet/cisco/enic/cq_desc.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. cq_desc_dec

   1 /*
   2  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  *
   5  * This program is free software; you may redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; version 2 of the License.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16  * SOFTWARE.
  17  *
  18  */
  19 
  20 #ifndef _CQ_DESC_H_
  21 #define _CQ_DESC_H_
  22 
  23 /*
  24  * Completion queue descriptor types
  25  */
  26 enum cq_desc_types {
  27         CQ_DESC_TYPE_WQ_ENET = 0,
  28         CQ_DESC_TYPE_DESC_COPY = 1,
  29         CQ_DESC_TYPE_WQ_EXCH = 2,
  30         CQ_DESC_TYPE_RQ_ENET = 3,
  31         CQ_DESC_TYPE_RQ_FCP = 4,
  32 };
  33 
  34 /* Completion queue descriptor: 16B
  35  *
  36  * All completion queues have this basic layout.  The
  37  * type_specfic area is unique for each completion
  38  * queue type.
  39  */
  40 struct cq_desc {
  41         __le16 completed_index;
  42         __le16 q_number;
  43         u8 type_specfic[11];
  44         u8 type_color;
  45 };
  46 
  47 #define CQ_DESC_TYPE_BITS        4
  48 #define CQ_DESC_TYPE_MASK        ((1 << CQ_DESC_TYPE_BITS) - 1)
  49 #define CQ_DESC_COLOR_MASK       1
  50 #define CQ_DESC_COLOR_SHIFT      7
  51 #define CQ_DESC_Q_NUM_BITS       10
  52 #define CQ_DESC_Q_NUM_MASK       ((1 << CQ_DESC_Q_NUM_BITS) - 1)
  53 #define CQ_DESC_COMP_NDX_BITS    12
  54 #define CQ_DESC_COMP_NDX_MASK    ((1 << CQ_DESC_COMP_NDX_BITS) - 1)
  55 
  56 static inline void cq_desc_dec(const struct cq_desc *desc_arg,
  57         u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
  58 {
  59         const struct cq_desc *desc = desc_arg;
  60         const u8 type_color = desc->type_color;
  61 
  62         *color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
  63 
  64         /*
  65          * Make sure color bit is read from desc *before* other fields
  66          * are read from desc.  Hardware guarantees color bit is last
  67          * bit (byte) written.  Adding the rmb() prevents the compiler
  68          * and/or CPU from reordering the reads which would potentially
  69          * result in reading stale values.
  70          */
  71 
  72         rmb();
  73 
  74         *type = type_color & CQ_DESC_TYPE_MASK;
  75         *q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
  76         *completed_index = le16_to_cpu(desc->completed_index) &
  77                 CQ_DESC_COMP_NDX_MASK;
  78 }
  79 
  80 #endif /* _CQ_DESC_H_ */

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