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5 #ifndef _FSL_DPNI_CMD_H
6 #define _FSL_DPNI_CMD_H
7
8 #include "dpni.h"
9
10
11 #define DPNI_VER_MAJOR 7
12 #define DPNI_VER_MINOR 0
13 #define DPNI_CMD_BASE_VERSION 1
14 #define DPNI_CMD_ID_OFFSET 4
15
16 #define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
17
18 #define DPNI_CMDID_OPEN DPNI_CMD(0x801)
19 #define DPNI_CMDID_CLOSE DPNI_CMD(0x800)
20 #define DPNI_CMDID_CREATE DPNI_CMD(0x901)
21 #define DPNI_CMDID_DESTROY DPNI_CMD(0x900)
22 #define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01)
23
24 #define DPNI_CMDID_ENABLE DPNI_CMD(0x002)
25 #define DPNI_CMDID_DISABLE DPNI_CMD(0x003)
26 #define DPNI_CMDID_GET_ATTR DPNI_CMD(0x004)
27 #define DPNI_CMDID_RESET DPNI_CMD(0x005)
28 #define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006)
29
30 #define DPNI_CMDID_SET_IRQ DPNI_CMD(0x010)
31 #define DPNI_CMDID_GET_IRQ DPNI_CMD(0x011)
32 #define DPNI_CMDID_SET_IRQ_ENABLE DPNI_CMD(0x012)
33 #define DPNI_CMDID_GET_IRQ_ENABLE DPNI_CMD(0x013)
34 #define DPNI_CMDID_SET_IRQ_MASK DPNI_CMD(0x014)
35 #define DPNI_CMDID_GET_IRQ_MASK DPNI_CMD(0x015)
36 #define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016)
37 #define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017)
38
39 #define DPNI_CMDID_SET_POOLS DPNI_CMD(0x200)
40 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B)
41
42 #define DPNI_CMDID_GET_QDID DPNI_CMD(0x210)
43 #define DPNI_CMDID_GET_TX_DATA_OFFSET DPNI_CMD(0x212)
44 #define DPNI_CMDID_GET_LINK_STATE DPNI_CMD(0x215)
45 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH DPNI_CMD(0x216)
46 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH DPNI_CMD(0x217)
47 #define DPNI_CMDID_SET_LINK_CFG DPNI_CMD(0x21A)
48 #define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD(0x21B)
49
50 #define DPNI_CMDID_SET_MCAST_PROMISC DPNI_CMD(0x220)
51 #define DPNI_CMDID_GET_MCAST_PROMISC DPNI_CMD(0x221)
52 #define DPNI_CMDID_SET_UNICAST_PROMISC DPNI_CMD(0x222)
53 #define DPNI_CMDID_GET_UNICAST_PROMISC DPNI_CMD(0x223)
54 #define DPNI_CMDID_SET_PRIM_MAC DPNI_CMD(0x224)
55 #define DPNI_CMDID_GET_PRIM_MAC DPNI_CMD(0x225)
56 #define DPNI_CMDID_ADD_MAC_ADDR DPNI_CMD(0x226)
57 #define DPNI_CMDID_REMOVE_MAC_ADDR DPNI_CMD(0x227)
58 #define DPNI_CMDID_CLR_MAC_FILTERS DPNI_CMD(0x228)
59
60 #define DPNI_CMDID_SET_RX_TC_DIST DPNI_CMD(0x235)
61
62 #define DPNI_CMDID_ADD_FS_ENT DPNI_CMD(0x244)
63 #define DPNI_CMDID_REMOVE_FS_ENT DPNI_CMD(0x245)
64 #define DPNI_CMDID_CLR_FS_ENT DPNI_CMD(0x246)
65
66 #define DPNI_CMDID_GET_STATISTICS DPNI_CMD(0x25D)
67 #define DPNI_CMDID_GET_QUEUE DPNI_CMD(0x25F)
68 #define DPNI_CMDID_SET_QUEUE DPNI_CMD(0x260)
69 #define DPNI_CMDID_GET_TAILDROP DPNI_CMD(0x261)
70 #define DPNI_CMDID_SET_TAILDROP DPNI_CMD(0x262)
71
72 #define DPNI_CMDID_GET_PORT_MAC_ADDR DPNI_CMD(0x263)
73
74 #define DPNI_CMDID_GET_BUFFER_LAYOUT DPNI_CMD(0x264)
75 #define DPNI_CMDID_SET_BUFFER_LAYOUT DPNI_CMD(0x265)
76
77 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE DPNI_CMD(0x266)
78 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION DPNI_CMD(0x267)
79 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION DPNI_CMD(0x268)
80 #define DPNI_CMDID_SET_EARLY_DROP DPNI_CMD(0x269)
81 #define DPNI_CMDID_GET_EARLY_DROP DPNI_CMD(0x26A)
82 #define DPNI_CMDID_GET_OFFLOAD DPNI_CMD(0x26B)
83 #define DPNI_CMDID_SET_OFFLOAD DPNI_CMD(0x26C)
84
85 #define DPNI_CMDID_SET_RX_FS_DIST DPNI_CMD(0x273)
86 #define DPNI_CMDID_SET_RX_HASH_DIST DPNI_CMD(0x274)
87 #define DPNI_CMDID_GET_LINK_CFG DPNI_CMD(0x278)
88
89
90 #define DPNI_MASK(field) \
91 GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
92 DPNI_##field##_SHIFT)
93
94 #define dpni_set_field(var, field, val) \
95 ((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
96 #define dpni_get_field(var, field) \
97 (((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
98
99 struct dpni_cmd_open {
100 __le32 dpni_id;
101 };
102
103 #define DPNI_BACKUP_POOL(val, order) (((val) & 0x1) << (order))
104 struct dpni_cmd_set_pools {
105
106 u8 num_dpbp;
107 u8 backup_pool_mask;
108 __le16 pad;
109
110 __le32 dpbp_id[DPNI_MAX_DPBP];
111
112 __le16 buffer_size[DPNI_MAX_DPBP];
113 };
114
115
116 #define DPNI_ENABLE_SHIFT 0
117 #define DPNI_ENABLE_SIZE 1
118
119 struct dpni_rsp_is_enabled {
120 u8 enabled;
121 };
122
123 struct dpni_rsp_get_irq {
124
125 __le32 irq_val;
126 __le32 pad;
127
128 __le64 irq_addr;
129
130 __le32 irq_num;
131 __le32 type;
132 };
133
134 struct dpni_cmd_set_irq_enable {
135 u8 enable;
136 u8 pad[3];
137 u8 irq_index;
138 };
139
140 struct dpni_cmd_get_irq_enable {
141 __le32 pad;
142 u8 irq_index;
143 };
144
145 struct dpni_rsp_get_irq_enable {
146 u8 enabled;
147 };
148
149 struct dpni_cmd_set_irq_mask {
150 __le32 mask;
151 u8 irq_index;
152 };
153
154 struct dpni_cmd_get_irq_mask {
155 __le32 pad;
156 u8 irq_index;
157 };
158
159 struct dpni_rsp_get_irq_mask {
160 __le32 mask;
161 };
162
163 struct dpni_cmd_get_irq_status {
164 __le32 status;
165 u8 irq_index;
166 };
167
168 struct dpni_rsp_get_irq_status {
169 __le32 status;
170 };
171
172 struct dpni_cmd_clear_irq_status {
173 __le32 status;
174 u8 irq_index;
175 };
176
177 struct dpni_rsp_get_attr {
178
179 __le32 options;
180 u8 num_queues;
181 u8 num_tcs;
182 u8 mac_filter_entries;
183 u8 pad0;
184
185 u8 vlan_filter_entries;
186 u8 pad1;
187 u8 qos_entries;
188 u8 pad2;
189 __le16 fs_entries;
190 __le16 pad3;
191
192 u8 qos_key_size;
193 u8 fs_key_size;
194 __le16 wriop_version;
195 };
196
197 #define DPNI_ERROR_ACTION_SHIFT 0
198 #define DPNI_ERROR_ACTION_SIZE 4
199 #define DPNI_FRAME_ANN_SHIFT 4
200 #define DPNI_FRAME_ANN_SIZE 1
201
202 struct dpni_cmd_set_errors_behavior {
203 __le32 errors;
204
205 u8 flags;
206 };
207
208
209
210
211
212
213 #define DPNI_PASS_TS_SHIFT 0
214 #define DPNI_PASS_TS_SIZE 1
215 #define DPNI_PASS_PR_SHIFT 1
216 #define DPNI_PASS_PR_SIZE 1
217 #define DPNI_PASS_FS_SHIFT 2
218 #define DPNI_PASS_FS_SIZE 1
219
220 struct dpni_cmd_get_buffer_layout {
221 u8 qtype;
222 };
223
224 struct dpni_rsp_get_buffer_layout {
225
226 u8 pad0[6];
227
228 u8 flags;
229 u8 pad1;
230
231 __le16 private_data_size;
232 __le16 data_align;
233 __le16 head_room;
234 __le16 tail_room;
235 };
236
237 struct dpni_cmd_set_buffer_layout {
238
239 u8 qtype;
240 u8 pad0[3];
241 __le16 options;
242
243 u8 flags;
244 u8 pad1;
245
246 __le16 private_data_size;
247 __le16 data_align;
248 __le16 head_room;
249 __le16 tail_room;
250 };
251
252 struct dpni_cmd_set_offload {
253 u8 pad[3];
254 u8 dpni_offload;
255 __le32 config;
256 };
257
258 struct dpni_cmd_get_offload {
259 u8 pad[3];
260 u8 dpni_offload;
261 };
262
263 struct dpni_rsp_get_offload {
264 __le32 pad;
265 __le32 config;
266 };
267
268 struct dpni_cmd_get_qdid {
269 u8 qtype;
270 };
271
272 struct dpni_rsp_get_qdid {
273 __le16 qdid;
274 };
275
276 struct dpni_rsp_get_tx_data_offset {
277 __le16 data_offset;
278 };
279
280 struct dpni_cmd_get_statistics {
281 u8 page_number;
282 };
283
284 struct dpni_rsp_get_statistics {
285 __le64 counter[DPNI_STATISTICS_CNT];
286 };
287
288 struct dpni_cmd_link_cfg {
289
290 __le64 pad0;
291
292 __le32 rate;
293 __le32 pad1;
294
295 __le64 options;
296 };
297
298 #define DPNI_LINK_STATE_SHIFT 0
299 #define DPNI_LINK_STATE_SIZE 1
300
301 struct dpni_rsp_get_link_state {
302
303 __le32 pad0;
304
305 u8 flags;
306 u8 pad1[3];
307
308 __le32 rate;
309 __le32 pad2;
310
311 __le64 options;
312 };
313
314 struct dpni_cmd_set_max_frame_length {
315 __le16 max_frame_length;
316 };
317
318 struct dpni_rsp_get_max_frame_length {
319 __le16 max_frame_length;
320 };
321
322 struct dpni_cmd_set_multicast_promisc {
323 u8 enable;
324 };
325
326 struct dpni_rsp_get_multicast_promisc {
327 u8 enabled;
328 };
329
330 struct dpni_cmd_set_unicast_promisc {
331 u8 enable;
332 };
333
334 struct dpni_rsp_get_unicast_promisc {
335 u8 enabled;
336 };
337
338 struct dpni_cmd_set_primary_mac_addr {
339 __le16 pad;
340 u8 mac_addr[6];
341 };
342
343 struct dpni_rsp_get_primary_mac_addr {
344 __le16 pad;
345 u8 mac_addr[6];
346 };
347
348 struct dpni_rsp_get_port_mac_addr {
349 __le16 pad;
350 u8 mac_addr[6];
351 };
352
353 struct dpni_cmd_add_mac_addr {
354 __le16 pad;
355 u8 mac_addr[6];
356 };
357
358 struct dpni_cmd_remove_mac_addr {
359 __le16 pad;
360 u8 mac_addr[6];
361 };
362
363 #define DPNI_UNICAST_FILTERS_SHIFT 0
364 #define DPNI_UNICAST_FILTERS_SIZE 1
365 #define DPNI_MULTICAST_FILTERS_SHIFT 1
366 #define DPNI_MULTICAST_FILTERS_SIZE 1
367
368 struct dpni_cmd_clear_mac_filters {
369
370 u8 flags;
371 };
372
373 #define DPNI_DIST_MODE_SHIFT 0
374 #define DPNI_DIST_MODE_SIZE 4
375 #define DPNI_MISS_ACTION_SHIFT 4
376 #define DPNI_MISS_ACTION_SIZE 4
377
378 struct dpni_cmd_set_rx_tc_dist {
379
380 __le16 dist_size;
381 u8 tc_id;
382
383 u8 flags;
384 __le16 pad0;
385 __le16 default_flow_id;
386
387 __le64 pad1[5];
388
389 __le64 key_cfg_iova;
390 };
391
392
393
394
395 struct dpni_mask_cfg {
396 u8 mask;
397 u8 offset;
398 };
399
400 #define DPNI_EFH_TYPE_SHIFT 0
401 #define DPNI_EFH_TYPE_SIZE 4
402 #define DPNI_EXTRACT_TYPE_SHIFT 0
403 #define DPNI_EXTRACT_TYPE_SIZE 4
404
405 struct dpni_dist_extract {
406
407 u8 prot;
408
409 u8 efh_type;
410 u8 size;
411 u8 offset;
412 __le32 field;
413
414 u8 hdr_index;
415 u8 constant;
416 u8 num_of_repeats;
417 u8 num_of_byte_masks;
418
419 u8 extract_type;
420 u8 pad[3];
421
422 struct dpni_mask_cfg masks[4];
423 };
424
425 struct dpni_ext_set_rx_tc_dist {
426
427 u8 num_extracts;
428 u8 pad[7];
429
430 struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
431 };
432
433 struct dpni_cmd_get_queue {
434 u8 qtype;
435 u8 tc;
436 u8 index;
437 };
438
439 #define DPNI_DEST_TYPE_SHIFT 0
440 #define DPNI_DEST_TYPE_SIZE 4
441 #define DPNI_STASH_CTRL_SHIFT 6
442 #define DPNI_STASH_CTRL_SIZE 1
443 #define DPNI_HOLD_ACTIVE_SHIFT 7
444 #define DPNI_HOLD_ACTIVE_SIZE 1
445
446 struct dpni_rsp_get_queue {
447
448 __le64 pad0;
449
450 __le32 dest_id;
451 __le16 pad1;
452 u8 dest_prio;
453
454 u8 flags;
455
456 __le64 flc;
457
458 __le64 user_context;
459
460 __le32 fqid;
461 __le16 qdbin;
462 };
463
464 struct dpni_cmd_set_queue {
465
466 u8 qtype;
467 u8 tc;
468 u8 index;
469 u8 options;
470 __le32 pad0;
471
472 __le32 dest_id;
473 __le16 pad1;
474 u8 dest_prio;
475 u8 flags;
476
477 __le64 flc;
478
479 __le64 user_context;
480 };
481
482 struct dpni_cmd_set_taildrop {
483
484 u8 congestion_point;
485 u8 qtype;
486 u8 tc;
487 u8 index;
488 __le32 pad0;
489
490
491 u8 enable;
492 u8 pad1;
493 u8 units;
494 u8 pad2;
495 __le32 threshold;
496 };
497
498 struct dpni_cmd_get_taildrop {
499 u8 congestion_point;
500 u8 qtype;
501 u8 tc;
502 u8 index;
503 };
504
505 struct dpni_rsp_get_taildrop {
506
507 __le64 pad0;
508
509
510 u8 enable;
511 u8 pad1;
512 u8 units;
513 u8 pad2;
514 __le32 threshold;
515 };
516
517 struct dpni_rsp_get_api_version {
518 __le16 major;
519 __le16 minor;
520 };
521
522 #define DPNI_RX_FS_DIST_ENABLE_SHIFT 0
523 #define DPNI_RX_FS_DIST_ENABLE_SIZE 1
524 struct dpni_cmd_set_rx_fs_dist {
525 __le16 dist_size;
526 u8 enable;
527 u8 tc;
528 __le16 miss_flow_id;
529 __le16 pad;
530 __le64 key_cfg_iova;
531 };
532
533 #define DPNI_RX_HASH_DIST_ENABLE_SHIFT 0
534 #define DPNI_RX_HASH_DIST_ENABLE_SIZE 1
535 struct dpni_cmd_set_rx_hash_dist {
536 __le16 dist_size;
537 u8 enable;
538 u8 tc;
539 __le32 pad;
540 __le64 key_cfg_iova;
541 };
542
543 struct dpni_cmd_add_fs_entry {
544
545 __le16 options;
546 u8 tc_id;
547 u8 key_size;
548 __le16 index;
549 __le16 flow_id;
550
551 __le64 key_iova;
552
553 __le64 mask_iova;
554
555 __le64 flc;
556 };
557
558 struct dpni_cmd_remove_fs_entry {
559
560 __le16 pad0;
561 u8 tc_id;
562 u8 key_size;
563 __le32 pad1;
564
565 __le64 key_iova;
566
567 __le64 mask_iova;
568 };
569
570 #endif