root/drivers/net/ethernet/freescale/dpaa2/dprtc-cmd.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright 2013-2016 Freescale Semiconductor Inc.
   4  * Copyright 2016-2018 NXP
   5  */
   6 
   7 #ifndef _FSL_DPRTC_CMD_H
   8 #define _FSL_DPRTC_CMD_H
   9 
  10 /* Command versioning */
  11 #define DPRTC_CMD_BASE_VERSION          1
  12 #define DPRTC_CMD_ID_OFFSET             4
  13 
  14 #define DPRTC_CMD(id)   (((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_BASE_VERSION)
  15 
  16 /* Command IDs */
  17 #define DPRTC_CMDID_CLOSE                       DPRTC_CMD(0x800)
  18 #define DPRTC_CMDID_OPEN                        DPRTC_CMD(0x810)
  19 
  20 #define DPRTC_CMDID_SET_IRQ_ENABLE              DPRTC_CMD(0x012)
  21 #define DPRTC_CMDID_GET_IRQ_ENABLE              DPRTC_CMD(0x013)
  22 #define DPRTC_CMDID_SET_IRQ_MASK                DPRTC_CMD(0x014)
  23 #define DPRTC_CMDID_GET_IRQ_MASK                DPRTC_CMD(0x015)
  24 #define DPRTC_CMDID_GET_IRQ_STATUS              DPRTC_CMD(0x016)
  25 #define DPRTC_CMDID_CLEAR_IRQ_STATUS            DPRTC_CMD(0x017)
  26 
  27 #pragma pack(push, 1)
  28 struct dprtc_cmd_open {
  29         __le32 dprtc_id;
  30 };
  31 
  32 struct dprtc_cmd_get_irq {
  33         __le32 pad;
  34         u8 irq_index;
  35 };
  36 
  37 struct dprtc_cmd_set_irq_enable {
  38         u8 en;
  39         u8 pad[3];
  40         u8 irq_index;
  41 };
  42 
  43 struct dprtc_rsp_get_irq_enable {
  44         u8 en;
  45 };
  46 
  47 struct dprtc_cmd_set_irq_mask {
  48         __le32 mask;
  49         u8 irq_index;
  50 };
  51 
  52 struct dprtc_rsp_get_irq_mask {
  53         __le32 mask;
  54 };
  55 
  56 struct dprtc_cmd_get_irq_status {
  57         __le32 status;
  58         u8 irq_index;
  59 };
  60 
  61 struct dprtc_rsp_get_irq_status {
  62         __le32 status;
  63 };
  64 
  65 struct dprtc_cmd_clear_irq_status {
  66         __le32 status;
  67         u8 irq_index;
  68 };
  69 
  70 #pragma pack(pop)
  71 
  72 #endif /* _FSL_DPRTC_CMD_H */