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21 #ifndef BNX2X_DCB_H
22 #define BNX2X_DCB_H
23
24 #include "bnx2x_hsi.h"
25
26 #define LLFC_DRIVER_TRAFFIC_TYPE_MAX 3
27 struct bnx2x_dcbx_app_params {
28 u32 enabled;
29 u32 traffic_type_priority[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
30 };
31
32 #define DCBX_COS_MAX_NUM_E2 DCBX_E2E3_MAX_NUM_COS
33
34 #define BNX2X_MAX_COS_SUPPORT 3
35 #define DCBX_COS_MAX_NUM_E3B0 BNX2X_MAX_COS_SUPPORT
36 #define DCBX_COS_MAX_NUM BNX2X_MAX_COS_SUPPORT
37
38 struct bnx2x_dcbx_cos_params {
39 u32 bw_tbl;
40 u32 pri_bitmask;
41
42
43
44
45 u8 strict;
46 #define BNX2X_DCBX_STRICT_INVALID DCBX_COS_MAX_NUM
47 #define BNX2X_DCBX_STRICT_COS_HIGHEST 0
48 #define BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(sp) ((sp) + 1)
49 u8 pauseable;
50 };
51
52 struct bnx2x_dcbx_pg_params {
53 u32 enabled;
54 u8 num_of_cos;
55 struct bnx2x_dcbx_cos_params cos_params[DCBX_COS_MAX_NUM];
56 };
57
58 struct bnx2x_dcbx_pfc_params {
59 u32 enabled;
60 u32 priority_non_pauseable_mask;
61 };
62
63 struct bnx2x_dcbx_port_params {
64 struct bnx2x_dcbx_pfc_params pfc;
65 struct bnx2x_dcbx_pg_params ets;
66 struct bnx2x_dcbx_app_params app;
67 };
68
69 #define BNX2X_DCBX_CONFIG_INV_VALUE (0xFFFFFFFF)
70 #define BNX2X_DCBX_OVERWRITE_SETTINGS_DISABLE 0
71 #define BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE 1
72 #define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID (BNX2X_DCBX_CONFIG_INV_VALUE)
73 #define BNX2X_IS_ETS_ENABLED(bp) ((bp)->dcb_state == BNX2X_DCB_STATE_ON &&\
74 (bp)->dcbx_port_params.ets.enabled)
75
76 struct bnx2x_config_lldp_params {
77 u32 overwrite_settings;
78 u32 msg_tx_hold;
79 u32 msg_fast_tx;
80 u32 tx_credit_max;
81 u32 msg_tx_interval;
82 u32 tx_fast;
83 };
84
85 struct bnx2x_admin_priority_app_table {
86 u32 valid;
87 u32 priority;
88 #define INVALID_TRAFFIC_TYPE_PRIORITY (0xFFFFFFFF)
89 u32 traffic_type;
90 #define TRAFFIC_TYPE_ETH 0
91 #define TRAFFIC_TYPE_PORT 1
92 u32 app_id;
93 };
94
95 #define DCBX_CONFIG_MAX_APP_PROTOCOL 4
96 struct bnx2x_config_dcbx_params {
97 u32 overwrite_settings;
98 u32 admin_dcbx_version;
99 u32 admin_ets_enable;
100 u32 admin_pfc_enable;
101 u32 admin_tc_supported_tx_enable;
102 u32 admin_ets_configuration_tx_enable;
103 u32 admin_ets_recommendation_tx_enable;
104 u32 admin_pfc_tx_enable;
105 u32 admin_application_priority_tx_enable;
106 u32 admin_ets_willing;
107 u32 admin_ets_reco_valid;
108 u32 admin_pfc_willing;
109 u32 admin_app_priority_willing;
110 u32 admin_configuration_bw_precentage[8];
111 u32 admin_configuration_ets_pg[8];
112 u32 admin_recommendation_bw_precentage[8];
113 u32 admin_recommendation_ets_pg[8];
114 u32 admin_pfc_bitmap;
115 struct bnx2x_admin_priority_app_table
116 admin_priority_app_table[DCBX_CONFIG_MAX_APP_PROTOCOL];
117 u32 admin_default_priority;
118 };
119
120 #define GET_FLAGS(flags, bits) ((flags) & (bits))
121 #define SET_FLAGS(flags, bits) ((flags) |= (bits))
122 #define RESET_FLAGS(flags, bits) ((flags) &= ~(bits))
123
124 enum {
125 DCBX_READ_LOCAL_MIB,
126 DCBX_READ_REMOTE_MIB
127 };
128
129 #define ETH_TYPE_FCOE (0x8906)
130 #define TCP_PORT_ISCSI (0xCBC)
131
132 #define PFC_VALUE_FRAME_SIZE (512)
133 #define PFC_QUANTA_IN_NANOSEC_FROM_SPEED_MEGA(mega_speed) \
134 ((1000 * PFC_VALUE_FRAME_SIZE)/(mega_speed))
135
136 #define PFC_BRB1_REG_HIGH_LLFC_LOW_THRESHOLD 130
137 #define PFC_BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD 170
138
139 struct cos_entry_help_data {
140 u32 pri_join_mask;
141 u32 cos_bw;
142 u8 strict;
143 bool pausable;
144 };
145
146 struct cos_help_data {
147 struct cos_entry_help_data data[DCBX_COS_MAX_NUM];
148 u8 num_of_cos;
149 };
150
151 #define DCBX_ILLEGAL_PG (0xFF)
152 #define DCBX_PFC_PRI_MASK (0xFF)
153 #define DCBX_STRICT_PRIORITY (15)
154 #define DCBX_INVALID_COS_BW (0xFFFFFFFF)
155 #define DCBX_PFC_PRI_NON_PAUSE_MASK(bp) \
156 ((bp)->dcbx_port_params.pfc.priority_non_pauseable_mask)
157 #define DCBX_PFC_PRI_PAUSE_MASK(bp) \
158 ((u8)~DCBX_PFC_PRI_NON_PAUSE_MASK(bp))
159 #define DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri) \
160 ((pg_pri) & (DCBX_PFC_PRI_PAUSE_MASK(bp)))
161 #define DCBX_PFC_PRI_GET_NON_PAUSE(bp, pg_pri) \
162 (DCBX_PFC_PRI_NON_PAUSE_MASK(bp) & (pg_pri))
163 #define DCBX_IS_PFC_PRI_SOME_PAUSE(bp, pg_pri) \
164 (0 != DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri))
165 #define IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_pri) \
166 (pg_pri == DCBX_PFC_PRI_GET_PAUSE((bp), (pg_pri)))
167 #define IS_DCBX_PFC_PRI_ONLY_NON_PAUSE(bp, pg_pri)\
168 ((pg_pri) == DCBX_PFC_PRI_GET_NON_PAUSE((bp), (pg_pri)))
169 #define IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pg_pri) \
170 (!(IS_DCBX_PFC_PRI_ONLY_NON_PAUSE((bp), (pg_pri)) || \
171 IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri))))
172
173 struct pg_entry_help_data {
174 u8 num_of_dif_pri;
175 u8 pg;
176 u32 pg_priority;
177 };
178
179 struct pg_help_data {
180 struct pg_entry_help_data data[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
181 u8 num_of_pg;
182 };
183
184
185 struct bnx2x;
186 void bnx2x_dcbx_update(struct work_struct *work);
187 void bnx2x_dcbx_init_params(struct bnx2x *bp);
188 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled);
189
190 enum {
191 BNX2X_DCBX_STATE_NEG_RECEIVED = 0x1,
192 BNX2X_DCBX_STATE_TX_PAUSED,
193 BNX2X_DCBX_STATE_TX_RELEASED
194 };
195
196 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state);
197 void bnx2x_dcbx_pmf_update(struct bnx2x *bp);
198
199 #ifdef BCM_DCBNL
200 extern const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops;
201 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall);
202 #endif
203
204 int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
205 int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
206
207 #endif