This source file includes following definitions.
- atl1c_pcie_patch
- atl1c_reset_pcie
- atl1c_irq_enable
- atl1c_irq_disable
- atl1c_irq_reset
- atl1c_wait_until_idle
- atl1c_phy_config
- atl1c_reinit_locked
- atl1c_check_link_status
- atl1c_link_chg_event
- atl1c_common_task
- atl1c_del_timer
- atl1c_tx_timeout
- atl1c_set_multi
- __atl1c_vlan_mode
- atl1c_vlan_mode
- atl1c_restore_vlan
- atl1c_set_mac_addr
- atl1c_set_rxbufsize
- atl1c_fix_features
- atl1c_set_features
- atl1c_set_max_mtu
- atl1c_change_mtu
- atl1c_mdio_read
- atl1c_mdio_write
- atl1c_mii_ioctl
- atl1c_ioctl
- atl1c_alloc_queues
- atl1c_set_mac_type
- atl1c_setup_mac_funcs
- atl1c_patch_assign
- atl1c_sw_init
- atl1c_clean_buffer
- atl1c_clean_tx_ring
- atl1c_clean_rx_ring
- atl1c_init_ring_ptrs
- atl1c_free_ring_resources
- atl1c_setup_ring_resources
- atl1c_configure_des_ring
- atl1c_configure_tx
- atl1c_configure_rx
- atl1c_configure_dma
- atl1c_stop_mac
- atl1c_start_mac
- atl1c_reset_mac
- atl1c_disable_l0s_l1
- atl1c_set_aspm
- atl1c_configure_mac
- atl1c_configure
- atl1c_update_hw_stats
- atl1c_get_stats
- atl1c_clear_phy_int
- atl1c_clean_tx_irq
- atl1c_intr
- atl1c_rx_checksum
- atl1c_alloc_skb
- atl1c_alloc_rx_buffer
- atl1c_clean_rrd
- atl1c_clean_rfd
- atl1c_clean_rx_irq
- atl1c_clean
- atl1c_netpoll
- atl1c_tpd_avail
- atl1c_get_tpd
- atl1c_get_tx_buffer
- atl1c_cal_tpd_req
- atl1c_tso_csum
- atl1c_tx_rollback
- atl1c_tx_map
- atl1c_tx_queue
- atl1c_xmit_frame
- atl1c_free_irq
- atl1c_request_irq
- atl1c_reset_dma_ring
- atl1c_up
- atl1c_down
- atl1c_open
- atl1c_close
- atl1c_suspend
- atl1c_resume
- atl1c_shutdown
- atl1c_init_netdev
- atl1c_probe
- atl1c_remove
- atl1c_io_error_detected
- atl1c_io_slot_reset
- atl1c_io_resume
1
2
3
4
5
6
7
8
9 #include "atl1c.h"
10
11 #define ATL1C_DRV_VERSION "1.0.1.1-NAPI"
12 char atl1c_driver_name[] = "atl1c";
13 char atl1c_driver_version[] = ATL1C_DRV_VERSION;
14
15
16
17
18
19
20
21
22
23
24 static const struct pci_device_id atl1c_pci_tbl[] = {
25 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
26 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
27 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
28 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
29 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
30 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
31
32 { 0 }
33 };
34 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
35
36 MODULE_AUTHOR("Jie Yang");
37 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
38 MODULE_DESCRIPTION("Qualcomm Atheros 100/1000M Ethernet Network Driver");
39 MODULE_LICENSE("GPL");
40 MODULE_VERSION(ATL1C_DRV_VERSION);
41
42 static int atl1c_stop_mac(struct atl1c_hw *hw);
43 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
44 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
45 static void atl1c_start_mac(struct atl1c_adapter *adapter);
46 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
47 int *work_done, int work_to_do);
48 static int atl1c_up(struct atl1c_adapter *adapter);
49 static void atl1c_down(struct atl1c_adapter *adapter);
50 static int atl1c_reset_mac(struct atl1c_hw *hw);
51 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);
52 static int atl1c_configure(struct atl1c_adapter *adapter);
53 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter);
54
55
56 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
57 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
58 static void atl1c_pcie_patch(struct atl1c_hw *hw)
59 {
60 u32 mst_data, data;
61
62
63 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
64 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
65 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
66
67
68 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
69 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
70 data |= PCIE_PHYMISC_FORCE_RCV_DET;
71 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
72 } else {
73 if (!(mst_data & MASTER_CTRL_WAKEN_25M))
74 AT_WRITE_REG(hw, REG_MASTER_CTRL,
75 mst_data | MASTER_CTRL_WAKEN_25M);
76 }
77
78 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
79 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
80 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
81 L2CB1_PCIE_PHYMISC2_CDR_BW);
82 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
83 L2CB1_PCIE_PHYMISC2_L0S_TH);
84 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
85
86 AT_READ_REG(hw, REG_LINK_CTRL, &data);
87 data |= LINK_CTRL_EXT_SYNC;
88 AT_WRITE_REG(hw, REG_LINK_CTRL, data);
89 }
90
91 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
92 AT_READ_REG(hw, REG_PM_CTRL, &data);
93 data |= PM_CTRL_L0S_BUFSRX_EN;
94 AT_WRITE_REG(hw, REG_PM_CTRL, data);
95
96 AT_READ_REG(hw, REG_DMA_DBG, &data);
97 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
98 }
99 }
100
101
102
103
104
105 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
106 {
107 u32 data;
108 u32 pci_cmd;
109 struct pci_dev *pdev = hw->adapter->pdev;
110 int pos;
111
112 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
113 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
114 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
115 PCI_COMMAND_IO);
116 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
117
118
119
120
121 pci_enable_wake(pdev, PCI_D3hot, 0);
122 pci_enable_wake(pdev, PCI_D3cold, 0);
123
124 AT_READ_REG(hw, REG_WOL_CTRL, &data);
125 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
126
127
128
129
130 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
131 if (pos) {
132 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
133 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
134 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
135 }
136
137 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA,
138 PCI_EXP_DEVSTA_NFED |
139 PCI_EXP_DEVSTA_FED |
140 PCI_EXP_DEVSTA_CED |
141 PCI_EXP_DEVSTA_URD);
142
143 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
144 data &= ~LTSSM_ID_EN_WRO;
145 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
146
147 atl1c_pcie_patch(hw);
148 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
149 atl1c_disable_l0s_l1(hw);
150
151 msleep(5);
152 }
153
154
155
156
157
158 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
159 {
160 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
161 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
162 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
163 AT_WRITE_FLUSH(&adapter->hw);
164 }
165 }
166
167
168
169
170
171 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
172 {
173 atomic_inc(&adapter->irq_sem);
174 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
175 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
176 AT_WRITE_FLUSH(&adapter->hw);
177 synchronize_irq(adapter->pdev->irq);
178 }
179
180
181
182
183
184 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
185 {
186 atomic_set(&adapter->irq_sem, 1);
187 atl1c_irq_enable(adapter);
188 }
189
190
191
192
193
194 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
195 {
196 int timeout;
197 u32 data;
198
199 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
200 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
201 if ((data & modu_ctrl) == 0)
202 return 0;
203 msleep(1);
204 }
205 return data;
206 }
207
208
209
210
211
212 static void atl1c_phy_config(struct timer_list *t)
213 {
214 struct atl1c_adapter *adapter = from_timer(adapter, t,
215 phy_config_timer);
216 struct atl1c_hw *hw = &adapter->hw;
217 unsigned long flags;
218
219 spin_lock_irqsave(&adapter->mdio_lock, flags);
220 atl1c_restart_autoneg(hw);
221 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
222 }
223
224 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
225 {
226 WARN_ON(in_interrupt());
227 atl1c_down(adapter);
228 atl1c_up(adapter);
229 clear_bit(__AT_RESETTING, &adapter->flags);
230 }
231
232 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
233 {
234 struct atl1c_hw *hw = &adapter->hw;
235 struct net_device *netdev = adapter->netdev;
236 struct pci_dev *pdev = adapter->pdev;
237 int err;
238 unsigned long flags;
239 u16 speed, duplex, phy_data;
240
241 spin_lock_irqsave(&adapter->mdio_lock, flags);
242
243 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
244 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
245 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
246
247 if ((phy_data & BMSR_LSTATUS) == 0) {
248
249 netif_carrier_off(netdev);
250 hw->hibernate = true;
251 if (atl1c_reset_mac(hw) != 0)
252 if (netif_msg_hw(adapter))
253 dev_warn(&pdev->dev, "reset mac failed\n");
254 atl1c_set_aspm(hw, SPEED_0);
255 atl1c_post_phy_linkchg(hw, SPEED_0);
256 atl1c_reset_dma_ring(adapter);
257 atl1c_configure(adapter);
258 } else {
259
260 hw->hibernate = false;
261 spin_lock_irqsave(&adapter->mdio_lock, flags);
262 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
263 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
264 if (unlikely(err))
265 return;
266
267 if (adapter->link_speed != speed ||
268 adapter->link_duplex != duplex) {
269 adapter->link_speed = speed;
270 adapter->link_duplex = duplex;
271 atl1c_set_aspm(hw, speed);
272 atl1c_post_phy_linkchg(hw, speed);
273 atl1c_start_mac(adapter);
274 if (netif_msg_link(adapter))
275 dev_info(&pdev->dev,
276 "%s: %s NIC Link is Up<%d Mbps %s>\n",
277 atl1c_driver_name, netdev->name,
278 adapter->link_speed,
279 adapter->link_duplex == FULL_DUPLEX ?
280 "Full Duplex" : "Half Duplex");
281 }
282 if (!netif_carrier_ok(netdev))
283 netif_carrier_on(netdev);
284 }
285 }
286
287 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
288 {
289 struct net_device *netdev = adapter->netdev;
290 struct pci_dev *pdev = adapter->pdev;
291 u16 phy_data;
292 u16 link_up;
293
294 spin_lock(&adapter->mdio_lock);
295 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
296 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
297 spin_unlock(&adapter->mdio_lock);
298 link_up = phy_data & BMSR_LSTATUS;
299
300 if (!link_up) {
301 if (netif_carrier_ok(netdev)) {
302
303 netif_carrier_off(netdev);
304 if (netif_msg_link(adapter))
305 dev_info(&pdev->dev,
306 "%s: %s NIC Link is Down\n",
307 atl1c_driver_name, netdev->name);
308 adapter->link_speed = SPEED_0;
309 }
310 }
311
312 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
313 schedule_work(&adapter->common_task);
314 }
315
316 static void atl1c_common_task(struct work_struct *work)
317 {
318 struct atl1c_adapter *adapter;
319 struct net_device *netdev;
320
321 adapter = container_of(work, struct atl1c_adapter, common_task);
322 netdev = adapter->netdev;
323
324 if (test_bit(__AT_DOWN, &adapter->flags))
325 return;
326
327 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
328 netif_device_detach(netdev);
329 atl1c_down(adapter);
330 atl1c_up(adapter);
331 netif_device_attach(netdev);
332 }
333
334 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
335 &adapter->work_event)) {
336 atl1c_irq_disable(adapter);
337 atl1c_check_link_status(adapter);
338 atl1c_irq_enable(adapter);
339 }
340 }
341
342
343 static void atl1c_del_timer(struct atl1c_adapter *adapter)
344 {
345 del_timer_sync(&adapter->phy_config_timer);
346 }
347
348
349
350
351
352
353 static void atl1c_tx_timeout(struct net_device *netdev)
354 {
355 struct atl1c_adapter *adapter = netdev_priv(netdev);
356
357
358 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
359 schedule_work(&adapter->common_task);
360 }
361
362
363
364
365
366
367
368
369
370
371 static void atl1c_set_multi(struct net_device *netdev)
372 {
373 struct atl1c_adapter *adapter = netdev_priv(netdev);
374 struct atl1c_hw *hw = &adapter->hw;
375 struct netdev_hw_addr *ha;
376 u32 mac_ctrl_data;
377 u32 hash_value;
378
379
380 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
381
382 if (netdev->flags & IFF_PROMISC) {
383 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
384 } else if (netdev->flags & IFF_ALLMULTI) {
385 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
386 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
387 } else {
388 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
389 }
390
391 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
392
393
394 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
395 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
396
397
398 netdev_for_each_mc_addr(ha, netdev) {
399 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
400 atl1c_hash_set(hw, hash_value);
401 }
402 }
403
404 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
405 {
406 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
407
408 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
409 } else {
410
411 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
412 }
413 }
414
415 static void atl1c_vlan_mode(struct net_device *netdev,
416 netdev_features_t features)
417 {
418 struct atl1c_adapter *adapter = netdev_priv(netdev);
419 struct pci_dev *pdev = adapter->pdev;
420 u32 mac_ctrl_data = 0;
421
422 if (netif_msg_pktdata(adapter))
423 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
424
425 atl1c_irq_disable(adapter);
426 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
427 __atl1c_vlan_mode(features, &mac_ctrl_data);
428 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
429 atl1c_irq_enable(adapter);
430 }
431
432 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
433 {
434 struct pci_dev *pdev = adapter->pdev;
435
436 if (netif_msg_pktdata(adapter))
437 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
438 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
439 }
440
441
442
443
444
445
446
447
448 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
449 {
450 struct atl1c_adapter *adapter = netdev_priv(netdev);
451 struct sockaddr *addr = p;
452
453 if (!is_valid_ether_addr(addr->sa_data))
454 return -EADDRNOTAVAIL;
455
456 if (netif_running(netdev))
457 return -EBUSY;
458
459 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
460 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
461
462 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
463
464 return 0;
465 }
466
467 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
468 struct net_device *dev)
469 {
470 unsigned int head_size;
471 int mtu = dev->mtu;
472
473 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
474 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
475
476 head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD) +
477 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
478 adapter->rx_frag_size = roundup_pow_of_two(head_size);
479 }
480
481 static netdev_features_t atl1c_fix_features(struct net_device *netdev,
482 netdev_features_t features)
483 {
484
485
486
487
488 if (features & NETIF_F_HW_VLAN_CTAG_RX)
489 features |= NETIF_F_HW_VLAN_CTAG_TX;
490 else
491 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
492
493 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
494 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
495
496 return features;
497 }
498
499 static int atl1c_set_features(struct net_device *netdev,
500 netdev_features_t features)
501 {
502 netdev_features_t changed = netdev->features ^ features;
503
504 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
505 atl1c_vlan_mode(netdev, features);
506
507 return 0;
508 }
509
510 static void atl1c_set_max_mtu(struct net_device *netdev)
511 {
512 struct atl1c_adapter *adapter = netdev_priv(netdev);
513 struct atl1c_hw *hw = &adapter->hw;
514
515 switch (hw->nic_type) {
516
517 case athr_l1c:
518 case athr_l1d:
519 case athr_l1d_2:
520 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE -
521 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
522 break;
523
524 default:
525 netdev->max_mtu = ETH_DATA_LEN;
526 break;
527 }
528 }
529
530
531
532
533
534
535
536
537 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
538 {
539 struct atl1c_adapter *adapter = netdev_priv(netdev);
540
541
542 if (netif_running(netdev)) {
543 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
544 msleep(1);
545 netdev->mtu = new_mtu;
546 adapter->hw.max_frame_size = new_mtu;
547 atl1c_set_rxbufsize(adapter, netdev);
548 atl1c_down(adapter);
549 netdev_update_features(netdev);
550 atl1c_up(adapter);
551 clear_bit(__AT_RESETTING, &adapter->flags);
552 }
553 return 0;
554 }
555
556
557
558
559 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
560 {
561 struct atl1c_adapter *adapter = netdev_priv(netdev);
562 u16 result;
563
564 atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
565 return result;
566 }
567
568 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
569 int reg_num, int val)
570 {
571 struct atl1c_adapter *adapter = netdev_priv(netdev);
572
573 atl1c_write_phy_reg(&adapter->hw, reg_num, val);
574 }
575
576 static int atl1c_mii_ioctl(struct net_device *netdev,
577 struct ifreq *ifr, int cmd)
578 {
579 struct atl1c_adapter *adapter = netdev_priv(netdev);
580 struct pci_dev *pdev = adapter->pdev;
581 struct mii_ioctl_data *data = if_mii(ifr);
582 unsigned long flags;
583 int retval = 0;
584
585 if (!netif_running(netdev))
586 return -EINVAL;
587
588 spin_lock_irqsave(&adapter->mdio_lock, flags);
589 switch (cmd) {
590 case SIOCGMIIPHY:
591 data->phy_id = 0;
592 break;
593
594 case SIOCGMIIREG:
595 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
596 &data->val_out)) {
597 retval = -EIO;
598 goto out;
599 }
600 break;
601
602 case SIOCSMIIREG:
603 if (data->reg_num & ~(0x1F)) {
604 retval = -EFAULT;
605 goto out;
606 }
607
608 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
609 data->reg_num, data->val_in);
610 if (atl1c_write_phy_reg(&adapter->hw,
611 data->reg_num, data->val_in)) {
612 retval = -EIO;
613 goto out;
614 }
615 break;
616
617 default:
618 retval = -EOPNOTSUPP;
619 break;
620 }
621 out:
622 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
623 return retval;
624 }
625
626 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
627 {
628 switch (cmd) {
629 case SIOCGMIIPHY:
630 case SIOCGMIIREG:
631 case SIOCSMIIREG:
632 return atl1c_mii_ioctl(netdev, ifr, cmd);
633 default:
634 return -EOPNOTSUPP;
635 }
636 }
637
638
639
640
641
642
643 static int atl1c_alloc_queues(struct atl1c_adapter *adapter)
644 {
645 return 0;
646 }
647
648 static void atl1c_set_mac_type(struct atl1c_hw *hw)
649 {
650 switch (hw->device_id) {
651 case PCI_DEVICE_ID_ATTANSIC_L2C:
652 hw->nic_type = athr_l2c;
653 break;
654 case PCI_DEVICE_ID_ATTANSIC_L1C:
655 hw->nic_type = athr_l1c;
656 break;
657 case PCI_DEVICE_ID_ATHEROS_L2C_B:
658 hw->nic_type = athr_l2c_b;
659 break;
660 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
661 hw->nic_type = athr_l2c_b2;
662 break;
663 case PCI_DEVICE_ID_ATHEROS_L1D:
664 hw->nic_type = athr_l1d;
665 break;
666 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
667 hw->nic_type = athr_l1d_2;
668 break;
669 default:
670 break;
671 }
672 }
673
674 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
675 {
676 u32 link_ctrl_data;
677
678 atl1c_set_mac_type(hw);
679 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
680
681 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
682 ATL1C_TXQ_MODE_ENHANCE;
683 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
684 ATL1C_ASPM_L1_SUPPORT;
685 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
686
687 if (hw->nic_type == athr_l1c ||
688 hw->nic_type == athr_l1d ||
689 hw->nic_type == athr_l1d_2)
690 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
691 return 0;
692 }
693
694 struct atl1c_platform_patch {
695 u16 pci_did;
696 u8 pci_revid;
697 u16 subsystem_vid;
698 u16 subsystem_did;
699 u32 patch_flag;
700 #define ATL1C_LINK_PATCH 0x1
701 };
702 static const struct atl1c_platform_patch plats[] = {
703 {0x2060, 0xC1, 0x1019, 0x8152, 0x1},
704 {0x2060, 0xC1, 0x1019, 0x2060, 0x1},
705 {0x2060, 0xC1, 0x1019, 0xE000, 0x1},
706 {0x2062, 0xC0, 0x1019, 0x8152, 0x1},
707 {0x2062, 0xC0, 0x1019, 0x2062, 0x1},
708 {0x2062, 0xC0, 0x1458, 0xE000, 0x1},
709 {0x2062, 0xC1, 0x1019, 0x8152, 0x1},
710 {0x2062, 0xC1, 0x1019, 0x2062, 0x1},
711 {0x2062, 0xC1, 0x1458, 0xE000, 0x1},
712 {0x2062, 0xC1, 0x1565, 0x2802, 0x1},
713 {0x2062, 0xC1, 0x1565, 0x2801, 0x1},
714 {0x1073, 0xC0, 0x1019, 0x8151, 0x1},
715 {0x1073, 0xC0, 0x1019, 0x1073, 0x1},
716 {0x1073, 0xC0, 0x1458, 0xE000, 0x1},
717 {0x1083, 0xC0, 0x1458, 0xE000, 0x1},
718 {0x1083, 0xC0, 0x1019, 0x8151, 0x1},
719 {0x1083, 0xC0, 0x1019, 0x1083, 0x1},
720 {0x1083, 0xC0, 0x1462, 0x7680, 0x1},
721 {0x1083, 0xC0, 0x1565, 0x2803, 0x1},
722 {0},
723 };
724
725 static void atl1c_patch_assign(struct atl1c_hw *hw)
726 {
727 struct pci_dev *pdev = hw->adapter->pdev;
728 u32 misc_ctrl;
729 int i = 0;
730
731 hw->msi_lnkpatch = false;
732
733 while (plats[i].pci_did != 0) {
734 if (plats[i].pci_did == hw->device_id &&
735 plats[i].pci_revid == hw->revision_id &&
736 plats[i].subsystem_vid == hw->subsystem_vendor_id &&
737 plats[i].subsystem_did == hw->subsystem_id) {
738 if (plats[i].patch_flag & ATL1C_LINK_PATCH)
739 hw->msi_lnkpatch = true;
740 }
741 i++;
742 }
743
744 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 &&
745 hw->revision_id == L2CB_V21) {
746
747 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
748 REG_PCIE_DEV_MISC_CTRL);
749 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl);
750 misc_ctrl &= ~0x100;
751 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
752 REG_PCIE_DEV_MISC_CTRL);
753 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl);
754 }
755 }
756
757
758
759
760
761
762
763
764 static int atl1c_sw_init(struct atl1c_adapter *adapter)
765 {
766 struct atl1c_hw *hw = &adapter->hw;
767 struct pci_dev *pdev = adapter->pdev;
768 u32 revision;
769
770
771 adapter->wol = 0;
772 device_set_wakeup_enable(&pdev->dev, false);
773 adapter->link_speed = SPEED_0;
774 adapter->link_duplex = FULL_DUPLEX;
775 adapter->tpd_ring[0].count = 1024;
776 adapter->rfd_ring.count = 512;
777
778 hw->vendor_id = pdev->vendor;
779 hw->device_id = pdev->device;
780 hw->subsystem_vendor_id = pdev->subsystem_vendor;
781 hw->subsystem_id = pdev->subsystem_device;
782 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision);
783 hw->revision_id = revision & 0xFF;
784
785 hw->hibernate = true;
786 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
787 if (atl1c_setup_mac_funcs(hw) != 0) {
788 dev_err(&pdev->dev, "set mac function pointers failed\n");
789 return -1;
790 }
791 atl1c_patch_assign(hw);
792
793 hw->intr_mask = IMR_NORMAL_MASK;
794 hw->phy_configured = false;
795 hw->preamble_len = 7;
796 hw->max_frame_size = adapter->netdev->mtu;
797 hw->autoneg_advertised = ADVERTISED_Autoneg;
798 hw->indirect_tab = 0xE4E4E4E4;
799 hw->base_cpu = 0;
800
801 hw->ict = 50000;
802 hw->smb_timer = 200000;
803 hw->rx_imt = 200;
804 hw->tx_imt = 1000;
805
806 hw->tpd_burst = 5;
807 hw->rfd_burst = 8;
808 hw->dma_order = atl1c_dma_ord_out;
809 hw->dmar_block = atl1c_dma_req_1024;
810
811 if (atl1c_alloc_queues(adapter)) {
812 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
813 return -ENOMEM;
814 }
815
816 atl1c_set_rxbufsize(adapter, adapter->netdev);
817 atomic_set(&adapter->irq_sem, 1);
818 spin_lock_init(&adapter->mdio_lock);
819 set_bit(__AT_DOWN, &adapter->flags);
820
821 return 0;
822 }
823
824 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
825 struct atl1c_buffer *buffer_info)
826 {
827 u16 pci_driection;
828 if (buffer_info->flags & ATL1C_BUFFER_FREE)
829 return;
830 if (buffer_info->dma) {
831 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
832 pci_driection = PCI_DMA_FROMDEVICE;
833 else
834 pci_driection = PCI_DMA_TODEVICE;
835
836 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
837 pci_unmap_single(pdev, buffer_info->dma,
838 buffer_info->length, pci_driection);
839 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
840 pci_unmap_page(pdev, buffer_info->dma,
841 buffer_info->length, pci_driection);
842 }
843 if (buffer_info->skb)
844 dev_consume_skb_any(buffer_info->skb);
845 buffer_info->dma = 0;
846 buffer_info->skb = NULL;
847 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
848 }
849
850
851
852
853 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
854 enum atl1c_trans_queue type)
855 {
856 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
857 struct atl1c_buffer *buffer_info;
858 struct pci_dev *pdev = adapter->pdev;
859 u16 index, ring_count;
860
861 ring_count = tpd_ring->count;
862 for (index = 0; index < ring_count; index++) {
863 buffer_info = &tpd_ring->buffer_info[index];
864 atl1c_clean_buffer(pdev, buffer_info);
865 }
866
867 netdev_reset_queue(adapter->netdev);
868
869
870 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
871 ring_count);
872 atomic_set(&tpd_ring->next_to_clean, 0);
873 tpd_ring->next_to_use = 0;
874 }
875
876
877
878
879
880 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
881 {
882 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
883 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
884 struct atl1c_buffer *buffer_info;
885 struct pci_dev *pdev = adapter->pdev;
886 int j;
887
888 for (j = 0; j < rfd_ring->count; j++) {
889 buffer_info = &rfd_ring->buffer_info[j];
890 atl1c_clean_buffer(pdev, buffer_info);
891 }
892
893 memset(rfd_ring->desc, 0, rfd_ring->size);
894 rfd_ring->next_to_clean = 0;
895 rfd_ring->next_to_use = 0;
896 rrd_ring->next_to_use = 0;
897 rrd_ring->next_to_clean = 0;
898 }
899
900
901
902
903 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
904 {
905 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
906 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
907 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
908 struct atl1c_buffer *buffer_info;
909 int i, j;
910
911 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
912 tpd_ring[i].next_to_use = 0;
913 atomic_set(&tpd_ring[i].next_to_clean, 0);
914 buffer_info = tpd_ring[i].buffer_info;
915 for (j = 0; j < tpd_ring->count; j++)
916 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
917 ATL1C_BUFFER_FREE);
918 }
919 rfd_ring->next_to_use = 0;
920 rfd_ring->next_to_clean = 0;
921 rrd_ring->next_to_use = 0;
922 rrd_ring->next_to_clean = 0;
923 for (j = 0; j < rfd_ring->count; j++) {
924 buffer_info = &rfd_ring->buffer_info[j];
925 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
926 }
927 }
928
929
930
931
932
933
934
935 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
936 {
937 struct pci_dev *pdev = adapter->pdev;
938
939 pci_free_consistent(pdev, adapter->ring_header.size,
940 adapter->ring_header.desc,
941 adapter->ring_header.dma);
942 adapter->ring_header.desc = NULL;
943
944
945
946 if (adapter->tpd_ring[0].buffer_info) {
947 kfree(adapter->tpd_ring[0].buffer_info);
948 adapter->tpd_ring[0].buffer_info = NULL;
949 }
950 if (adapter->rx_page) {
951 put_page(adapter->rx_page);
952 adapter->rx_page = NULL;
953 }
954 }
955
956
957
958
959
960
961
962 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
963 {
964 struct pci_dev *pdev = adapter->pdev;
965 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
966 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
967 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
968 struct atl1c_ring_header *ring_header = &adapter->ring_header;
969 int size;
970 int i;
971 int count = 0;
972 int rx_desc_count = 0;
973 u32 offset = 0;
974
975 rrd_ring->count = rfd_ring->count;
976 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
977 tpd_ring[i].count = tpd_ring[0].count;
978
979
980
981 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
982 rfd_ring->count);
983 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
984 if (unlikely(!tpd_ring->buffer_info))
985 goto err_nomem;
986
987 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
988 tpd_ring[i].buffer_info =
989 (tpd_ring->buffer_info + count);
990 count += tpd_ring[i].count;
991 }
992
993 rfd_ring->buffer_info =
994 (tpd_ring->buffer_info + count);
995 count += rfd_ring->count;
996 rx_desc_count += rfd_ring->count;
997
998
999
1000
1001
1002
1003 ring_header->size = size =
1004 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
1005 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
1006 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
1007 8 * 4;
1008
1009 ring_header->desc = dma_alloc_coherent(&pdev->dev, ring_header->size,
1010 &ring_header->dma, GFP_KERNEL);
1011 if (unlikely(!ring_header->desc)) {
1012 dev_err(&pdev->dev, "could not get memory for DMA buffer\n");
1013 goto err_nomem;
1014 }
1015
1016
1017 tpd_ring[0].dma = roundup(ring_header->dma, 8);
1018 offset = tpd_ring[0].dma - ring_header->dma;
1019 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
1020 tpd_ring[i].dma = ring_header->dma + offset;
1021 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
1022 tpd_ring[i].size =
1023 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
1024 offset += roundup(tpd_ring[i].size, 8);
1025 }
1026
1027 rfd_ring->dma = ring_header->dma + offset;
1028 rfd_ring->desc = (u8 *) ring_header->desc + offset;
1029 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
1030 offset += roundup(rfd_ring->size, 8);
1031
1032
1033 rrd_ring->dma = ring_header->dma + offset;
1034 rrd_ring->desc = (u8 *) ring_header->desc + offset;
1035 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
1036 rrd_ring->count;
1037 offset += roundup(rrd_ring->size, 8);
1038
1039 return 0;
1040
1041 err_nomem:
1042 kfree(tpd_ring->buffer_info);
1043 return -ENOMEM;
1044 }
1045
1046 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1047 {
1048 struct atl1c_hw *hw = &adapter->hw;
1049 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1050 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
1051 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1052 adapter->tpd_ring;
1053
1054
1055 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1056 (u32)((tpd_ring[atl1c_trans_normal].dma &
1057 AT_DMA_HI_ADDR_MASK) >> 32));
1058
1059 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
1060 (u32)(tpd_ring[atl1c_trans_normal].dma &
1061 AT_DMA_LO_ADDR_MASK));
1062 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
1063 (u32)(tpd_ring[atl1c_trans_high].dma &
1064 AT_DMA_LO_ADDR_MASK));
1065 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1066 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1067
1068
1069
1070 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
1071 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1072 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
1073 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
1074
1075 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1076 rfd_ring->count & RFD_RING_SIZE_MASK);
1077 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1078 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1079
1080
1081 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
1082 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
1083 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1084 (rrd_ring->count & RRD_RING_SIZE_MASK));
1085
1086 if (hw->nic_type == athr_l2c_b) {
1087 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1088 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1089 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1090 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1091 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1092 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1093 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0);
1094 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0);
1095 }
1096
1097 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1098 }
1099
1100 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1101 {
1102 struct atl1c_hw *hw = &adapter->hw;
1103 int max_pay_load;
1104 u16 tx_offload_thresh;
1105 u32 txq_ctrl_data;
1106
1107 tx_offload_thresh = MAX_TSO_FRAME_SIZE;
1108 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1109 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1110 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
1111 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
1112
1113
1114
1115
1116 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
1117 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
1118 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
1119 }
1120 txq_ctrl_data =
1121 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
1122 L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
1123
1124 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1125 }
1126
1127 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1128 {
1129 struct atl1c_hw *hw = &adapter->hw;
1130 u32 rxq_ctrl_data;
1131
1132 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1133 RXQ_RFD_BURST_NUM_SHIFT;
1134
1135 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1136 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1137
1138
1139 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
1140 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
1141 ASPM_THRUPUT_LIMIT_100M);
1142
1143 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1144 }
1145
1146 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1147 {
1148 struct atl1c_hw *hw = &adapter->hw;
1149 u32 dma_ctrl_data;
1150
1151 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
1152 DMA_CTRL_RREQ_PRI_DATA |
1153 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
1154 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
1155 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
1156
1157 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1158 }
1159
1160
1161
1162
1163
1164
1165 static int atl1c_stop_mac(struct atl1c_hw *hw)
1166 {
1167 u32 data;
1168
1169 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1170 data &= ~RXQ_CTRL_EN;
1171 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1172
1173 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1174 data &= ~TXQ_CTRL_EN;
1175 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1176
1177 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
1178
1179 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1180 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1181 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1182
1183 return (int)atl1c_wait_until_idle(hw,
1184 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
1185 }
1186
1187 static void atl1c_start_mac(struct atl1c_adapter *adapter)
1188 {
1189 struct atl1c_hw *hw = &adapter->hw;
1190 u32 mac, txq, rxq;
1191
1192 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false;
1193 hw->mac_speed = adapter->link_speed == SPEED_1000 ?
1194 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
1195
1196 AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
1197 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
1198 AT_READ_REG(hw, REG_MAC_CTRL, &mac);
1199
1200 txq |= TXQ_CTRL_EN;
1201 rxq |= RXQ_CTRL_EN;
1202 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
1203 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
1204 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
1205 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
1206 MAC_CTRL_HASH_ALG_CRC32;
1207 if (hw->mac_duplex)
1208 mac |= MAC_CTRL_DUPLX;
1209 else
1210 mac &= ~MAC_CTRL_DUPLX;
1211 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
1212 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
1213
1214 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
1215 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
1216 AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
1217 }
1218
1219
1220
1221
1222
1223
1224 static int atl1c_reset_mac(struct atl1c_hw *hw)
1225 {
1226 struct atl1c_adapter *adapter = hw->adapter;
1227 struct pci_dev *pdev = adapter->pdev;
1228 u32 ctrl_data = 0;
1229
1230 atl1c_stop_mac(hw);
1231
1232
1233
1234
1235
1236
1237 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
1238 ctrl_data |= MASTER_CTRL_OOB_DIS;
1239 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
1240
1241 AT_WRITE_FLUSH(hw);
1242 msleep(10);
1243
1244
1245 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
1246 dev_err(&pdev->dev,
1247 "MAC state machine can't be idle since"
1248 " disabled for 10ms second\n");
1249 return -1;
1250 }
1251 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
1252
1253
1254 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
1255 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
1256
1257
1258 AT_READ_REG(hw, REG_SERDES, &ctrl_data);
1259 switch (hw->nic_type) {
1260 case athr_l2c_b:
1261 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
1262 SERDES_MAC_CLK_SLOWDOWN);
1263 AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1264 break;
1265 case athr_l2c_b2:
1266 case athr_l1d_2:
1267 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
1268 AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1269 break;
1270 default:
1271 break;
1272 }
1273
1274 return 0;
1275 }
1276
1277 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1278 {
1279 u16 ctrl_flags = hw->ctrl_flags;
1280
1281 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
1282 atl1c_set_aspm(hw, SPEED_0);
1283 hw->ctrl_flags = ctrl_flags;
1284 }
1285
1286
1287
1288
1289
1290 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
1291 {
1292 u32 pm_ctrl_data;
1293 u32 link_l1_timer;
1294
1295 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1296 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
1297 PM_CTRL_ASPM_L0S_EN |
1298 PM_CTRL_MAC_ASPM_CHK);
1299
1300 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1301 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
1302 link_l1_timer =
1303 link_speed == SPEED_1000 || link_speed == SPEED_100 ?
1304 L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
1305 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1306 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
1307 } else {
1308 link_l1_timer = hw->nic_type == athr_l2c_b ?
1309 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
1310 if (link_speed != SPEED_1000 && link_speed != SPEED_100)
1311 link_l1_timer = 1;
1312 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1313 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
1314 }
1315
1316
1317 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0)
1318 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
1319 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1320 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
1321
1322
1323 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1324 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1325 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1326 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
1327 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
1328 PM_CTRL_SERDES_PD_EX_L1 |
1329 PM_CTRL_CLK_SWH_L1;
1330 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1331 PM_CTRL_SERDES_PLL_L1_EN |
1332 PM_CTRL_SERDES_BUFS_RX_L1_EN |
1333 PM_CTRL_SA_DLY_EN |
1334 PM_CTRL_HOTRST);
1335
1336 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
1337 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1338 } else {
1339 pm_ctrl_data =
1340 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
1341 if (link_speed != SPEED_0) {
1342 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
1343 PM_CTRL_SERDES_PLL_L1_EN |
1344 PM_CTRL_SERDES_BUFS_RX_L1_EN;
1345 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
1346 PM_CTRL_CLK_SWH_L1 |
1347 PM_CTRL_ASPM_L0S_EN |
1348 PM_CTRL_ASPM_L1_EN);
1349 } else {
1350 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1351 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1352 PM_CTRL_SERDES_PLL_L1_EN |
1353 PM_CTRL_SERDES_BUFS_RX_L1_EN |
1354 PM_CTRL_ASPM_L0S_EN);
1355 }
1356 }
1357 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1358
1359 return;
1360 }
1361
1362
1363
1364
1365
1366
1367
1368 static int atl1c_configure_mac(struct atl1c_adapter *adapter)
1369 {
1370 struct atl1c_hw *hw = &adapter->hw;
1371 u32 master_ctrl_data = 0;
1372 u32 intr_modrt_data;
1373 u32 data;
1374
1375 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1376 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
1377 MASTER_CTRL_RX_ITIMER_EN |
1378 MASTER_CTRL_INT_RDCLR);
1379
1380 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1381
1382 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1383
1384
1385
1386
1387
1388 data = CLK_GATING_EN_ALL;
1389 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1390 if (hw->nic_type == athr_l2c_b)
1391 data &= ~CLK_GATING_RXMAC_EN;
1392 } else
1393 data = 0;
1394 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1395
1396 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1397 hw->ict & INT_RETRIG_TIMER_MASK);
1398
1399 atl1c_configure_des_ring(adapter);
1400
1401 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1402 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1403 IRQ_MODRT_TX_TIMER_SHIFT;
1404 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1405 IRQ_MODRT_RX_TIMER_SHIFT;
1406 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1407 master_ctrl_data |=
1408 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1409 }
1410
1411 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1412 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1413
1414 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
1415 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1416
1417 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1418 hw->smb_timer & SMB_STAT_TIMER_MASK);
1419
1420
1421 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1422 VLAN_HLEN + ETH_FCS_LEN);
1423
1424 atl1c_configure_tx(adapter);
1425 atl1c_configure_rx(adapter);
1426 atl1c_configure_dma(adapter);
1427
1428 return 0;
1429 }
1430
1431 static int atl1c_configure(struct atl1c_adapter *adapter)
1432 {
1433 struct net_device *netdev = adapter->netdev;
1434 int num;
1435
1436 atl1c_init_ring_ptrs(adapter);
1437 atl1c_set_multi(netdev);
1438 atl1c_restore_vlan(adapter);
1439
1440 num = atl1c_alloc_rx_buffer(adapter);
1441 if (unlikely(num == 0))
1442 return -ENOMEM;
1443
1444 if (atl1c_configure_mac(adapter))
1445 return -EIO;
1446
1447 return 0;
1448 }
1449
1450 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1451 {
1452 u16 hw_reg_addr = 0;
1453 unsigned long *stats_item = NULL;
1454 u32 data;
1455
1456
1457 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1458 stats_item = &adapter->hw_stats.rx_ok;
1459 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1460 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1461 *stats_item += data;
1462 stats_item++;
1463 hw_reg_addr += 4;
1464 }
1465
1466 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1467 stats_item = &adapter->hw_stats.tx_ok;
1468 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1469 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1470 *stats_item += data;
1471 stats_item++;
1472 hw_reg_addr += 4;
1473 }
1474 }
1475
1476
1477
1478
1479
1480
1481
1482
1483 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1484 {
1485 struct atl1c_adapter *adapter = netdev_priv(netdev);
1486 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1487 struct net_device_stats *net_stats = &netdev->stats;
1488
1489 atl1c_update_hw_stats(adapter);
1490 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1491 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1492 net_stats->multicast = hw_stats->rx_mcast;
1493 net_stats->collisions = hw_stats->tx_1_col +
1494 hw_stats->tx_2_col +
1495 hw_stats->tx_late_col +
1496 hw_stats->tx_abort_col;
1497
1498 net_stats->rx_errors = hw_stats->rx_frag +
1499 hw_stats->rx_fcs_err +
1500 hw_stats->rx_len_err +
1501 hw_stats->rx_sz_ov +
1502 hw_stats->rx_rrd_ov +
1503 hw_stats->rx_align_err +
1504 hw_stats->rx_rxf_ov;
1505
1506 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1507 net_stats->rx_length_errors = hw_stats->rx_len_err;
1508 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1509 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1510 net_stats->rx_dropped = hw_stats->rx_rrd_ov;
1511
1512 net_stats->tx_errors = hw_stats->tx_late_col +
1513 hw_stats->tx_abort_col +
1514 hw_stats->tx_underrun +
1515 hw_stats->tx_trunc;
1516
1517 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1518 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1519 net_stats->tx_window_errors = hw_stats->tx_late_col;
1520
1521 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1522 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1523
1524 return net_stats;
1525 }
1526
1527 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1528 {
1529 u16 phy_data;
1530
1531 spin_lock(&adapter->mdio_lock);
1532 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1533 spin_unlock(&adapter->mdio_lock);
1534 }
1535
1536 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1537 enum atl1c_trans_queue type)
1538 {
1539 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1540 struct atl1c_buffer *buffer_info;
1541 struct pci_dev *pdev = adapter->pdev;
1542 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1543 u16 hw_next_to_clean;
1544 u16 reg;
1545 unsigned int total_bytes = 0, total_packets = 0;
1546
1547 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
1548
1549 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
1550
1551 while (next_to_clean != hw_next_to_clean) {
1552 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1553 if (buffer_info->skb) {
1554 total_bytes += buffer_info->skb->len;
1555 total_packets++;
1556 }
1557 atl1c_clean_buffer(pdev, buffer_info);
1558 if (++next_to_clean == tpd_ring->count)
1559 next_to_clean = 0;
1560 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1561 }
1562
1563 netdev_completed_queue(adapter->netdev, total_packets, total_bytes);
1564
1565 if (netif_queue_stopped(adapter->netdev) &&
1566 netif_carrier_ok(adapter->netdev)) {
1567 netif_wake_queue(adapter->netdev);
1568 }
1569
1570 return true;
1571 }
1572
1573
1574
1575
1576
1577
1578 static irqreturn_t atl1c_intr(int irq, void *data)
1579 {
1580 struct net_device *netdev = data;
1581 struct atl1c_adapter *adapter = netdev_priv(netdev);
1582 struct pci_dev *pdev = adapter->pdev;
1583 struct atl1c_hw *hw = &adapter->hw;
1584 int max_ints = AT_MAX_INT_WORK;
1585 int handled = IRQ_NONE;
1586 u32 status;
1587 u32 reg_data;
1588
1589 do {
1590 AT_READ_REG(hw, REG_ISR, ®_data);
1591 status = reg_data & hw->intr_mask;
1592
1593 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1594 if (max_ints != AT_MAX_INT_WORK)
1595 handled = IRQ_HANDLED;
1596 break;
1597 }
1598
1599 if (status & ISR_GPHY)
1600 atl1c_clear_phy_int(adapter);
1601
1602 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1603 if (status & ISR_RX_PKT) {
1604 if (likely(napi_schedule_prep(&adapter->napi))) {
1605 hw->intr_mask &= ~ISR_RX_PKT;
1606 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1607 __napi_schedule(&adapter->napi);
1608 }
1609 }
1610 if (status & ISR_TX_PKT)
1611 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1612
1613 handled = IRQ_HANDLED;
1614
1615 if (status & ISR_ERROR) {
1616 if (netif_msg_hw(adapter))
1617 dev_err(&pdev->dev,
1618 "atl1c hardware error (status = 0x%x)\n",
1619 status & ISR_ERROR);
1620
1621 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
1622 schedule_work(&adapter->common_task);
1623 return IRQ_HANDLED;
1624 }
1625
1626 if (status & ISR_OVER)
1627 if (netif_msg_intr(adapter))
1628 dev_warn(&pdev->dev,
1629 "TX/RX overflow (status = 0x%x)\n",
1630 status & ISR_OVER);
1631
1632
1633 if (status & (ISR_GPHY | ISR_MANUAL)) {
1634 netdev->stats.tx_carrier_errors++;
1635 atl1c_link_chg_event(adapter);
1636 break;
1637 }
1638
1639 } while (--max_ints > 0);
1640
1641 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1642 return handled;
1643 }
1644
1645 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1646 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1647 {
1648
1649
1650
1651
1652
1653 skb_checksum_none_assert(skb);
1654 }
1655
1656 static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter)
1657 {
1658 struct sk_buff *skb;
1659 struct page *page;
1660
1661 if (adapter->rx_frag_size > PAGE_SIZE)
1662 return netdev_alloc_skb(adapter->netdev,
1663 adapter->rx_buffer_len);
1664
1665 page = adapter->rx_page;
1666 if (!page) {
1667 adapter->rx_page = page = alloc_page(GFP_ATOMIC);
1668 if (unlikely(!page))
1669 return NULL;
1670 adapter->rx_page_offset = 0;
1671 }
1672
1673 skb = build_skb(page_address(page) + adapter->rx_page_offset,
1674 adapter->rx_frag_size);
1675 if (likely(skb)) {
1676 skb_reserve(skb, NET_SKB_PAD);
1677 adapter->rx_page_offset += adapter->rx_frag_size;
1678 if (adapter->rx_page_offset >= PAGE_SIZE)
1679 adapter->rx_page = NULL;
1680 else
1681 get_page(page);
1682 }
1683 return skb;
1684 }
1685
1686 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
1687 {
1688 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1689 struct pci_dev *pdev = adapter->pdev;
1690 struct atl1c_buffer *buffer_info, *next_info;
1691 struct sk_buff *skb;
1692 void *vir_addr = NULL;
1693 u16 num_alloc = 0;
1694 u16 rfd_next_to_use, next_next;
1695 struct atl1c_rx_free_desc *rfd_desc;
1696 dma_addr_t mapping;
1697
1698 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1699 if (++next_next == rfd_ring->count)
1700 next_next = 0;
1701 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1702 next_info = &rfd_ring->buffer_info[next_next];
1703
1704 while (next_info->flags & ATL1C_BUFFER_FREE) {
1705 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1706
1707 skb = atl1c_alloc_skb(adapter);
1708 if (unlikely(!skb)) {
1709 if (netif_msg_rx_err(adapter))
1710 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1711 break;
1712 }
1713
1714
1715
1716
1717
1718
1719 vir_addr = skb->data;
1720 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1721 buffer_info->skb = skb;
1722 buffer_info->length = adapter->rx_buffer_len;
1723 mapping = pci_map_single(pdev, vir_addr,
1724 buffer_info->length,
1725 PCI_DMA_FROMDEVICE);
1726 if (unlikely(pci_dma_mapping_error(pdev, mapping))) {
1727 dev_kfree_skb(skb);
1728 buffer_info->skb = NULL;
1729 buffer_info->length = 0;
1730 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
1731 netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed");
1732 break;
1733 }
1734 buffer_info->dma = mapping;
1735 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1736 ATL1C_PCIMAP_FROMDEVICE);
1737 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1738 rfd_next_to_use = next_next;
1739 if (++next_next == rfd_ring->count)
1740 next_next = 0;
1741 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1742 next_info = &rfd_ring->buffer_info[next_next];
1743 num_alloc++;
1744 }
1745
1746 if (num_alloc) {
1747
1748 wmb();
1749 rfd_ring->next_to_use = rfd_next_to_use;
1750 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
1751 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1752 }
1753
1754 return num_alloc;
1755 }
1756
1757 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1758 struct atl1c_recv_ret_status *rrs, u16 num)
1759 {
1760 u16 i;
1761
1762 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1763 rrd_ring->next_to_clean)) {
1764 rrs->word3 &= ~RRS_RXD_UPDATED;
1765 if (++rrd_ring->next_to_clean == rrd_ring->count)
1766 rrd_ring->next_to_clean = 0;
1767 }
1768 }
1769
1770 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1771 struct atl1c_recv_ret_status *rrs, u16 num)
1772 {
1773 u16 i;
1774 u16 rfd_index;
1775 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1776
1777 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1778 RRS_RX_RFD_INDEX_MASK;
1779 for (i = 0; i < num; i++) {
1780 buffer_info[rfd_index].skb = NULL;
1781 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1782 ATL1C_BUFFER_FREE);
1783 if (++rfd_index == rfd_ring->count)
1784 rfd_index = 0;
1785 }
1786 rfd_ring->next_to_clean = rfd_index;
1787 }
1788
1789 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
1790 int *work_done, int work_to_do)
1791 {
1792 u16 rfd_num, rfd_index;
1793 u16 count = 0;
1794 u16 length;
1795 struct pci_dev *pdev = adapter->pdev;
1796 struct net_device *netdev = adapter->netdev;
1797 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1798 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
1799 struct sk_buff *skb;
1800 struct atl1c_recv_ret_status *rrs;
1801 struct atl1c_buffer *buffer_info;
1802
1803 while (1) {
1804 if (*work_done >= work_to_do)
1805 break;
1806 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1807 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1808 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1809 RRS_RX_RFD_CNT_MASK;
1810 if (unlikely(rfd_num != 1))
1811
1812 if (netif_msg_rx_err(adapter))
1813 dev_warn(&pdev->dev,
1814 "Multi rfd not support yet!\n");
1815 goto rrs_checked;
1816 } else {
1817 break;
1818 }
1819 rrs_checked:
1820 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1821 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1822 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1823 if (netif_msg_rx_err(adapter))
1824 dev_warn(&pdev->dev,
1825 "wrong packet! rrs word3 is %x\n",
1826 rrs->word3);
1827 continue;
1828 }
1829
1830 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1831 RRS_PKT_SIZE_MASK);
1832
1833 if (likely(rfd_num == 1)) {
1834 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1835 RRS_RX_RFD_INDEX_MASK;
1836 buffer_info = &rfd_ring->buffer_info[rfd_index];
1837 pci_unmap_single(pdev, buffer_info->dma,
1838 buffer_info->length, PCI_DMA_FROMDEVICE);
1839 skb = buffer_info->skb;
1840 } else {
1841
1842 if (netif_msg_rx_err(adapter))
1843 dev_warn(&pdev->dev,
1844 "Multi rfd not support yet!\n");
1845 break;
1846 }
1847 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1848 skb_put(skb, length - ETH_FCS_LEN);
1849 skb->protocol = eth_type_trans(skb, netdev);
1850 atl1c_rx_checksum(adapter, skb, rrs);
1851 if (rrs->word3 & RRS_VLAN_INS) {
1852 u16 vlan;
1853
1854 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1855 vlan = le16_to_cpu(vlan);
1856 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
1857 }
1858 netif_receive_skb(skb);
1859
1860 (*work_done)++;
1861 count++;
1862 }
1863 if (count)
1864 atl1c_alloc_rx_buffer(adapter);
1865 }
1866
1867
1868
1869
1870 static int atl1c_clean(struct napi_struct *napi, int budget)
1871 {
1872 struct atl1c_adapter *adapter =
1873 container_of(napi, struct atl1c_adapter, napi);
1874 int work_done = 0;
1875
1876
1877 if (!netif_carrier_ok(adapter->netdev))
1878 goto quit_polling;
1879
1880 atl1c_clean_rx_irq(adapter, &work_done, budget);
1881
1882 if (work_done < budget) {
1883 quit_polling:
1884 napi_complete_done(napi, work_done);
1885 adapter->hw.intr_mask |= ISR_RX_PKT;
1886 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1887 }
1888 return work_done;
1889 }
1890
1891 #ifdef CONFIG_NET_POLL_CONTROLLER
1892
1893
1894
1895
1896
1897
1898 static void atl1c_netpoll(struct net_device *netdev)
1899 {
1900 struct atl1c_adapter *adapter = netdev_priv(netdev);
1901
1902 disable_irq(adapter->pdev->irq);
1903 atl1c_intr(adapter->pdev->irq, netdev);
1904 enable_irq(adapter->pdev->irq);
1905 }
1906 #endif
1907
1908 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1909 {
1910 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1911 u16 next_to_use = 0;
1912 u16 next_to_clean = 0;
1913
1914 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1915 next_to_use = tpd_ring->next_to_use;
1916
1917 return (u16)(next_to_clean > next_to_use) ?
1918 (next_to_clean - next_to_use - 1) :
1919 (tpd_ring->count + next_to_clean - next_to_use - 1);
1920 }
1921
1922
1923
1924
1925
1926
1927 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1928 enum atl1c_trans_queue type)
1929 {
1930 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1931 struct atl1c_tpd_desc *tpd_desc;
1932 u16 next_to_use = 0;
1933
1934 next_to_use = tpd_ring->next_to_use;
1935 if (++tpd_ring->next_to_use == tpd_ring->count)
1936 tpd_ring->next_to_use = 0;
1937 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1938 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1939 return tpd_desc;
1940 }
1941
1942 static struct atl1c_buffer *
1943 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1944 {
1945 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1946
1947 return &tpd_ring->buffer_info[tpd -
1948 (struct atl1c_tpd_desc *)tpd_ring->desc];
1949 }
1950
1951
1952 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1953 {
1954 u16 tpd_req;
1955 u16 proto_hdr_len = 0;
1956
1957 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1958
1959 if (skb_is_gso(skb)) {
1960 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1961 if (proto_hdr_len < skb_headlen(skb))
1962 tpd_req++;
1963 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1964 tpd_req++;
1965 }
1966 return tpd_req;
1967 }
1968
1969 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1970 struct sk_buff *skb,
1971 struct atl1c_tpd_desc **tpd,
1972 enum atl1c_trans_queue type)
1973 {
1974 struct pci_dev *pdev = adapter->pdev;
1975 unsigned short offload_type;
1976 u8 hdr_len;
1977 u32 real_len;
1978
1979 if (skb_is_gso(skb)) {
1980 int err;
1981
1982 err = skb_cow_head(skb, 0);
1983 if (err < 0)
1984 return err;
1985
1986 offload_type = skb_shinfo(skb)->gso_type;
1987
1988 if (offload_type & SKB_GSO_TCPV4) {
1989 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1990 + ntohs(ip_hdr(skb)->tot_len));
1991
1992 if (real_len < skb->len)
1993 pskb_trim(skb, real_len);
1994
1995 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1996 if (unlikely(skb->len == hdr_len)) {
1997
1998 if (netif_msg_tx_queued(adapter))
1999 dev_warn(&pdev->dev,
2000 "IPV4 tso with zero data??\n");
2001 goto check_sum;
2002 } else {
2003 ip_hdr(skb)->check = 0;
2004 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
2005 ip_hdr(skb)->saddr,
2006 ip_hdr(skb)->daddr,
2007 0, IPPROTO_TCP, 0);
2008 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
2009 }
2010 }
2011
2012 if (offload_type & SKB_GSO_TCPV6) {
2013 struct atl1c_tpd_ext_desc *etpd =
2014 *(struct atl1c_tpd_ext_desc **)(tpd);
2015
2016 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
2017 *tpd = atl1c_get_tpd(adapter, type);
2018 ipv6_hdr(skb)->payload_len = 0;
2019
2020 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2021 if (unlikely(skb->len == hdr_len)) {
2022
2023 if (netif_msg_tx_queued(adapter))
2024 dev_warn(&pdev->dev,
2025 "IPV6 tso with zero data??\n");
2026 goto check_sum;
2027 } else
2028 tcp_hdr(skb)->check = ~csum_ipv6_magic(
2029 &ipv6_hdr(skb)->saddr,
2030 &ipv6_hdr(skb)->daddr,
2031 0, IPPROTO_TCP, 0);
2032 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2033 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2034 etpd->pkt_len = cpu_to_le32(skb->len);
2035 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2036 }
2037
2038 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2039 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2040 TPD_TCPHDR_OFFSET_SHIFT;
2041 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2042 TPD_MSS_SHIFT;
2043 return 0;
2044 }
2045
2046 check_sum:
2047 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2048 u8 css, cso;
2049 cso = skb_checksum_start_offset(skb);
2050
2051 if (unlikely(cso & 0x1)) {
2052 if (netif_msg_tx_err(adapter))
2053 dev_err(&adapter->pdev->dev,
2054 "payload offset should not an event number\n");
2055 return -1;
2056 } else {
2057 css = cso + skb->csum_offset;
2058
2059 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2060 TPD_PLOADOFFSET_SHIFT;
2061 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2062 TPD_CCSUM_OFFSET_SHIFT;
2063 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2064 }
2065 }
2066 return 0;
2067 }
2068
2069 static void atl1c_tx_rollback(struct atl1c_adapter *adpt,
2070 struct atl1c_tpd_desc *first_tpd,
2071 enum atl1c_trans_queue type)
2072 {
2073 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[type];
2074 struct atl1c_buffer *buffer_info;
2075 struct atl1c_tpd_desc *tpd;
2076 u16 first_index, index;
2077
2078 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc;
2079 index = first_index;
2080 while (index != tpd_ring->next_to_use) {
2081 tpd = ATL1C_TPD_DESC(tpd_ring, index);
2082 buffer_info = &tpd_ring->buffer_info[index];
2083 atl1c_clean_buffer(adpt->pdev, buffer_info);
2084 memset(tpd, 0, sizeof(struct atl1c_tpd_desc));
2085 if (++index == tpd_ring->count)
2086 index = 0;
2087 }
2088 tpd_ring->next_to_use = first_index;
2089 }
2090
2091 static int atl1c_tx_map(struct atl1c_adapter *adapter,
2092 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2093 enum atl1c_trans_queue type)
2094 {
2095 struct atl1c_tpd_desc *use_tpd = NULL;
2096 struct atl1c_buffer *buffer_info = NULL;
2097 u16 buf_len = skb_headlen(skb);
2098 u16 map_len = 0;
2099 u16 mapped_len = 0;
2100 u16 hdr_len = 0;
2101 u16 nr_frags;
2102 u16 f;
2103 int tso;
2104
2105 nr_frags = skb_shinfo(skb)->nr_frags;
2106 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2107 if (tso) {
2108
2109 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2110 use_tpd = tpd;
2111
2112 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2113 buffer_info->length = map_len;
2114 buffer_info->dma = pci_map_single(adapter->pdev,
2115 skb->data, hdr_len, PCI_DMA_TODEVICE);
2116 if (unlikely(pci_dma_mapping_error(adapter->pdev,
2117 buffer_info->dma)))
2118 goto err_dma;
2119 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2120 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2121 ATL1C_PCIMAP_TODEVICE);
2122 mapped_len += map_len;
2123 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2124 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2125 }
2126
2127 if (mapped_len < buf_len) {
2128
2129
2130 if (mapped_len == 0)
2131 use_tpd = tpd;
2132 else {
2133 use_tpd = atl1c_get_tpd(adapter, type);
2134 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2135 }
2136 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2137 buffer_info->length = buf_len - mapped_len;
2138 buffer_info->dma =
2139 pci_map_single(adapter->pdev, skb->data + mapped_len,
2140 buffer_info->length, PCI_DMA_TODEVICE);
2141 if (unlikely(pci_dma_mapping_error(adapter->pdev,
2142 buffer_info->dma)))
2143 goto err_dma;
2144
2145 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2146 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2147 ATL1C_PCIMAP_TODEVICE);
2148 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2149 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2150 }
2151
2152 for (f = 0; f < nr_frags; f++) {
2153 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
2154
2155 use_tpd = atl1c_get_tpd(adapter, type);
2156 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2157
2158 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2159 buffer_info->length = skb_frag_size(frag);
2160 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2161 frag, 0,
2162 buffer_info->length,
2163 DMA_TO_DEVICE);
2164 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma))
2165 goto err_dma;
2166
2167 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2168 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2169 ATL1C_PCIMAP_TODEVICE);
2170 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2171 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2172 }
2173
2174
2175 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2176
2177
2178 buffer_info->skb = skb;
2179
2180 return 0;
2181
2182 err_dma:
2183 buffer_info->dma = 0;
2184 buffer_info->length = 0;
2185 return -1;
2186 }
2187
2188 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2189 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2190 {
2191 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2192 u16 reg;
2193
2194 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
2195 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
2196 }
2197
2198 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2199 struct net_device *netdev)
2200 {
2201 struct atl1c_adapter *adapter = netdev_priv(netdev);
2202 u16 tpd_req;
2203 struct atl1c_tpd_desc *tpd;
2204 enum atl1c_trans_queue type = atl1c_trans_normal;
2205
2206 if (test_bit(__AT_DOWN, &adapter->flags)) {
2207 dev_kfree_skb_any(skb);
2208 return NETDEV_TX_OK;
2209 }
2210
2211 tpd_req = atl1c_cal_tpd_req(skb);
2212
2213 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2214
2215 netif_stop_queue(netdev);
2216 return NETDEV_TX_BUSY;
2217 }
2218
2219 tpd = atl1c_get_tpd(adapter, type);
2220
2221
2222 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2223 dev_kfree_skb_any(skb);
2224 return NETDEV_TX_OK;
2225 }
2226
2227 if (unlikely(skb_vlan_tag_present(skb))) {
2228 u16 vlan = skb_vlan_tag_get(skb);
2229 __le16 tag;
2230
2231 vlan = cpu_to_le16(vlan);
2232 AT_VLAN_TO_TAG(vlan, tag);
2233 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2234 tpd->vlan_tag = tag;
2235 }
2236
2237 if (skb_network_offset(skb) != ETH_HLEN)
2238 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT;
2239
2240 if (atl1c_tx_map(adapter, skb, tpd, type) < 0) {
2241 netif_info(adapter, tx_done, adapter->netdev,
2242 "tx-skb dropped due to dma error\n");
2243
2244 atl1c_tx_rollback(adapter, tpd, type);
2245 dev_kfree_skb_any(skb);
2246 } else {
2247 netdev_sent_queue(adapter->netdev, skb->len);
2248 atl1c_tx_queue(adapter, skb, tpd, type);
2249 }
2250
2251 return NETDEV_TX_OK;
2252 }
2253
2254 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2255 {
2256 struct net_device *netdev = adapter->netdev;
2257
2258 free_irq(adapter->pdev->irq, netdev);
2259
2260 if (adapter->have_msi)
2261 pci_disable_msi(adapter->pdev);
2262 }
2263
2264 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2265 {
2266 struct pci_dev *pdev = adapter->pdev;
2267 struct net_device *netdev = adapter->netdev;
2268 int flags = 0;
2269 int err = 0;
2270
2271 adapter->have_msi = true;
2272 err = pci_enable_msi(adapter->pdev);
2273 if (err) {
2274 if (netif_msg_ifup(adapter))
2275 dev_err(&pdev->dev,
2276 "Unable to allocate MSI interrupt Error: %d\n",
2277 err);
2278 adapter->have_msi = false;
2279 }
2280
2281 if (!adapter->have_msi)
2282 flags |= IRQF_SHARED;
2283 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2284 netdev->name, netdev);
2285 if (err) {
2286 if (netif_msg_ifup(adapter))
2287 dev_err(&pdev->dev,
2288 "Unable to allocate interrupt Error: %d\n",
2289 err);
2290 if (adapter->have_msi)
2291 pci_disable_msi(adapter->pdev);
2292 return err;
2293 }
2294 if (netif_msg_ifup(adapter))
2295 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2296 return err;
2297 }
2298
2299
2300 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)
2301 {
2302
2303 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2304 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2305 atl1c_clean_rx_ring(adapter);
2306 }
2307
2308 static int atl1c_up(struct atl1c_adapter *adapter)
2309 {
2310 struct net_device *netdev = adapter->netdev;
2311 int err;
2312
2313 netif_carrier_off(netdev);
2314
2315 err = atl1c_configure(adapter);
2316 if (unlikely(err))
2317 goto err_up;
2318
2319 err = atl1c_request_irq(adapter);
2320 if (unlikely(err))
2321 goto err_up;
2322
2323 atl1c_check_link_status(adapter);
2324 clear_bit(__AT_DOWN, &adapter->flags);
2325 napi_enable(&adapter->napi);
2326 atl1c_irq_enable(adapter);
2327 netif_start_queue(netdev);
2328 return err;
2329
2330 err_up:
2331 atl1c_clean_rx_ring(adapter);
2332 return err;
2333 }
2334
2335 static void atl1c_down(struct atl1c_adapter *adapter)
2336 {
2337 struct net_device *netdev = adapter->netdev;
2338
2339 atl1c_del_timer(adapter);
2340 adapter->work_event = 0;
2341
2342
2343 set_bit(__AT_DOWN, &adapter->flags);
2344 netif_carrier_off(netdev);
2345 napi_disable(&adapter->napi);
2346 atl1c_irq_disable(adapter);
2347 atl1c_free_irq(adapter);
2348
2349 atl1c_disable_l0s_l1(&adapter->hw);
2350
2351 atl1c_reset_mac(&adapter->hw);
2352 msleep(1);
2353
2354 adapter->link_speed = SPEED_0;
2355 adapter->link_duplex = -1;
2356 atl1c_reset_dma_ring(adapter);
2357 }
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371 static int atl1c_open(struct net_device *netdev)
2372 {
2373 struct atl1c_adapter *adapter = netdev_priv(netdev);
2374 int err;
2375
2376
2377 if (test_bit(__AT_TESTING, &adapter->flags))
2378 return -EBUSY;
2379
2380
2381 err = atl1c_setup_ring_resources(adapter);
2382 if (unlikely(err))
2383 return err;
2384
2385 err = atl1c_up(adapter);
2386 if (unlikely(err))
2387 goto err_up;
2388
2389 return 0;
2390
2391 err_up:
2392 atl1c_free_irq(adapter);
2393 atl1c_free_ring_resources(adapter);
2394 atl1c_reset_mac(&adapter->hw);
2395 return err;
2396 }
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409 static int atl1c_close(struct net_device *netdev)
2410 {
2411 struct atl1c_adapter *adapter = netdev_priv(netdev);
2412
2413 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2414 set_bit(__AT_DOWN, &adapter->flags);
2415 cancel_work_sync(&adapter->common_task);
2416 atl1c_down(adapter);
2417 atl1c_free_ring_resources(adapter);
2418 return 0;
2419 }
2420
2421 static int atl1c_suspend(struct device *dev)
2422 {
2423 struct net_device *netdev = dev_get_drvdata(dev);
2424 struct atl1c_adapter *adapter = netdev_priv(netdev);
2425 struct atl1c_hw *hw = &adapter->hw;
2426 u32 wufc = adapter->wol;
2427
2428 atl1c_disable_l0s_l1(hw);
2429 if (netif_running(netdev)) {
2430 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2431 atl1c_down(adapter);
2432 }
2433 netif_device_detach(netdev);
2434
2435 if (wufc)
2436 if (atl1c_phy_to_ps_link(hw) != 0)
2437 dev_dbg(dev, "phy power saving failed");
2438
2439 atl1c_power_saving(hw, wufc);
2440
2441 return 0;
2442 }
2443
2444 #ifdef CONFIG_PM_SLEEP
2445 static int atl1c_resume(struct device *dev)
2446 {
2447 struct net_device *netdev = dev_get_drvdata(dev);
2448 struct atl1c_adapter *adapter = netdev_priv(netdev);
2449
2450 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2451 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
2452
2453 atl1c_phy_reset(&adapter->hw);
2454 atl1c_reset_mac(&adapter->hw);
2455 atl1c_phy_init(&adapter->hw);
2456
2457 #if 0
2458 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2459 pm_data &= ~PM_CTRLSTAT_PME_EN;
2460 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2461 #endif
2462
2463 netif_device_attach(netdev);
2464 if (netif_running(netdev))
2465 atl1c_up(adapter);
2466
2467 return 0;
2468 }
2469 #endif
2470
2471 static void atl1c_shutdown(struct pci_dev *pdev)
2472 {
2473 struct net_device *netdev = pci_get_drvdata(pdev);
2474 struct atl1c_adapter *adapter = netdev_priv(netdev);
2475
2476 atl1c_suspend(&pdev->dev);
2477 pci_wake_from_d3(pdev, adapter->wol);
2478 pci_set_power_state(pdev, PCI_D3hot);
2479 }
2480
2481 static const struct net_device_ops atl1c_netdev_ops = {
2482 .ndo_open = atl1c_open,
2483 .ndo_stop = atl1c_close,
2484 .ndo_validate_addr = eth_validate_addr,
2485 .ndo_start_xmit = atl1c_xmit_frame,
2486 .ndo_set_mac_address = atl1c_set_mac_addr,
2487 .ndo_set_rx_mode = atl1c_set_multi,
2488 .ndo_change_mtu = atl1c_change_mtu,
2489 .ndo_fix_features = atl1c_fix_features,
2490 .ndo_set_features = atl1c_set_features,
2491 .ndo_do_ioctl = atl1c_ioctl,
2492 .ndo_tx_timeout = atl1c_tx_timeout,
2493 .ndo_get_stats = atl1c_get_stats,
2494 #ifdef CONFIG_NET_POLL_CONTROLLER
2495 .ndo_poll_controller = atl1c_netpoll,
2496 #endif
2497 };
2498
2499 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2500 {
2501 SET_NETDEV_DEV(netdev, &pdev->dev);
2502 pci_set_drvdata(pdev, netdev);
2503
2504 netdev->netdev_ops = &atl1c_netdev_ops;
2505 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2506 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
2507 atl1c_set_ethtool_ops(netdev);
2508
2509
2510 netdev->hw_features = NETIF_F_SG |
2511 NETIF_F_HW_CSUM |
2512 NETIF_F_HW_VLAN_CTAG_RX |
2513 NETIF_F_TSO |
2514 NETIF_F_TSO6;
2515 netdev->features = netdev->hw_features |
2516 NETIF_F_HW_VLAN_CTAG_TX;
2517 return 0;
2518 }
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531 static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2532 {
2533 struct net_device *netdev;
2534 struct atl1c_adapter *adapter;
2535 static int cards_found;
2536
2537 int err = 0;
2538
2539
2540 err = pci_enable_device_mem(pdev);
2541 if (err) {
2542 dev_err(&pdev->dev, "cannot enable PCI device\n");
2543 return err;
2544 }
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2557 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2558 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2559 goto err_dma;
2560 }
2561
2562 err = pci_request_regions(pdev, atl1c_driver_name);
2563 if (err) {
2564 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2565 goto err_pci_reg;
2566 }
2567
2568 pci_set_master(pdev);
2569
2570 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2571 if (netdev == NULL) {
2572 err = -ENOMEM;
2573 goto err_alloc_etherdev;
2574 }
2575
2576 err = atl1c_init_netdev(netdev, pdev);
2577 if (err) {
2578 dev_err(&pdev->dev, "init netdevice failed\n");
2579 goto err_init_netdev;
2580 }
2581 adapter = netdev_priv(netdev);
2582 adapter->bd_number = cards_found;
2583 adapter->netdev = netdev;
2584 adapter->pdev = pdev;
2585 adapter->hw.adapter = adapter;
2586 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2587 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2588 if (!adapter->hw.hw_addr) {
2589 err = -EIO;
2590 dev_err(&pdev->dev, "cannot map device registers\n");
2591 goto err_ioremap;
2592 }
2593
2594
2595 adapter->mii.dev = netdev;
2596 adapter->mii.mdio_read = atl1c_mdio_read;
2597 adapter->mii.mdio_write = atl1c_mdio_write;
2598 adapter->mii.phy_id_mask = 0x1f;
2599 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
2600 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2601 timer_setup(&adapter->phy_config_timer, atl1c_phy_config, 0);
2602
2603 err = atl1c_sw_init(adapter);
2604 if (err) {
2605 dev_err(&pdev->dev, "net device private data init failed\n");
2606 goto err_sw_init;
2607 }
2608
2609 atl1c_set_max_mtu(netdev);
2610
2611 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
2612
2613
2614 atl1c_phy_reset(&adapter->hw);
2615
2616 err = atl1c_reset_mac(&adapter->hw);
2617 if (err) {
2618 err = -EIO;
2619 goto err_reset;
2620 }
2621
2622
2623
2624 err = atl1c_phy_init(&adapter->hw);
2625 if (err) {
2626 err = -EIO;
2627 goto err_reset;
2628 }
2629 if (atl1c_read_mac_addr(&adapter->hw)) {
2630
2631 netdev->addr_assign_type = NET_ADDR_RANDOM;
2632 }
2633 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2634 if (netif_msg_probe(adapter))
2635 dev_dbg(&pdev->dev, "mac address : %pM\n",
2636 adapter->hw.mac_addr);
2637
2638 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
2639 INIT_WORK(&adapter->common_task, atl1c_common_task);
2640 adapter->work_event = 0;
2641 err = register_netdev(netdev);
2642 if (err) {
2643 dev_err(&pdev->dev, "register netdevice failed\n");
2644 goto err_register;
2645 }
2646
2647 if (netif_msg_probe(adapter))
2648 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2649 cards_found++;
2650 return 0;
2651
2652 err_reset:
2653 err_register:
2654 err_sw_init:
2655 iounmap(adapter->hw.hw_addr);
2656 err_init_netdev:
2657 err_ioremap:
2658 free_netdev(netdev);
2659 err_alloc_etherdev:
2660 pci_release_regions(pdev);
2661 err_pci_reg:
2662 err_dma:
2663 pci_disable_device(pdev);
2664 return err;
2665 }
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676 static void atl1c_remove(struct pci_dev *pdev)
2677 {
2678 struct net_device *netdev = pci_get_drvdata(pdev);
2679 struct atl1c_adapter *adapter = netdev_priv(netdev);
2680
2681 unregister_netdev(netdev);
2682
2683 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr);
2684 atl1c_phy_disable(&adapter->hw);
2685
2686 iounmap(adapter->hw.hw_addr);
2687
2688 pci_release_regions(pdev);
2689 pci_disable_device(pdev);
2690 free_netdev(netdev);
2691 }
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2702 pci_channel_state_t state)
2703 {
2704 struct net_device *netdev = pci_get_drvdata(pdev);
2705 struct atl1c_adapter *adapter = netdev_priv(netdev);
2706
2707 netif_device_detach(netdev);
2708
2709 if (state == pci_channel_io_perm_failure)
2710 return PCI_ERS_RESULT_DISCONNECT;
2711
2712 if (netif_running(netdev))
2713 atl1c_down(adapter);
2714
2715 pci_disable_device(pdev);
2716
2717
2718 return PCI_ERS_RESULT_NEED_RESET;
2719 }
2720
2721
2722
2723
2724
2725
2726
2727
2728 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2729 {
2730 struct net_device *netdev = pci_get_drvdata(pdev);
2731 struct atl1c_adapter *adapter = netdev_priv(netdev);
2732
2733 if (pci_enable_device(pdev)) {
2734 if (netif_msg_hw(adapter))
2735 dev_err(&pdev->dev,
2736 "Cannot re-enable PCI device after reset\n");
2737 return PCI_ERS_RESULT_DISCONNECT;
2738 }
2739 pci_set_master(pdev);
2740
2741 pci_enable_wake(pdev, PCI_D3hot, 0);
2742 pci_enable_wake(pdev, PCI_D3cold, 0);
2743
2744 atl1c_reset_mac(&adapter->hw);
2745
2746 return PCI_ERS_RESULT_RECOVERED;
2747 }
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757 static void atl1c_io_resume(struct pci_dev *pdev)
2758 {
2759 struct net_device *netdev = pci_get_drvdata(pdev);
2760 struct atl1c_adapter *adapter = netdev_priv(netdev);
2761
2762 if (netif_running(netdev)) {
2763 if (atl1c_up(adapter)) {
2764 if (netif_msg_hw(adapter))
2765 dev_err(&pdev->dev,
2766 "Cannot bring device back up after reset\n");
2767 return;
2768 }
2769 }
2770
2771 netif_device_attach(netdev);
2772 }
2773
2774 static const struct pci_error_handlers atl1c_err_handler = {
2775 .error_detected = atl1c_io_error_detected,
2776 .slot_reset = atl1c_io_slot_reset,
2777 .resume = atl1c_io_resume,
2778 };
2779
2780 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2781
2782 static struct pci_driver atl1c_driver = {
2783 .name = atl1c_driver_name,
2784 .id_table = atl1c_pci_tbl,
2785 .probe = atl1c_probe,
2786 .remove = atl1c_remove,
2787 .shutdown = atl1c_shutdown,
2788 .err_handler = &atl1c_err_handler,
2789 .driver.pm = &atl1c_pm_ops,
2790 };
2791
2792 module_pci_driver(atl1c_driver);