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35 #ifndef _ALX_H_
36 #define _ALX_H_
37
38 #include <linux/types.h>
39 #include <linux/etherdevice.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/spinlock.h>
42 #include "hw.h"
43
44 #define ALX_WATCHDOG_TIME (5 * HZ)
45
46 struct alx_buffer {
47 struct sk_buff *skb;
48 DEFINE_DMA_UNMAP_ADDR(dma);
49 DEFINE_DMA_UNMAP_LEN(size);
50 };
51
52 struct alx_rx_queue {
53 struct net_device *netdev;
54 struct device *dev;
55 struct alx_napi *np;
56
57 struct alx_rrd *rrd;
58 dma_addr_t rrd_dma;
59
60 struct alx_rfd *rfd;
61 dma_addr_t rfd_dma;
62
63 struct alx_buffer *bufs;
64
65 u16 count;
66 u16 write_idx, read_idx;
67 u16 rrd_read_idx;
68 u16 queue_idx;
69 };
70 #define ALX_RX_ALLOC_THRESH 32
71
72 struct alx_tx_queue {
73 struct net_device *netdev;
74 struct device *dev;
75
76 struct alx_txd *tpd;
77 dma_addr_t tpd_dma;
78
79 struct alx_buffer *bufs;
80
81 u16 count;
82 u16 write_idx, read_idx;
83 u16 queue_idx;
84 u16 p_reg, c_reg;
85 };
86
87 #define ALX_DEFAULT_TX_WORK 128
88
89 enum alx_device_quirks {
90 ALX_DEV_QUIRK_MSI_INTX_DISABLE_BUG = BIT(0),
91 };
92
93 struct alx_napi {
94 struct napi_struct napi;
95 struct alx_priv *alx;
96 struct alx_rx_queue *rxq;
97 struct alx_tx_queue *txq;
98 int vec_idx;
99 u32 vec_mask;
100 char irq_lbl[IFNAMSIZ + 8];
101 };
102
103 #define ALX_MAX_NAPIS 8
104
105 struct alx_priv {
106 struct net_device *dev;
107
108 struct alx_hw hw;
109
110
111 int num_vec;
112
113
114 struct {
115 dma_addr_t dma;
116 void *virt;
117 unsigned int size;
118 } descmem;
119
120 struct alx_napi *qnapi[ALX_MAX_NAPIS];
121 int num_txq;
122 int num_rxq;
123 int num_napi;
124
125
126 spinlock_t irq_lock;
127 u32 int_mask;
128
129 unsigned int tx_ringsz;
130 unsigned int rx_ringsz;
131 unsigned int rxbuf_size;
132
133 struct work_struct link_check_wk;
134 struct work_struct reset_wk;
135
136 u16 msg_enable;
137
138
139 spinlock_t stats_lock;
140 };
141
142 extern const struct ethtool_ops alx_ethtool_ops;
143
144 #endif