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10 #ifndef __XGENE_ENET_V2_ENET_H__
11 #define __XGENE_ENET_V2_ENET_H__
12
13 #define ENET_CLKEN 0xc008
14 #define ENET_SRST 0xc000
15 #define ENET_SHIM 0xc010
16 #define CFG_MEM_RAM_SHUTDOWN 0xd070
17 #define BLOCK_MEM_RDY 0xd074
18
19 #define MEM_RDY 0xffffffff
20 #define DEVM_ARAUX_COH BIT(19)
21 #define DEVM_AWAUX_COH BIT(3)
22
23 #define CFG_FORCE_LINK_STATUS_EN 0x229c
24 #define FORCE_LINK_STATUS 0x22a0
25 #define CFG_LINK_AGGR_RESUME 0x27c8
26 #define RX_DV_GATE_REG 0x2dfc
27
28 void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val);
29 u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset);
30 int xge_port_reset(struct net_device *ndev);
31 void xge_port_init(struct net_device *ndev);
32
33 #endif