drivers/net/can/c_can/c

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This source file includes following definitions.
c_can_pm_runtime_enable
c_can_pm_runtime_disable
c_can_pm_runtime_get_sync
c_can_pm_runtime_put_sync
c_can_reset_ram
c_can_irq_control
c_can_obj_update
c_can_object_get
c_can_object_put
c_can_inval_tx_object
c_can_inval_msg_object
c_can_setup_tx_object
c_can_activate_all_lower_rx_msg_obj
c_can_handle_lost_msg_obj
c_can_read_msg_object
c_can_setup_receive_object
c_can_start_xmit
c_can_wait_for_ctrl_init
c_can_set_bittiming
c_can_configure_msg_objects
c_can_software_reset
c_can_chip_config
c_can_start
c_can_stop
c_can_set_mode
__c_can_get_berr_counter
c_can_get_berr_counter
c_can_do_tx
c_can_adjust_pending
c_can_rx_object_get
c_can_rx_finalize
c_can_read_objects
c_can_get_pending
c_can_do_rx_poll
c_can_handle_state_change
c_can_handle_bus_err
c_can_poll
c_can_isr
c_can_open
c_can_close
alloc_c_can_dev
c_can_power_down
c_can_power_up
free_c_can_dev
register_c_can_dev
unregister_c_can_dev
   1 /*
   2  * CAN bus driver for Bosch C_CAN controller
   3  *
   4  * Copyright (C) 2010 ST Microelectronics
   5  * Bhupesh Sharma <bhupesh.sharma@st.com>
   6  *
   7  * Borrowed heavily from the C_CAN driver originally written by:
   8  * Copyright (C) 2007
   9  * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
  10  * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
  11  *
  12  * TX and RX NAPI implementation has been borrowed from at91 CAN driver
  13  * written by:
  14  * Copyright
  15  * (C) 2007 by Hans J. Koch <hjk@hansjkoch.de>
  16  * (C) 2008, 2009 by Marc Kleine-Budde <kernel@pengutronix.de>
  17  *
  18  * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
  19  * Bosch C_CAN user manual can be obtained from:
  20  * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
  21  * users_manual_c_can.pdf
  22  *
  23  * This file is licensed under the terms of the GNU General Public
  24  * License version 2. This program is licensed "as is" without any
  25  * warranty of any kind, whether express or implied.
  26  */
  27 
  28 #include <linux/kernel.h>
  29 #include <linux/module.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/delay.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/if_arp.h>
  34 #include <linux/if_ether.h>
  35 #include <linux/list.h>
  36 #include <linux/io.h>
  37 #include <linux/pm_runtime.h>
  38 #include <linux/pinctrl/consumer.h>
  39 
  40 #include <linux/can.h>
  41 #include <linux/can/dev.h>
  42 #include <linux/can/error.h>
  43 #include <linux/can/led.h>
  44 
  45 #include "c_can.h"
  46 
  47 /* Number of interface registers */
  48 #define IF_ENUM_REG_LEN         11
  49 #define C_CAN_IFACE(reg, iface) (C_CAN_IF1_##reg + (iface) * IF_ENUM_REG_LEN)
  50 
  51 /* control extension register D_CAN specific */
  52 #define CONTROL_EX_PDR          BIT(8)
  53 
  54 /* control register */
  55 #define CONTROL_SWR             BIT(15)
  56 #define CONTROL_TEST            BIT(7)
  57 #define CONTROL_CCE             BIT(6)
  58 #define CONTROL_DISABLE_AR      BIT(5)
  59 #define CONTROL_ENABLE_AR       (0 << 5)
  60 #define CONTROL_EIE             BIT(3)
  61 #define CONTROL_SIE             BIT(2)
  62 #define CONTROL_IE              BIT(1)
  63 #define CONTROL_INIT            BIT(0)
  64 
  65 #define CONTROL_IRQMSK          (CONTROL_EIE | CONTROL_IE | CONTROL_SIE)
  66 
  67 /* test register */
  68 #define TEST_RX                 BIT(7)
  69 #define TEST_TX1                BIT(6)
  70 #define TEST_TX2                BIT(5)
  71 #define TEST_LBACK              BIT(4)
  72 #define TEST_SILENT             BIT(3)
  73 #define TEST_BASIC              BIT(2)
  74 
  75 /* status register */
  76 #define STATUS_PDA              BIT(10)
  77 #define STATUS_BOFF             BIT(7)
  78 #define STATUS_EWARN            BIT(6)
  79 #define STATUS_EPASS            BIT(5)
  80 #define STATUS_RXOK             BIT(4)
  81 #define STATUS_TXOK             BIT(3)
  82 
  83 /* error counter register */
  84 #define ERR_CNT_TEC_MASK        0xff
  85 #define ERR_CNT_TEC_SHIFT       0
  86 #define ERR_CNT_REC_SHIFT       8
  87 #define ERR_CNT_REC_MASK        (0x7f << ERR_CNT_REC_SHIFT)
  88 #define ERR_CNT_RP_SHIFT        15
  89 #define ERR_CNT_RP_MASK         (0x1 << ERR_CNT_RP_SHIFT)
  90 
  91 /* bit-timing register */
  92 #define BTR_BRP_MASK            0x3f
  93 #define BTR_BRP_SHIFT           0
  94 #define BTR_SJW_SHIFT           6
  95 #define BTR_SJW_MASK            (0x3 << BTR_SJW_SHIFT)
  96 #define BTR_TSEG1_SHIFT         8
  97 #define BTR_TSEG1_MASK          (0xf << BTR_TSEG1_SHIFT)
  98 #define BTR_TSEG2_SHIFT         12
  99 #define BTR_TSEG2_MASK          (0x7 << BTR_TSEG2_SHIFT)
 100 
 101 /* interrupt register */
 102 #define INT_STS_PENDING         0x8000
 103 
 104 /* brp extension register */
 105 #define BRP_EXT_BRPE_MASK       0x0f
 106 #define BRP_EXT_BRPE_SHIFT      0
 107 
 108 /* IFx command request */
 109 #define IF_COMR_BUSY            BIT(15)
 110 
 111 /* IFx command mask */
 112 #define IF_COMM_WR              BIT(7)
 113 #define IF_COMM_MASK            BIT(6)
 114 #define IF_COMM_ARB             BIT(5)
 115 #define IF_COMM_CONTROL         BIT(4)
 116 #define IF_COMM_CLR_INT_PND     BIT(3)
 117 #define IF_COMM_TXRQST          BIT(2)
 118 #define IF_COMM_CLR_NEWDAT      IF_COMM_TXRQST
 119 #define IF_COMM_DATAA           BIT(1)
 120 #define IF_COMM_DATAB           BIT(0)
 121 
 122 /* TX buffer setup */
 123 #define IF_COMM_TX              (IF_COMM_ARB | IF_COMM_CONTROL | \
 124                                  IF_COMM_TXRQST |                \
 125                                  IF_COMM_DATAA | IF_COMM_DATAB)
 126 
 127 /* For the low buffers we clear the interrupt bit, but keep newdat */
 128 #define IF_COMM_RCV_LOW         (IF_COMM_MASK | IF_COMM_ARB | \
 129                                  IF_COMM_CONTROL | IF_COMM_CLR_INT_PND | \
 130                                  IF_COMM_DATAA | IF_COMM_DATAB)
 131 
 132 /* For the high buffers we clear the interrupt bit and newdat */
 133 #define IF_COMM_RCV_HIGH        (IF_COMM_RCV_LOW | IF_COMM_CLR_NEWDAT)
 134 
 135 
 136 /* Receive setup of message objects */
 137 #define IF_COMM_RCV_SETUP       (IF_COMM_MASK | IF_COMM_ARB | IF_COMM_CONTROL)
 138 
 139 /* Invalidation of message objects */
 140 #define IF_COMM_INVAL           (IF_COMM_ARB | IF_COMM_CONTROL)
 141 
 142 /* IFx arbitration */
 143 #define IF_ARB_MSGVAL           BIT(31)
 144 #define IF_ARB_MSGXTD           BIT(30)
 145 #define IF_ARB_TRANSMIT         BIT(29)
 146 
 147 /* IFx message control */
 148 #define IF_MCONT_NEWDAT         BIT(15)
 149 #define IF_MCONT_MSGLST         BIT(14)
 150 #define IF_MCONT_INTPND         BIT(13)
 151 #define IF_MCONT_UMASK          BIT(12)
 152 #define IF_MCONT_TXIE           BIT(11)
 153 #define IF_MCONT_RXIE           BIT(10)
 154 #define IF_MCONT_RMTEN          BIT(9)
 155 #define IF_MCONT_TXRQST         BIT(8)
 156 #define IF_MCONT_EOB            BIT(7)
 157 #define IF_MCONT_DLC_MASK       0xf
 158 
 159 #define IF_MCONT_RCV            (IF_MCONT_RXIE | IF_MCONT_UMASK)
 160 #define IF_MCONT_RCV_EOB        (IF_MCONT_RCV | IF_MCONT_EOB)
 161 
 162 #define IF_MCONT_TX             (IF_MCONT_TXIE | IF_MCONT_EOB)
 163 
 164 /*
 165  * Use IF1 for RX and IF2 for TX
 166  */
 167 #define IF_RX                   0
 168 #define IF_TX                   1
 169 
 170 /* minimum timeout for checking BUSY status */
 171 #define MIN_TIMEOUT_VALUE       6
 172 
 173 /* Wait for ~1 sec for INIT bit */
 174 #define INIT_WAIT_MS            1000
 175 
 176 /* napi related */
 177 #define C_CAN_NAPI_WEIGHT       C_CAN_MSG_OBJ_RX_NUM
 178 
 179 /* c_can lec values */
 180 enum c_can_lec_type {
 181         LEC_NO_ERROR = 0,
 182         LEC_STUFF_ERROR,
 183         LEC_FORM_ERROR,
 184         LEC_ACK_ERROR,
 185         LEC_BIT1_ERROR,
 186         LEC_BIT0_ERROR,
 187         LEC_CRC_ERROR,
 188         LEC_UNUSED,
 189         LEC_MASK = LEC_UNUSED,
 190 };
 191 
 192 /*
 193  * c_can error types:
 194  * Bus errors (BUS_OFF, ERROR_WARNING, ERROR_PASSIVE) are supported
 195  */
 196 enum c_can_bus_error_types {
 197         C_CAN_NO_ERROR = 0,
 198         C_CAN_BUS_OFF,
 199         C_CAN_ERROR_WARNING,
 200         C_CAN_ERROR_PASSIVE,
 201 };
 202 
 203 static const struct can_bittiming_const c_can_bittiming_const = {
 204         .name = KBUILD_MODNAME,
 205         .tseg1_min = 2,         /* Time segment 1 = prop_seg + phase_seg1 */
 206         .tseg1_max = 16,
 207         .tseg2_min = 1,         /* Time segment 2 = phase_seg2 */
 208         .tseg2_max = 8,
 209         .sjw_max = 4,
 210         .brp_min = 1,
 211         .brp_max = 1024,        /* 6-bit BRP field + 4-bit BRPE field*/
 212         .brp_inc = 1,
 213 };
 214 
 215 static inline void c_can_pm_runtime_enable(const struct c_can_priv *priv)
 216 {
 217         if (priv->device)
 218                 pm_runtime_enable(priv->device);
 219 }
 220 
 221 static inline void c_can_pm_runtime_disable(const struct c_can_priv *priv)
 222 {
 223         if (priv->device)
 224                 pm_runtime_disable(priv->device);
 225 }
 226 
 227 static inline void c_can_pm_runtime_get_sync(const struct c_can_priv *priv)
 228 {
 229         if (priv->device)
 230                 pm_runtime_get_sync(priv->device);
 231 }
 232 
 233 static inline void c_can_pm_runtime_put_sync(const struct c_can_priv *priv)
 234 {
 235         if (priv->device)
 236                 pm_runtime_put_sync(priv->device);
 237 }
 238 
 239 static inline void c_can_reset_ram(const struct c_can_priv *priv, bool enable)
 240 {
 241         if (priv->raminit)
 242                 priv->raminit(priv, enable);
 243 }
 244 
 245 static void c_can_irq_control(struct c_can_priv *priv, bool enable)
 246 {
 247         u32 ctrl = priv->read_reg(priv, C_CAN_CTRL_REG) & ~CONTROL_IRQMSK;
 248 
 249         if (enable)
 250                 ctrl |= CONTROL_IRQMSK;
 251 
 252         priv->write_reg(priv, C_CAN_CTRL_REG, ctrl);
 253 }
 254 
 255 static void c_can_obj_update(struct net_device *dev, int iface, u32 cmd, u32 obj)
 256 {
 257         struct c_can_priv *priv = netdev_priv(dev);
 258         int cnt, reg = C_CAN_IFACE(COMREQ_REG, iface);
 259 
 260         priv->write_reg32(priv, reg, (cmd << 16) | obj);
 261 
 262         for (cnt = MIN_TIMEOUT_VALUE; cnt; cnt--) {
 263                 if (!(priv->read_reg(priv, reg) & IF_COMR_BUSY))
 264                         return;
 265                 udelay(1);
 266         }
 267         netdev_err(dev, "Updating object timed out\n");
 268 
 269 }
 270 
 271 static inline void c_can_object_get(struct net_device *dev, int iface,
 272                                     u32 obj, u32 cmd)
 273 {
 274         c_can_obj_update(dev, iface, cmd, obj);
 275 }
 276 
 277 static inline void c_can_object_put(struct net_device *dev, int iface,
 278                                     u32 obj, u32 cmd)
 279 {
 280         c_can_obj_update(dev, iface, cmd | IF_COMM_WR, obj);
 281 }
 282 
 283 /*
 284  * Note: According to documentation clearing TXIE while MSGVAL is set
 285  * is not allowed, but works nicely on C/DCAN. And that lowers the I/O
 286  * load significantly.
 287  */
 288 static void c_can_inval_tx_object(struct net_device *dev, int iface, int obj)
 289 {
 290         struct c_can_priv *priv = netdev_priv(dev);
 291 
 292         priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), 0);
 293         c_can_object_put(dev, iface, obj, IF_COMM_INVAL);
 294 }
 295 
 296 static void c_can_inval_msg_object(struct net_device *dev, int iface, int obj)
 297 {
 298         struct c_can_priv *priv = netdev_priv(dev);
 299 
 300         priv->write_reg(priv, C_CAN_IFACE(ARB1_REG, iface), 0);
 301         priv->write_reg(priv, C_CAN_IFACE(ARB2_REG, iface), 0);
 302         c_can_inval_tx_object(dev, iface, obj);
 303 }
 304 
 305 static void c_can_setup_tx_object(struct net_device *dev, int iface,
 306                                   struct can_frame *frame, int idx)
 307 {
 308         struct c_can_priv *priv = netdev_priv(dev);
 309         u16 ctrl = IF_MCONT_TX | frame->can_dlc;
 310         bool rtr = frame->can_id & CAN_RTR_FLAG;
 311         u32 arb = IF_ARB_MSGVAL;
 312         int i;
 313 
 314         if (frame->can_id & CAN_EFF_FLAG) {
 315                 arb |= frame->can_id & CAN_EFF_MASK;
 316                 arb |= IF_ARB_MSGXTD;
 317         } else {
 318                 arb |= (frame->can_id & CAN_SFF_MASK) << 18;
 319         }
 320 
 321         if (!rtr)
 322                 arb |= IF_ARB_TRANSMIT;
 323 
 324         /*
 325          * If we change the DIR bit, we need to invalidate the buffer
 326          * first, i.e. clear the MSGVAL flag in the arbiter.
 327          */
 328         if (rtr != (bool)test_bit(idx, &priv->tx_dir)) {
 329                 u32 obj = idx + C_CAN_MSG_OBJ_TX_FIRST;
 330 
 331                 c_can_inval_msg_object(dev, iface, obj);
 332                 change_bit(idx, &priv->tx_dir);
 333         }
 334 
 335         priv->write_reg32(priv, C_CAN_IFACE(ARB1_REG, iface), arb);
 336 
 337         priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl);
 338 
 339         if (priv->type == BOSCH_D_CAN) {
 340                 u32 data = 0, dreg = C_CAN_IFACE(DATA1_REG, iface);
 341 
 342                 for (i = 0; i < frame->can_dlc; i += 4, dreg += 2) {
 343                         data = (u32)frame->data[i];
 344                         data |= (u32)frame->data[i + 1] << 8;
 345                         data |= (u32)frame->data[i + 2] << 16;
 346                         data |= (u32)frame->data[i + 3] << 24;
 347                         priv->write_reg32(priv, dreg, data);
 348                 }
 349         } else {
 350                 for (i = 0; i < frame->can_dlc; i += 2) {
 351                         priv->write_reg(priv,
 352                                         C_CAN_IFACE(DATA1_REG, iface) + i / 2,
 353                                         frame->data[i] |
 354                                         (frame->data[i + 1] << 8));
 355                 }
 356         }
 357 }
 358 
 359 static inline void c_can_activate_all_lower_rx_msg_obj(struct net_device *dev,
 360                                                        int iface)
 361 {
 362         int i;
 363 
 364         for (i = C_CAN_MSG_OBJ_RX_FIRST; i <= C_CAN_MSG_RX_LOW_LAST; i++)
 365                 c_can_object_get(dev, iface, i, IF_COMM_CLR_NEWDAT);
 366 }
 367 
 368 static int c_can_handle_lost_msg_obj(struct net_device *dev,
 369                                      int iface, int objno, u32 ctrl)
 370 {
 371         struct net_device_stats *stats = &dev->stats;
 372         struct c_can_priv *priv = netdev_priv(dev);
 373         struct can_frame *frame;
 374         struct sk_buff *skb;
 375 
 376         ctrl &= ~(IF_MCONT_MSGLST | IF_MCONT_INTPND | IF_MCONT_NEWDAT);
 377         priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl);
 378         c_can_object_put(dev, iface, objno, IF_COMM_CONTROL);
 379 
 380         stats->rx_errors++;
 381         stats->rx_over_errors++;
 382 
 383         /* create an error msg */
 384         skb = alloc_can_err_skb(dev, &frame);
 385         if (unlikely(!skb))
 386                 return 0;
 387 
 388         frame->can_id |= CAN_ERR_CRTL;
 389         frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
 390 
 391         netif_receive_skb(skb);
 392         return 1;
 393 }
 394 
 395 static int c_can_read_msg_object(struct net_device *dev, int iface, u32 ctrl)
 396 {
 397         struct net_device_stats *stats = &dev->stats;
 398         struct c_can_priv *priv = netdev_priv(dev);
 399         struct can_frame *frame;
 400         struct sk_buff *skb;
 401         u32 arb, data;
 402 
 403         skb = alloc_can_skb(dev, &frame);
 404         if (!skb) {
 405                 stats->rx_dropped++;
 406                 return -ENOMEM;
 407         }
 408 
 409         frame->can_dlc = get_can_dlc(ctrl & 0x0F);
 410 
 411         arb = priv->read_reg32(priv, C_CAN_IFACE(ARB1_REG, iface));
 412 
 413         if (arb & IF_ARB_MSGXTD)
 414                 frame->can_id = (arb & CAN_EFF_MASK) | CAN_EFF_FLAG;
 415         else
 416                 frame->can_id = (arb >> 18) & CAN_SFF_MASK;
 417 
 418         if (arb & IF_ARB_TRANSMIT) {
 419                 frame->can_id |= CAN_RTR_FLAG;
 420         } else {
 421                 int i, dreg = C_CAN_IFACE(DATA1_REG, iface);
 422 
 423                 if (priv->type == BOSCH_D_CAN) {
 424                         for (i = 0; i < frame->can_dlc; i += 4, dreg += 2) {
 425                                 data = priv->read_reg32(priv, dreg);
 426                                 frame->data[i] = data;
 427                                 frame->data[i + 1] = data >> 8;
 428                                 frame->data[i + 2] = data >> 16;
 429                                 frame->data[i + 3] = data >> 24;
 430                         }
 431                 } else {
 432                         for (i = 0; i < frame->can_dlc; i += 2, dreg++) {
 433                                 data = priv->read_reg(priv, dreg);
 434                                 frame->data[i] = data;
 435                                 frame->data[i + 1] = data >> 8;
 436                         }
 437                 }
 438         }
 439 
 440         stats->rx_packets++;
 441         stats->rx_bytes += frame->can_dlc;
 442 
 443         netif_receive_skb(skb);
 444         return 0;
 445 }
 446 
 447 static void c_can_setup_receive_object(struct net_device *dev, int iface,
 448                                        u32 obj, u32 mask, u32 id, u32 mcont)
 449 {
 450         struct c_can_priv *priv = netdev_priv(dev);
 451 
 452         mask |= BIT(29);
 453         priv->write_reg32(priv, C_CAN_IFACE(MASK1_REG, iface), mask);
 454 
 455         id |= IF_ARB_MSGVAL;
 456         priv->write_reg32(priv, C_CAN_IFACE(ARB1_REG, iface), id);
 457 
 458         priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), mcont);
 459         c_can_object_put(dev, iface, obj, IF_COMM_RCV_SETUP);
 460 }
 461 
 462 static netdev_tx_t c_can_start_xmit(struct sk_buff *skb,
 463                                     struct net_device *dev)
 464 {
 465         struct can_frame *frame = (struct can_frame *)skb->data;
 466         struct c_can_priv *priv = netdev_priv(dev);
 467         u32 idx, obj;
 468 
 469         if (can_dropped_invalid_skb(dev, skb))
 470                 return NETDEV_TX_OK;
 471         /*
 472          * This is not a FIFO. C/D_CAN sends out the buffers
 473          * prioritized. The lowest buffer number wins.
 474          */
 475         idx = fls(atomic_read(&priv->tx_active));
 476         obj = idx + C_CAN_MSG_OBJ_TX_FIRST;
 477 
 478         /* If this is the last buffer, stop the xmit queue */
 479         if (idx == C_CAN_MSG_OBJ_TX_NUM - 1)
 480                 netif_stop_queue(dev);
 481         /*
 482          * Store the message in the interface so we can call
 483          * can_put_echo_skb(). We must do this before we enable
 484          * transmit as we might race against do_tx().
 485          */
 486         c_can_setup_tx_object(dev, IF_TX, frame, idx);
 487         priv->dlc[idx] = frame->can_dlc;
 488         can_put_echo_skb(skb, dev, idx);
 489 
 490         /* Update the active bits */
 491         atomic_add((1 << idx), &priv->tx_active);
 492         /* Start transmission */
 493         c_can_object_put(dev, IF_TX, obj, IF_COMM_TX);
 494 
 495         return NETDEV_TX_OK;
 496 }
 497 
 498 static int c_can_wait_for_ctrl_init(struct net_device *dev,
 499                                     struct c_can_priv *priv, u32 init)
 500 {
 501         int retry = 0;
 502 
 503         while (init != (priv->read_reg(priv, C_CAN_CTRL_REG) & CONTROL_INIT)) {
 504                 udelay(10);
 505                 if (retry++ > 1000) {
 506                         netdev_err(dev, "CCTRL: set CONTROL_INIT failed\n");
 507                         return -EIO;
 508                 }
 509         }
 510         return 0;
 511 }
 512 
 513 static int c_can_set_bittiming(struct net_device *dev)
 514 {
 515         unsigned int reg_btr, reg_brpe, ctrl_save;
 516         u8 brp, brpe, sjw, tseg1, tseg2;
 517         u32 ten_bit_brp;
 518         struct c_can_priv *priv = netdev_priv(dev);
 519         const struct can_bittiming *bt = &priv->can.bittiming;
 520         int res;
 521 
 522         /* c_can provides a 6-bit brp and 4-bit brpe fields */
 523         ten_bit_brp = bt->brp - 1;
 524         brp = ten_bit_brp & BTR_BRP_MASK;
 525         brpe = ten_bit_brp >> 6;
 526 
 527         sjw = bt->sjw - 1;
 528         tseg1 = bt->prop_seg + bt->phase_seg1 - 1;
 529         tseg2 = bt->phase_seg2 - 1;
 530         reg_btr = brp | (sjw << BTR_SJW_SHIFT) | (tseg1 << BTR_TSEG1_SHIFT) |
 531                         (tseg2 << BTR_TSEG2_SHIFT);
 532         reg_brpe = brpe & BRP_EXT_BRPE_MASK;
 533 
 534         netdev_info(dev,
 535                 "setting BTR=%04x BRPE=%04x\n", reg_btr, reg_brpe);
 536 
 537         ctrl_save = priv->read_reg(priv, C_CAN_CTRL_REG);
 538         ctrl_save &= ~CONTROL_INIT;
 539         priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_CCE | CONTROL_INIT);
 540         res = c_can_wait_for_ctrl_init(dev, priv, CONTROL_INIT);
 541         if (res)
 542                 return res;
 543 
 544         priv->write_reg(priv, C_CAN_BTR_REG, reg_btr);
 545         priv->write_reg(priv, C_CAN_BRPEXT_REG, reg_brpe);
 546         priv->write_reg(priv, C_CAN_CTRL_REG, ctrl_save);
 547 
 548         return c_can_wait_for_ctrl_init(dev, priv, 0);
 549 }
 550 
 551 /*
 552  * Configure C_CAN message objects for Tx and Rx purposes:
 553  * C_CAN provides a total of 32 message objects that can be configured
 554  * either for Tx or Rx purposes. Here the first 16 message objects are used as
 555  * a reception FIFO. The end of reception FIFO is signified by the EoB bit
 556  * being SET. The remaining 16 message objects are kept aside for Tx purposes.
 557  * See user guide document for further details on configuring message
 558  * objects.
 559  */
 560 static void c_can_configure_msg_objects(struct net_device *dev)
 561 {
 562         int i;
 563 
 564         /* first invalidate all message objects */
 565         for (i = C_CAN_MSG_OBJ_RX_FIRST; i <= C_CAN_NO_OF_OBJECTS; i++)
 566                 c_can_inval_msg_object(dev, IF_RX, i);
 567 
 568         /* setup receive message objects */
 569         for (i = C_CAN_MSG_OBJ_RX_FIRST; i < C_CAN_MSG_OBJ_RX_LAST; i++)
 570                 c_can_setup_receive_object(dev, IF_RX, i, 0, 0, IF_MCONT_RCV);
 571 
 572         c_can_setup_receive_object(dev, IF_RX, C_CAN_MSG_OBJ_RX_LAST, 0, 0,
 573                                    IF_MCONT_RCV_EOB);
 574 }
 575 
 576 static int c_can_software_reset(struct net_device *dev)
 577 {
 578         struct c_can_priv *priv = netdev_priv(dev);
 579         int retry = 0;
 580 
 581         if (priv->type != BOSCH_D_CAN)
 582                 return 0;
 583 
 584         priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_SWR | CONTROL_INIT);
 585         while (priv->read_reg(priv, C_CAN_CTRL_REG) & CONTROL_SWR) {
 586                 msleep(20);
 587                 if (retry++ > 100) {
 588                         netdev_err(dev, "CCTRL: software reset failed\n");
 589                         return -EIO;
 590                 }
 591         }
 592 
 593         return 0;
 594 }
 595 
 596 /*
 597  * Configure C_CAN chip:
 598  * - enable/disable auto-retransmission
 599  * - set operating mode
 600  * - configure message objects
 601  */
 602 static int c_can_chip_config(struct net_device *dev)
 603 {
 604         struct c_can_priv *priv = netdev_priv(dev);
 605         int err;
 606 
 607         err = c_can_software_reset(dev);
 608         if (err)
 609                 return err;
 610 
 611         /* enable automatic retransmission */
 612         priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_ENABLE_AR);
 613 
 614         if ((priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) &&
 615             (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)) {
 616                 /* loopback + silent mode : useful for hot self-test */
 617                 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);
 618                 priv->write_reg(priv, C_CAN_TEST_REG, TEST_LBACK | TEST_SILENT);
 619         } else if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) {
 620                 /* loopback mode : useful for self-test function */
 621                 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);
 622                 priv->write_reg(priv, C_CAN_TEST_REG, TEST_LBACK);
 623         } else if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) {
 624                 /* silent mode : bus-monitoring mode */
 625                 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);
 626                 priv->write_reg(priv, C_CAN_TEST_REG, TEST_SILENT);
 627         }
 628 
 629         /* configure message objects */
 630         c_can_configure_msg_objects(dev);
 631 
 632         /* set a `lec` value so that we can check for updates later */
 633         priv->write_reg(priv, C_CAN_STS_REG, LEC_UNUSED);
 634 
 635         /* Clear all internal status */
 636         atomic_set(&priv->tx_active, 0);
 637         priv->rxmasked = 0;
 638         priv->tx_dir = 0;
 639 
 640         /* set bittiming params */
 641         return c_can_set_bittiming(dev);
 642 }
 643 
 644 static int c_can_start(struct net_device *dev)
 645 {
 646         struct c_can_priv *priv = netdev_priv(dev);
 647         int err;
 648         struct pinctrl *p;
 649 
 650         /* basic c_can configuration */
 651         err = c_can_chip_config(dev);
 652         if (err)
 653                 return err;
 654 
 655         /* Setup the command for new messages */
 656         priv->comm_rcv_high = priv->type != BOSCH_D_CAN ?
 657                 IF_COMM_RCV_LOW : IF_COMM_RCV_HIGH;
 658 
 659         priv->can.state = CAN_STATE_ERROR_ACTIVE;
 660 
 661         /* Attempt to use "active" if available else use "default" */
 662         p = pinctrl_get_select(priv->device, "active");
 663         if (!IS_ERR(p))
 664                 pinctrl_put(p);
 665         else
 666                 pinctrl_pm_select_default_state(priv->device);
 667 
 668         return 0;
 669 }
 670 
 671 static void c_can_stop(struct net_device *dev)
 672 {
 673         struct c_can_priv *priv = netdev_priv(dev);
 674 
 675         c_can_irq_control(priv, false);
 676 
 677         /* put ctrl to init on stop to end ongoing transmission */
 678         priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_INIT);
 679 
 680         /* deactivate pins */
 681         pinctrl_pm_select_sleep_state(dev->dev.parent);
 682         priv->can.state = CAN_STATE_STOPPED;
 683 }
 684 
 685 static int c_can_set_mode(struct net_device *dev, enum can_mode mode)
 686 {
 687         struct c_can_priv *priv = netdev_priv(dev);
 688         int err;
 689 
 690         switch (mode) {
 691         case CAN_MODE_START:
 692                 err = c_can_start(dev);
 693                 if (err)
 694                         return err;
 695                 netif_wake_queue(dev);
 696                 c_can_irq_control(priv, true);
 697                 break;
 698         default:
 699                 return -EOPNOTSUPP;
 700         }
 701 
 702         return 0;
 703 }
 704 
 705 static int __c_can_get_berr_counter(const struct net_device *dev,
 706                                     struct can_berr_counter *bec)
 707 {
 708         unsigned int reg_err_counter;
 709         struct c_can_priv *priv = netdev_priv(dev);
 710 
 711         reg_err_counter = priv->read_reg(priv, C_CAN_ERR_CNT_REG);
 712         bec->rxerr = (reg_err_counter & ERR_CNT_REC_MASK) >>
 713                                 ERR_CNT_REC_SHIFT;
 714         bec->txerr = reg_err_counter & ERR_CNT_TEC_MASK;
 715 
 716         return 0;
 717 }
 718 
 719 static int c_can_get_berr_counter(const struct net_device *dev,
 720                                   struct can_berr_counter *bec)
 721 {
 722         struct c_can_priv *priv = netdev_priv(dev);
 723         int err;
 724 
 725         c_can_pm_runtime_get_sync(priv);
 726         err = __c_can_get_berr_counter(dev, bec);
 727         c_can_pm_runtime_put_sync(priv);
 728 
 729         return err;
 730 }
 731 
 732 static void c_can_do_tx(struct net_device *dev)
 733 {
 734         struct c_can_priv *priv = netdev_priv(dev);
 735         struct net_device_stats *stats = &dev->stats;
 736         u32 idx, obj, pkts = 0, bytes = 0, pend, clr;
 737 
 738         clr = pend = priv->read_reg(priv, C_CAN_INTPND2_REG);
 739 
 740         while ((idx = ffs(pend))) {
 741                 idx--;
 742                 pend &= ~(1 << idx);
 743                 obj = idx + C_CAN_MSG_OBJ_TX_FIRST;
 744                 c_can_inval_tx_object(dev, IF_RX, obj);
 745                 can_get_echo_skb(dev, idx);
 746                 bytes += priv->dlc[idx];
 747                 pkts++;
 748         }
 749 
 750         /* Clear the bits in the tx_active mask */
 751         atomic_sub(clr, &priv->tx_active);
 752 
 753         if (clr & (1 << (C_CAN_MSG_OBJ_TX_NUM - 1)))
 754                 netif_wake_queue(dev);
 755 
 756         if (pkts) {
 757                 stats->tx_bytes += bytes;
 758                 stats->tx_packets += pkts;
 759                 can_led_event(dev, CAN_LED_EVENT_TX);
 760         }
 761 }
 762 
 763 /*
 764  * If we have a gap in the pending bits, that means we either
 765  * raced with the hardware or failed to readout all upper
 766  * objects in the last run due to quota limit.
 767  */
 768 static u32 c_can_adjust_pending(u32 pend)
 769 {
 770         u32 weight, lasts;
 771 
 772         if (pend == RECEIVE_OBJECT_BITS)
 773                 return pend;
 774 
 775         /*
 776          * If the last set bit is larger than the number of pending
 777          * bits we have a gap.
 778          */
 779         weight = hweight32(pend);
 780         lasts = fls(pend);
 781 
 782         /* If the bits are linear, nothing to do */
 783         if (lasts == weight)
 784                 return pend;
 785 
 786         /*
 787          * Find the first set bit after the gap. We walk backwards
 788          * from the last set bit.
 789          */
 790         for (lasts--; pend & (1 << (lasts - 1)); lasts--);
 791 
 792         return pend & ~((1 << lasts) - 1);
 793 }
 794 
 795 static inline void c_can_rx_object_get(struct net_device *dev,
 796                                        struct c_can_priv *priv, u32 obj)
 797 {
 798                 c_can_object_get(dev, IF_RX, obj, priv->comm_rcv_high);
 799 }
 800 
 801 static inline void c_can_rx_finalize(struct net_device *dev,
 802                                      struct c_can_priv *priv, u32 obj)
 803 {
 804         if (priv->type != BOSCH_D_CAN)
 805                 c_can_object_get(dev, IF_RX, obj, IF_COMM_CLR_NEWDAT);
 806 }
 807 
 808 static int c_can_read_objects(struct net_device *dev, struct c_can_priv *priv,
 809                               u32 pend, int quota)
 810 {
 811         u32 pkts = 0, ctrl, obj;
 812 
 813         while ((obj = ffs(pend)) && quota > 0) {
 814                 pend &= ~BIT(obj - 1);
 815 
 816                 c_can_rx_object_get(dev, priv, obj);
 817                 ctrl = priv->read_reg(priv, C_CAN_IFACE(MSGCTRL_REG, IF_RX));
 818 
 819                 if (ctrl & IF_MCONT_MSGLST) {
 820                         int n = c_can_handle_lost_msg_obj(dev, IF_RX, obj, ctrl);
 821 
 822                         pkts += n;
 823                         quota -= n;
 824                         continue;
 825                 }
 826 
 827                 /*
 828                  * This really should not happen, but this covers some
 829                  * odd HW behaviour. Do not remove that unless you
 830                  * want to brick your machine.
 831                  */
 832                 if (!(ctrl & IF_MCONT_NEWDAT))
 833                         continue;
 834 
 835                 /* read the data from the message object */
 836                 c_can_read_msg_object(dev, IF_RX, ctrl);
 837 
 838                 c_can_rx_finalize(dev, priv, obj);
 839 
 840                 pkts++;
 841                 quota--;
 842         }
 843 
 844         return pkts;
 845 }
 846 
 847 static inline u32 c_can_get_pending(struct c_can_priv *priv)
 848 {
 849         u32 pend = priv->read_reg(priv, C_CAN_NEWDAT1_REG);
 850 
 851         return pend;
 852 }
 853 
 854 /*
 855  * theory of operation:
 856  *
 857  * c_can core saves a received CAN message into the first free message
 858  * object it finds free (starting with the lowest). Bits NEWDAT and
 859  * INTPND are set for this message object indicating that a new message
 860  * has arrived. To work-around this issue, we keep two groups of message
 861  * objects whose partitioning is defined by C_CAN_MSG_OBJ_RX_SPLIT.
 862  *
 863  * We clear the newdat bit right away.
 864  *
 865  * This can result in packet reordering when the readout is slow.
 866  */
 867 static int c_can_do_rx_poll(struct net_device *dev, int quota)
 868 {
 869         struct c_can_priv *priv = netdev_priv(dev);
 870         u32 pkts = 0, pend = 0, toread, n;
 871 
 872         /*
 873          * It is faster to read only one 16bit register. This is only possible
 874          * for a maximum number of 16 objects.
 875          */
 876         BUILD_BUG_ON_MSG(C_CAN_MSG_OBJ_RX_LAST > 16,
 877                         "Implementation does not support more message objects than 16");
 878 
 879         while (quota > 0) {
 880                 if (!pend) {
 881                         pend = c_can_get_pending(priv);
 882                         if (!pend)
 883                                 break;
 884                         /*
 885                          * If the pending field has a gap, handle the
 886                          * bits above the gap first.
 887                          */
 888                         toread = c_can_adjust_pending(pend);
 889                 } else {
 890                         toread = pend;
 891                 }
 892                 /* Remove the bits from pend */
 893                 pend &= ~toread;
 894                 /* Read the objects */
 895                 n = c_can_read_objects(dev, priv, toread, quota);
 896                 pkts += n;
 897                 quota -= n;
 898         }
 899 
 900         if (pkts)
 901                 can_led_event(dev, CAN_LED_EVENT_RX);
 902 
 903         return pkts;
 904 }
 905 
 906 static int c_can_handle_state_change(struct net_device *dev,
 907                                 enum c_can_bus_error_types error_type)
 908 {
 909         unsigned int reg_err_counter;
 910         unsigned int rx_err_passive;
 911         struct c_can_priv *priv = netdev_priv(dev);
 912         struct net_device_stats *stats = &dev->stats;
 913         struct can_frame *cf;
 914         struct sk_buff *skb;
 915         struct can_berr_counter bec;
 916 
 917         switch (error_type) {
 918         case C_CAN_NO_ERROR:
 919                 priv->can.state = CAN_STATE_ERROR_ACTIVE;
 920                 break;
 921         case C_CAN_ERROR_WARNING:
 922                 /* error warning state */
 923                 priv->can.can_stats.error_warning++;
 924                 priv->can.state = CAN_STATE_ERROR_WARNING;
 925                 break;
 926         case C_CAN_ERROR_PASSIVE:
 927                 /* error passive state */
 928                 priv->can.can_stats.error_passive++;
 929                 priv->can.state = CAN_STATE_ERROR_PASSIVE;
 930                 break;
 931         case C_CAN_BUS_OFF:
 932                 /* bus-off state */
 933                 priv->can.state = CAN_STATE_BUS_OFF;
 934                 priv->can.can_stats.bus_off++;
 935                 break;
 936         default:
 937                 break;
 938         }
 939 
 940         /* propagate the error condition to the CAN stack */
 941         skb = alloc_can_err_skb(dev, &cf);
 942         if (unlikely(!skb))
 943                 return 0;
 944 
 945         __c_can_get_berr_counter(dev, &bec);
 946         reg_err_counter = priv->read_reg(priv, C_CAN_ERR_CNT_REG);
 947         rx_err_passive = (reg_err_counter & ERR_CNT_RP_MASK) >>
 948                                 ERR_CNT_RP_SHIFT;
 949 
 950         switch (error_type) {
 951         case C_CAN_NO_ERROR:
 952                 /* error warning state */
 953                 cf->can_id |= CAN_ERR_CRTL;
 954                 cf->data[1] = CAN_ERR_CRTL_ACTIVE;
 955                 cf->data[6] = bec.txerr;
 956                 cf->data[7] = bec.rxerr;
 957                 break;
 958         case C_CAN_ERROR_WARNING:
 959                 /* error warning state */
 960                 cf->can_id |= CAN_ERR_CRTL;
 961                 cf->data[1] = (bec.txerr > bec.rxerr) ?
 962                         CAN_ERR_CRTL_TX_WARNING :
 963                         CAN_ERR_CRTL_RX_WARNING;
 964                 cf->data[6] = bec.txerr;
 965                 cf->data[7] = bec.rxerr;
 966 
 967                 break;
 968         case C_CAN_ERROR_PASSIVE:
 969                 /* error passive state */
 970                 cf->can_id |= CAN_ERR_CRTL;
 971                 if (rx_err_passive)
 972                         cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
 973                 if (bec.txerr > 127)
 974                         cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE;
 975 
 976                 cf->data[6] = bec.txerr;
 977                 cf->data[7] = bec.rxerr;
 978                 break;
 979         case C_CAN_BUS_OFF:
 980                 /* bus-off state */
 981                 cf->can_id |= CAN_ERR_BUSOFF;
 982                 can_bus_off(dev);
 983                 break;
 984         default:
 985                 break;
 986         }
 987 
 988         stats->rx_packets++;
 989         stats->rx_bytes += cf->can_dlc;
 990         netif_receive_skb(skb);
 991 
 992         return 1;
 993 }
 994 
 995 static int c_can_handle_bus_err(struct net_device *dev,
 996                                 enum c_can_lec_type lec_type)
 997 {
 998         struct c_can_priv *priv = netdev_priv(dev);
 999         struct net_device_stats *stats = &dev->stats;
1000         struct can_frame *cf;
1001         struct sk_buff *skb;
1002 
1003         /*
1004          * early exit if no lec update or no error.
1005          * no lec update means that no CAN bus event has been detected
1006          * since CPU wrote 0x7 value to status reg.
1007          */
1008         if (lec_type == LEC_UNUSED || lec_type == LEC_NO_ERROR)
1009                 return 0;
1010 
1011         if (!(priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
1012                 return 0;
1013 
1014         /* common for all type of bus errors */
1015         priv->can.can_stats.bus_error++;
1016         stats->rx_errors++;
1017 
1018         /* propagate the error condition to the CAN stack */
1019         skb = alloc_can_err_skb(dev, &cf);
1020         if (unlikely(!skb))
1021                 return 0;
1022 
1023         /*
1024          * check for 'last error code' which tells us the
1025          * type of the last error to occur on the CAN bus
1026          */
1027         cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
1028 
1029         switch (lec_type) {
1030         case LEC_STUFF_ERROR:
1031                 netdev_dbg(dev, "stuff error\n");
1032                 cf->data[2] |= CAN_ERR_PROT_STUFF;
1033                 break;
1034         case LEC_FORM_ERROR:
1035                 netdev_dbg(dev, "form error\n");
1036                 cf->data[2] |= CAN_ERR_PROT_FORM;
1037                 break;
1038         case LEC_ACK_ERROR:
1039                 netdev_dbg(dev, "ack error\n");
1040                 cf->data[3] = CAN_ERR_PROT_LOC_ACK;
1041                 break;
1042         case LEC_BIT1_ERROR:
1043                 netdev_dbg(dev, "bit1 error\n");
1044                 cf->data[2] |= CAN_ERR_PROT_BIT1;
1045                 break;
1046         case LEC_BIT0_ERROR:
1047                 netdev_dbg(dev, "bit0 error\n");
1048                 cf->data[2] |= CAN_ERR_PROT_BIT0;
1049                 break;
1050         case LEC_CRC_ERROR:
1051                 netdev_dbg(dev, "CRC error\n");
1052                 cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;
1053                 break;
1054         default:
1055                 break;
1056         }
1057 
1058         stats->rx_packets++;
1059         stats->rx_bytes += cf->can_dlc;
1060         netif_receive_skb(skb);
1061         return 1;
1062 }
1063 
1064 static int c_can_poll(struct napi_struct *napi, int quota)
1065 {
1066         struct net_device *dev = napi->dev;
1067         struct c_can_priv *priv = netdev_priv(dev);
1068         u16 curr, last = priv->last_status;
1069         int work_done = 0;
1070 
1071         /* Only read the status register if a status interrupt was pending */
1072         if (atomic_xchg(&priv->sie_pending, 0)) {
1073                 priv->last_status = curr = priv->read_reg(priv, C_CAN_STS_REG);
1074                 /* Ack status on C_CAN. D_CAN is self clearing */
1075                 if (priv->type != BOSCH_D_CAN)
1076                         priv->write_reg(priv, C_CAN_STS_REG, LEC_UNUSED);
1077         } else {
1078                 /* no change detected ... */
1079                 curr = last;
1080         }
1081 
1082         /* handle state changes */
1083         if ((curr & STATUS_EWARN) && (!(last & STATUS_EWARN))) {
1084                 netdev_dbg(dev, "entered error warning state\n");
1085                 work_done += c_can_handle_state_change(dev, C_CAN_ERROR_WARNING);
1086         }
1087 
1088         if ((curr & STATUS_EPASS) && (!(last & STATUS_EPASS))) {
1089                 netdev_dbg(dev, "entered error passive state\n");
1090                 work_done += c_can_handle_state_change(dev, C_CAN_ERROR_PASSIVE);
1091         }
1092 
1093         if ((curr & STATUS_BOFF) && (!(last & STATUS_BOFF))) {
1094                 netdev_dbg(dev, "entered bus off state\n");
1095                 work_done += c_can_handle_state_change(dev, C_CAN_BUS_OFF);
1096                 goto end;
1097         }
1098 
1099         /* handle bus recovery events */
1100         if ((!(curr & STATUS_BOFF)) && (last & STATUS_BOFF)) {
1101                 netdev_dbg(dev, "left bus off state\n");
1102                 work_done += c_can_handle_state_change(dev, C_CAN_ERROR_PASSIVE);
1103         }
1104 
1105         if ((!(curr & STATUS_EPASS)) && (last & STATUS_EPASS)) {
1106                 netdev_dbg(dev, "left error passive state\n");
1107                 work_done += c_can_handle_state_change(dev, C_CAN_ERROR_WARNING);
1108         }
1109 
1110         if ((!(curr & STATUS_EWARN)) && (last & STATUS_EWARN)) {
1111                 netdev_dbg(dev, "left error warning state\n");
1112                 work_done += c_can_handle_state_change(dev, C_CAN_NO_ERROR);
1113         }
1114 
1115         /* handle lec errors on the bus */
1116         work_done += c_can_handle_bus_err(dev, curr & LEC_MASK);
1117 
1118         /* Handle Tx/Rx events. We do this unconditionally */
1119         work_done += c_can_do_rx_poll(dev, (quota - work_done));
1120         c_can_do_tx(dev);
1121 
1122 end:
1123         if (work_done < quota) {
1124                 napi_complete_done(napi, work_done);
1125                 /* enable all IRQs if we are not in bus off state */
1126                 if (priv->can.state != CAN_STATE_BUS_OFF)
1127                         c_can_irq_control(priv, true);
1128         }
1129 
1130         return work_done;
1131 }
1132 
1133 static irqreturn_t c_can_isr(int irq, void *dev_id)
1134 {
1135         struct net_device *dev = (struct net_device *)dev_id;
1136         struct c_can_priv *priv = netdev_priv(dev);
1137         int reg_int;
1138 
1139         reg_int = priv->read_reg(priv, C_CAN_INT_REG);
1140         if (!reg_int)
1141                 return IRQ_NONE;
1142 
1143         /* save for later use */
1144         if (reg_int & INT_STS_PENDING)
1145                 atomic_set(&priv->sie_pending, 1);
1146 
1147         /* disable all interrupts and schedule the NAPI */
1148         c_can_irq_control(priv, false);
1149         napi_schedule(&priv->napi);
1150 
1151         return IRQ_HANDLED;
1152 }
1153 
1154 static int c_can_open(struct net_device *dev)
1155 {
1156         int err;
1157         struct c_can_priv *priv = netdev_priv(dev);
1158 
1159         c_can_pm_runtime_get_sync(priv);
1160         c_can_reset_ram(priv, true);
1161 
1162         /* open the can device */
1163         err = open_candev(dev);
1164         if (err) {
1165                 netdev_err(dev, "failed to open can device\n");
1166                 goto exit_open_fail;
1167         }
1168 
1169         /* register interrupt handler */
1170         err = request_irq(dev->irq, &c_can_isr, IRQF_SHARED, dev->name,
1171                                 dev);
1172         if (err < 0) {
1173                 netdev_err(dev, "failed to request interrupt\n");
1174                 goto exit_irq_fail;
1175         }
1176 
1177         /* start the c_can controller */
1178         err = c_can_start(dev);
1179         if (err)
1180                 goto exit_start_fail;
1181 
1182         can_led_event(dev, CAN_LED_EVENT_OPEN);
1183 
1184         napi_enable(&priv->napi);
1185         /* enable status change, error and module interrupts */
1186         c_can_irq_control(priv, true);
1187         netif_start_queue(dev);
1188 
1189         return 0;
1190 
1191 exit_start_fail:
1192         free_irq(dev->irq, dev);
1193 exit_irq_fail:
1194         close_candev(dev);
1195 exit_open_fail:
1196         c_can_reset_ram(priv, false);
1197         c_can_pm_runtime_put_sync(priv);
1198         return err;
1199 }
1200 
1201 static int c_can_close(struct net_device *dev)
1202 {
1203         struct c_can_priv *priv = netdev_priv(dev);
1204 
1205         netif_stop_queue(dev);
1206         napi_disable(&priv->napi);
1207         c_can_stop(dev);
1208         free_irq(dev->irq, dev);
1209         close_candev(dev);
1210 
1211         c_can_reset_ram(priv, false);
1212         c_can_pm_runtime_put_sync(priv);
1213 
1214         can_led_event(dev, CAN_LED_EVENT_STOP);
1215 
1216         return 0;
1217 }
1218 
1219 struct net_device *alloc_c_can_dev(void)
1220 {
1221         struct net_device *dev;
1222         struct c_can_priv *priv;
1223 
1224         dev = alloc_candev(sizeof(struct c_can_priv), C_CAN_MSG_OBJ_TX_NUM);
1225         if (!dev)
1226                 return NULL;
1227 
1228         priv = netdev_priv(dev);
1229         netif_napi_add(dev, &priv->napi, c_can_poll, C_CAN_NAPI_WEIGHT);
1230 
1231         priv->dev = dev;
1232         priv->can.bittiming_const = &c_can_bittiming_const;
1233         priv->can.do_set_mode = c_can_set_mode;
1234         priv->can.do_get_berr_counter = c_can_get_berr_counter;
1235         priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
1236                                         CAN_CTRLMODE_LISTENONLY |
1237                                         CAN_CTRLMODE_BERR_REPORTING;
1238 
1239         return dev;
1240 }
1241 EXPORT_SYMBOL_GPL(alloc_c_can_dev);
1242 
1243 #ifdef CONFIG_PM
1244 int c_can_power_down(struct net_device *dev)
1245 {
1246         u32 val;
1247         unsigned long time_out;
1248         struct c_can_priv *priv = netdev_priv(dev);
1249 
1250         if (!(dev->flags & IFF_UP))
1251                 return 0;
1252 
1253         WARN_ON(priv->type != BOSCH_D_CAN);
1254 
1255         /* set PDR value so the device goes to power down mode */
1256         val = priv->read_reg(priv, C_CAN_CTRL_EX_REG);
1257         val |= CONTROL_EX_PDR;
1258         priv->write_reg(priv, C_CAN_CTRL_EX_REG, val);
1259 
1260         /* Wait for the PDA bit to get set */
1261         time_out = jiffies + msecs_to_jiffies(INIT_WAIT_MS);
1262         while (!(priv->read_reg(priv, C_CAN_STS_REG) & STATUS_PDA) &&
1263                                 time_after(time_out, jiffies))
1264                 cpu_relax();
1265 
1266         if (time_after(jiffies, time_out))
1267                 return -ETIMEDOUT;
1268 
1269         c_can_stop(dev);
1270 
1271         c_can_reset_ram(priv, false);
1272         c_can_pm_runtime_put_sync(priv);
1273 
1274         return 0;
1275 }
1276 EXPORT_SYMBOL_GPL(c_can_power_down);
1277 
1278 int c_can_power_up(struct net_device *dev)
1279 {
1280         u32 val;
1281         unsigned long time_out;
1282         struct c_can_priv *priv = netdev_priv(dev);
1283         int ret;
1284 
1285         if (!(dev->flags & IFF_UP))
1286                 return 0;
1287 
1288         WARN_ON(priv->type != BOSCH_D_CAN);
1289 
1290         c_can_pm_runtime_get_sync(priv);
1291         c_can_reset_ram(priv, true);
1292 
1293         /* Clear PDR and INIT bits */
1294         val = priv->read_reg(priv, C_CAN_CTRL_EX_REG);
1295         val &= ~CONTROL_EX_PDR;
1296         priv->write_reg(priv, C_CAN_CTRL_EX_REG, val);
1297         val = priv->read_reg(priv, C_CAN_CTRL_REG);
1298         val &= ~CONTROL_INIT;
1299         priv->write_reg(priv, C_CAN_CTRL_REG, val);
1300 
1301         /* Wait for the PDA bit to get clear */
1302         time_out = jiffies + msecs_to_jiffies(INIT_WAIT_MS);
1303         while ((priv->read_reg(priv, C_CAN_STS_REG) & STATUS_PDA) &&
1304                                 time_after(time_out, jiffies))
1305                 cpu_relax();
1306 
1307         if (time_after(jiffies, time_out))
1308                 return -ETIMEDOUT;
1309 
1310         ret = c_can_start(dev);
1311         if (!ret)
1312                 c_can_irq_control(priv, true);
1313 
1314         return ret;
1315 }
1316 EXPORT_SYMBOL_GPL(c_can_power_up);
1317 #endif
1318 
1319 void free_c_can_dev(struct net_device *dev)
1320 {
1321         struct c_can_priv *priv = netdev_priv(dev);
1322 
1323         netif_napi_del(&priv->napi);
1324         free_candev(dev);
1325 }
1326 EXPORT_SYMBOL_GPL(free_c_can_dev);
1327 
1328 static const struct net_device_ops c_can_netdev_ops = {
1329         .ndo_open = c_can_open,
1330         .ndo_stop = c_can_close,
1331         .ndo_start_xmit = c_can_start_xmit,
1332         .ndo_change_mtu = can_change_mtu,
1333 };
1334 
1335 int register_c_can_dev(struct net_device *dev)
1336 {
1337         struct c_can_priv *priv = netdev_priv(dev);
1338         int err;
1339 
1340         /* Deactivate pins to prevent DRA7 DCAN IP from being
1341          * stuck in transition when module is disabled.
1342          * Pins are activated in c_can_start() and deactivated
1343          * in c_can_stop()
1344          */
1345         pinctrl_pm_select_sleep_state(dev->dev.parent);
1346 
1347         c_can_pm_runtime_enable(priv);
1348 
1349         dev->flags |= IFF_ECHO; /* we support local echo */
1350         dev->netdev_ops = &c_can_netdev_ops;
1351 
1352         err = register_candev(dev);
1353         if (err)
1354                 c_can_pm_runtime_disable(priv);
1355         else
1356                 devm_can_led_init(dev);
1357 
1358         return err;
1359 }
1360 EXPORT_SYMBOL_GPL(register_c_can_dev);
1361 
1362 void unregister_c_can_dev(struct net_device *dev)
1363 {
1364         struct c_can_priv *priv = netdev_priv(dev);
1365 
1366         unregister_candev(dev);
1367 
1368         c_can_pm_runtime_disable(priv);
1369 }
1370 EXPORT_SYMBOL_GPL(unregister_c_can_dev);
1371 
1372 MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>");
1373 MODULE_LICENSE("GPL v2");
1374 MODULE_DESCRIPTION("CAN bus driver for Bosch C_CAN controller");
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/net/can/c_can/c_can.c

DEFINITIONS
