drivers/net/wan/pci200syn.c

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This source file includes following definitions.
new_memcpy_toio
pci200_set_iface
pci200_open
pci200_close
pci200_ioctl
pci200_pci_remove_one
pci200_pci_init_one
pci200_init_module
pci200_cleanup_module
   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Goramo PCI200SYN synchronous serial card driver for Linux
   4  *
   5  * Copyright (C) 2002-2008 Krzysztof Halasa <khc@pm.waw.pl>
   6  *
   7  * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/>
   8  *
   9  * Sources of information:
  10  *    Hitachi HD64572 SCA-II User's Manual
  11  *    PLX Technology Inc. PCI9052 Data Book
  12  */
  13 
  14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15 
  16 #include <linux/module.h>
  17 #include <linux/kernel.h>
  18 #include <linux/capability.h>
  19 #include <linux/slab.h>
  20 #include <linux/types.h>
  21 #include <linux/fcntl.h>
  22 #include <linux/in.h>
  23 #include <linux/string.h>
  24 #include <linux/errno.h>
  25 #include <linux/init.h>
  26 #include <linux/ioport.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/hdlc.h>
  29 #include <linux/pci.h>
  30 #include <linux/delay.h>
  31 #include <asm/io.h>
  32 
  33 #include "hd64572.h"
  34 
  35 #undef DEBUG_PKT
  36 #define DEBUG_RINGS
  37 
  38 #define PCI200SYN_PLX_SIZE      0x80    /* PLX control window size (128b) */
  39 #define PCI200SYN_SCA_SIZE      0x400   /* SCA window size (1Kb) */
  40 #define MAX_TX_BUFFERS          10
  41 
  42 static int pci_clock_freq = 33000000;
  43 #define CLOCK_BASE pci_clock_freq
  44 
  45 /*
  46  *      PLX PCI9052 local configuration and shared runtime registers.
  47  *      This structure can be used to access 9052 registers (memory mapped).
  48  */
  49 typedef struct {
  50         u32 loc_addr_range[4];  /* 00-0Ch : Local Address Ranges */
  51         u32 loc_rom_range;      /* 10h : Local ROM Range */
  52         u32 loc_addr_base[4];   /* 14-20h : Local Address Base Addrs */
  53         u32 loc_rom_base;       /* 24h : Local ROM Base */
  54         u32 loc_bus_descr[4];   /* 28-34h : Local Bus Descriptors */
  55         u32 rom_bus_descr;      /* 38h : ROM Bus Descriptor */
  56         u32 cs_base[4];         /* 3C-48h : Chip Select Base Addrs */
  57         u32 intr_ctrl_stat;     /* 4Ch : Interrupt Control/Status */
  58         u32 init_ctrl;          /* 50h : EEPROM ctrl, Init Ctrl, etc */
  59 }plx9052;
  60 
  61 
  62 
  63 typedef struct port_s {
  64         struct napi_struct napi;
  65         struct net_device *netdev;
  66         struct card_s *card;
  67         spinlock_t lock;        /* TX lock */
  68         sync_serial_settings settings;
  69         int rxpart;             /* partial frame received, next frame invalid*/
  70         unsigned short encoding;
  71         unsigned short parity;
  72         u16 rxin;               /* rx ring buffer 'in' pointer */
  73         u16 txin;               /* tx ring buffer 'in' and 'last' pointers */
  74         u16 txlast;
  75         u8 rxs, txs, tmc;       /* SCA registers */
  76         u8 chan;                /* physical port # - 0 or 1 */
  77 }port_t;
  78 
  79 
  80 
  81 typedef struct card_s {
  82         u8 __iomem *rambase;    /* buffer memory base (virtual) */
  83         u8 __iomem *scabase;    /* SCA memory base (virtual) */
  84         plx9052 __iomem *plxbase;/* PLX registers memory base (virtual) */
  85         u16 rx_ring_buffers;    /* number of buffers in a ring */
  86         u16 tx_ring_buffers;
  87         u16 buff_offset;        /* offset of first buffer of first channel */
  88         u8 irq;                 /* interrupt request level */
  89 
  90         port_t ports[2];
  91 }card_t;
  92 
  93 
  94 #define get_port(card, port)         (&card->ports[port])
  95 #define sca_flush(card)              (sca_in(IER0, card));
  96 
  97 static inline void new_memcpy_toio(char __iomem *dest, char *src, int length)
  98 {
  99         int len;
 100         do {
 101                 len = length > 256 ? 256 : length;
 102                 memcpy_toio(dest, src, len);
 103                 dest += len;
 104                 src += len;
 105                 length -= len;
 106                 readb(dest);
 107         } while (len);
 108 }
 109 
 110 #undef memcpy_toio
 111 #define memcpy_toio new_memcpy_toio
 112 
 113 #include "hd64572.c"
 114 
 115 
 116 static void pci200_set_iface(port_t *port)
 117 {
 118         card_t *card = port->card;
 119         u16 msci = get_msci(port);
 120         u8 rxs = port->rxs & CLK_BRG_MASK;
 121         u8 txs = port->txs & CLK_BRG_MASK;
 122 
 123         sca_out(EXS_TES1, (port->chan ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS,
 124                 port->card);
 125         switch(port->settings.clock_type) {
 126         case CLOCK_INT:
 127                 rxs |= CLK_BRG; /* BRG output */
 128                 txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
 129                 break;
 130 
 131         case CLOCK_TXINT:
 132                 rxs |= CLK_LINE; /* RXC input */
 133                 txs |= CLK_PIN_OUT | CLK_BRG; /* BRG output */
 134                 break;
 135 
 136         case CLOCK_TXFROMRX:
 137                 rxs |= CLK_LINE; /* RXC input */
 138                 txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
 139                 break;
 140 
 141         default:                /* EXTernal clock */
 142                 rxs |= CLK_LINE; /* RXC input */
 143                 txs |= CLK_PIN_OUT | CLK_LINE; /* TXC input */
 144                 break;
 145         }
 146 
 147         port->rxs = rxs;
 148         port->txs = txs;
 149         sca_out(rxs, msci + RXS, card);
 150         sca_out(txs, msci + TXS, card);
 151         sca_set_port(port);
 152 }
 153 
 154 
 155 
 156 static int pci200_open(struct net_device *dev)
 157 {
 158         port_t *port = dev_to_port(dev);
 159 
 160         int result = hdlc_open(dev);
 161         if (result)
 162                 return result;
 163 
 164         sca_open(dev);
 165         pci200_set_iface(port);
 166         sca_flush(port->card);
 167         return 0;
 168 }
 169 
 170 
 171 
 172 static int pci200_close(struct net_device *dev)
 173 {
 174         sca_close(dev);
 175         sca_flush(dev_to_port(dev)->card);
 176         hdlc_close(dev);
 177         return 0;
 178 }
 179 
 180 
 181 
 182 static int pci200_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 183 {
 184         const size_t size = sizeof(sync_serial_settings);
 185         sync_serial_settings new_line;
 186         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
 187         port_t *port = dev_to_port(dev);
 188 
 189 #ifdef DEBUG_RINGS
 190         if (cmd == SIOCDEVPRIVATE) {
 191                 sca_dump_rings(dev);
 192                 return 0;
 193         }
 194 #endif
 195         if (cmd != SIOCWANDEV)
 196                 return hdlc_ioctl(dev, ifr, cmd);
 197 
 198         switch(ifr->ifr_settings.type) {
 199         case IF_GET_IFACE:
 200                 ifr->ifr_settings.type = IF_IFACE_V35;
 201                 if (ifr->ifr_settings.size < size) {
 202                         ifr->ifr_settings.size = size; /* data size wanted */
 203                         return -ENOBUFS;
 204                 }
 205                 if (copy_to_user(line, &port->settings, size))
 206                         return -EFAULT;
 207                 return 0;
 208 
 209         case IF_IFACE_V35:
 210         case IF_IFACE_SYNC_SERIAL:
 211                 if (!capable(CAP_NET_ADMIN))
 212                         return -EPERM;
 213 
 214                 if (copy_from_user(&new_line, line, size))
 215                         return -EFAULT;
 216 
 217                 if (new_line.clock_type != CLOCK_EXT &&
 218                     new_line.clock_type != CLOCK_TXFROMRX &&
 219                     new_line.clock_type != CLOCK_INT &&
 220                     new_line.clock_type != CLOCK_TXINT)
 221                         return -EINVAL; /* No such clock setting */
 222 
 223                 if (new_line.loopback != 0 && new_line.loopback != 1)
 224                         return -EINVAL;
 225 
 226                 memcpy(&port->settings, &new_line, size); /* Update settings */
 227                 pci200_set_iface(port);
 228                 sca_flush(port->card);
 229                 return 0;
 230 
 231         default:
 232                 return hdlc_ioctl(dev, ifr, cmd);
 233         }
 234 }
 235 
 236 
 237 
 238 static void pci200_pci_remove_one(struct pci_dev *pdev)
 239 {
 240         int i;
 241         card_t *card = pci_get_drvdata(pdev);
 242 
 243         for (i = 0; i < 2; i++)
 244                 if (card->ports[i].card)
 245                         unregister_hdlc_device(card->ports[i].netdev);
 246 
 247         if (card->irq)
 248                 free_irq(card->irq, card);
 249 
 250         if (card->rambase)
 251                 iounmap(card->rambase);
 252         if (card->scabase)
 253                 iounmap(card->scabase);
 254         if (card->plxbase)
 255                 iounmap(card->plxbase);
 256 
 257         pci_release_regions(pdev);
 258         pci_disable_device(pdev);
 259         if (card->ports[0].netdev)
 260                 free_netdev(card->ports[0].netdev);
 261         if (card->ports[1].netdev)
 262                 free_netdev(card->ports[1].netdev);
 263         kfree(card);
 264 }
 265 
 266 static const struct net_device_ops pci200_ops = {
 267         .ndo_open       = pci200_open,
 268         .ndo_stop       = pci200_close,
 269         .ndo_start_xmit = hdlc_start_xmit,
 270         .ndo_do_ioctl   = pci200_ioctl,
 271 };
 272 
 273 static int pci200_pci_init_one(struct pci_dev *pdev,
 274                                const struct pci_device_id *ent)
 275 {
 276         card_t *card;
 277         u32 __iomem *p;
 278         int i;
 279         u32 ramsize;
 280         u32 ramphys;            /* buffer memory base */
 281         u32 scaphys;            /* SCA memory base */
 282         u32 plxphys;            /* PLX registers memory base */
 283 
 284         i = pci_enable_device(pdev);
 285         if (i)
 286                 return i;
 287 
 288         i = pci_request_regions(pdev, "PCI200SYN");
 289         if (i) {
 290                 pci_disable_device(pdev);
 291                 return i;
 292         }
 293 
 294         card = kzalloc(sizeof(card_t), GFP_KERNEL);
 295         if (card == NULL) {
 296                 pci_release_regions(pdev);
 297                 pci_disable_device(pdev);
 298                 return -ENOBUFS;
 299         }
 300         pci_set_drvdata(pdev, card);
 301         card->ports[0].netdev = alloc_hdlcdev(&card->ports[0]);
 302         card->ports[1].netdev = alloc_hdlcdev(&card->ports[1]);
 303         if (!card->ports[0].netdev || !card->ports[1].netdev) {
 304                 pr_err("unable to allocate memory\n");
 305                 pci200_pci_remove_one(pdev);
 306                 return -ENOMEM;
 307         }
 308 
 309         if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE ||
 310             pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE ||
 311             pci_resource_len(pdev, 3) < 16384) {
 312                 pr_err("invalid card EEPROM parameters\n");
 313                 pci200_pci_remove_one(pdev);
 314                 return -EFAULT;
 315         }
 316 
 317         plxphys = pci_resource_start(pdev,0) & PCI_BASE_ADDRESS_MEM_MASK;
 318         card->plxbase = ioremap(plxphys, PCI200SYN_PLX_SIZE);
 319 
 320         scaphys = pci_resource_start(pdev,2) & PCI_BASE_ADDRESS_MEM_MASK;
 321         card->scabase = ioremap(scaphys, PCI200SYN_SCA_SIZE);
 322 
 323         ramphys = pci_resource_start(pdev,3) & PCI_BASE_ADDRESS_MEM_MASK;
 324         card->rambase = pci_ioremap_bar(pdev, 3);
 325 
 326         if (card->plxbase == NULL ||
 327             card->scabase == NULL ||
 328             card->rambase == NULL) {
 329                 pr_err("ioremap() failed\n");
 330                 pci200_pci_remove_one(pdev);
 331                 return -EFAULT;
 332         }
 333 
 334         /* Reset PLX */
 335         p = &card->plxbase->init_ctrl;
 336         writel(readl(p) | 0x40000000, p);
 337         readl(p);               /* Flush the write - do not use sca_flush */
 338         udelay(1);
 339 
 340         writel(readl(p) & ~0x40000000, p);
 341         readl(p);               /* Flush the write - do not use sca_flush */
 342         udelay(1);
 343 
 344         ramsize = sca_detect_ram(card, card->rambase,
 345                                  pci_resource_len(pdev, 3));
 346 
 347         /* number of TX + RX buffers for one port - this is dual port card */
 348         i = ramsize / (2 * (sizeof(pkt_desc) + HDLC_MAX_MRU));
 349         card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
 350         card->rx_ring_buffers = i - card->tx_ring_buffers;
 351 
 352         card->buff_offset = 2 * sizeof(pkt_desc) * (card->tx_ring_buffers +
 353                                                     card->rx_ring_buffers);
 354 
 355         pr_info("%u KB RAM at 0x%x, IRQ%u, using %u TX + %u RX packets rings\n",
 356                 ramsize / 1024, ramphys,
 357                 pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers);
 358 
 359         if (card->tx_ring_buffers < 1) {
 360                 pr_err("RAM test failed\n");
 361                 pci200_pci_remove_one(pdev);
 362                 return -EFAULT;
 363         }
 364 
 365         /* Enable interrupts on the PCI bridge */
 366         p = &card->plxbase->intr_ctrl_stat;
 367         writew(readw(p) | 0x0040, p);
 368 
 369         /* Allocate IRQ */
 370         if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, "pci200syn", card)) {
 371                 pr_warn("could not allocate IRQ%d\n", pdev->irq);
 372                 pci200_pci_remove_one(pdev);
 373                 return -EBUSY;
 374         }
 375         card->irq = pdev->irq;
 376 
 377         sca_init(card, 0);
 378 
 379         for (i = 0; i < 2; i++) {
 380                 port_t *port = &card->ports[i];
 381                 struct net_device *dev = port->netdev;
 382                 hdlc_device *hdlc = dev_to_hdlc(dev);
 383                 port->chan = i;
 384 
 385                 spin_lock_init(&port->lock);
 386                 dev->irq = card->irq;
 387                 dev->mem_start = ramphys;
 388                 dev->mem_end = ramphys + ramsize - 1;
 389                 dev->tx_queue_len = 50;
 390                 dev->netdev_ops = &pci200_ops;
 391                 hdlc->attach = sca_attach;
 392                 hdlc->xmit = sca_xmit;
 393                 port->settings.clock_type = CLOCK_EXT;
 394                 port->card = card;
 395                 sca_init_port(port);
 396                 if (register_hdlc_device(dev)) {
 397                         pr_err("unable to register hdlc device\n");
 398                         port->card = NULL;
 399                         pci200_pci_remove_one(pdev);
 400                         return -ENOBUFS;
 401                 }
 402 
 403                 netdev_info(dev, "PCI200SYN channel %d\n", port->chan);
 404         }
 405 
 406         sca_flush(card);
 407         return 0;
 408 }
 409 
 410 
 411 
 412 static const struct pci_device_id pci200_pci_tbl[] = {
 413         { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX,
 414           PCI_DEVICE_ID_PLX_PCI200SYN, 0, 0, 0 },
 415         { 0, }
 416 };
 417 
 418 
 419 static struct pci_driver pci200_pci_driver = {
 420         .name           = "PCI200SYN",
 421         .id_table       = pci200_pci_tbl,
 422         .probe          = pci200_pci_init_one,
 423         .remove         = pci200_pci_remove_one,
 424 };
 425 
 426 
 427 static int __init pci200_init_module(void)
 428 {
 429         if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) {
 430                 pr_err("Invalid PCI clock frequency\n");
 431                 return -EINVAL;
 432         }
 433         return pci_register_driver(&pci200_pci_driver);
 434 }
 435 
 436 
 437 
 438 static void __exit pci200_cleanup_module(void)
 439 {
 440         pci_unregister_driver(&pci200_pci_driver);
 441 }
 442 
 443 MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
 444 MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver");
 445 MODULE_LICENSE("GPL v2");
 446 MODULE_DEVICE_TABLE(pci, pci200_pci_tbl);
 447 module_param(pci_clock_freq, int, 0444);
 448 MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz");
 449 module_init(pci200_init_module);
 450 module_exit(pci200_cleanup_module);
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/net/wan/pci200syn.c

DEFINITIONS
