1
2
3
4
5
6
7
8
9
10
11
12
13 #ifndef RT2X00REG_H
14 #define RT2X00REG_H
15
16
17
18
19 enum rx_crypto {
20 RX_CRYPTO_SUCCESS = 0,
21 RX_CRYPTO_FAIL_ICV = 1,
22 RX_CRYPTO_FAIL_MIC = 2,
23 RX_CRYPTO_FAIL_KEY = 3,
24 };
25
26
27
28
29 enum antenna {
30 ANTENNA_SW_DIVERSITY = 0,
31 ANTENNA_A = 1,
32 ANTENNA_B = 2,
33 ANTENNA_HW_DIVERSITY = 3,
34 };
35
36
37
38
39 enum led_mode {
40 LED_MODE_DEFAULT = 0,
41 LED_MODE_TXRX_ACTIVITY = 1,
42 LED_MODE_SIGNAL_STRENGTH = 2,
43 LED_MODE_ASUS = 3,
44 LED_MODE_ALPHA = 4,
45 };
46
47
48
49
50 enum tsf_sync {
51 TSF_SYNC_NONE = 0,
52 TSF_SYNC_INFRA = 1,
53 TSF_SYNC_ADHOC = 2,
54 TSF_SYNC_AP_NONE = 3,
55 };
56
57
58
59
60 enum dev_state {
61 STATE_DEEP_SLEEP = 0,
62 STATE_SLEEP = 1,
63 STATE_STANDBY = 2,
64 STATE_AWAKE = 3,
65
66
67
68
69
70
71 STATE_RADIO_ON,
72 STATE_RADIO_OFF,
73 STATE_RADIO_IRQ_ON,
74 STATE_RADIO_IRQ_OFF,
75 };
76
77
78
79
80 enum ifs {
81 IFS_BACKOFF = 0,
82 IFS_SIFS = 1,
83 IFS_NEW_BACKOFF = 2,
84 IFS_NONE = 3,
85 };
86
87
88
89
90 enum txop {
91 TXOP_HTTXOP = 0,
92 TXOP_PIFS = 1,
93 TXOP_SIFS = 2,
94 TXOP_BACKOFF = 3,
95 };
96
97
98
99
100 enum cipher {
101 CIPHER_NONE = 0,
102 CIPHER_WEP64 = 1,
103 CIPHER_WEP128 = 2,
104 CIPHER_TKIP = 3,
105 CIPHER_AES = 4,
106
107
108
109 CIPHER_CKIP64 = 5,
110 CIPHER_CKIP128 = 6,
111 CIPHER_TKIP_NO_MIC = 7,
112
113
114
115
116
117
118 CIPHER_MAX = 4,
119 };
120
121
122
123
124 enum rate_modulation {
125 RATE_MODE_CCK = 0,
126 RATE_MODE_OFDM = 1,
127 RATE_MODE_HT_MIX = 2,
128 RATE_MODE_HT_GREENFIELD = 3,
129 };
130
131
132
133
134 enum firmware_errors {
135 FW_OK,
136 FW_BAD_CRC,
137 FW_BAD_LENGTH,
138 FW_BAD_VERSION,
139 };
140
141
142
143
144
145
146
147 struct rt2x00_field8 {
148 u8 bit_offset;
149 u8 bit_mask;
150 };
151
152 struct rt2x00_field16 {
153 u16 bit_offset;
154 u16 bit_mask;
155 };
156
157 struct rt2x00_field32 {
158 u32 bit_offset;
159 u32 bit_mask;
160 };
161
162
163
164
165
166
167
168 #define is_power_of_two(x) ( !((x) & ((x)-1)) )
169 #define low_bit_mask(x) ( ((x)-1) & ~(x) )
170 #define is_valid_mask(x) is_power_of_two(1LU + (x) + low_bit_mask(x))
171
172
173
174
175
176
177
178 #define compile_ffs2(__x) \
179 __builtin_choose_expr(((__x) & 0x1), 0, 1)
180
181 #define compile_ffs4(__x) \
182 __builtin_choose_expr(((__x) & 0x3), \
183 (compile_ffs2((__x))), \
184 (compile_ffs2((__x) >> 2) + 2))
185
186 #define compile_ffs8(__x) \
187 __builtin_choose_expr(((__x) & 0xf), \
188 (compile_ffs4((__x))), \
189 (compile_ffs4((__x) >> 4) + 4))
190
191 #define compile_ffs16(__x) \
192 __builtin_choose_expr(((__x) & 0xff), \
193 (compile_ffs8((__x))), \
194 (compile_ffs8((__x) >> 8) + 8))
195
196 #define compile_ffs32(__x) \
197 __builtin_choose_expr(((__x) & 0xffff), \
198 (compile_ffs16((__x))), \
199 (compile_ffs16((__x) >> 16) + 16))
200
201
202
203
204
205
206 #define FIELD_CHECK(__mask, __type) \
207 BUILD_BUG_ON(!(__mask) || \
208 !is_valid_mask(__mask) || \
209 (__mask) != (__type)(__mask)) \
210
211 #define FIELD8(__mask) \
212 ({ \
213 FIELD_CHECK(__mask, u8); \
214 (struct rt2x00_field8) { \
215 compile_ffs8(__mask), (__mask) \
216 }; \
217 })
218
219 #define FIELD16(__mask) \
220 ({ \
221 FIELD_CHECK(__mask, u16); \
222 (struct rt2x00_field16) { \
223 compile_ffs16(__mask), (__mask) \
224 }; \
225 })
226
227 #define FIELD32(__mask) \
228 ({ \
229 FIELD_CHECK(__mask, u32); \
230 (struct rt2x00_field32) { \
231 compile_ffs32(__mask), (__mask) \
232 }; \
233 })
234
235 #define SET_FIELD(__reg, __type, __field, __value)\
236 ({ \
237 typecheck(__type, __field); \
238 *(__reg) &= ~((__field).bit_mask); \
239 *(__reg) |= ((__value) << \
240 ((__field).bit_offset)) & \
241 ((__field).bit_mask); \
242 })
243
244 #define GET_FIELD(__reg, __type, __field) \
245 ({ \
246 typecheck(__type, __field); \
247 ((__reg) & ((__field).bit_mask)) >> \
248 ((__field).bit_offset); \
249 })
250
251 #define rt2x00_set_field32(__reg, __field, __value) \
252 SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
253 #define rt2x00_get_field32(__reg, __field) \
254 GET_FIELD(__reg, struct rt2x00_field32, __field)
255
256 #define rt2x00_set_field16(__reg, __field, __value) \
257 SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
258 #define rt2x00_get_field16(__reg, __field) \
259 GET_FIELD(__reg, struct rt2x00_field16, __field)
260
261 #define rt2x00_set_field8(__reg, __field, __value) \
262 SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
263 #define rt2x00_get_field8(__reg, __field) \
264 GET_FIELD(__reg, struct rt2x00_field8, __field)
265
266 #endif