This source file includes following definitions.
- ath5k_hw_set_capabilities
- ath5k_hw_enable_pspoll
- ath5k_hw_disable_pspoll
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24 #include "ath5k.h"
25 #include "reg.h"
26 #include "debug.h"
27 #include "../regd.h"
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32
33 int ath5k_hw_set_capabilities(struct ath5k_hw *ah)
34 {
35 struct ath5k_capabilities *caps = &ah->ah_capabilities;
36 u16 ee_header;
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38
39 ee_header = caps->cap_eeprom.ee_header;
40
41 if (ah->ah_version == AR5K_AR5210) {
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46 caps->cap_range.range_5ghz_min = 5120;
47 caps->cap_range.range_5ghz_max = 5430;
48 caps->cap_range.range_2ghz_min = 0;
49 caps->cap_range.range_2ghz_max = 0;
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51
52 __set_bit(AR5K_MODE_11A, caps->cap_mode);
53 } else {
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68 if (AR5K_EEPROM_HDR_11A(ee_header)) {
69 if (ath_is_49ghz_allowed(caps->cap_eeprom.ee_regdomain))
70 caps->cap_range.range_5ghz_min = 4920;
71 else
72 caps->cap_range.range_5ghz_min = 5005;
73 caps->cap_range.range_5ghz_max = 6100;
74
75
76 __set_bit(AR5K_MODE_11A, caps->cap_mode);
77 }
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80
81 if (AR5K_EEPROM_HDR_11B(ee_header) ||
82 (AR5K_EEPROM_HDR_11G(ee_header) &&
83 ah->ah_version != AR5K_AR5211)) {
84
85 caps->cap_range.range_2ghz_min = 2412;
86 caps->cap_range.range_2ghz_max = 2732;
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91 if (!caps->cap_needs_2GHz_ovr) {
92 if (AR5K_EEPROM_HDR_11B(ee_header))
93 __set_bit(AR5K_MODE_11B,
94 caps->cap_mode);
95
96 if (AR5K_EEPROM_HDR_11G(ee_header) &&
97 ah->ah_version != AR5K_AR5211)
98 __set_bit(AR5K_MODE_11G,
99 caps->cap_mode);
100 }
101 }
102 }
103
104 if ((ah->ah_radio_5ghz_revision & 0xf0) == AR5K_SREV_RAD_2112)
105 __clear_bit(AR5K_MODE_11A, caps->cap_mode);
106
107
108 if (ah->ah_version == AR5K_AR5210)
109 caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES_NOQCU;
110 else
111 caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES;
112
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114 if (ah->ah_mac_srev >= AR5K_SREV_AR5213A)
115 caps->cap_has_phyerr_counters = true;
116 else
117 caps->cap_has_phyerr_counters = false;
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120 if (ah->ah_version == AR5K_AR5212)
121 caps->cap_has_mrr_support = true;
122 else
123 caps->cap_has_mrr_support = false;
124
125 return 0;
126 }
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132
133 int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid,
134 u16 assoc_id)
135 {
136 if (ah->ah_version == AR5K_AR5210) {
137 AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1,
138 AR5K_STA_ID1_NO_PSPOLL | AR5K_STA_ID1_DEFAULT_ANTENNA);
139 return 0;
140 }
141
142 return -EIO;
143 }
144
145 int ath5k_hw_disable_pspoll(struct ath5k_hw *ah)
146 {
147 if (ah->ah_version == AR5K_AR5210) {
148 AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1,
149 AR5K_STA_ID1_NO_PSPOLL | AR5K_STA_ID1_DEFAULT_ANTENNA);
150 return 0;
151 }
152
153 return -EIO;
154 }