This source file includes following definitions.
- ath9k_hw_configpcipowersave
- ath9k_hw_rxena
- ath9k_hw_set_desc_link
- ath9k_hw_calibrate
- ath9k_hw_getisr
- ath9k_hw_set_txdesc
- ath9k_hw_txprocdesc
- ath9k_hw_get_duration
- ath9k_hw_antdiv_comb_conf_get
- ath9k_hw_antdiv_comb_conf_set
- ath9k_hw_tx99_start
- ath9k_hw_tx99_stop
- ath9k_hw_tx99_set_txpower
- ath9k_hw_set_bt_ant_diversity
- ath9k_hw_is_aic_enabled
- ath9k_hw_init_hang_checks
- ath9k_hw_detect_mac_hang
- ath9k_hw_detect_bb_hang
- ath9k_hw_rf_set_freq
- ath9k_hw_spur_mitigate_freq
- ath9k_hw_set_rf_regs
- ath9k_hw_init_bb
- ath9k_hw_set_channel_regs
- ath9k_hw_process_ini
- ath9k_olc_init
- ath9k_hw_set_rfmode
- ath9k_hw_mark_phy_inactive
- ath9k_hw_set_delta_slope
- ath9k_hw_rfbus_req
- ath9k_hw_rfbus_done
- ath9k_hw_restore_chainmask
- ath9k_hw_ani_control
- ath9k_hw_do_getnf
- ath9k_hw_init_cal
- ath9k_hw_setup_calibration
- ath9k_hw_fast_chan_change
- ath9k_hw_set_radar_params
- ath9k_hw_init_cal_settings
- ath9k_hw_compute_pll_control
- ath9k_hw_init_mode_gain_regs
- ath9k_hw_ani_cache_ini_regs
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17 #ifndef ATH9K_HW_OPS_H
18 #define ATH9K_HW_OPS_H
19
20 #include "hw.h"
21
22
23
24 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
25 bool power_off)
26 {
27 if (!ah->aspm_enabled)
28 return;
29
30 ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
31 }
32
33 static inline void ath9k_hw_rxena(struct ath_hw *ah)
34 {
35 ath9k_hw_ops(ah)->rx_enable(ah);
36 }
37
38 static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds,
39 u32 link)
40 {
41 ath9k_hw_ops(ah)->set_desc_link(ds, link);
42 }
43
44 static inline int ath9k_hw_calibrate(struct ath_hw *ah,
45 struct ath9k_channel *chan,
46 u8 rxchainmask, bool longcal)
47 {
48 return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
49 }
50
51 static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked,
52 u32 *sync_cause_p)
53 {
54 return ath9k_hw_ops(ah)->get_isr(ah, masked, sync_cause_p);
55 }
56
57 static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
58 struct ath_tx_info *i)
59 {
60 return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i);
61 }
62
63 static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
64 struct ath_tx_status *ts)
65 {
66 return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
67 }
68
69 static inline int ath9k_hw_get_duration(struct ath_hw *ah, const void *ds,
70 int index)
71 {
72 return ath9k_hw_ops(ah)->get_duration(ah, ds, index);
73 }
74
75 static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
76 struct ath_hw_antcomb_conf *antconf)
77 {
78 ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf);
79 }
80
81 static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
82 struct ath_hw_antcomb_conf *antconf)
83 {
84 ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf);
85 }
86
87 static inline void ath9k_hw_tx99_start(struct ath_hw *ah, u32 qnum)
88 {
89 ath9k_hw_ops(ah)->tx99_start(ah, qnum);
90 }
91
92 static inline void ath9k_hw_tx99_stop(struct ath_hw *ah)
93 {
94 ath9k_hw_ops(ah)->tx99_stop(ah);
95 }
96
97 static inline void ath9k_hw_tx99_set_txpower(struct ath_hw *ah, u8 power)
98 {
99 if (ath9k_hw_ops(ah)->tx99_set_txpower)
100 ath9k_hw_ops(ah)->tx99_set_txpower(ah, power);
101 }
102
103 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
104
105 static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
106 {
107 if (ath9k_hw_ops(ah)->set_bt_ant_diversity)
108 ath9k_hw_ops(ah)->set_bt_ant_diversity(ah, enable);
109 }
110
111 static inline bool ath9k_hw_is_aic_enabled(struct ath_hw *ah)
112 {
113 if (ath9k_hw_private_ops(ah)->is_aic_enabled)
114 return ath9k_hw_private_ops(ah)->is_aic_enabled(ah);
115
116 return false;
117 }
118
119 #endif
120
121
122
123 static inline void ath9k_hw_init_hang_checks(struct ath_hw *ah)
124 {
125 ath9k_hw_private_ops(ah)->init_hang_checks(ah);
126 }
127
128 static inline bool ath9k_hw_detect_mac_hang(struct ath_hw *ah)
129 {
130 return ath9k_hw_private_ops(ah)->detect_mac_hang(ah);
131 }
132
133 static inline bool ath9k_hw_detect_bb_hang(struct ath_hw *ah)
134 {
135 return ath9k_hw_private_ops(ah)->detect_bb_hang(ah);
136 }
137
138
139
140 static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah,
141 struct ath9k_channel *chan)
142 {
143 return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
144 }
145
146 static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
147 struct ath9k_channel *chan)
148 {
149 ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
150 }
151
152 static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
153 struct ath9k_channel *chan,
154 u16 modesIndex)
155 {
156 if (!ath9k_hw_private_ops(ah)->set_rf_regs)
157 return true;
158
159 return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
160 }
161
162 static inline void ath9k_hw_init_bb(struct ath_hw *ah,
163 struct ath9k_channel *chan)
164 {
165 return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
166 }
167
168 static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah,
169 struct ath9k_channel *chan)
170 {
171 return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan);
172 }
173
174 static inline int ath9k_hw_process_ini(struct ath_hw *ah,
175 struct ath9k_channel *chan)
176 {
177 return ath9k_hw_private_ops(ah)->process_ini(ah, chan);
178 }
179
180 static inline void ath9k_olc_init(struct ath_hw *ah)
181 {
182 if (!ath9k_hw_private_ops(ah)->olc_init)
183 return;
184
185 return ath9k_hw_private_ops(ah)->olc_init(ah);
186 }
187
188 static inline void ath9k_hw_set_rfmode(struct ath_hw *ah,
189 struct ath9k_channel *chan)
190 {
191 return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan);
192 }
193
194 static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah)
195 {
196 return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah);
197 }
198
199 static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah,
200 struct ath9k_channel *chan)
201 {
202 return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan);
203 }
204
205 static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah)
206 {
207 return ath9k_hw_private_ops(ah)->rfbus_req(ah);
208 }
209
210 static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
211 {
212 return ath9k_hw_private_ops(ah)->rfbus_done(ah);
213 }
214
215 static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
216 {
217 if (!ath9k_hw_private_ops(ah)->restore_chainmask)
218 return;
219
220 return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
221 }
222
223 static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
224 enum ath9k_ani_cmd cmd, int param)
225 {
226 return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
227 }
228
229 static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
230 int16_t nfarray[NUM_NF_READINGS])
231 {
232 ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
233 }
234
235 static inline bool ath9k_hw_init_cal(struct ath_hw *ah,
236 struct ath9k_channel *chan)
237 {
238 return ath9k_hw_private_ops(ah)->init_cal(ah, chan);
239 }
240
241 static inline void ath9k_hw_setup_calibration(struct ath_hw *ah,
242 struct ath9k_cal_list *currCal)
243 {
244 ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
245 }
246
247 static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah,
248 struct ath9k_channel *chan,
249 u8 *ini_reloaded)
250 {
251 return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan,
252 ini_reloaded);
253 }
254
255 static inline void ath9k_hw_set_radar_params(struct ath_hw *ah)
256 {
257 if (!ath9k_hw_private_ops(ah)->set_radar_params)
258 return;
259
260 ath9k_hw_private_ops(ah)->set_radar_params(ah, &ah->radar_conf);
261 }
262
263 static inline void ath9k_hw_init_cal_settings(struct ath_hw *ah)
264 {
265 ath9k_hw_private_ops(ah)->init_cal_settings(ah);
266 }
267
268 static inline u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
269 struct ath9k_channel *chan)
270 {
271 return ath9k_hw_private_ops(ah)->compute_pll_control(ah, chan);
272 }
273
274 static inline void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah)
275 {
276 if (!ath9k_hw_private_ops(ah)->init_mode_gain_regs)
277 return;
278
279 ath9k_hw_private_ops(ah)->init_mode_gain_regs(ah);
280 }
281
282 static inline void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah)
283 {
284 if (!ath9k_hw_private_ops(ah)->ani_cache_ini_regs)
285 return;
286
287 ath9k_hw_private_ops(ah)->ani_cache_ini_regs(ah);
288 }
289
290 #endif