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16 #ifndef AR9002_PHY_H
17 #define AR9002_PHY_H
18
19 #define AR_PHY_TEST 0x9800
20 #define PHY_AGC_CLR 0x10000000
21 #define RFSILENT_BB 0x00002000
22
23 #define AR_PHY_TURBO 0x9804
24 #define AR_PHY_FC_TURBO_MODE 0x00000001
25 #define AR_PHY_FC_TURBO_SHORT 0x00000002
26 #define AR_PHY_FC_DYN2040_EN 0x00000004
27 #define AR_PHY_FC_DYN2040_PRI_ONLY 0x00000008
28 #define AR_PHY_FC_DYN2040_PRI_CH 0x00000010
29
30 #define AR_PHY_FC_DYN2040_EXT_CH 0x00000020
31 #define AR_PHY_FC_HT_EN 0x00000040
32 #define AR_PHY_FC_SHORT_GI_40 0x00000080
33 #define AR_PHY_FC_WALSH 0x00000100
34 #define AR_PHY_FC_SINGLE_HT_LTF1 0x00000200
35 #define AR_PHY_FC_ENABLE_DAC_FIFO 0x00000800
36
37 #define AR_PHY_TEST2 0x9808
38
39 #define AR_PHY_TIMING2 0x9810
40 #define AR_PHY_TIMING3 0x9814
41 #define AR_PHY_TIMING3_DSC_MAN 0xFFFE0000
42 #define AR_PHY_TIMING3_DSC_MAN_S 17
43 #define AR_PHY_TIMING3_DSC_EXP 0x0001E000
44 #define AR_PHY_TIMING3_DSC_EXP_S 13
45
46 #define AR_PHY_CHIP_ID_REV_0 0x80
47 #define AR_PHY_CHIP_ID_REV_1 0x81
48 #define AR_PHY_CHIP_ID_9160_REV_0 0xb0
49
50 #define AR_PHY_ACTIVE 0x981C
51 #define AR_PHY_ACTIVE_EN 0x00000001
52 #define AR_PHY_ACTIVE_DIS 0x00000000
53
54 #define AR_PHY_RF_CTL2 0x9824
55 #define AR_PHY_TX_END_DATA_START 0x000000FF
56 #define AR_PHY_TX_END_DATA_START_S 0
57 #define AR_PHY_TX_END_PA_ON 0x0000FF00
58 #define AR_PHY_TX_END_PA_ON_S 8
59
60 #define AR_PHY_RF_CTL3 0x9828
61 #define AR_PHY_TX_END_TO_A2_RX_ON 0x00FF0000
62 #define AR_PHY_TX_END_TO_A2_RX_ON_S 16
63 #define AR_PHY_TX_END_TO_ADC_ON 0xFF000000
64 #define AR_PHY_TX_END_TO_ADC_ON_S 24
65
66 #define AR_PHY_ADC_CTL 0x982C
67 #define AR_PHY_ADC_CTL_OFF_INBUFGAIN 0x00000003
68 #define AR_PHY_ADC_CTL_OFF_INBUFGAIN_S 0
69 #define AR_PHY_ADC_CTL_OFF_PWDDAC 0x00002000
70 #define AR_PHY_ADC_CTL_OFF_PWDBANDGAP 0x00004000
71 #define AR_PHY_ADC_CTL_OFF_PWDADC 0x00008000
72 #define AR_PHY_ADC_CTL_ON_INBUFGAIN 0x00030000
73 #define AR_PHY_ADC_CTL_ON_INBUFGAIN_S 16
74
75 #define AR_PHY_ADC_SERIAL_CTL 0x9830
76 #define AR_PHY_SEL_INTERNAL_ADDAC 0x00000000
77 #define AR_PHY_SEL_EXTERNAL_RADIO 0x00000001
78
79 #define AR_PHY_RF_CTL4 0x9834
80 #define AR_PHY_RF_CTL4_TX_END_XPAB_OFF 0xFF000000
81 #define AR_PHY_RF_CTL4_TX_END_XPAB_OFF_S 24
82 #define AR_PHY_RF_CTL4_TX_END_XPAA_OFF 0x00FF0000
83 #define AR_PHY_RF_CTL4_TX_END_XPAA_OFF_S 16
84 #define AR_PHY_RF_CTL4_FRAME_XPAB_ON 0x0000FF00
85 #define AR_PHY_RF_CTL4_FRAME_XPAB_ON_S 8
86 #define AR_PHY_RF_CTL4_FRAME_XPAA_ON 0x000000FF
87 #define AR_PHY_RF_CTL4_FRAME_XPAA_ON_S 0
88
89 #define AR_PHY_TSTDAC_CONST 0x983c
90
91 #define AR_PHY_SETTLING 0x9844
92 #define AR_PHY_SETTLING_SWITCH 0x00003F80
93 #define AR_PHY_SETTLING_SWITCH_S 7
94
95 #define AR_PHY_RXGAIN 0x9848
96 #define AR_PHY_RXGAIN_TXRX_ATTEN 0x0003F000
97 #define AR_PHY_RXGAIN_TXRX_ATTEN_S 12
98 #define AR_PHY_RXGAIN_TXRX_RF_MAX 0x007C0000
99 #define AR_PHY_RXGAIN_TXRX_RF_MAX_S 18
100 #define AR9280_PHY_RXGAIN_TXRX_ATTEN 0x00003F80
101 #define AR9280_PHY_RXGAIN_TXRX_ATTEN_S 7
102 #define AR9280_PHY_RXGAIN_TXRX_MARGIN 0x001FC000
103 #define AR9280_PHY_RXGAIN_TXRX_MARGIN_S 14
104
105 #define AR_PHY_DESIRED_SZ 0x9850
106 #define AR_PHY_DESIRED_SZ_ADC 0x000000FF
107 #define AR_PHY_DESIRED_SZ_ADC_S 0
108 #define AR_PHY_DESIRED_SZ_PGA 0x0000FF00
109 #define AR_PHY_DESIRED_SZ_PGA_S 8
110 #define AR_PHY_DESIRED_SZ_TOT_DES 0x0FF00000
111 #define AR_PHY_DESIRED_SZ_TOT_DES_S 20
112
113 #define AR_PHY_FIND_SIG 0x9858
114 #define AR_PHY_FIND_SIG_FIRSTEP 0x0003F000
115 #define AR_PHY_FIND_SIG_FIRSTEP_S 12
116 #define AR_PHY_FIND_SIG_FIRPWR 0x03FC0000
117 #define AR_PHY_FIND_SIG_FIRPWR_S 18
118
119 #define AR_PHY_FIND_SIG_LOW 0x9840
120 #define AR_PHY_FIND_SIG_FIRSTEP_LOW 0x00000FC0L
121 #define AR_PHY_FIND_SIG_FIRSTEP_LOW_S 6
122
123 #define AR_PHY_AGC_CTL1 0x985C
124 #define AR_PHY_AGC_CTL1_COARSE_LOW 0x00007F80
125 #define AR_PHY_AGC_CTL1_COARSE_LOW_S 7
126 #define AR_PHY_AGC_CTL1_COARSE_HIGH 0x003F8000
127 #define AR_PHY_AGC_CTL1_COARSE_HIGH_S 15
128
129 #define AR_PHY_CCA 0x9864
130 #define AR_PHY_MINCCA_PWR 0x0FF80000
131 #define AR_PHY_MINCCA_PWR_S 19
132 #define AR_PHY_CCA_THRESH62 0x0007F000
133 #define AR_PHY_CCA_THRESH62_S 12
134 #define AR9280_PHY_MINCCA_PWR 0x1FF00000
135 #define AR9280_PHY_MINCCA_PWR_S 20
136 #define AR9280_PHY_CCA_THRESH62 0x000FF000
137 #define AR9280_PHY_CCA_THRESH62_S 12
138
139 #define AR_PHY_SFCORR_LOW 0x986C
140 #define AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW 0x00000001
141 #define AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW 0x00003F00
142 #define AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW_S 8
143 #define AR_PHY_SFCORR_LOW_M1_THRESH_LOW 0x001FC000
144 #define AR_PHY_SFCORR_LOW_M1_THRESH_LOW_S 14
145 #define AR_PHY_SFCORR_LOW_M2_THRESH_LOW 0x0FE00000
146 #define AR_PHY_SFCORR_LOW_M2_THRESH_LOW_S 21
147
148 #define AR_PHY_SFCORR 0x9868
149 #define AR_PHY_SFCORR_M2COUNT_THR 0x0000001F
150 #define AR_PHY_SFCORR_M2COUNT_THR_S 0
151 #define AR_PHY_SFCORR_M1_THRESH 0x00FE0000
152 #define AR_PHY_SFCORR_M1_THRESH_S 17
153 #define AR_PHY_SFCORR_M2_THRESH 0x7F000000
154 #define AR_PHY_SFCORR_M2_THRESH_S 24
155
156 #define AR_PHY_SLEEP_CTR_CONTROL 0x9870
157 #define AR_PHY_SLEEP_CTR_LIMIT 0x9874
158 #define AR_PHY_SYNTH_CONTROL 0x9874
159 #define AR_PHY_SLEEP_SCAL 0x9878
160
161 #define AR_PHY_PLL_CTL 0x987c
162 #define AR_PHY_PLL_CTL_40 0xaa
163 #define AR_PHY_PLL_CTL_40_5413 0x04
164 #define AR_PHY_PLL_CTL_44 0xab
165 #define AR_PHY_PLL_CTL_44_2133 0xeb
166 #define AR_PHY_PLL_CTL_40_2133 0xea
167
168 #define AR_PHY_SPECTRAL_SCAN 0x9910
169 #define AR_PHY_SPECTRAL_SCAN_ENABLE 0x1
170 #define AR_PHY_SPECTRAL_SCAN_ENA 0x00000001
171 #define AR_PHY_SPECTRAL_SCAN_ENA_S 0
172 #define AR_PHY_SPECTRAL_SCAN_ACTIVE 0x00000002
173 #define AR_PHY_SPECTRAL_SCAN_ACTIVE_S 1
174 #define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD 0x000000F0
175 #define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD_S 4
176 #define AR_PHY_SPECTRAL_SCAN_PERIOD 0x0000FF00
177 #define AR_PHY_SPECTRAL_SCAN_PERIOD_S 8
178 #define AR_PHY_SPECTRAL_SCAN_COUNT 0x00FF0000
179 #define AR_PHY_SPECTRAL_SCAN_COUNT_S 16
180 #define AR_PHY_SPECTRAL_SCAN_COUNT_KIWI 0x0FFF0000
181 #define AR_PHY_SPECTRAL_SCAN_COUNT_KIWI_S 16
182 #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT 0x01000000
183 #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_KIWI 0x10000000
184 #define AR_PHY_SPECTRAL_SCAN_PHYERR_MASK_SELECT 0x40000000
185
186 #define AR_PHY_RX_DELAY 0x9914
187 #define AR_PHY_SEARCH_START_DELAY 0x9918
188 #define AR_PHY_RX_DELAY_DELAY 0x00003FFF
189
190 #define AR_PHY_TIMING_CTRL4(_i) (0x9920 + ((_i) << 12))
191 #define AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF 0x01F
192 #define AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF_S 0
193 #define AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF 0x7E0
194 #define AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF_S 5
195 #define AR_PHY_TIMING_CTRL4_IQCORR_ENABLE 0x800
196 #define AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX 0xF000
197 #define AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX_S 12
198 #define AR_PHY_TIMING_CTRL4_DO_CAL 0x10000
199
200 #define AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI 0x80000000
201 #define AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER 0x40000000
202 #define AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK 0x20000000
203 #define AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK 0x10000000
204
205 #define AR_PHY_TIMING5 0x9924
206 #define AR_PHY_TIMING5_CYCPWR_THR1 0x000000FE
207 #define AR_PHY_TIMING5_CYCPWR_THR1_S 1
208
209 #define AR_PHY_POWER_TX_RATE1 0x9934
210 #define AR_PHY_POWER_TX_RATE2 0x9938
211 #define AR_PHY_POWER_TX_RATE_MAX 0x993c
212 #define AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE 0x00000040
213
214 #define AR_PHY_FRAME_CTL 0x9944
215 #define AR_PHY_FRAME_CTL_TX_CLIP 0x00000038
216 #define AR_PHY_FRAME_CTL_TX_CLIP_S 3
217
218 #define AR_PHY_TXPWRADJ 0x994C
219 #define AR_PHY_TXPWRADJ_CCK_GAIN_DELTA 0x00000FC0
220 #define AR_PHY_TXPWRADJ_CCK_GAIN_DELTA_S 6
221 #define AR_PHY_TXPWRADJ_CCK_PCDAC_INDEX 0x00FC0000
222 #define AR_PHY_TXPWRADJ_CCK_PCDAC_INDEX_S 18
223
224 #define AR_PHY_RADAR_EXT 0x9940
225 #define AR_PHY_RADAR_EXT_ENA 0x00004000
226
227 #define AR_PHY_RADAR_0 0x9954
228 #define AR_PHY_RADAR_0_ENA 0x00000001
229 #define AR_PHY_RADAR_0_FFT_ENA 0x80000000
230 #define AR_PHY_RADAR_0_INBAND 0x0000003e
231 #define AR_PHY_RADAR_0_INBAND_S 1
232 #define AR_PHY_RADAR_0_PRSSI 0x00000FC0
233 #define AR_PHY_RADAR_0_PRSSI_S 6
234 #define AR_PHY_RADAR_0_HEIGHT 0x0003F000
235 #define AR_PHY_RADAR_0_HEIGHT_S 12
236 #define AR_PHY_RADAR_0_RRSSI 0x00FC0000
237 #define AR_PHY_RADAR_0_RRSSI_S 18
238 #define AR_PHY_RADAR_0_FIRPWR 0x7F000000
239 #define AR_PHY_RADAR_0_FIRPWR_S 24
240
241 #define AR_PHY_RADAR_1 0x9958
242 #define AR_PHY_RADAR_1_RELPWR_ENA 0x00800000
243 #define AR_PHY_RADAR_1_USE_FIR128 0x00400000
244 #define AR_PHY_RADAR_1_RELPWR_THRESH 0x003F0000
245 #define AR_PHY_RADAR_1_RELPWR_THRESH_S 16
246 #define AR_PHY_RADAR_1_BLOCK_CHECK 0x00008000
247 #define AR_PHY_RADAR_1_MAX_RRSSI 0x00004000
248 #define AR_PHY_RADAR_1_RELSTEP_CHECK 0x00002000
249 #define AR_PHY_RADAR_1_RELSTEP_THRESH 0x00001F00
250 #define AR_PHY_RADAR_1_RELSTEP_THRESH_S 8
251 #define AR_PHY_RADAR_1_MAXLEN 0x000000FF
252 #define AR_PHY_RADAR_1_MAXLEN_S 0
253
254 #define AR_PHY_SWITCH_CHAIN_0 0x9960
255 #define AR_PHY_SWITCH_COM 0x9964
256
257 #define AR_PHY_SIGMA_DELTA 0x996C
258 #define AR_PHY_SIGMA_DELTA_ADC_SEL 0x00000003
259 #define AR_PHY_SIGMA_DELTA_ADC_SEL_S 0
260 #define AR_PHY_SIGMA_DELTA_FILT2 0x000000F8
261 #define AR_PHY_SIGMA_DELTA_FILT2_S 3
262 #define AR_PHY_SIGMA_DELTA_FILT1 0x00001F00
263 #define AR_PHY_SIGMA_DELTA_FILT1_S 8
264 #define AR_PHY_SIGMA_DELTA_ADC_CLIP 0x01FFE000
265 #define AR_PHY_SIGMA_DELTA_ADC_CLIP_S 13
266
267 #define AR_PHY_RESTART 0x9970
268 #define AR_PHY_RESTART_DIV_GC 0x001C0000
269 #define AR_PHY_RESTART_DIV_GC_S 18
270
271 #define AR_PHY_RFBUS_REQ 0x997C
272 #define AR_PHY_RFBUS_REQ_EN 0x00000001
273
274 #define AR_PHY_TIMING7 0x9980
275 #define AR_PHY_TIMING8 0x9984
276 #define AR_PHY_TIMING8_PILOT_MASK_2 0x000FFFFF
277 #define AR_PHY_TIMING8_PILOT_MASK_2_S 0
278
279 #define AR_PHY_BIN_MASK2_1 0x9988
280 #define AR_PHY_BIN_MASK2_2 0x998c
281 #define AR_PHY_BIN_MASK2_3 0x9990
282 #define AR_PHY_BIN_MASK2_4 0x9994
283
284 #define AR_PHY_BIN_MASK_1 0x9900
285 #define AR_PHY_BIN_MASK_2 0x9904
286 #define AR_PHY_BIN_MASK_3 0x9908
287
288 #define AR_PHY_MASK_CTL 0x990c
289
290 #define AR_PHY_BIN_MASK2_4_MASK_4 0x00003FFF
291 #define AR_PHY_BIN_MASK2_4_MASK_4_S 0
292
293 #define AR_PHY_TIMING9 0x9998
294 #define AR_PHY_TIMING10 0x999c
295 #define AR_PHY_TIMING10_PILOT_MASK_2 0x000FFFFF
296 #define AR_PHY_TIMING10_PILOT_MASK_2_S 0
297
298 #define AR_PHY_TIMING11 0x99a0
299 #define AR_PHY_TIMING11_SPUR_DELTA_PHASE 0x000FFFFF
300 #define AR_PHY_TIMING11_SPUR_DELTA_PHASE_S 0
301 #define AR_PHY_TIMING11_USE_SPUR_IN_AGC 0x40000000
302 #define AR_PHY_TIMING11_USE_SPUR_IN_SELFCOR 0x80000000
303
304 #define AR_PHY_RX_CHAINMASK 0x99a4
305 #define AR_PHY_NEW_ADC_DC_GAIN_CORR(_i) (0x99b4 + ((_i) << 12))
306 #define AR_PHY_NEW_ADC_GAIN_CORR_ENABLE 0x40000000
307 #define AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE 0x80000000
308
309 #define AR_PHY_MULTICHAIN_GAIN_CTL 0x99ac
310 #define AR_PHY_9285_FAST_DIV_BIAS 0x00007E00
311 #define AR_PHY_9285_FAST_DIV_BIAS_S 9
312 #define AR_PHY_9285_ANT_DIV_CTL_ALL 0x7f000000
313 #define AR_PHY_9285_ANT_DIV_CTL 0x01000000
314 #define AR_PHY_9285_ANT_DIV_CTL_S 24
315 #define AR_PHY_9285_ANT_DIV_ALT_LNACONF 0x06000000
316 #define AR_PHY_9285_ANT_DIV_ALT_LNACONF_S 25
317 #define AR_PHY_9285_ANT_DIV_MAIN_LNACONF 0x18000000
318 #define AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S 27
319 #define AR_PHY_9285_ANT_DIV_ALT_GAINTB 0x20000000
320 #define AR_PHY_9285_ANT_DIV_ALT_GAINTB_S 29
321 #define AR_PHY_9285_ANT_DIV_MAIN_GAINTB 0x40000000
322 #define AR_PHY_9285_ANT_DIV_MAIN_GAINTB_S 30
323 #define AR_PHY_9285_ANT_DIV_GAINTB_0 0
324 #define AR_PHY_9285_ANT_DIV_GAINTB_1 1
325
326 #define ATH_BT_COEX_ANTDIV_CONTROL1_ENABLE 0x0b
327 #define ATH_BT_COEX_ANTDIV_CONTROL2_ENABLE 0x09
328 #define ATH_BT_COEX_ANTDIV_CONTROL1_FIXED_A 0x04
329 #define ATH_BT_COEX_ANTDIV_CONTROL2_FIXED_A 0x09
330 #define ATH_BT_COEX_ANT_DIV_SWITCH_COM 0x66666666
331
332 #define AR_PHY_EXT_CCA0 0x99b8
333 #define AR_PHY_EXT_CCA0_THRESH62 0x000000FF
334 #define AR_PHY_EXT_CCA0_THRESH62_S 0
335
336 #define AR_PHY_EXT_CCA 0x99bc
337 #define AR_PHY_EXT_CCA_CYCPWR_THR1 0x0000FE00
338 #define AR_PHY_EXT_CCA_CYCPWR_THR1_S 9
339 #define AR_PHY_EXT_CCA_THRESH62 0x007F0000
340 #define AR_PHY_EXT_CCA_THRESH62_S 16
341 #define AR_PHY_EXT_TIMING5_CYCPWR_THR1 0x0000FE00L
342 #define AR_PHY_EXT_TIMING5_CYCPWR_THR1_S 9
343
344 #define AR_PHY_EXT_MINCCA_PWR 0xFF800000
345 #define AR_PHY_EXT_MINCCA_PWR_S 23
346 #define AR9280_PHY_EXT_MINCCA_PWR 0x01FF0000
347 #define AR9280_PHY_EXT_MINCCA_PWR_S 16
348
349 #define AR_PHY_SFCORR_EXT 0x99c0
350 #define AR_PHY_SFCORR_EXT_M1_THRESH 0x0000007F
351 #define AR_PHY_SFCORR_EXT_M1_THRESH_S 0
352 #define AR_PHY_SFCORR_EXT_M2_THRESH 0x00003F80
353 #define AR_PHY_SFCORR_EXT_M2_THRESH_S 7
354 #define AR_PHY_SFCORR_EXT_M1_THRESH_LOW 0x001FC000
355 #define AR_PHY_SFCORR_EXT_M1_THRESH_LOW_S 14
356 #define AR_PHY_SFCORR_EXT_M2_THRESH_LOW 0x0FE00000
357 #define AR_PHY_SFCORR_EXT_M2_THRESH_LOW_S 21
358 #define AR_PHY_SFCORR_SPUR_SUBCHNL_SD_S 28
359
360 #define AR_PHY_HALFGI 0x99D0
361 #define AR_PHY_HALFGI_DSC_MAN 0x0007FFF0
362 #define AR_PHY_HALFGI_DSC_MAN_S 4
363 #define AR_PHY_HALFGI_DSC_EXP 0x0000000F
364 #define AR_PHY_HALFGI_DSC_EXP_S 0
365
366 #define AR_PHY_CHAN_INFO_MEMORY 0x99DC
367 #define AR_PHY_CHAN_INFO_MEMORY_CAPTURE_MASK 0x0001
368
369 #define AR_PHY_HEAVY_CLIP_ENABLE 0x99E0
370
371 #define AR_PHY_HEAVY_CLIP_FACTOR_RIFS 0x99EC
372 #define AR_PHY_RIFS_INIT_DELAY 0x03ff0000
373
374 #define AR_PHY_M_SLEEP 0x99f0
375 #define AR_PHY_REFCLKDLY 0x99f4
376 #define AR_PHY_REFCLKPD 0x99f8
377
378 #define AR_PHY_CALMODE 0x99f0
379
380 #define AR_PHY_CALMODE_IQ 0x00000000
381 #define AR_PHY_CALMODE_ADC_GAIN 0x00000001
382 #define AR_PHY_CALMODE_ADC_DC_PER 0x00000002
383 #define AR_PHY_CALMODE_ADC_DC_INIT 0x00000003
384
385 #define AR_PHY_CAL_MEAS_0(_i) (0x9c10 + ((_i) << 12))
386 #define AR_PHY_CAL_MEAS_1(_i) (0x9c14 + ((_i) << 12))
387 #define AR_PHY_CAL_MEAS_2(_i) (0x9c18 + ((_i) << 12))
388 #define AR_PHY_CAL_MEAS_3(_i) (0x9c1c + ((_i) << 12))
389
390 #define AR_PHY_CURRENT_RSSI 0x9c1c
391 #define AR9280_PHY_CURRENT_RSSI 0x9c3c
392
393 #define AR_PHY_RFBUS_GRANT 0x9C20
394 #define AR_PHY_RFBUS_GRANT_EN 0x00000001
395
396 #define AR_PHY_CHAN_INFO_GAIN_DIFF 0x9CF4
397 #define AR_PHY_CHAN_INFO_GAIN_DIFF_UPPER_LIMIT 320
398
399 #define AR_PHY_CHAN_INFO_GAIN 0x9CFC
400
401 #define AR_PHY_MODE 0xA200
402 #define AR_PHY_MODE_ASYNCFIFO 0x80
403 #define AR_PHY_MODE_AR2133 0x08
404 #define AR_PHY_MODE_AR5111 0x00
405 #define AR_PHY_MODE_AR5112 0x08
406 #define AR_PHY_MODE_DYNAMIC 0x04
407 #define AR_PHY_MODE_RF2GHZ 0x02
408 #define AR_PHY_MODE_RF5GHZ 0x00
409 #define AR_PHY_MODE_CCK 0x01
410 #define AR_PHY_MODE_OFDM 0x00
411 #define AR_PHY_MODE_DYN_CCK_DISABLE 0x100
412
413 #define AR_PHY_CCK_TX_CTRL 0xA204
414 #define AR_PHY_CCK_TX_CTRL_JAPAN 0x00000010
415 #define AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK 0x0000000C
416 #define AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK_S 2
417
418 #define AR_PHY_CCK_DETECT 0xA208
419 #define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK 0x0000003F
420 #define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK_S 0
421
422 #define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME 0x00001FC0
423 #define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME_S 6
424 #define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV 0x2000
425 #define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV_S 13
426
427 #define AR_PHY_GAIN_2GHZ 0xA20C
428 #define AR_PHY_GAIN_2GHZ_RXTX_MARGIN 0x00FC0000
429 #define AR_PHY_GAIN_2GHZ_RXTX_MARGIN_S 18
430 #define AR_PHY_GAIN_2GHZ_BSW_MARGIN 0x00003C00
431 #define AR_PHY_GAIN_2GHZ_BSW_MARGIN_S 10
432 #define AR_PHY_GAIN_2GHZ_BSW_ATTEN 0x0000001F
433 #define AR_PHY_GAIN_2GHZ_BSW_ATTEN_S 0
434
435 #define AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN 0x003E0000
436 #define AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN_S 17
437 #define AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN 0x0001F000
438 #define AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN_S 12
439 #define AR_PHY_GAIN_2GHZ_XATTEN2_DB 0x00000FC0
440 #define AR_PHY_GAIN_2GHZ_XATTEN2_DB_S 6
441 #define AR_PHY_GAIN_2GHZ_XATTEN1_DB 0x0000003F
442 #define AR_PHY_GAIN_2GHZ_XATTEN1_DB_S 0
443
444 #define AR_PHY_CCK_RXCTRL4 0xA21C
445 #define AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT 0x01F80000
446 #define AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT_S 19
447
448 #define AR_PHY_DAG_CTRLCCK 0xA228
449 #define AR_PHY_DAG_CTRLCCK_EN_RSSI_THR 0x00000200
450 #define AR_PHY_DAG_CTRLCCK_RSSI_THR 0x0001FC00
451 #define AR_PHY_DAG_CTRLCCK_RSSI_THR_S 10
452
453 #define AR_PHY_FORCE_CLKEN_CCK 0xA22C
454 #define AR_PHY_FORCE_CLKEN_CCK_MRC_MUX 0x00000040
455
456 #define AR_PHY_POWER_TX_RATE3 0xA234
457 #define AR_PHY_POWER_TX_RATE4 0xA238
458
459 #define AR_PHY_SCRM_SEQ_XR 0xA23C
460 #define AR_PHY_HEADER_DETECT_XR 0xA240
461 #define AR_PHY_CHIRP_DETECTED_XR 0xA244
462 #define AR_PHY_BLUETOOTH 0xA254
463
464 #define AR_PHY_TPCRG1 0xA258
465 #define AR_PHY_TPCRG1_NUM_PD_GAIN 0x0000c000
466 #define AR_PHY_TPCRG1_NUM_PD_GAIN_S 14
467
468 #define AR_PHY_TPCRG1_PD_GAIN_1 0x00030000
469 #define AR_PHY_TPCRG1_PD_GAIN_1_S 16
470 #define AR_PHY_TPCRG1_PD_GAIN_2 0x000C0000
471 #define AR_PHY_TPCRG1_PD_GAIN_2_S 18
472 #define AR_PHY_TPCRG1_PD_GAIN_3 0x00300000
473 #define AR_PHY_TPCRG1_PD_GAIN_3_S 20
474
475 #define AR_PHY_TPCRG1_PD_CAL_ENABLE 0x00400000
476 #define AR_PHY_TPCRG1_PD_CAL_ENABLE_S 22
477
478 #define AR_PHY_TX_PWRCTRL4 0xa264
479 #define AR_PHY_TX_PWRCTRL_PD_AVG_VALID 0x00000001
480 #define AR_PHY_TX_PWRCTRL_PD_AVG_VALID_S 0
481 #define AR_PHY_TX_PWRCTRL_PD_AVG_OUT 0x000001FE
482 #define AR_PHY_TX_PWRCTRL_PD_AVG_OUT_S 1
483
484 #define AR_PHY_TX_PWRCTRL6_0 0xa270
485 #define AR_PHY_TX_PWRCTRL6_1 0xb270
486 #define AR_PHY_TX_PWRCTRL_ERR_EST_MODE 0x03000000
487 #define AR_PHY_TX_PWRCTRL_ERR_EST_MODE_S 24
488
489 #define AR_PHY_TX_PWRCTRL7 0xa274
490 #define AR_PHY_TX_PWRCTRL_INIT_TX_GAIN 0x01F80000
491 #define AR_PHY_TX_PWRCTRL_INIT_TX_GAIN_S 19
492
493 #define AR_PHY_TX_PWRCTRL8 0xa278
494
495 #define AR_PHY_TX_PWRCTRL9 0xa27C
496
497 #define AR_PHY_TX_PWRCTRL10 0xa394
498 #define AR_PHY_TX_DESIRED_SCALE_CCK 0x00007C00
499 #define AR_PHY_TX_DESIRED_SCALE_CCK_S 10
500 #define AR_PHY_TX_PWRCTRL9_RES_DC_REMOVAL 0x80000000
501 #define AR_PHY_TX_PWRCTRL9_RES_DC_REMOVAL_S 31
502
503 #define AR_PHY_TX_GAIN_TBL1 0xa300
504 #define AR_PHY_TX_GAIN 0x0007F000
505 #define AR_PHY_TX_GAIN_S 12
506
507 #define AR_PHY_CH0_TX_PWRCTRL11 0xa398
508 #define AR_PHY_CH1_TX_PWRCTRL11 0xb398
509 #define AR_PHY_CH0_TX_PWRCTRL12 0xa3dc
510 #define AR_PHY_CH0_TX_PWRCTRL13 0xa3e0
511 #define AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP 0x0000FC00
512 #define AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP_S 10
513
514 #define AR_PHY_VIT_MASK2_M_46_61 0xa3a0
515 #define AR_PHY_MASK2_M_31_45 0xa3a4
516 #define AR_PHY_MASK2_M_16_30 0xa3a8
517 #define AR_PHY_MASK2_M_00_15 0xa3ac
518 #define AR_PHY_MASK2_P_15_01 0xa3b8
519 #define AR_PHY_MASK2_P_30_16 0xa3bc
520 #define AR_PHY_MASK2_P_45_31 0xa3c0
521 #define AR_PHY_MASK2_P_61_45 0xa3c4
522 #define AR_PHY_SPUR_REG 0x994c
523
524 #define AR_PHY_SPUR_REG_MASK_RATE_CNTL (0xFF << 18)
525 #define AR_PHY_SPUR_REG_MASK_RATE_CNTL_S 18
526
527 #define AR_PHY_SPUR_REG_ENABLE_MASK_PPM 0x20000
528 #define AR_PHY_SPUR_REG_MASK_RATE_SELECT (0xFF << 9)
529 #define AR_PHY_SPUR_REG_MASK_RATE_SELECT_S 9
530 #define AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI 0x100
531 #define AR_PHY_SPUR_REG_SPUR_RSSI_THRESH 0x7F
532 #define AR_PHY_SPUR_REG_SPUR_RSSI_THRESH_S 0
533
534 #define AR_PHY_PILOT_MASK_01_30 0xa3b0
535 #define AR_PHY_PILOT_MASK_31_60 0xa3b4
536
537 #define AR_PHY_CHANNEL_MASK_01_30 0x99d4
538 #define AR_PHY_CHANNEL_MASK_31_60 0x99d8
539
540 #define AR_PHY_ANALOG_SWAP 0xa268
541 #define AR_PHY_SWAP_ALT_CHAIN 0x00000040
542
543 #define AR_PHY_TPCRG5 0xA26C
544 #define AR_PHY_TPCRG5_PD_GAIN_OVERLAP 0x0000000F
545 #define AR_PHY_TPCRG5_PD_GAIN_OVERLAP_S 0
546 #define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1 0x000003F0
547 #define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1_S 4
548 #define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2 0x0000FC00
549 #define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2_S 10
550 #define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3 0x003F0000
551 #define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3_S 16
552 #define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4 0x0FC00000
553 #define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4_S 22
554
555
556 #define AR_PHY_CL_CAL_CTL 0xA358
557 #define AR_PHY_CL_CAL_ENABLE 0x00000002
558 #define AR_PHY_PARALLEL_CAL_ENABLE 0x00000001
559
560 #define AR_PHY_POWER_TX_RATE5 0xA38C
561 #define AR_PHY_POWER_TX_RATE6 0xA390
562
563 #define AR_PHY_CAL_CHAINMASK 0xA39C
564
565 #define AR_PHY_POWER_TX_SUB 0xA3C8
566 #define AR_PHY_POWER_TX_RATE7 0xA3CC
567 #define AR_PHY_POWER_TX_RATE8 0xA3D0
568 #define AR_PHY_POWER_TX_RATE9 0xA3D4
569
570 #define AR_PHY_XPA_CFG 0xA3D8
571 #define AR_PHY_FORCE_XPA_CFG 0x000000001
572 #define AR_PHY_FORCE_XPA_CFG_S 0
573
574 #define AR_PHY_CH1_CCA 0xa864
575 #define AR_PHY_CH1_MINCCA_PWR 0x0FF80000
576 #define AR_PHY_CH1_MINCCA_PWR_S 19
577 #define AR9280_PHY_CH1_MINCCA_PWR 0x1FF00000
578 #define AR9280_PHY_CH1_MINCCA_PWR_S 20
579
580 #define AR_PHY_CH2_CCA 0xb864
581 #define AR_PHY_CH2_MINCCA_PWR 0x0FF80000
582 #define AR_PHY_CH2_MINCCA_PWR_S 19
583
584 #define AR_PHY_CH1_EXT_CCA 0xa9bc
585 #define AR_PHY_CH1_EXT_MINCCA_PWR 0xFF800000
586 #define AR_PHY_CH1_EXT_MINCCA_PWR_S 23
587 #define AR9280_PHY_CH1_EXT_MINCCA_PWR 0x01FF0000
588 #define AR9280_PHY_CH1_EXT_MINCCA_PWR_S 16
589
590 #define AR_PHY_CH2_EXT_CCA 0xb9bc
591 #define AR_PHY_CH2_EXT_MINCCA_PWR 0xFF800000
592 #define AR_PHY_CH2_EXT_MINCCA_PWR_S 23
593
594 #define AR_PHY_CCA_NOM_VAL_5416_2GHZ -90
595 #define AR_PHY_CCA_NOM_VAL_5416_5GHZ -100
596 #define AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ -100
597 #define AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ -110
598 #define AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ -80
599 #define AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ -90
600
601 #define AR_PHY_CCA_NOM_VAL_9280_2GHZ -112
602 #define AR_PHY_CCA_NOM_VAL_9280_5GHZ -112
603 #define AR_PHY_CCA_MIN_GOOD_VAL_9280_2GHZ -127
604 #define AR_PHY_CCA_MIN_GOOD_VAL_9280_5GHZ -122
605 #define AR_PHY_CCA_MAX_GOOD_VAL_9280_2GHZ -97
606 #define AR_PHY_CCA_MAX_GOOD_VAL_9280_5GHZ -102
607
608 #define AR_PHY_CCA_NOM_VAL_9285_2GHZ -118
609 #define AR_PHY_CCA_MIN_GOOD_VAL_9285_2GHZ -127
610 #define AR_PHY_CCA_MAX_GOOD_VAL_9285_2GHZ -108
611
612 #define AR_PHY_CCA_NOM_VAL_9271_2GHZ -118
613 #define AR_PHY_CCA_MIN_GOOD_VAL_9271_2GHZ -127
614 #define AR_PHY_CCA_MAX_GOOD_VAL_9271_2GHZ -116
615
616 #define AR_PHY_CCA_NOM_VAL_9287_2GHZ -112
617 #define AR_PHY_CCA_MIN_GOOD_VAL_9287_2GHZ -127
618 #define AR_PHY_CCA_MAX_GOOD_VAL_9287_2GHZ -97
619
620 #endif