root/drivers/net/wireless/ath/wcn36xx/wcn36xx.h

INCLUDED FROM

DEFINITIONS

1. buff_to_be
2. wcn36xx_is_fw_version
3. wcn36xx_priv_to_sta
4. wcn36xx_vif_to_priv
5. wcn36xx_priv_to_vif
6. wcn36xx_sta_to_priv

   1 /*
   2  * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16 
  17 #ifndef _WCN36XX_H_
  18 #define _WCN36XX_H_
  19 
  20 #include <linux/completion.h>
  21 #include <linux/printk.h>
  22 #include <linux/spinlock.h>
  23 #include <net/mac80211.h>
  24 
  25 #include "hal.h"
  26 #include "smd.h"
  27 #include "txrx.h"
  28 #include "dxe.h"
  29 #include "pmc.h"
  30 #include "debug.h"
  31 
  32 #define WLAN_NV_FILE               "wlan/prima/WCNSS_qcom_wlan_nv.bin"
  33 #define WCN36XX_AGGR_BUFFER_SIZE 64
  34 
  35 extern unsigned int wcn36xx_dbg_mask;
  36 
  37 enum wcn36xx_debug_mask {
  38         WCN36XX_DBG_DXE         = 0x00000001,
  39         WCN36XX_DBG_DXE_DUMP    = 0x00000002,
  40         WCN36XX_DBG_SMD         = 0x00000004,
  41         WCN36XX_DBG_SMD_DUMP    = 0x00000008,
  42         WCN36XX_DBG_RX          = 0x00000010,
  43         WCN36XX_DBG_RX_DUMP     = 0x00000020,
  44         WCN36XX_DBG_TX          = 0x00000040,
  45         WCN36XX_DBG_TX_DUMP     = 0x00000080,
  46         WCN36XX_DBG_HAL         = 0x00000100,
  47         WCN36XX_DBG_HAL_DUMP    = 0x00000200,
  48         WCN36XX_DBG_MAC         = 0x00000400,
  49         WCN36XX_DBG_BEACON      = 0x00000800,
  50         WCN36XX_DBG_BEACON_DUMP = 0x00001000,
  51         WCN36XX_DBG_PMC         = 0x00002000,
  52         WCN36XX_DBG_PMC_DUMP    = 0x00004000,
  53         WCN36XX_DBG_TESTMODE            = 0x00008000,
  54         WCN36XX_DBG_TESTMODE_DUMP       = 0x00010000,
  55         WCN36XX_DBG_ANY         = 0xffffffff,
  56 };
  57 
  58 #define wcn36xx_err(fmt, arg...)                                \
  59         printk(KERN_ERR pr_fmt("ERROR " fmt), ##arg)
  60 
  61 #define wcn36xx_warn(fmt, arg...)                               \
  62         printk(KERN_WARNING pr_fmt("WARNING " fmt), ##arg)
  63 
  64 #define wcn36xx_info(fmt, arg...)               \
  65         printk(KERN_INFO pr_fmt(fmt), ##arg)
  66 
  67 #define wcn36xx_dbg(mask, fmt, arg...) do {                     \
  68         if (wcn36xx_dbg_mask & mask)                                    \
  69                 printk(KERN_DEBUG pr_fmt(fmt), ##arg);  \
  70 } while (0)
  71 
  72 #define wcn36xx_dbg_dump(mask, prefix_str, buf, len) do {       \
  73         if (wcn36xx_dbg_mask & mask)                                    \
  74                 print_hex_dump(KERN_DEBUG, pr_fmt(prefix_str),  \
  75                                DUMP_PREFIX_OFFSET, 32, 1,       \
  76                                buf, len, false);                \
  77 } while (0)
  78 
  79 enum wcn36xx_ampdu_state {
  80         WCN36XX_AMPDU_NONE,
  81         WCN36XX_AMPDU_INIT,
  82         WCN36XX_AMPDU_START,
  83         WCN36XX_AMPDU_OPERATIONAL,
  84 };
  85 
  86 #define WCN36XX_HW_CHANNEL(__wcn) (__wcn->hw->conf.chandef.chan->hw_value)
  87 #define WCN36XX_BAND(__wcn) (__wcn->hw->conf.chandef.chan->band)
  88 #define WCN36XX_CENTER_FREQ(__wcn) (__wcn->hw->conf.chandef.chan->center_freq)
  89 #define WCN36XX_LISTEN_INTERVAL(__wcn) (__wcn->hw->conf.listen_interval)
  90 #define WCN36XX_FLAGS(__wcn) (__wcn->hw->flags)
  91 #define WCN36XX_MAX_POWER(__wcn) (__wcn->hw->conf.chandef.chan->max_power)
  92 
  93 #define RF_UNKNOWN      0x0000
  94 #define RF_IRIS_WCN3620 0x3620
  95 
  96 static inline void buff_to_be(u32 *buf, size_t len)
  97 {
  98         int i;
  99         for (i = 0; i < len; i++)
 100                 buf[i] = cpu_to_be32(buf[i]);
 101 }
 102 
 103 struct nv_data {
 104         int     is_valid;
 105         u8      table;
 106 };
 107 
 108 /**
 109  * struct wcn36xx_vif - holds VIF related fields
 110  *
 111  * @bss_index: bss_index is initially set to 0xFF. bss_index is received from
 112  * HW after first config_bss call and must be used in delete_bss and
 113  * enter/exit_bmps.
 114  */
 115 struct wcn36xx_vif {
 116         struct list_head list;
 117         u8 dtim_period;
 118         enum ani_ed_type encrypt_type;
 119         bool is_joining;
 120         bool sta_assoc;
 121         struct wcn36xx_hal_mac_ssid ssid;
 122         enum wcn36xx_hal_bss_type bss_type;
 123 
 124         /* Power management */
 125         enum wcn36xx_power_state pw_state;
 126 
 127         u8 bss_index;
 128         /* Returned from WCN36XX_HAL_ADD_STA_SELF_RSP */
 129         u8 self_sta_index;
 130         u8 self_dpu_desc_index;
 131         u8 self_ucast_dpu_sign;
 132 
 133         struct list_head sta_list;
 134 };
 135 
 136 /**
 137  * struct wcn36xx_sta - holds STA related fields
 138  *
 139  * @tid: traffic ID that is used during AMPDU and in TX BD.
 140  * @sta_index: STA index is returned from HW after config_sta call and is
 141  * used in both SMD channel and TX BD.
 142  * @dpu_desc_index: DPU descriptor index is returned from HW after config_sta
 143  * call and is used in TX BD.
 144  * @bss_sta_index: STA index is returned from HW after config_bss call and is
 145  * used in both SMD channel and TX BD. See table bellow when it is used.
 146  * @bss_dpu_desc_index: DPU descriptor index is returned from HW after
 147  * config_bss call and is used in TX BD.
 148  * ______________________________________________
 149  * |              |     STA     |       AP      |
 150  * |______________|_____________|_______________|
 151  * |    TX BD     |bss_sta_index|   sta_index   |
 152  * |______________|_____________|_______________|
 153  * |all SMD calls |bss_sta_index|   sta_index   |
 154  * |______________|_____________|_______________|
 155  * |smd_delete_sta|  sta_index  |   sta_index   |
 156  * |______________|_____________|_______________|
 157  */
 158 struct wcn36xx_sta {
 159         struct list_head list;
 160         struct wcn36xx_vif *vif;
 161         u16 aid;
 162         u16 tid;
 163         u8 sta_index;
 164         u8 dpu_desc_index;
 165         u8 ucast_dpu_sign;
 166         u8 bss_sta_index;
 167         u8 bss_dpu_desc_index;
 168         bool is_data_encrypted;
 169         /* Rates */
 170         struct wcn36xx_hal_supported_rates supported_rates;
 171 
 172         spinlock_t ampdu_lock;          /* protects next two fields */
 173         enum wcn36xx_ampdu_state ampdu_state[16];
 174         int non_agg_frame_ct;
 175 };
 176 struct wcn36xx_dxe_ch;
 177 struct wcn36xx {
 178         struct ieee80211_hw     *hw;
 179         struct device           *dev;
 180         struct list_head        vif_list;
 181 
 182         const struct firmware   *nv;
 183 
 184         u8                      fw_revision;
 185         u8                      fw_version;
 186         u8                      fw_minor;
 187         u8                      fw_major;
 188         u32                     fw_feat_caps[WCN36XX_HAL_CAPS_SIZE];
 189         bool                    is_pronto;
 190 
 191         /* extra byte for the NULL termination */
 192         u8                      crm_version[WCN36XX_HAL_VERSION_LENGTH + 1];
 193         u8                      wlan_version[WCN36XX_HAL_VERSION_LENGTH + 1];
 194 
 195         bool            first_boot;
 196 
 197         /* IRQs */
 198         int                     tx_irq;
 199         int                     rx_irq;
 200         void __iomem            *ccu_base;
 201         void __iomem            *dxe_base;
 202 
 203         struct rpmsg_endpoint   *smd_channel;
 204 
 205         struct qcom_smem_state  *tx_enable_state;
 206         unsigned                tx_enable_state_bit;
 207         struct qcom_smem_state  *tx_rings_empty_state;
 208         unsigned                tx_rings_empty_state_bit;
 209 
 210         /* prevents concurrent FW reconfiguration */
 211         struct mutex            conf_mutex;
 212 
 213         /*
 214          * smd_buf must be protected with smd_mutex to garantee
 215          * that all messages are sent one after another
 216          */
 217         u8                      *hal_buf;
 218         size_t                  hal_rsp_len;
 219         struct mutex            hal_mutex;
 220         struct completion       hal_rsp_compl;
 221         struct workqueue_struct *hal_ind_wq;
 222         struct work_struct      hal_ind_work;
 223         spinlock_t              hal_ind_lock;
 224         struct list_head        hal_ind_queue;
 225 
 226         struct work_struct      scan_work;
 227         struct cfg80211_scan_request *scan_req;
 228         int                     scan_freq;
 229         int                     scan_band;
 230         struct mutex            scan_lock;
 231         bool                    scan_aborted;
 232 
 233         /* DXE channels */
 234         struct wcn36xx_dxe_ch   dxe_tx_l_ch;    /* TX low */
 235         struct wcn36xx_dxe_ch   dxe_tx_h_ch;    /* TX high */
 236         struct wcn36xx_dxe_ch   dxe_rx_l_ch;    /* RX low */
 237         struct wcn36xx_dxe_ch   dxe_rx_h_ch;    /* RX high */
 238 
 239         /* For synchronization of DXE resources from BH, IRQ and WQ contexts */
 240         spinlock_t      dxe_lock;
 241         bool                    queues_stopped;
 242 
 243         /* Memory pools */
 244         struct wcn36xx_dxe_mem_pool mgmt_mem_pool;
 245         struct wcn36xx_dxe_mem_pool data_mem_pool;
 246 
 247         struct sk_buff          *tx_ack_skb;
 248 
 249         /* RF module */
 250         unsigned                rf_id;
 251 
 252 #ifdef CONFIG_WCN36XX_DEBUGFS
 253         /* Debug file system entry */
 254         struct wcn36xx_dfs_entry    dfs;
 255 #endif /* CONFIG_WCN36XX_DEBUGFS */
 256 
 257 };
 258 
 259 static inline bool wcn36xx_is_fw_version(struct wcn36xx *wcn,
 260                                          u8 major,
 261                                          u8 minor,
 262                                          u8 version,
 263                                          u8 revision)
 264 {
 265         return (wcn->fw_major == major &&
 266                 wcn->fw_minor == minor &&
 267                 wcn->fw_version == version &&
 268                 wcn->fw_revision == revision);
 269 }
 270 void wcn36xx_set_default_rates(struct wcn36xx_hal_supported_rates *rates);
 271 
 272 static inline
 273 struct ieee80211_sta *wcn36xx_priv_to_sta(struct wcn36xx_sta *sta_priv)
 274 {
 275         return container_of((void *)sta_priv, struct ieee80211_sta, drv_priv);
 276 }
 277 
 278 static inline
 279 struct wcn36xx_vif *wcn36xx_vif_to_priv(struct ieee80211_vif *vif)
 280 {
 281         return (struct wcn36xx_vif *) vif->drv_priv;
 282 }
 283 
 284 static inline
 285 struct ieee80211_vif *wcn36xx_priv_to_vif(struct wcn36xx_vif *vif_priv)
 286 {
 287         return container_of((void *) vif_priv, struct ieee80211_vif, drv_priv);
 288 }
 289 
 290 static inline
 291 struct wcn36xx_sta *wcn36xx_sta_to_priv(struct ieee80211_sta *sta)
 292 {
 293         return (struct wcn36xx_sta *)sta->drv_priv;
 294 }
 295 
 296 #endif  /* _WCN36XX_H_ */