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17 #ifndef _HAL_H_
18 #define _HAL_H_
19
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32
33
34 #define WCN36XX_HAL_VER_MAJOR 1
35 #define WCN36XX_HAL_VER_MINOR 4
36 #define WCN36XX_HAL_VER_VERSION 1
37 #define WCN36XX_HAL_VER_REVISION 2
38
39
40 #define WCN36XX_HAL_MAX_ENUM_SIZE 0x7FFFFFFF
41 #define WCN36XX_HAL_MSG_TYPE_MAX_ENUM_SIZE 0x7FFF
42
43
44 #define STACFG_MAX_TC 8
45
46
47 #define WCN36XX_HAL_MAX_AC 4
48
49 #define WCN36XX_HAL_IPV4_ADDR_LEN 4
50
51 #define WCN36XX_HAL_STA_INVALID_IDX 0xFF
52 #define WCN36XX_HAL_BSS_INVALID_IDX 0xFF
53
54
55 #define BEACON_TEMPLATE_SIZE 0x180
56
57
58 #define TIM_MIN_PVM_SIZE 6
59
60
61 #define PARAM_BCN_INTERVAL_CHANGED (1 << 0)
62 #define PARAM_SHORT_PREAMBLE_CHANGED (1 << 1)
63 #define PARAM_SHORT_SLOT_TIME_CHANGED (1 << 2)
64 #define PARAM_llACOEXIST_CHANGED (1 << 3)
65 #define PARAM_llBCOEXIST_CHANGED (1 << 4)
66 #define PARAM_llGCOEXIST_CHANGED (1 << 5)
67 #define PARAM_HT20MHZCOEXIST_CHANGED (1<<6)
68 #define PARAM_NON_GF_DEVICES_PRESENT_CHANGED (1<<7)
69 #define PARAM_RIFS_MODE_CHANGED (1<<8)
70 #define PARAM_LSIG_TXOP_FULL_SUPPORT_CHANGED (1<<9)
71 #define PARAM_OBSS_MODE_CHANGED (1<<10)
72 #define PARAM_BEACON_UPDATE_MASK \
73 (PARAM_BCN_INTERVAL_CHANGED | \
74 PARAM_SHORT_PREAMBLE_CHANGED | \
75 PARAM_SHORT_SLOT_TIME_CHANGED | \
76 PARAM_llACOEXIST_CHANGED | \
77 PARAM_llBCOEXIST_CHANGED | \
78 PARAM_llGCOEXIST_CHANGED | \
79 PARAM_HT20MHZCOEXIST_CHANGED | \
80 PARAM_NON_GF_DEVICES_PRESENT_CHANGED | \
81 PARAM_RIFS_MODE_CHANGED | \
82 PARAM_LSIG_TXOP_FULL_SUPPORT_CHANGED | \
83 PARAM_OBSS_MODE_CHANGED)
84
85
86 #define DUMPCMD_RSP_BUFFER 100
87
88
89 #define WCN36XX_HAL_VERSION_LENGTH 64
90
91
92 #define WCN36XX_AMPDU_START_THRESH 20
93
94 #define WCN36XX_MAX_SCAN_SSIDS 9
95 #define WCN36XX_MAX_SCAN_IE_LEN 500
96
97
98 enum wcn36xx_hal_host_msg_type {
99
100 WCN36XX_HAL_START_REQ = 0,
101 WCN36XX_HAL_START_RSP = 1,
102 WCN36XX_HAL_STOP_REQ = 2,
103 WCN36XX_HAL_STOP_RSP = 3,
104
105
106 WCN36XX_HAL_INIT_SCAN_REQ = 4,
107 WCN36XX_HAL_INIT_SCAN_RSP = 5,
108 WCN36XX_HAL_START_SCAN_REQ = 6,
109 WCN36XX_HAL_START_SCAN_RSP = 7,
110 WCN36XX_HAL_END_SCAN_REQ = 8,
111 WCN36XX_HAL_END_SCAN_RSP = 9,
112 WCN36XX_HAL_FINISH_SCAN_REQ = 10,
113 WCN36XX_HAL_FINISH_SCAN_RSP = 11,
114
115
116 WCN36XX_HAL_CONFIG_STA_REQ = 12,
117 WCN36XX_HAL_CONFIG_STA_RSP = 13,
118 WCN36XX_HAL_DELETE_STA_REQ = 14,
119 WCN36XX_HAL_DELETE_STA_RSP = 15,
120 WCN36XX_HAL_CONFIG_BSS_REQ = 16,
121 WCN36XX_HAL_CONFIG_BSS_RSP = 17,
122 WCN36XX_HAL_DELETE_BSS_REQ = 18,
123 WCN36XX_HAL_DELETE_BSS_RSP = 19,
124
125
126 WCN36XX_HAL_JOIN_REQ = 20,
127 WCN36XX_HAL_JOIN_RSP = 21,
128 WCN36XX_HAL_POST_ASSOC_REQ = 22,
129 WCN36XX_HAL_POST_ASSOC_RSP = 23,
130
131
132 WCN36XX_HAL_SET_BSSKEY_REQ = 24,
133 WCN36XX_HAL_SET_BSSKEY_RSP = 25,
134 WCN36XX_HAL_SET_STAKEY_REQ = 26,
135 WCN36XX_HAL_SET_STAKEY_RSP = 27,
136 WCN36XX_HAL_RMV_BSSKEY_REQ = 28,
137 WCN36XX_HAL_RMV_BSSKEY_RSP = 29,
138 WCN36XX_HAL_RMV_STAKEY_REQ = 30,
139 WCN36XX_HAL_RMV_STAKEY_RSP = 31,
140
141
142 WCN36XX_HAL_ADD_TS_REQ = 32,
143 WCN36XX_HAL_ADD_TS_RSP = 33,
144 WCN36XX_HAL_DEL_TS_REQ = 34,
145 WCN36XX_HAL_DEL_TS_RSP = 35,
146 WCN36XX_HAL_UPD_EDCA_PARAMS_REQ = 36,
147 WCN36XX_HAL_UPD_EDCA_PARAMS_RSP = 37,
148 WCN36XX_HAL_ADD_BA_REQ = 38,
149 WCN36XX_HAL_ADD_BA_RSP = 39,
150 WCN36XX_HAL_DEL_BA_REQ = 40,
151 WCN36XX_HAL_DEL_BA_RSP = 41,
152
153 WCN36XX_HAL_CH_SWITCH_REQ = 42,
154 WCN36XX_HAL_CH_SWITCH_RSP = 43,
155 WCN36XX_HAL_SET_LINK_ST_REQ = 44,
156 WCN36XX_HAL_SET_LINK_ST_RSP = 45,
157 WCN36XX_HAL_GET_STATS_REQ = 46,
158 WCN36XX_HAL_GET_STATS_RSP = 47,
159 WCN36XX_HAL_UPDATE_CFG_REQ = 48,
160 WCN36XX_HAL_UPDATE_CFG_RSP = 49,
161
162 WCN36XX_HAL_MISSED_BEACON_IND = 50,
163 WCN36XX_HAL_UNKNOWN_ADDR2_FRAME_RX_IND = 51,
164 WCN36XX_HAL_MIC_FAILURE_IND = 52,
165 WCN36XX_HAL_FATAL_ERROR_IND = 53,
166 WCN36XX_HAL_SET_KEYDONE_MSG = 54,
167
168
169 WCN36XX_HAL_DOWNLOAD_NV_REQ = 55,
170 WCN36XX_HAL_DOWNLOAD_NV_RSP = 56,
171
172 WCN36XX_HAL_ADD_BA_SESSION_REQ = 57,
173 WCN36XX_HAL_ADD_BA_SESSION_RSP = 58,
174 WCN36XX_HAL_TRIGGER_BA_REQ = 59,
175 WCN36XX_HAL_TRIGGER_BA_RSP = 60,
176 WCN36XX_HAL_UPDATE_BEACON_REQ = 61,
177 WCN36XX_HAL_UPDATE_BEACON_RSP = 62,
178 WCN36XX_HAL_SEND_BEACON_REQ = 63,
179 WCN36XX_HAL_SEND_BEACON_RSP = 64,
180
181 WCN36XX_HAL_SET_BCASTKEY_REQ = 65,
182 WCN36XX_HAL_SET_BCASTKEY_RSP = 66,
183 WCN36XX_HAL_DELETE_STA_CONTEXT_IND = 67,
184 WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_REQ = 68,
185 WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_RSP = 69,
186
187
188 WCN36XX_HAL_PROCESS_PTT_REQ = 70,
189 WCN36XX_HAL_PROCESS_PTT_RSP = 71,
190
191
192 WCN36XX_HAL_SIGNAL_BTAMP_EVENT_REQ = 72,
193 WCN36XX_HAL_SIGNAL_BTAMP_EVENT_RSP = 73,
194 WCN36XX_HAL_TL_HAL_FLUSH_AC_REQ = 74,
195 WCN36XX_HAL_TL_HAL_FLUSH_AC_RSP = 75,
196
197 WCN36XX_HAL_ENTER_IMPS_REQ = 76,
198 WCN36XX_HAL_EXIT_IMPS_REQ = 77,
199 WCN36XX_HAL_ENTER_BMPS_REQ = 78,
200 WCN36XX_HAL_EXIT_BMPS_REQ = 79,
201 WCN36XX_HAL_ENTER_UAPSD_REQ = 80,
202 WCN36XX_HAL_EXIT_UAPSD_REQ = 81,
203 WCN36XX_HAL_UPDATE_UAPSD_PARAM_REQ = 82,
204 WCN36XX_HAL_CONFIGURE_RXP_FILTER_REQ = 83,
205 WCN36XX_HAL_ADD_BCN_FILTER_REQ = 84,
206 WCN36XX_HAL_REM_BCN_FILTER_REQ = 85,
207 WCN36XX_HAL_ADD_WOWL_BCAST_PTRN = 86,
208 WCN36XX_HAL_DEL_WOWL_BCAST_PTRN = 87,
209 WCN36XX_HAL_ENTER_WOWL_REQ = 88,
210 WCN36XX_HAL_EXIT_WOWL_REQ = 89,
211 WCN36XX_HAL_HOST_OFFLOAD_REQ = 90,
212 WCN36XX_HAL_SET_RSSI_THRESH_REQ = 91,
213 WCN36XX_HAL_GET_RSSI_REQ = 92,
214 WCN36XX_HAL_SET_UAPSD_AC_PARAMS_REQ = 93,
215 WCN36XX_HAL_CONFIGURE_APPS_CPU_WAKEUP_STATE_REQ = 94,
216
217 WCN36XX_HAL_ENTER_IMPS_RSP = 95,
218 WCN36XX_HAL_EXIT_IMPS_RSP = 96,
219 WCN36XX_HAL_ENTER_BMPS_RSP = 97,
220 WCN36XX_HAL_EXIT_BMPS_RSP = 98,
221 WCN36XX_HAL_ENTER_UAPSD_RSP = 99,
222 WCN36XX_HAL_EXIT_UAPSD_RSP = 100,
223 WCN36XX_HAL_SET_UAPSD_AC_PARAMS_RSP = 101,
224 WCN36XX_HAL_UPDATE_UAPSD_PARAM_RSP = 102,
225 WCN36XX_HAL_CONFIGURE_RXP_FILTER_RSP = 103,
226 WCN36XX_HAL_ADD_BCN_FILTER_RSP = 104,
227 WCN36XX_HAL_REM_BCN_FILTER_RSP = 105,
228 WCN36XX_HAL_SET_RSSI_THRESH_RSP = 106,
229 WCN36XX_HAL_HOST_OFFLOAD_RSP = 107,
230 WCN36XX_HAL_ADD_WOWL_BCAST_PTRN_RSP = 108,
231 WCN36XX_HAL_DEL_WOWL_BCAST_PTRN_RSP = 109,
232 WCN36XX_HAL_ENTER_WOWL_RSP = 110,
233 WCN36XX_HAL_EXIT_WOWL_RSP = 111,
234 WCN36XX_HAL_RSSI_NOTIFICATION_IND = 112,
235 WCN36XX_HAL_GET_RSSI_RSP = 113,
236 WCN36XX_HAL_CONFIGURE_APPS_CPU_WAKEUP_STATE_RSP = 114,
237
238
239 WCN36XX_HAL_SET_MAX_TX_POWER_REQ = 115,
240 WCN36XX_HAL_SET_MAX_TX_POWER_RSP = 116,
241
242
243 WCN36XX_HAL_AGGR_ADD_TS_REQ = 117,
244 WCN36XX_HAL_AGGR_ADD_TS_RSP = 118,
245
246
247 WCN36XX_HAL_SET_P2P_GONOA_REQ = 119,
248 WCN36XX_HAL_SET_P2P_GONOA_RSP = 120,
249
250
251 WCN36XX_HAL_DUMP_COMMAND_REQ = 121,
252 WCN36XX_HAL_DUMP_COMMAND_RSP = 122,
253
254
255 WCN36XX_HAL_START_OEM_DATA_REQ = 123,
256 WCN36XX_HAL_START_OEM_DATA_RSP = 124,
257
258
259 WCN36XX_HAL_ADD_STA_SELF_REQ = 125,
260 WCN36XX_HAL_ADD_STA_SELF_RSP = 126,
261
262
263 WCN36XX_HAL_DEL_STA_SELF_REQ = 127,
264 WCN36XX_HAL_DEL_STA_SELF_RSP = 128,
265
266
267 WCN36XX_HAL_COEX_IND = 129,
268
269
270 WCN36XX_HAL_OTA_TX_COMPL_IND = 130,
271
272
273 WCN36XX_HAL_HOST_SUSPEND_IND = 131,
274 WCN36XX_HAL_HOST_RESUME_REQ = 132,
275 WCN36XX_HAL_HOST_RESUME_RSP = 133,
276
277 WCN36XX_HAL_SET_TX_POWER_REQ = 134,
278 WCN36XX_HAL_SET_TX_POWER_RSP = 135,
279 WCN36XX_HAL_GET_TX_POWER_REQ = 136,
280 WCN36XX_HAL_GET_TX_POWER_RSP = 137,
281
282 WCN36XX_HAL_P2P_NOA_ATTR_IND = 138,
283
284 WCN36XX_HAL_ENABLE_RADAR_DETECT_REQ = 139,
285 WCN36XX_HAL_ENABLE_RADAR_DETECT_RSP = 140,
286 WCN36XX_HAL_GET_TPC_REPORT_REQ = 141,
287 WCN36XX_HAL_GET_TPC_REPORT_RSP = 142,
288 WCN36XX_HAL_RADAR_DETECT_IND = 143,
289 WCN36XX_HAL_RADAR_DETECT_INTR_IND = 144,
290 WCN36XX_HAL_KEEP_ALIVE_REQ = 145,
291 WCN36XX_HAL_KEEP_ALIVE_RSP = 146,
292
293
294 WCN36XX_HAL_SET_PREF_NETWORK_REQ = 147,
295 WCN36XX_HAL_SET_PREF_NETWORK_RSP = 148,
296 WCN36XX_HAL_SET_RSSI_FILTER_REQ = 149,
297 WCN36XX_HAL_SET_RSSI_FILTER_RSP = 150,
298 WCN36XX_HAL_UPDATE_SCAN_PARAM_REQ = 151,
299 WCN36XX_HAL_UPDATE_SCAN_PARAM_RSP = 152,
300 WCN36XX_HAL_PREF_NETW_FOUND_IND = 153,
301
302 WCN36XX_HAL_SET_TX_PER_TRACKING_REQ = 154,
303 WCN36XX_HAL_SET_TX_PER_TRACKING_RSP = 155,
304 WCN36XX_HAL_TX_PER_HIT_IND = 156,
305
306 WCN36XX_HAL_8023_MULTICAST_LIST_REQ = 157,
307 WCN36XX_HAL_8023_MULTICAST_LIST_RSP = 158,
308
309 WCN36XX_HAL_SET_PACKET_FILTER_REQ = 159,
310 WCN36XX_HAL_SET_PACKET_FILTER_RSP = 160,
311 WCN36XX_HAL_PACKET_FILTER_MATCH_COUNT_REQ = 161,
312 WCN36XX_HAL_PACKET_FILTER_MATCH_COUNT_RSP = 162,
313 WCN36XX_HAL_CLEAR_PACKET_FILTER_REQ = 163,
314 WCN36XX_HAL_CLEAR_PACKET_FILTER_RSP = 164,
315
316
317
318
319
320 WCN36XX_HAL_INIT_SCAN_CON_REQ = 165,
321
322 WCN36XX_HAL_SET_POWER_PARAMS_REQ = 166,
323 WCN36XX_HAL_SET_POWER_PARAMS_RSP = 167,
324
325 WCN36XX_HAL_TSM_STATS_REQ = 168,
326 WCN36XX_HAL_TSM_STATS_RSP = 169,
327
328
329 WCN36XX_HAL_WAKE_REASON_IND = 170,
330
331
332 WCN36XX_HAL_GTK_OFFLOAD_REQ = 171,
333 WCN36XX_HAL_GTK_OFFLOAD_RSP = 172,
334 WCN36XX_HAL_GTK_OFFLOAD_GETINFO_REQ = 173,
335 WCN36XX_HAL_GTK_OFFLOAD_GETINFO_RSP = 174,
336
337 WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_REQ = 175,
338 WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_RSP = 176,
339 WCN36XX_HAL_EXCLUDE_UNENCRYPTED_IND = 177,
340
341 WCN36XX_HAL_SET_THERMAL_MITIGATION_REQ = 178,
342 WCN36XX_HAL_SET_THERMAL_MITIGATION_RSP = 179,
343
344 WCN36XX_HAL_UPDATE_VHT_OP_MODE_REQ = 182,
345 WCN36XX_HAL_UPDATE_VHT_OP_MODE_RSP = 183,
346
347 WCN36XX_HAL_P2P_NOA_START_IND = 184,
348
349 WCN36XX_HAL_GET_ROAM_RSSI_REQ = 185,
350 WCN36XX_HAL_GET_ROAM_RSSI_RSP = 186,
351
352 WCN36XX_HAL_CLASS_B_STATS_IND = 187,
353 WCN36XX_HAL_DEL_BA_IND = 188,
354 WCN36XX_HAL_DHCP_START_IND = 189,
355 WCN36XX_HAL_DHCP_STOP_IND = 190,
356
357
358 WCN36XX_HAL_START_SCAN_OFFLOAD_REQ = 204,
359 WCN36XX_HAL_START_SCAN_OFFLOAD_RSP = 205,
360 WCN36XX_HAL_STOP_SCAN_OFFLOAD_REQ = 206,
361 WCN36XX_HAL_STOP_SCAN_OFFLOAD_RSP = 207,
362 WCN36XX_HAL_SCAN_OFFLOAD_IND = 210,
363
364 WCN36XX_HAL_AVOID_FREQ_RANGE_IND = 233,
365
366 WCN36XX_HAL_PRINT_REG_INFO_IND = 259,
367
368 WCN36XX_HAL_MSG_MAX = WCN36XX_HAL_MSG_TYPE_MAX_ENUM_SIZE
369 };
370
371
372 enum wcn36xx_hal_host_msg_version {
373 WCN36XX_HAL_MSG_VERSION0 = 0,
374 WCN36XX_HAL_MSG_VERSION1 = 1,
375
376 WCN36XX_HAL_MSG_WCNSS_CTRL_VERSION = 0x7FFF,
377 WCN36XX_HAL_MSG_VERSION_MAX_FIELD = WCN36XX_HAL_MSG_WCNSS_CTRL_VERSION
378 };
379
380 enum driver_type {
381 DRIVER_TYPE_PRODUCTION = 0,
382 DRIVER_TYPE_MFG = 1,
383 DRIVER_TYPE_DVT = 2,
384 DRIVER_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
385 };
386
387 enum wcn36xx_hal_stop_type {
388 HAL_STOP_TYPE_SYS_RESET,
389 HAL_STOP_TYPE_SYS_DEEP_SLEEP,
390 HAL_STOP_TYPE_RF_KILL,
391 HAL_STOP_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
392 };
393
394 enum wcn36xx_hal_sys_mode {
395 HAL_SYS_MODE_NORMAL,
396 HAL_SYS_MODE_LEARN,
397 HAL_SYS_MODE_SCAN,
398 HAL_SYS_MODE_PROMISC,
399 HAL_SYS_MODE_SUSPEND_LINK,
400 HAL_SYS_MODE_ROAM_SCAN,
401 HAL_SYS_MODE_ROAM_SUSPEND_LINK,
402 HAL_SYS_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
403 };
404
405 enum phy_chan_bond_state {
406
407 PHY_SINGLE_CHANNEL_CENTERED = 0,
408
409
410 PHY_DOUBLE_CHANNEL_LOW_PRIMARY = 1,
411
412
413 PHY_DOUBLE_CHANNEL_CENTERED = 2,
414
415
416 PHY_DOUBLE_CHANNEL_HIGH_PRIMARY = 3,
417
418
419 PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_CENTERED = 4,
420
421
422 PHY_QUADRUPLE_CHANNEL_20MHZ_CENTERED_40MHZ_CENTERED = 5,
423
424
425 PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_CENTERED = 6,
426
427
428 PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_LOW = 7,
429
430
431 PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_LOW = 8,
432
433
434 PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_HIGH = 9,
435
436
437 PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_HIGH = 10,
438
439 PHY_CHANNEL_BONDING_STATE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
440 };
441
442
443 enum wcn36xx_hal_ht_mimo_state {
444
445 WCN36XX_HAL_HT_MIMO_PS_STATIC = 0,
446
447
448 WCN36XX_HAL_HT_MIMO_PS_DYNAMIC = 1,
449
450
451 WCN36XX_HAL_HT_MIMO_PS_NA = 2,
452
453
454 WCN36XX_HAL_HT_MIMO_PS_NO_LIMIT = 3,
455
456 WCN36XX_HAL_HT_MIMO_PS_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
457 };
458
459
460 enum sta_rate_mode {
461 STA_TAURUS = 0,
462 STA_TITAN,
463 STA_POLARIS,
464 STA_11b,
465 STA_11bg,
466 STA_11a,
467 STA_11n,
468 STA_11ac,
469 STA_INVALID_RATE_MODE = WCN36XX_HAL_MAX_ENUM_SIZE
470 };
471
472
473 #define WCN36XX_HAL_NUM_DSSS_RATES 4
474
475
476 #define WCN36XX_HAL_NUM_OFDM_RATES 8
477
478
479 #define WCN36XX_HAL_NUM_POLARIS_RATES 3
480
481 #define WCN36XX_HAL_MAC_MAX_SUPPORTED_MCS_SET 16
482
483 enum wcn36xx_hal_bss_type {
484 WCN36XX_HAL_INFRASTRUCTURE_MODE,
485
486
487 WCN36XX_HAL_INFRA_AP_MODE,
488
489 WCN36XX_HAL_IBSS_MODE,
490
491
492 WCN36XX_HAL_BTAMP_STA_MODE,
493
494
495 WCN36XX_HAL_BTAMP_AP_MODE,
496
497 WCN36XX_HAL_AUTO_MODE,
498
499 WCN36XX_HAL_DONOT_USE_BSS_TYPE = WCN36XX_HAL_MAX_ENUM_SIZE
500 };
501
502 enum wcn36xx_hal_nw_type {
503 WCN36XX_HAL_11A_NW_TYPE,
504 WCN36XX_HAL_11B_NW_TYPE,
505 WCN36XX_HAL_11G_NW_TYPE,
506 WCN36XX_HAL_11N_NW_TYPE,
507 WCN36XX_HAL_DONOT_USE_NW_TYPE = WCN36XX_HAL_MAX_ENUM_SIZE
508 };
509
510 #define WCN36XX_HAL_MAC_RATESET_EID_MAX 12
511
512 enum wcn36xx_hal_ht_operating_mode {
513
514 WCN36XX_HAL_HT_OP_MODE_PURE,
515
516
517 WCN36XX_HAL_HT_OP_MODE_OVERLAP_LEGACY,
518
519
520 WCN36XX_HAL_HT_OP_MODE_NO_LEGACY_20MHZ_HT,
521
522
523 WCN36XX_HAL_HT_OP_MODE_MIXED,
524
525 WCN36XX_HAL_HT_OP_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
526 };
527
528
529 enum ani_ed_type {
530 WCN36XX_HAL_ED_NONE,
531 WCN36XX_HAL_ED_WEP40,
532 WCN36XX_HAL_ED_WEP104,
533 WCN36XX_HAL_ED_TKIP,
534 WCN36XX_HAL_ED_CCMP,
535 WCN36XX_HAL_ED_WPI,
536 WCN36XX_HAL_ED_AES_128_CMAC,
537 WCN36XX_HAL_ED_NOT_IMPLEMENTED = WCN36XX_HAL_MAX_ENUM_SIZE
538 };
539
540 #define WLAN_MAX_KEY_RSC_LEN 16
541 #define WLAN_WAPI_KEY_RSC_LEN 16
542
543
544 #define WCN36XX_HAL_MAC_MAX_KEY_LENGTH 32
545 #define WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS 4
546
547
548
549
550 enum ani_key_direction {
551 WCN36XX_HAL_TX_ONLY,
552 WCN36XX_HAL_RX_ONLY,
553 WCN36XX_HAL_TX_RX,
554 WCN36XX_HAL_TX_DEFAULT,
555 WCN36XX_HAL_DONOT_USE_KEY_DIRECTION = WCN36XX_HAL_MAX_ENUM_SIZE
556 };
557
558 enum ani_wep_type {
559 WCN36XX_HAL_WEP_STATIC,
560 WCN36XX_HAL_WEP_DYNAMIC,
561 WCN36XX_HAL_WEP_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
562 };
563
564 enum wcn36xx_hal_link_state {
565
566 WCN36XX_HAL_LINK_IDLE_STATE = 0,
567 WCN36XX_HAL_LINK_PREASSOC_STATE = 1,
568 WCN36XX_HAL_LINK_POSTASSOC_STATE = 2,
569 WCN36XX_HAL_LINK_AP_STATE = 3,
570 WCN36XX_HAL_LINK_IBSS_STATE = 4,
571
572
573 WCN36XX_HAL_LINK_BTAMP_PREASSOC_STATE = 5,
574 WCN36XX_HAL_LINK_BTAMP_POSTASSOC_STATE = 6,
575 WCN36XX_HAL_LINK_BTAMP_AP_STATE = 7,
576 WCN36XX_HAL_LINK_BTAMP_STA_STATE = 8,
577
578
579 WCN36XX_HAL_LINK_LEARN_STATE = 9,
580 WCN36XX_HAL_LINK_SCAN_STATE = 10,
581 WCN36XX_HAL_LINK_FINISH_SCAN_STATE = 11,
582 WCN36XX_HAL_LINK_INIT_CAL_STATE = 12,
583 WCN36XX_HAL_LINK_FINISH_CAL_STATE = 13,
584 WCN36XX_HAL_LINK_LISTEN_STATE = 14,
585
586 WCN36XX_HAL_LINK_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
587 };
588
589 enum wcn36xx_hal_stats_mask {
590 HAL_SUMMARY_STATS_INFO = 0x00000001,
591 HAL_GLOBAL_CLASS_A_STATS_INFO = 0x00000002,
592 HAL_GLOBAL_CLASS_B_STATS_INFO = 0x00000004,
593 HAL_GLOBAL_CLASS_C_STATS_INFO = 0x00000008,
594 HAL_GLOBAL_CLASS_D_STATS_INFO = 0x00000010,
595 HAL_PER_STA_STATS_INFO = 0x00000020
596 };
597
598
599 enum bt_amp_event_type {
600 BTAMP_EVENT_CONNECTION_START,
601 BTAMP_EVENT_CONNECTION_STOP,
602 BTAMP_EVENT_CONNECTION_TERMINATED,
603
604
605 BTAMP_EVENT_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE,
606 };
607
608
609 enum pe_stats_mask {
610 PE_SUMMARY_STATS_INFO = 0x00000001,
611 PE_GLOBAL_CLASS_A_STATS_INFO = 0x00000002,
612 PE_GLOBAL_CLASS_B_STATS_INFO = 0x00000004,
613 PE_GLOBAL_CLASS_C_STATS_INFO = 0x00000008,
614 PE_GLOBAL_CLASS_D_STATS_INFO = 0x00000010,
615 PE_PER_STA_STATS_INFO = 0x00000020,
616
617
618 PE_STATS_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
619 };
620
621
622
623
624 #define WCN36XX_HAL_CFG_STA_ID 0
625 #define WCN36XX_HAL_CFG_CURRENT_TX_ANTENNA 1
626 #define WCN36XX_HAL_CFG_CURRENT_RX_ANTENNA 2
627 #define WCN36XX_HAL_CFG_LOW_GAIN_OVERRIDE 3
628 #define WCN36XX_HAL_CFG_POWER_STATE_PER_CHAIN 4
629 #define WCN36XX_HAL_CFG_CAL_PERIOD 5
630 #define WCN36XX_HAL_CFG_CAL_CONTROL 6
631 #define WCN36XX_HAL_CFG_PROXIMITY 7
632 #define WCN36XX_HAL_CFG_NETWORK_DENSITY 8
633 #define WCN36XX_HAL_CFG_MAX_MEDIUM_TIME 9
634 #define WCN36XX_HAL_CFG_MAX_MPDUS_IN_AMPDU 10
635 #define WCN36XX_HAL_CFG_RTS_THRESHOLD 11
636 #define WCN36XX_HAL_CFG_SHORT_RETRY_LIMIT 12
637 #define WCN36XX_HAL_CFG_LONG_RETRY_LIMIT 13
638 #define WCN36XX_HAL_CFG_FRAGMENTATION_THRESHOLD 14
639 #define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_ZERO 15
640 #define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_ONE 16
641 #define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_TWO 17
642 #define WCN36XX_HAL_CFG_FIXED_RATE 18
643 #define WCN36XX_HAL_CFG_RETRYRATE_POLICY 19
644 #define WCN36XX_HAL_CFG_RETRYRATE_SECONDARY 20
645 #define WCN36XX_HAL_CFG_RETRYRATE_TERTIARY 21
646 #define WCN36XX_HAL_CFG_FORCE_POLICY_PROTECTION 22
647 #define WCN36XX_HAL_CFG_FIXED_RATE_MULTICAST_24GHZ 23
648 #define WCN36XX_HAL_CFG_FIXED_RATE_MULTICAST_5GHZ 24
649 #define WCN36XX_HAL_CFG_DEFAULT_RATE_INDEX_24GHZ 25
650 #define WCN36XX_HAL_CFG_DEFAULT_RATE_INDEX_5GHZ 26
651 #define WCN36XX_HAL_CFG_MAX_BA_SESSIONS 27
652 #define WCN36XX_HAL_CFG_PS_DATA_INACTIVITY_TIMEOUT 28
653 #define WCN36XX_HAL_CFG_PS_ENABLE_BCN_FILTER 29
654 #define WCN36XX_HAL_CFG_PS_ENABLE_RSSI_MONITOR 30
655 #define WCN36XX_HAL_CFG_NUM_BEACON_PER_RSSI_AVERAGE 31
656 #define WCN36XX_HAL_CFG_STATS_PERIOD 32
657 #define WCN36XX_HAL_CFG_CFP_MAX_DURATION 33
658 #define WCN36XX_HAL_CFG_FRAME_TRANS_ENABLED 34
659 #define WCN36XX_HAL_CFG_DTIM_PERIOD 35
660 #define WCN36XX_HAL_CFG_EDCA_WMM_ACBK 36
661 #define WCN36XX_HAL_CFG_EDCA_WMM_ACBE 37
662 #define WCN36XX_HAL_CFG_EDCA_WMM_ACVO 38
663 #define WCN36XX_HAL_CFG_EDCA_WMM_ACVI 39
664 #define WCN36XX_HAL_CFG_BA_THRESHOLD_HIGH 40
665 #define WCN36XX_HAL_CFG_MAX_BA_BUFFERS 41
666 #define WCN36XX_HAL_CFG_RPE_POLLING_THRESHOLD 42
667 #define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG 43
668 #define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG 44
669 #define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG 45
670 #define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG 46
671 #define WCN36XX_HAL_CFG_NO_OF_ONCHIP_REORDER_SESSIONS 47
672 #define WCN36XX_HAL_CFG_PS_LISTEN_INTERVAL 48
673 #define WCN36XX_HAL_CFG_PS_HEART_BEAT_THRESHOLD 49
674 #define WCN36XX_HAL_CFG_PS_NTH_BEACON_FILTER 50
675 #define WCN36XX_HAL_CFG_PS_MAX_PS_POLL 51
676 #define WCN36XX_HAL_CFG_PS_MIN_RSSI_THRESHOLD 52
677 #define WCN36XX_HAL_CFG_PS_RSSI_FILTER_PERIOD 53
678 #define WCN36XX_HAL_CFG_PS_BROADCAST_FRAME_FILTER_ENABLE 54
679 #define WCN36XX_HAL_CFG_PS_IGNORE_DTIM 55
680 #define WCN36XX_HAL_CFG_PS_ENABLE_BCN_EARLY_TERM 56
681 #define WCN36XX_HAL_CFG_DYNAMIC_PS_POLL_VALUE 57
682 #define WCN36XX_HAL_CFG_PS_NULLDATA_AP_RESP_TIMEOUT 58
683 #define WCN36XX_HAL_CFG_TELE_BCN_WAKEUP_EN 59
684 #define WCN36XX_HAL_CFG_TELE_BCN_TRANS_LI 60
685 #define WCN36XX_HAL_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS 61
686 #define WCN36XX_HAL_CFG_TELE_BCN_MAX_LI 62
687 #define WCN36XX_HAL_CFG_TELE_BCN_MAX_LI_IDLE_BCNS 63
688 #define WCN36XX_HAL_CFG_TX_PWR_CTRL_ENABLE 64
689 #define WCN36XX_HAL_CFG_VALID_RADAR_CHANNEL_LIST 65
690 #define WCN36XX_HAL_CFG_TX_POWER_24_20 66
691 #define WCN36XX_HAL_CFG_TX_POWER_24_40 67
692 #define WCN36XX_HAL_CFG_TX_POWER_50_20 68
693 #define WCN36XX_HAL_CFG_TX_POWER_50_40 69
694 #define WCN36XX_HAL_CFG_MCAST_BCAST_FILTER_SETTING 70
695 #define WCN36XX_HAL_CFG_BCN_EARLY_TERM_WAKEUP_INTERVAL 71
696 #define WCN36XX_HAL_CFG_MAX_TX_POWER_2_4 72
697 #define WCN36XX_HAL_CFG_MAX_TX_POWER_5 73
698 #define WCN36XX_HAL_CFG_INFRA_STA_KEEP_ALIVE_PERIOD 74
699 #define WCN36XX_HAL_CFG_ENABLE_CLOSE_LOOP 75
700 #define WCN36XX_HAL_CFG_BTC_EXECUTION_MODE 76
701 #define WCN36XX_HAL_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK 77
702 #define WCN36XX_HAL_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS 78
703 #define WCN36XX_HAL_CFG_PS_TX_INACTIVITY_TIMEOUT 79
704 #define WCN36XX_HAL_CFG_WCNSS_API_VERSION 80
705 #define WCN36XX_HAL_CFG_AP_KEEPALIVE_TIMEOUT 81
706 #define WCN36XX_HAL_CFG_GO_KEEPALIVE_TIMEOUT 82
707 #define WCN36XX_HAL_CFG_ENABLE_MC_ADDR_LIST 83
708 #define WCN36XX_HAL_CFG_BTC_STATIC_LEN_INQ_BT 84
709 #define WCN36XX_HAL_CFG_BTC_STATIC_LEN_PAGE_BT 85
710 #define WCN36XX_HAL_CFG_BTC_STATIC_LEN_CONN_BT 86
711 #define WCN36XX_HAL_CFG_BTC_STATIC_LEN_LE_BT 87
712 #define WCN36XX_HAL_CFG_BTC_STATIC_LEN_INQ_WLAN 88
713 #define WCN36XX_HAL_CFG_BTC_STATIC_LEN_PAGE_WLAN 89
714 #define WCN36XX_HAL_CFG_BTC_STATIC_LEN_CONN_WLAN 90
715 #define WCN36XX_HAL_CFG_BTC_STATIC_LEN_LE_WLAN 91
716 #define WCN36XX_HAL_CFG_BTC_DYN_MAX_LEN_BT 92
717 #define WCN36XX_HAL_CFG_BTC_DYN_MAX_LEN_WLAN 93
718 #define WCN36XX_HAL_CFG_BTC_MAX_SCO_BLOCK_PERC 94
719 #define WCN36XX_HAL_CFG_BTC_DHCP_PROT_ON_A2DP 95
720 #define WCN36XX_HAL_CFG_BTC_DHCP_PROT_ON_SCO 96
721 #define WCN36XX_HAL_CFG_ENABLE_UNICAST_FILTER 97
722 #define WCN36XX_HAL_CFG_MAX_ASSOC_LIMIT 98
723 #define WCN36XX_HAL_CFG_ENABLE_LPWR_IMG_TRANSITION 99
724 #define WCN36XX_HAL_CFG_ENABLE_MCC_ADAPTIVE_SCHEDULER 100
725 #define WCN36XX_HAL_CFG_ENABLE_DETECT_PS_SUPPORT 101
726 #define WCN36XX_HAL_CFG_AP_LINK_MONITOR_TIMEOUT 102
727 #define WCN36XX_HAL_CFG_BTC_DWELL_TIME_MULTIPLIER 103
728 #define WCN36XX_HAL_CFG_ENABLE_TDLS_OXYGEN_MODE 104
729 #define WCN36XX_HAL_CFG_MAX_PARAMS 105
730
731
732
733
734 struct wcnss_wlan_version {
735 u8 revision;
736 u8 version;
737 u8 minor;
738 u8 major;
739 } __packed;
740
741
742 struct wcn36xx_hal_keys {
743 u8 id;
744
745
746 u8 unicast;
747
748 enum ani_key_direction direction;
749
750
751 u8 rsc[WLAN_MAX_KEY_RSC_LEN];
752
753
754 u8 pae_role;
755
756 u16 length;
757 u8 key[WCN36XX_HAL_MAC_MAX_KEY_LENGTH];
758 } __packed;
759
760
761
762
763
764 struct wcn36xx_hal_set_sta_key_params {
765
766 u16 sta_index;
767
768
769 enum ani_ed_type enc_type;
770
771
772 enum ani_wep_type wep_type;
773
774
775 u8 def_wep_idx;
776
777
778 struct wcn36xx_hal_keys key[WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS];
779
780
781
782
783
784 u8 single_tid_rc;
785
786 } __packed;
787
788
789 struct wcn36xx_hal_msg_header {
790 enum wcn36xx_hal_host_msg_type msg_type:16;
791 enum wcn36xx_hal_host_msg_version msg_version:16;
792 u32 len;
793 } __packed;
794
795
796 struct wcn36xx_hal_cfg {
797
798
799 u16 id;
800
801
802
803 u16 len;
804
805
806 u16 pad_bytes;
807
808
809 u16 reserve;
810
811
812
813 } __packed;
814
815 struct wcn36xx_hal_mac_start_parameters {
816
817 enum driver_type type;
818
819
820 u32 len;
821
822
823
824
825
826
827
828 } __packed;
829
830 struct wcn36xx_hal_mac_start_req_msg {
831
832 struct wcn36xx_hal_msg_header header;
833 struct wcn36xx_hal_mac_start_parameters params;
834 } __packed;
835
836 struct wcn36xx_hal_mac_start_rsp_params {
837
838 u16 status;
839
840
841 u8 stations;
842
843
844 u8 bssids;
845
846
847 struct wcnss_wlan_version version;
848
849
850 u8 crm_version[WCN36XX_HAL_VERSION_LENGTH];
851
852
853 u8 wlan_version[WCN36XX_HAL_VERSION_LENGTH];
854
855 } __packed;
856
857 struct wcn36xx_hal_mac_start_rsp_msg {
858 struct wcn36xx_hal_msg_header header;
859 struct wcn36xx_hal_mac_start_rsp_params start_rsp_params;
860 } __packed;
861
862 struct wcn36xx_hal_mac_stop_req_params {
863
864 enum wcn36xx_hal_stop_type reason;
865
866 } __packed;
867
868 struct wcn36xx_hal_mac_stop_req_msg {
869 struct wcn36xx_hal_msg_header header;
870 struct wcn36xx_hal_mac_stop_req_params stop_req_params;
871 } __packed;
872
873 struct wcn36xx_hal_mac_stop_rsp_msg {
874 struct wcn36xx_hal_msg_header header;
875
876
877 u32 status;
878 } __packed;
879
880 struct wcn36xx_hal_update_cfg_req_msg {
881
882
883
884
885 struct wcn36xx_hal_msg_header header;
886
887
888 u32 len;
889
890
891
892
893
894
895
896
897
898 } __packed;
899
900 struct wcn36xx_hal_update_cfg_rsp_msg {
901 struct wcn36xx_hal_msg_header header;
902
903
904 u32 status;
905
906 } __packed;
907
908
909 struct wcn36xx_hal_mac_frame_ctl {
910
911 #ifndef ANI_LITTLE_BIT_ENDIAN
912
913 u8 subType:4;
914 u8 type:2;
915 u8 protVer:2;
916
917 u8 order:1;
918 u8 wep:1;
919 u8 moreData:1;
920 u8 powerMgmt:1;
921 u8 retry:1;
922 u8 moreFrag:1;
923 u8 fromDS:1;
924 u8 toDS:1;
925
926 #else
927
928 u8 protVer:2;
929 u8 type:2;
930 u8 subType:4;
931
932 u8 toDS:1;
933 u8 fromDS:1;
934 u8 moreFrag:1;
935 u8 retry:1;
936 u8 powerMgmt:1;
937 u8 moreData:1;
938 u8 wep:1;
939 u8 order:1;
940
941 #endif
942
943 };
944
945
946 struct wcn36xx_hal_mac_seq_ctl {
947 u8 fragNum:4;
948 u8 seqNumLo:4;
949 u8 seqNumHi:8;
950 };
951
952
953 struct wcn36xx_hal_mac_mgmt_hdr {
954 struct wcn36xx_hal_mac_frame_ctl fc;
955 u8 durationLo;
956 u8 durationHi;
957 u8 da[6];
958 u8 sa[6];
959 u8 bssId[6];
960 struct wcn36xx_hal_mac_seq_ctl seqControl;
961 };
962
963
964 #define WCN36XX_HAL_NUM_BSSID 2
965
966
967 struct wcn36xx_hal_scan_entry {
968 u8 bss_index[WCN36XX_HAL_NUM_BSSID];
969 u8 active_bss_count;
970 };
971
972 struct wcn36xx_hal_init_scan_req_msg {
973 struct wcn36xx_hal_msg_header header;
974
975
976
977 enum wcn36xx_hal_sys_mode mode;
978
979
980 u8 bssid[ETH_ALEN];
981
982
983 u8 notify;
984
985
986
987 u8 frame_type;
988
989
990
991
992
993 u8 frame_len;
994
995
996
997 struct wcn36xx_hal_mac_mgmt_hdr mac_mgmt_hdr;
998
999
1000 struct wcn36xx_hal_scan_entry scan_entry;
1001 };
1002
1003 struct wcn36xx_hal_init_scan_con_req_msg {
1004 struct wcn36xx_hal_msg_header header;
1005
1006
1007
1008 enum wcn36xx_hal_sys_mode mode;
1009
1010
1011 u8 bssid[ETH_ALEN];
1012
1013
1014 u8 notify;
1015
1016
1017
1018 u8 frame_type;
1019
1020
1021
1022
1023
1024 u8 frame_length;
1025
1026
1027
1028 struct wcn36xx_hal_mac_mgmt_hdr mac_mgmt_hdr;
1029
1030
1031 struct wcn36xx_hal_scan_entry scan_entry;
1032
1033
1034 u8 use_noa;
1035
1036
1037 u16 scan_duration;
1038
1039 };
1040
1041 struct wcn36xx_hal_init_scan_rsp_msg {
1042 struct wcn36xx_hal_msg_header header;
1043
1044
1045 u32 status;
1046
1047 } __packed;
1048
1049 struct wcn36xx_hal_start_scan_req_msg {
1050 struct wcn36xx_hal_msg_header header;
1051
1052
1053 u8 scan_channel;
1054 } __packed;
1055
1056 struct wcn36xx_hal_start_rsp_msg {
1057 struct wcn36xx_hal_msg_header header;
1058
1059
1060 u32 status;
1061
1062 u32 start_tsf[2];
1063 u8 tx_mgmt_power;
1064
1065 } __packed;
1066
1067 struct wcn36xx_hal_end_scan_req_msg {
1068 struct wcn36xx_hal_msg_header header;
1069
1070
1071
1072
1073 u8 scan_channel;
1074 } __packed;
1075
1076 struct wcn36xx_hal_end_scan_rsp_msg {
1077 struct wcn36xx_hal_msg_header header;
1078
1079
1080 u32 status;
1081 } __packed;
1082
1083 struct wcn36xx_hal_finish_scan_req_msg {
1084 struct wcn36xx_hal_msg_header header;
1085
1086
1087
1088 enum wcn36xx_hal_sys_mode mode;
1089
1090
1091 u8 oper_channel;
1092
1093
1094
1095
1096 enum phy_chan_bond_state cb_state;
1097
1098
1099 u8 bssid[ETH_ALEN];
1100
1101
1102 u8 notify;
1103
1104
1105
1106 u8 frame_type;
1107
1108
1109
1110
1111
1112 u8 frame_length;
1113
1114
1115
1116 struct wcn36xx_hal_mac_mgmt_hdr mac_mgmt_hdr;
1117
1118
1119 struct wcn36xx_hal_scan_entry scan_entry;
1120
1121 } __packed;
1122
1123 struct wcn36xx_hal_finish_scan_rsp_msg {
1124 struct wcn36xx_hal_msg_header header;
1125
1126
1127 u32 status;
1128
1129 } __packed;
1130
1131 enum wcn36xx_hal_scan_type {
1132 WCN36XX_HAL_SCAN_TYPE_PASSIVE = 0x00,
1133 WCN36XX_HAL_SCAN_TYPE_ACTIVE = WCN36XX_HAL_MAX_ENUM_SIZE
1134 };
1135
1136 struct wcn36xx_hal_mac_ssid {
1137 u8 length;
1138 u8 ssid[32];
1139 } __packed;
1140
1141 struct wcn36xx_hal_start_scan_offload_req_msg {
1142 struct wcn36xx_hal_msg_header header;
1143
1144
1145 u8 num_bssid;
1146 u8 bssids[4][ETH_ALEN];
1147
1148
1149 u8 num_ssid;
1150 struct wcn36xx_hal_mac_ssid ssids[10];
1151
1152
1153 u8 scan_hidden;
1154
1155
1156 u8 mac[ETH_ALEN];
1157
1158
1159 enum wcn36xx_hal_bss_type bss_type;
1160
1161
1162 enum wcn36xx_hal_scan_type scan_type;
1163
1164
1165 u32 min_ch_time;
1166
1167
1168 u32 max_ch_time;
1169
1170
1171 u8 p2p_search;
1172
1173
1174 u8 num_channel;
1175 u8 channels[80];
1176
1177
1178 u16 ie_len;
1179 u8 ie[WCN36XX_MAX_SCAN_IE_LEN];
1180 } __packed;
1181
1182 struct wcn36xx_hal_start_scan_offload_rsp_msg {
1183 struct wcn36xx_hal_msg_header header;
1184
1185
1186 u32 status;
1187 } __packed;
1188
1189 enum wcn36xx_hal_scan_offload_ind_type {
1190
1191 WCN36XX_HAL_SCAN_IND_STARTED = 0x01,
1192
1193 WCN36XX_HAL_SCAN_IND_COMPLETED = 0x02,
1194
1195 WCN36XX_HAL_SCAN_IND_FOREIGN_CHANNEL = 0x08,
1196
1197 WCN36XX_HAL_SCAN_IND_DEQUEUED = 0x10,
1198
1199 WCN36XX_HAL_SCAN_IND_PREEMPTED = 0x20,
1200
1201 WCN36XX_HAL_SCAN_IND_FAILED = 0x40,
1202
1203 WCN36XX_HAL_SCAN_IND_RESTARTED = 0x80,
1204 WCN36XX_HAL_SCAN_IND_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
1205 };
1206
1207 struct wcn36xx_hal_scan_offload_ind {
1208 struct wcn36xx_hal_msg_header header;
1209
1210 u32 type;
1211 u32 channel_mhz;
1212 u32 scan_id;
1213 } __packed;
1214
1215 struct wcn36xx_hal_stop_scan_offload_req_msg {
1216 struct wcn36xx_hal_msg_header header;
1217 } __packed;
1218
1219 struct wcn36xx_hal_stop_scan_offload_rsp_msg {
1220 struct wcn36xx_hal_msg_header header;
1221
1222
1223 u32 status;
1224 } __packed;
1225
1226 enum wcn36xx_hal_rate_index {
1227 HW_RATE_INDEX_1MBPS = 0x82,
1228 HW_RATE_INDEX_2MBPS = 0x84,
1229 HW_RATE_INDEX_5_5MBPS = 0x8B,
1230 HW_RATE_INDEX_6MBPS = 0x0C,
1231 HW_RATE_INDEX_9MBPS = 0x12,
1232 HW_RATE_INDEX_11MBPS = 0x96,
1233 HW_RATE_INDEX_12MBPS = 0x18,
1234 HW_RATE_INDEX_18MBPS = 0x24,
1235 HW_RATE_INDEX_24MBPS = 0x30,
1236 HW_RATE_INDEX_36MBPS = 0x48,
1237 HW_RATE_INDEX_48MBPS = 0x60,
1238 HW_RATE_INDEX_54MBPS = 0x6C
1239 };
1240
1241 struct wcn36xx_hal_supported_rates {
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261 enum sta_rate_mode op_rate_mode;
1262
1263
1264
1265 u16 dsss_rates[WCN36XX_HAL_NUM_DSSS_RATES];
1266 u16 ofdm_rates[WCN36XX_HAL_NUM_OFDM_RATES];
1267 u16 legacy_rates[WCN36XX_HAL_NUM_POLARIS_RATES];
1268 u16 reserved;
1269
1270
1271
1272
1273
1274
1275 u32 enhanced_rate_bitmap;
1276
1277
1278
1279
1280
1281 u8 supported_mcs_set[WCN36XX_HAL_MAC_MAX_SUPPORTED_MCS_SET];
1282
1283
1284
1285
1286
1287
1288
1289 u16 rx_highest_data_rate;
1290
1291 } __packed;
1292
1293 struct wcn36xx_hal_config_sta_params {
1294
1295 u8 bssid[ETH_ALEN];
1296
1297
1298 u16 aid;
1299
1300
1301 u8 type;
1302
1303
1304 u8 short_preamble_supported;
1305
1306
1307 u8 mac[ETH_ALEN];
1308
1309
1310 u16 listen_interval;
1311
1312
1313 u8 wmm_enabled;
1314
1315
1316 u8 ht_capable;
1317
1318
1319 u8 tx_channel_width_set;
1320
1321
1322 u8 rifs_mode;
1323
1324
1325
1326
1327 u8 lsig_txop_protection;
1328
1329
1330
1331 u8 max_ampdu_size;
1332
1333
1334 u8 max_ampdu_density;
1335
1336
1337 u8 max_amsdu_size;
1338
1339
1340 u8 sgi_40mhz;
1341
1342
1343 u8 sgi_20Mhz;
1344
1345
1346
1347 struct wcn36xx_hal_supported_rates supported_rates;
1348
1349
1350 u8 rmf;
1351
1352
1353 u32 encrypt_type;
1354
1355
1356
1357
1358 u8 action;
1359
1360
1361
1362
1363 u8 uapsd;
1364
1365
1366 u8 max_sp_len;
1367
1368
1369
1370 u8 green_field_capable;
1371
1372
1373 enum wcn36xx_hal_ht_mimo_state mimo_ps;
1374
1375
1376 u8 delayed_ba_support;
1377
1378
1379 u8 max_ampdu_duration;
1380
1381
1382
1383
1384
1385 u8 dsss_cck_mode_40mhz;
1386
1387
1388
1389 u8 sta_index;
1390
1391
1392
1393
1394 u8 bssid_index;
1395
1396 u8 p2p;
1397
1398
1399
1400
1401 } __packed;
1402
1403 struct wcn36xx_hal_config_sta_req_msg {
1404 struct wcn36xx_hal_msg_header header;
1405 struct wcn36xx_hal_config_sta_params sta_params;
1406 } __packed;
1407
1408 struct wcn36xx_hal_config_sta_params_v1 {
1409
1410 u8 bssid[ETH_ALEN];
1411
1412
1413 u16 aid;
1414
1415
1416 u8 type;
1417
1418
1419 u8 short_preamble_supported;
1420
1421
1422 u8 mac[ETH_ALEN];
1423
1424
1425 u16 listen_interval;
1426
1427
1428 u8 wmm_enabled;
1429
1430
1431 u8 ht_capable;
1432
1433
1434 u8 tx_channel_width_set;
1435
1436
1437 u8 rifs_mode;
1438
1439
1440
1441
1442 u8 lsig_txop_protection;
1443
1444
1445
1446 u8 max_ampdu_size;
1447
1448
1449 u8 max_ampdu_density;
1450
1451
1452 u8 max_amsdu_size;
1453
1454
1455 u8 sgi_40mhz;
1456
1457
1458 u8 sgi_20Mhz;
1459
1460
1461 u8 rmf;
1462
1463
1464 u32 encrypt_type;
1465
1466
1467
1468
1469 u8 action;
1470
1471
1472
1473
1474 u8 uapsd;
1475
1476
1477 u8 max_sp_len;
1478
1479
1480
1481 u8 green_field_capable;
1482
1483
1484 enum wcn36xx_hal_ht_mimo_state mimo_ps;
1485
1486
1487 u8 delayed_ba_support;
1488
1489
1490 u8 max_ampdu_duration;
1491
1492
1493
1494
1495
1496 u8 dsss_cck_mode_40mhz;
1497
1498
1499
1500 u8 sta_index;
1501
1502
1503
1504
1505 u8 bssid_index;
1506
1507 u8 p2p;
1508
1509
1510 u8 reserved;
1511
1512
1513 struct wcn36xx_hal_supported_rates supported_rates;
1514 } __packed;
1515
1516 struct wcn36xx_hal_config_sta_req_msg_v1 {
1517 struct wcn36xx_hal_msg_header header;
1518 struct wcn36xx_hal_config_sta_params_v1 sta_params;
1519 } __packed;
1520
1521 struct config_sta_rsp_params {
1522
1523 u32 status;
1524
1525
1526 u8 sta_index;
1527
1528
1529 u8 bssid_index;
1530
1531
1532 u8 dpu_index;
1533
1534
1535 u8 bcast_dpu_index;
1536
1537
1538 u8 bcast_mgmt_dpu_idx;
1539
1540
1541 u8 uc_ucast_sig;
1542
1543
1544 u8 uc_bcast_sig;
1545
1546
1547 u8 uc_mgmt_sig;
1548
1549 u8 p2p;
1550
1551 } __packed;
1552
1553 struct wcn36xx_hal_config_sta_rsp_msg {
1554 struct wcn36xx_hal_msg_header header;
1555
1556 struct config_sta_rsp_params params;
1557 } __packed;
1558
1559
1560 struct wcn36xx_hal_delete_sta_req_msg {
1561 struct wcn36xx_hal_msg_header header;
1562
1563
1564 u8 sta_index;
1565
1566 } __packed;
1567
1568
1569 struct wcn36xx_hal_delete_sta_rsp_msg {
1570 struct wcn36xx_hal_msg_header header;
1571
1572
1573 u32 status;
1574
1575
1576 u8 sta_id;
1577 } __packed;
1578
1579
1580
1581 struct wcn36xx_hal_rate_set {
1582 u8 num_rates;
1583 u8 rate[WCN36XX_HAL_MAC_RATESET_EID_MAX];
1584 } __packed;
1585
1586
1587 struct wcn36xx_hal_aci_aifsn {
1588 #ifndef ANI_LITTLE_BIT_ENDIAN
1589 u8 rsvd:1;
1590 u8 aci:2;
1591 u8 acm:1;
1592 u8 aifsn:4;
1593 #else
1594 u8 aifsn:4;
1595 u8 acm:1;
1596 u8 aci:2;
1597 u8 rsvd:1;
1598 #endif
1599 } __packed;
1600
1601
1602 struct wcn36xx_hal_mac_cw {
1603 #ifndef ANI_LITTLE_BIT_ENDIAN
1604 u8 max:4;
1605 u8 min:4;
1606 #else
1607 u8 min:4;
1608 u8 max:4;
1609 #endif
1610 } __packed;
1611
1612 struct wcn36xx_hal_edca_param_record {
1613 struct wcn36xx_hal_aci_aifsn aci;
1614 struct wcn36xx_hal_mac_cw cw;
1615 u16 txop_limit;
1616 } __packed;
1617
1618
1619
1620 enum wcn36xx_hal_con_mode {
1621 WCN36XX_HAL_STA_MODE = 0,
1622
1623
1624
1625 WCN36XX_HAL_STA_SAP_MODE = 1,
1626
1627 WCN36XX_HAL_P2P_CLIENT_MODE,
1628 WCN36XX_HAL_P2P_GO_MODE,
1629 WCN36XX_HAL_MONITOR_MODE,
1630 };
1631
1632
1633
1634
1635
1636
1637 enum wcn36xx_hal_concurrency_mode {
1638 HAL_STA = 1,
1639 HAL_SAP = 2,
1640
1641
1642 HAL_STA_SAP = 3,
1643
1644 HAL_P2P_CLIENT = 4,
1645 HAL_P2P_GO = 8,
1646 HAL_MAX_CONCURRENCY_PERSONA = 4
1647 };
1648
1649 struct wcn36xx_hal_config_bss_params {
1650
1651 u8 bssid[ETH_ALEN];
1652
1653
1654 u8 self_mac_addr[ETH_ALEN];
1655
1656
1657 enum wcn36xx_hal_bss_type bss_type;
1658
1659
1660 u8 oper_mode;
1661
1662
1663 enum wcn36xx_hal_nw_type nw_type;
1664
1665
1666 u8 short_slot_time_supported;
1667
1668
1669 u8 lla_coexist;
1670
1671
1672 u8 llb_coexist;
1673
1674
1675 u8 llg_coexist;
1676
1677
1678 u8 ht20_coexist;
1679
1680
1681 u8 lln_non_gf_coexist;
1682
1683
1684 u8 lsig_tx_op_protection_full_support;
1685
1686
1687 u8 rifs_mode;
1688
1689
1690 u16 beacon_interval;
1691
1692
1693 u8 dtim_period;
1694
1695
1696 u8 tx_channel_width_set;
1697
1698
1699 u8 oper_channel;
1700
1701
1702 u8 ext_channel;
1703
1704
1705 u8 reserved;
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716 struct wcn36xx_hal_config_sta_params sta;
1717
1718 struct wcn36xx_hal_mac_ssid ssid;
1719
1720
1721
1722
1723
1724 u8 action;
1725
1726
1727 struct wcn36xx_hal_rate_set rateset;
1728
1729
1730 u8 ht;
1731
1732
1733 u8 obss_prot_enabled;
1734
1735
1736 u8 rmf;
1737
1738
1739 enum wcn36xx_hal_ht_operating_mode ht_oper_mode;
1740
1741
1742 u8 dual_cts_protection;
1743
1744
1745 u8 max_probe_resp_retry_limit;
1746
1747
1748 u8 hidden_ssid;
1749
1750
1751 u8 proxy_probe_resp;
1752
1753
1754
1755
1756
1757 u8 edca_params_valid;
1758
1759
1760 struct wcn36xx_hal_edca_param_record acbe;
1761
1762
1763 struct wcn36xx_hal_edca_param_record acbk;
1764
1765
1766 struct wcn36xx_hal_edca_param_record acvi;
1767
1768
1769 struct wcn36xx_hal_edca_param_record acvo;
1770
1771
1772 u8 ext_set_sta_key_param_valid;
1773
1774
1775 struct wcn36xx_hal_set_sta_key_params ext_set_sta_key_param;
1776
1777
1778
1779 u8 wcn36xx_hal_persona;
1780
1781 u8 spectrum_mgt_enable;
1782
1783
1784 s8 tx_mgmt_power;
1785
1786
1787
1788 s8 max_tx_power;
1789 } __packed;
1790
1791 struct wcn36xx_hal_config_bss_req_msg {
1792 struct wcn36xx_hal_msg_header header;
1793 struct wcn36xx_hal_config_bss_params bss_params;
1794 } __packed;
1795
1796 struct wcn36xx_hal_config_bss_params_v1 {
1797
1798 u8 bssid[ETH_ALEN];
1799
1800
1801 u8 self_mac_addr[ETH_ALEN];
1802
1803
1804 enum wcn36xx_hal_bss_type bss_type;
1805
1806
1807 u8 oper_mode;
1808
1809
1810 enum wcn36xx_hal_nw_type nw_type;
1811
1812
1813 u8 short_slot_time_supported;
1814
1815
1816 u8 lla_coexist;
1817
1818
1819 u8 llb_coexist;
1820
1821
1822 u8 llg_coexist;
1823
1824
1825 u8 ht20_coexist;
1826
1827
1828 u8 lln_non_gf_coexist;
1829
1830
1831 u8 lsig_tx_op_protection_full_support;
1832
1833
1834 u8 rifs_mode;
1835
1836
1837 u16 beacon_interval;
1838
1839
1840 u8 dtim_period;
1841
1842
1843 u8 tx_channel_width_set;
1844
1845
1846 u8 oper_channel;
1847
1848
1849 u8 ext_channel;
1850
1851
1852 u8 reserved;
1853
1854
1855 struct wcn36xx_hal_mac_ssid ssid;
1856
1857
1858
1859
1860
1861 u8 action;
1862
1863
1864 struct wcn36xx_hal_rate_set rateset;
1865
1866
1867 u8 ht;
1868
1869
1870 u8 obss_prot_enabled;
1871
1872
1873 u8 rmf;
1874
1875
1876 enum wcn36xx_hal_ht_operating_mode ht_oper_mode;
1877
1878
1879 u8 dual_cts_protection;
1880
1881
1882 u8 max_probe_resp_retry_limit;
1883
1884
1885 u8 hidden_ssid;
1886
1887
1888 u8 proxy_probe_resp;
1889
1890
1891
1892
1893
1894 u8 edca_params_valid;
1895
1896
1897 struct wcn36xx_hal_edca_param_record acbe;
1898
1899
1900 struct wcn36xx_hal_edca_param_record acbk;
1901
1902
1903 struct wcn36xx_hal_edca_param_record acvi;
1904
1905
1906 struct wcn36xx_hal_edca_param_record acvo;
1907
1908
1909 u8 ext_set_sta_key_param_valid;
1910
1911
1912 struct wcn36xx_hal_set_sta_key_params ext_set_sta_key_param;
1913
1914
1915
1916 u8 wcn36xx_hal_persona;
1917
1918 u8 spectrum_mgt_enable;
1919
1920
1921 s8 tx_mgmt_power;
1922
1923
1924
1925 s8 max_tx_power;
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935 struct wcn36xx_hal_config_sta_params_v1 sta;
1936 } __packed;
1937
1938 struct wcn36xx_hal_config_bss_req_msg_v1 {
1939 struct wcn36xx_hal_msg_header header;
1940 struct wcn36xx_hal_config_bss_params_v1 bss_params;
1941 } __packed;
1942
1943 struct wcn36xx_hal_config_bss_rsp_params {
1944
1945 u32 status;
1946
1947
1948 u8 bss_index;
1949
1950
1951 u8 dpu_desc_index;
1952
1953
1954 u8 ucast_dpu_signature;
1955
1956
1957 u8 bcast_dpu_desc_indx;
1958
1959
1960 u8 bcast_dpu_signature;
1961
1962
1963 u8 mgmt_dpu_desc_index;
1964
1965
1966 u8 mgmt_dpu_signature;
1967
1968
1969 u8 bss_sta_index;
1970
1971
1972 u8 bss_self_sta_index;
1973
1974
1975 u8 bss_bcast_sta_idx;
1976
1977
1978 u8 mac[ETH_ALEN];
1979
1980
1981 s8 tx_mgmt_power;
1982
1983 } __packed;
1984
1985 struct wcn36xx_hal_config_bss_rsp_msg {
1986 struct wcn36xx_hal_msg_header header;
1987 struct wcn36xx_hal_config_bss_rsp_params bss_rsp_params;
1988 } __packed;
1989
1990 struct wcn36xx_hal_delete_bss_req_msg {
1991 struct wcn36xx_hal_msg_header header;
1992
1993
1994 u8 bss_index;
1995
1996 } __packed;
1997
1998 struct wcn36xx_hal_delete_bss_rsp_msg {
1999 struct wcn36xx_hal_msg_header header;
2000
2001
2002 u32 status;
2003
2004
2005 u8 bss_index;
2006
2007 } __packed;
2008
2009 struct wcn36xx_hal_join_req_msg {
2010 struct wcn36xx_hal_msg_header header;
2011
2012
2013 u8 bssid[ETH_ALEN];
2014
2015
2016 u8 channel;
2017
2018
2019 u8 self_sta_mac_addr[ETH_ALEN];
2020
2021
2022 u8 local_power_constraint;
2023
2024
2025 enum phy_chan_bond_state secondary_channel_offset;
2026
2027
2028 enum wcn36xx_hal_link_state link_state;
2029
2030
2031 s8 max_tx_power;
2032 } __packed;
2033
2034 struct wcn36xx_hal_join_rsp_msg {
2035 struct wcn36xx_hal_msg_header header;
2036
2037
2038 u32 status;
2039
2040
2041 u8 tx_mgmt_power;
2042 } __packed;
2043
2044 struct post_assoc_req_msg {
2045 struct wcn36xx_hal_msg_header header;
2046
2047 struct wcn36xx_hal_config_sta_params sta_params;
2048 struct wcn36xx_hal_config_bss_params bss_params;
2049 };
2050
2051 struct post_assoc_rsp_msg {
2052 struct wcn36xx_hal_msg_header header;
2053 struct config_sta_rsp_params sta_rsp_params;
2054 struct wcn36xx_hal_config_bss_rsp_params bss_rsp_params;
2055 };
2056
2057
2058 struct wcn36xx_hal_set_bss_key_req_msg {
2059 struct wcn36xx_hal_msg_header header;
2060
2061
2062 u8 bss_idx;
2063
2064
2065 enum ani_ed_type enc_type;
2066
2067
2068 u8 num_keys;
2069
2070
2071 struct wcn36xx_hal_keys keys[WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS];
2072
2073
2074
2075 u8 single_tid_rc;
2076 } __packed;
2077
2078
2079 struct wcn36xx_hal_set_bss_key_req_msg_tagged {
2080 struct wcn36xx_hal_set_bss_key_req_msg Msg;
2081 u32 tag;
2082 } __packed;
2083
2084 struct wcn36xx_hal_set_bss_key_rsp_msg {
2085 struct wcn36xx_hal_msg_header header;
2086
2087
2088 u32 status;
2089 } __packed;
2090
2091
2092
2093
2094
2095
2096
2097 struct wcn36xx_hal_set_sta_key_req_msg {
2098 struct wcn36xx_hal_msg_header header;
2099 struct wcn36xx_hal_set_sta_key_params set_sta_key_params;
2100 } __packed;
2101
2102 struct wcn36xx_hal_set_sta_key_rsp_msg {
2103 struct wcn36xx_hal_msg_header header;
2104
2105
2106 u32 status;
2107 } __packed;
2108
2109 struct wcn36xx_hal_remove_bss_key_req_msg {
2110 struct wcn36xx_hal_msg_header header;
2111
2112
2113 u8 bss_idx;
2114
2115
2116 enum ani_ed_type enc_type;
2117
2118
2119 u8 key_id;
2120
2121
2122
2123 enum ani_wep_type wep_type;
2124 } __packed;
2125
2126 struct wcn36xx_hal_remove_bss_key_rsp_msg {
2127 struct wcn36xx_hal_msg_header header;
2128
2129
2130 u32 status;
2131 } __packed;
2132
2133
2134
2135
2136 struct wcn36xx_hal_remove_sta_key_req_msg {
2137 struct wcn36xx_hal_msg_header header;
2138
2139
2140 u16 sta_idx;
2141
2142
2143 enum ani_ed_type enc_type;
2144
2145
2146 u8 key_id;
2147
2148
2149
2150 u8 unicast;
2151
2152 } __packed;
2153
2154 struct wcn36xx_hal_remove_sta_key_rsp_msg {
2155 struct wcn36xx_hal_msg_header header;
2156
2157
2158 u32 status;
2159
2160 } __packed;
2161
2162 #ifdef FEATURE_OEM_DATA_SUPPORT
2163
2164 #ifndef OEM_DATA_REQ_SIZE
2165 #define OEM_DATA_REQ_SIZE 134
2166 #endif
2167
2168 #ifndef OEM_DATA_RSP_SIZE
2169 #define OEM_DATA_RSP_SIZE 1968
2170 #endif
2171
2172 struct start_oem_data_req_msg {
2173 struct wcn36xx_hal_msg_header header;
2174
2175 u32 status;
2176 tSirMacAddr self_mac_addr;
2177 u8 oem_data_req[OEM_DATA_REQ_SIZE];
2178
2179 };
2180
2181 struct start_oem_data_rsp_msg {
2182 struct wcn36xx_hal_msg_header header;
2183
2184 u8 oem_data_rsp[OEM_DATA_RSP_SIZE];
2185 };
2186
2187 #endif
2188
2189 struct wcn36xx_hal_switch_channel_req_msg {
2190 struct wcn36xx_hal_msg_header header;
2191
2192
2193 u8 channel_number;
2194
2195
2196 u8 local_power_constraint;
2197
2198
2199 enum phy_chan_bond_state secondary_channel_offset;
2200
2201
2202 u8 tx_mgmt_power;
2203
2204
2205 u8 max_tx_power;
2206
2207
2208 u8 self_sta_mac_addr[ETH_ALEN];
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219 u8 bssid[ETH_ALEN];
2220 } __packed;
2221
2222 struct wcn36xx_hal_switch_channel_rsp_msg {
2223 struct wcn36xx_hal_msg_header header;
2224
2225
2226 u32 status;
2227
2228
2229 u8 channel_number;
2230
2231
2232 u8 tx_mgmt_power;
2233
2234
2235 u8 bssid[ETH_ALEN];
2236
2237 } __packed;
2238
2239 struct wcn36xx_hal_process_ptt_msg_req_msg {
2240 struct wcn36xx_hal_msg_header header;
2241
2242
2243 u8 ptt_msg[0];
2244 } __packed;
2245
2246 struct wcn36xx_hal_process_ptt_msg_rsp_msg {
2247 struct wcn36xx_hal_msg_header header;
2248
2249
2250 u32 ptt_msg_resp_status;
2251
2252 u8 ptt_msg[0];
2253 } __packed;
2254
2255 struct update_edca_params_req_msg {
2256 struct wcn36xx_hal_msg_header header;
2257
2258
2259 u16 bss_index;
2260
2261
2262 struct wcn36xx_hal_edca_param_record acbe;
2263
2264
2265 struct wcn36xx_hal_edca_param_record acbk;
2266
2267
2268 struct wcn36xx_hal_edca_param_record acvi;
2269
2270
2271 struct wcn36xx_hal_edca_param_record acvo;
2272 };
2273
2274 struct update_edca_params_rsp_msg {
2275 struct wcn36xx_hal_msg_header header;
2276
2277
2278 u32 status;
2279 };
2280
2281 struct dpu_stats_params {
2282
2283 u16 sta_index;
2284
2285
2286 u8 enc_mode;
2287
2288
2289 u32 status;
2290
2291
2292 u32 send_blocks;
2293 u32 recv_blocks;
2294 u32 replays;
2295 u8 mic_error_cnt;
2296 u32 prot_excl_cnt;
2297 u16 format_err_cnt;
2298 u16 un_decryptable_cnt;
2299 u32 decrypt_err_cnt;
2300 u32 decrypt_ok_cnt;
2301 };
2302
2303 struct wcn36xx_hal_stats_req_msg {
2304 struct wcn36xx_hal_msg_header header;
2305
2306
2307 u32 sta_id;
2308
2309
2310 u32 stats_mask;
2311 };
2312
2313 struct ani_summary_stats_info {
2314
2315
2316 u32 retry_cnt[4];
2317
2318
2319
2320
2321 u32 multiple_retry_cnt[4];
2322
2323
2324
2325
2326 u32 tx_frm_cnt[4];
2327
2328
2329
2330 u32 rx_frm_cnt;
2331
2332
2333 u32 frm_dup_cnt;
2334
2335
2336 u32 fail_cnt[4];
2337
2338
2339
2340 u32 rts_fail_cnt;
2341
2342
2343
2344 u32 ack_fail_cnt;
2345
2346
2347
2348 u32 rts_succ_cnt;
2349
2350
2351
2352
2353 u32 rx_discard_cnt;
2354
2355
2356
2357
2358 u32 rx_error_cnt;
2359
2360
2361
2362
2363 u32 tx_byte_cnt;
2364 };
2365
2366
2367 enum tx_rate_info {
2368
2369 HAL_TX_RATE_LEGACY = 0x1,
2370
2371
2372 HAL_TX_RATE_HT20 = 0x2,
2373
2374
2375 HAL_TX_RATE_HT40 = 0x4,
2376
2377
2378 HAL_TX_RATE_SGI = 0x8,
2379
2380
2381 HAL_TX_RATE_LGI = 0x10
2382 };
2383
2384 struct ani_global_class_a_stats_info {
2385
2386
2387 u32 rx_frag_cnt;
2388
2389
2390
2391
2392 u32 promiscuous_rx_frag_cnt;
2393
2394
2395
2396
2397
2398 u32 rx_input_sensitivity;
2399
2400
2401
2402 u32 max_pwr;
2403
2404
2405
2406
2407 u32 sync_fail_cnt;
2408
2409
2410
2411 u32 tx_rate;
2412
2413
2414 u32 mcs_index;
2415
2416
2417
2418 u32 tx_rate_flags;
2419 };
2420
2421 struct ani_global_security_stats {
2422
2423
2424
2425 u32 rx_wep_unencrypted_frm_cnt;
2426
2427
2428
2429 u32 rx_mic_fail_cnt;
2430
2431
2432
2433 u32 tkip_icv_err;
2434
2435
2436
2437 u32 aes_ccmp_format_err;
2438
2439
2440
2441 u32 aes_ccmp_replay_cnt;
2442
2443
2444
2445
2446 u32 aes_ccmp_decrpt_err;
2447
2448
2449
2450 u32 wep_undecryptable_cnt;
2451
2452
2453
2454 u32 wep_icv_err;
2455
2456
2457
2458 u32 rx_decrypt_succ_cnt;
2459
2460
2461
2462 u32 rx_decrypt_fail_cnt;
2463 };
2464
2465 struct ani_global_class_b_stats_info {
2466 struct ani_global_security_stats uc_stats;
2467 struct ani_global_security_stats mc_bc_stats;
2468 };
2469
2470 struct ani_global_class_c_stats_info {
2471
2472
2473
2474 u32 rx_amsdu_cnt;
2475
2476
2477
2478 u32 rx_ampdu_cnt;
2479
2480
2481
2482 u32 tx_20_frm_cnt;
2483
2484
2485
2486 u32 rx_20_frm_cnt;
2487
2488
2489
2490 u32 rx_mpdu_in_ampdu_cnt;
2491
2492
2493
2494
2495 u32 ampdu_delimiter_crc_err;
2496 };
2497
2498 struct ani_per_sta_stats_info {
2499
2500
2501 u32 tx_frag_cnt[4];
2502
2503
2504 u32 tx_ampdu_cnt;
2505
2506
2507
2508 u32 tx_mpdu_in_ampdu_cnt;
2509 };
2510
2511 struct wcn36xx_hal_stats_rsp_msg {
2512 struct wcn36xx_hal_msg_header header;
2513
2514
2515 u32 status;
2516
2517
2518 u32 sta_index;
2519
2520
2521 u32 stats_mask;
2522
2523
2524 u16 msg_type;
2525
2526
2527 u16 msg_len;
2528 };
2529
2530 struct wcn36xx_hal_set_link_state_req_msg {
2531 struct wcn36xx_hal_msg_header header;
2532
2533 u8 bssid[ETH_ALEN];
2534 enum wcn36xx_hal_link_state state;
2535 u8 self_mac_addr[ETH_ALEN];
2536
2537 } __packed;
2538
2539 struct set_link_state_rsp_msg {
2540 struct wcn36xx_hal_msg_header header;
2541
2542
2543 u32 status;
2544 };
2545
2546
2547 struct wcn36xx_hal_ts_info_tfc {
2548 #ifndef ANI_LITTLE_BIT_ENDIAN
2549 u16 ackPolicy:2;
2550 u16 userPrio:3;
2551 u16 psb:1;
2552 u16 aggregation:1;
2553 u16 accessPolicy:2;
2554 u16 direction:2;
2555 u16 tsid:4;
2556 u16 trafficType:1;
2557 #else
2558 u16 trafficType:1;
2559 u16 tsid:4;
2560 u16 direction:2;
2561 u16 accessPolicy:2;
2562 u16 aggregation:1;
2563 u16 psb:1;
2564 u16 userPrio:3;
2565 u16 ackPolicy:2;
2566 #endif
2567 };
2568
2569
2570 struct wcn36xx_hal_ts_info_sch {
2571 #ifndef ANI_LITTLE_BIT_ENDIAN
2572 u8 rsvd:7;
2573 u8 schedule:1;
2574 #else
2575 u8 schedule:1;
2576 u8 rsvd:7;
2577 #endif
2578 };
2579
2580
2581 struct wcn36xx_hal_ts_info {
2582 struct wcn36xx_hal_ts_info_tfc traffic;
2583 struct wcn36xx_hal_ts_info_sch schedule;
2584 };
2585
2586
2587 struct wcn36xx_hal_tspec_ie {
2588 u8 type;
2589 u8 length;
2590 struct wcn36xx_hal_ts_info ts_info;
2591 u16 nom_msdu_size;
2592 u16 max_msdu_size;
2593 u32 min_svc_interval;
2594 u32 max_svc_interval;
2595 u32 inact_interval;
2596 u32 suspend_interval;
2597 u32 svc_start_time;
2598 u32 min_data_rate;
2599 u32 mean_data_rate;
2600 u32 peak_data_rate;
2601 u32 max_burst_sz;
2602 u32 delay_bound;
2603 u32 min_phy_rate;
2604 u16 surplus_bw;
2605 u16 medium_time;
2606 };
2607
2608 struct add_ts_req_msg {
2609 struct wcn36xx_hal_msg_header header;
2610
2611
2612 u16 sta_index;
2613
2614
2615 u16 tspec_index;
2616
2617
2618 struct wcn36xx_hal_tspec_ie tspec;
2619
2620
2621
2622
2623 u8 uapsd;
2624
2625
2626
2627
2628 u32 service_interval[WCN36XX_HAL_MAX_AC];
2629
2630
2631 u32 suspend_interval[WCN36XX_HAL_MAX_AC];
2632
2633
2634 u32 delay_interval[WCN36XX_HAL_MAX_AC];
2635 };
2636
2637 struct add_rs_rsp_msg {
2638 struct wcn36xx_hal_msg_header header;
2639
2640
2641 u32 status;
2642 };
2643
2644 struct del_ts_req_msg {
2645 struct wcn36xx_hal_msg_header header;
2646
2647
2648 u16 sta_index;
2649
2650
2651 u16 tspec_index;
2652
2653
2654 u8 bssid[ETH_ALEN];
2655 };
2656
2657 struct del_ts_rsp_msg {
2658 struct wcn36xx_hal_msg_header header;
2659
2660
2661 u32 status;
2662 };
2663
2664
2665
2666
2667
2668 struct wcn36xx_hal_add_ba_session_req_msg {
2669 struct wcn36xx_hal_msg_header header;
2670
2671
2672 u16 sta_index;
2673
2674
2675 u8 mac_addr[ETH_ALEN];
2676
2677
2678
2679 u8 dialog_token;
2680
2681
2682
2683 u8 tid;
2684
2685
2686
2687 u8 policy;
2688
2689
2690
2691
2692
2693
2694
2695 u16 buffer_size;
2696
2697
2698 u16 timeout;
2699
2700
2701
2702
2703 u16 ssn;
2704
2705
2706
2707
2708 u8 direction;
2709 } __packed;
2710
2711 struct wcn36xx_hal_add_ba_session_rsp_msg {
2712 struct wcn36xx_hal_msg_header header;
2713
2714
2715 u32 status;
2716
2717
2718 u8 dialog_token;
2719
2720
2721 u8 ba_tid;
2722
2723
2724 u8 ba_buffer_size;
2725
2726 u8 ba_session_id;
2727
2728
2729 u8 win_size;
2730
2731
2732 u8 sta_index;
2733
2734
2735 u16 ssn;
2736 } __packed;
2737
2738 struct wcn36xx_hal_add_ba_req_msg {
2739 struct wcn36xx_hal_msg_header header;
2740
2741
2742 u8 session_id;
2743
2744
2745 u8 win_size;
2746
2747 #ifdef FEATURE_ON_CHIP_REORDERING
2748 u8 reordering_done_on_chip;
2749 #endif
2750 } __packed;
2751
2752 struct wcn36xx_hal_add_ba_rsp_msg {
2753 struct wcn36xx_hal_msg_header header;
2754
2755
2756 u32 status;
2757
2758
2759 u8 dialog_token;
2760 } __packed;
2761
2762 struct add_ba_info {
2763 u16 ba_enable:1;
2764 u16 starting_seq_num:12;
2765 u16 reserved:3;
2766 };
2767
2768 struct wcn36xx_hal_trigger_ba_rsp_candidate {
2769 u8 sta_addr[ETH_ALEN];
2770 struct add_ba_info ba_info[STACFG_MAX_TC];
2771 } __packed;
2772
2773 struct wcn36xx_hal_trigger_ba_req_candidate {
2774 u8 sta_index;
2775 u8 tid_bitmap;
2776 } __packed;
2777
2778 struct wcn36xx_hal_trigger_ba_req_msg {
2779 struct wcn36xx_hal_msg_header header;
2780
2781
2782 u8 session_id;
2783
2784
2785
2786
2787 u16 candidate_cnt;
2788
2789 } __packed;
2790
2791 struct wcn36xx_hal_trigger_ba_rsp_msg {
2792 struct wcn36xx_hal_msg_header header;
2793
2794
2795 u8 bssid[ETH_ALEN];
2796
2797
2798 u32 status;
2799
2800
2801
2802
2803 u16 candidate_cnt;
2804 } __packed;
2805
2806 struct wcn36xx_hal_del_ba_req_msg {
2807 struct wcn36xx_hal_msg_header header;
2808
2809
2810 u16 sta_index;
2811
2812
2813 u8 tid;
2814
2815
2816
2817
2818 u8 direction;
2819 } __packed;
2820
2821 struct wcn36xx_hal_del_ba_rsp_msg {
2822 struct wcn36xx_hal_msg_header header;
2823
2824
2825 u32 status;
2826 } __packed;
2827
2828 struct tsm_stats_req_msg {
2829 struct wcn36xx_hal_msg_header header;
2830
2831
2832 u8 tid;
2833
2834 u8 bssid[ETH_ALEN];
2835 };
2836
2837 struct tsm_stats_rsp_msg {
2838 struct wcn36xx_hal_msg_header header;
2839
2840
2841 u32 status;
2842
2843
2844 u16 uplink_pkt_queue_delay;
2845
2846
2847 u16 uplink_pkt_queue_delay_hist[4];
2848
2849
2850 u32 uplink_pkt_tx_delay;
2851
2852
2853 u16 uplink_pkt_loss;
2854
2855
2856 u16 uplink_pkt_count;
2857
2858
2859 u8 roaming_count;
2860
2861
2862 u16 roaming_delay;
2863 };
2864
2865 struct set_key_done_msg {
2866 struct wcn36xx_hal_msg_header header;
2867
2868
2869 u8 bssidx;
2870 u8 enc_type;
2871 };
2872
2873 struct wcn36xx_hal_nv_img_download_req_msg {
2874
2875
2876
2877
2878 struct wcn36xx_hal_msg_header header;
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888 u16 frag_number;
2889
2890
2891
2892
2893
2894
2895 u16 last_fragment;
2896
2897
2898 u32 nv_img_buffer_size;
2899
2900
2901
2902
2903 } __packed;
2904
2905 struct wcn36xx_hal_nv_img_download_rsp_msg {
2906 struct wcn36xx_hal_msg_header header;
2907
2908
2909
2910 u32 status;
2911 } __packed;
2912
2913 struct wcn36xx_hal_nv_store_ind {
2914
2915
2916 struct wcn36xx_hal_msg_header header;
2917
2918
2919 u32 table_id;
2920
2921
2922 u32 nv_blob_size;
2923
2924
2925
2926 };
2927
2928
2929
2930 #define WCN36XX_HAL_CIPHER_SEQ_CTR_SIZE 6
2931
2932
2933
2934
2935 struct mic_failure_ind_msg {
2936 struct wcn36xx_hal_msg_header header;
2937
2938 u8 bssid[ETH_ALEN];
2939
2940
2941 u8 src_addr[ETH_ALEN];
2942
2943
2944 u8 ta_addr[ETH_ALEN];
2945
2946 u8 dst_addr[ETH_ALEN];
2947
2948 u8 multicast;
2949
2950
2951 u8 iv1;
2952
2953
2954 u8 key_id;
2955
2956
2957 u8 tsc[WCN36XX_HAL_CIPHER_SEQ_CTR_SIZE];
2958
2959
2960 u8 rx_addr[ETH_ALEN];
2961 };
2962
2963 struct update_vht_op_mode_req_msg {
2964 struct wcn36xx_hal_msg_header header;
2965
2966 u16 op_mode;
2967 u16 sta_id;
2968 };
2969
2970 struct update_vht_op_mode_params_rsp_msg {
2971 struct wcn36xx_hal_msg_header header;
2972
2973 u32 status;
2974 };
2975
2976 struct update_beacon_req_msg {
2977 struct wcn36xx_hal_msg_header header;
2978
2979 u8 bss_index;
2980
2981
2982
2983 u8 short_preamble;
2984
2985
2986 u8 short_slot_time;
2987
2988
2989 u16 beacon_interval;
2990
2991
2992 u8 lla_coexist;
2993 u8 llb_coexist;
2994 u8 llg_coexist;
2995 u8 ht20_coexist;
2996 u8 lln_non_gf_coexist;
2997 u8 lsig_tx_op_protection_full_support;
2998 u8 rifs_mode;
2999
3000 u16 param_change_bitmap;
3001 };
3002
3003 struct update_beacon_rsp_msg {
3004 struct wcn36xx_hal_msg_header header;
3005 u32 status;
3006 };
3007
3008 struct wcn36xx_hal_send_beacon_req_msg {
3009 struct wcn36xx_hal_msg_header header;
3010
3011
3012 u32 beacon_length6;
3013
3014
3015 u32 beacon_length;
3016
3017
3018 u8 beacon[BEACON_TEMPLATE_SIZE - sizeof(u32)];
3019
3020 u8 bssid[ETH_ALEN];
3021
3022
3023 u32 tim_ie_offset;
3024
3025
3026 u16 p2p_ie_offset;
3027 } __packed;
3028
3029 struct send_beacon_rsp_msg {
3030 struct wcn36xx_hal_msg_header header;
3031 u32 status;
3032 } __packed;
3033
3034 struct enable_radar_req_msg {
3035 struct wcn36xx_hal_msg_header header;
3036
3037 u8 bssid[ETH_ALEN];
3038 u8 channel;
3039 };
3040
3041 struct enable_radar_rsp_msg {
3042 struct wcn36xx_hal_msg_header header;
3043
3044
3045 u8 bssid[ETH_ALEN];
3046
3047
3048 u32 status;
3049 };
3050
3051 struct radar_detect_intr_ind_msg {
3052 struct wcn36xx_hal_msg_header header;
3053
3054 u8 radar_det_channel;
3055 };
3056
3057 struct radar_detect_ind_msg {
3058 struct wcn36xx_hal_msg_header header;
3059
3060
3061 u8 channel_number;
3062
3063
3064 u16 radar_pulse_width;
3065
3066
3067 u16 num_radar_pulse;
3068 };
3069
3070 struct wcn36xx_hal_get_tpc_report_req_msg {
3071 struct wcn36xx_hal_msg_header header;
3072
3073 u8 sta[ETH_ALEN];
3074 u8 dialog_token;
3075 u8 txpower;
3076 };
3077
3078 struct wcn36xx_hal_get_tpc_report_rsp_msg {
3079 struct wcn36xx_hal_msg_header header;
3080
3081
3082 u32 status;
3083 };
3084
3085 struct wcn36xx_hal_send_probe_resp_req_msg {
3086 struct wcn36xx_hal_msg_header header;
3087
3088 u8 probe_resp_template[BEACON_TEMPLATE_SIZE];
3089 u32 probe_resp_template_len;
3090 u32 proxy_probe_req_valid_ie_bmap[8];
3091 u8 bssid[ETH_ALEN];
3092 };
3093
3094 struct send_probe_resp_rsp_msg {
3095 struct wcn36xx_hal_msg_header header;
3096
3097
3098 u32 status;
3099 };
3100
3101 struct send_unknown_frame_rx_ind_msg {
3102 struct wcn36xx_hal_msg_header header;
3103
3104
3105 u32 status;
3106 };
3107
3108 struct wcn36xx_hal_delete_sta_context_ind_msg {
3109 struct wcn36xx_hal_msg_header header;
3110
3111 u16 aid;
3112 u16 sta_id;
3113
3114
3115 u8 bssid[ETH_ALEN];
3116
3117
3118 u8 addr2[ETH_ALEN];
3119
3120
3121 u16 reason_code;
3122 } __packed;
3123
3124 struct indicate_del_sta {
3125 struct wcn36xx_hal_msg_header header;
3126 u8 aid;
3127 u8 sta_index;
3128 u8 bss_index;
3129 u8 reason_code;
3130 u32 status;
3131 };
3132
3133 struct bt_amp_event_msg {
3134 struct wcn36xx_hal_msg_header header;
3135
3136 enum bt_amp_event_type btAmpEventType;
3137 };
3138
3139 struct bt_amp_event_rsp {
3140 struct wcn36xx_hal_msg_header header;
3141
3142
3143 u32 status;
3144 };
3145
3146 struct tl_hal_flush_ac_req_msg {
3147 struct wcn36xx_hal_msg_header header;
3148
3149
3150 u8 sta_id;
3151
3152
3153 u8 tid;
3154 };
3155
3156 struct tl_hal_flush_ac_rsp_msg {
3157 struct wcn36xx_hal_msg_header header;
3158
3159
3160 u8 sta_id;
3161
3162
3163 u8 tid;
3164
3165
3166 u32 status;
3167 };
3168
3169 struct wcn36xx_hal_enter_imps_req_msg {
3170 struct wcn36xx_hal_msg_header header;
3171 };
3172
3173 struct wcn36xx_hal_exit_imps_req {
3174 struct wcn36xx_hal_msg_header header;
3175 };
3176
3177 struct wcn36xx_hal_enter_bmps_req_msg {
3178 struct wcn36xx_hal_msg_header header;
3179
3180 u8 bss_index;
3181
3182
3183 #ifndef BUILD_QWPTTSTATIC
3184 u64 tbtt;
3185 #endif
3186 u8 dtim_count;
3187
3188
3189
3190 u8 dtim_period;
3191
3192
3193 u32 rssi_filter_period;
3194
3195 u32 num_beacon_per_rssi_average;
3196 u8 rssi_filter_enable;
3197 } __packed;
3198
3199 struct wcn36xx_hal_exit_bmps_req_msg {
3200 struct wcn36xx_hal_msg_header header;
3201
3202 u8 send_data_null;
3203 u8 bss_index;
3204 } __packed;
3205
3206 struct wcn36xx_hal_missed_beacon_ind_msg {
3207 struct wcn36xx_hal_msg_header header;
3208
3209 u8 bss_index;
3210 } __packed;
3211
3212
3213
3214
3215
3216
3217 struct beacon_filter_ie {
3218 u8 element_id;
3219 u8 check_ie_presence;
3220 u8 offset;
3221 u8 value;
3222 u8 bitmask;
3223 u8 ref;
3224 };
3225
3226 struct wcn36xx_hal_add_bcn_filter_req_msg {
3227 struct wcn36xx_hal_msg_header header;
3228
3229 u16 capability_info;
3230 u16 capability_mask;
3231 u16 beacon_interval;
3232 u16 ie_num;
3233 u8 bss_index;
3234 u8 reserved;
3235 };
3236
3237 struct wcn36xx_hal_rem_bcn_filter_req {
3238 struct wcn36xx_hal_msg_header header;
3239
3240 u8 ie_Count;
3241 u8 rem_ie_id[1];
3242 };
3243
3244 #define WCN36XX_HAL_IPV4_ARP_REPLY_OFFLOAD 0
3245 #define WCN36XX_HAL_IPV6_NEIGHBOR_DISCOVERY_OFFLOAD 1
3246 #define WCN36XX_HAL_IPV6_NS_OFFLOAD 2
3247 #define WCN36XX_HAL_IPV6_ADDR_LEN 16
3248 #define WCN36XX_HAL_OFFLOAD_DISABLE 0
3249 #define WCN36XX_HAL_OFFLOAD_ENABLE 1
3250 #define WCN36XX_HAL_OFFLOAD_BCAST_FILTER_ENABLE 0x2
3251 #define WCN36XX_HAL_OFFLOAD_ARP_AND_BCAST_FILTER_ENABLE \
3252 (HAL_OFFLOAD_ENABLE|HAL_OFFLOAD_BCAST_FILTER_ENABLE)
3253
3254 struct wcn36xx_hal_ns_offload_params {
3255 u8 src_ipv6_addr[WCN36XX_HAL_IPV6_ADDR_LEN];
3256 u8 self_ipv6_addr[WCN36XX_HAL_IPV6_ADDR_LEN];
3257
3258
3259 u8 target_ipv6_addr1[WCN36XX_HAL_IPV6_ADDR_LEN];
3260 u8 target_ipv6_addr2[WCN36XX_HAL_IPV6_ADDR_LEN];
3261
3262 u8 self_addr[ETH_ALEN];
3263 u8 src_ipv6_addr_valid:1;
3264 u8 target_ipv6_addr1_valid:1;
3265 u8 target_ipv6_addr2_valid:1;
3266 u8 reserved1:5;
3267
3268
3269 u8 reserved2;
3270
3271
3272 u32 slot_index;
3273 u8 bss_index;
3274 };
3275
3276 struct wcn36xx_hal_host_offload_req {
3277 u8 offload_Type;
3278
3279
3280 u8 enable;
3281
3282 union {
3283 u8 host_ipv4_addr[4];
3284 u8 host_ipv6_addr[WCN36XX_HAL_IPV6_ADDR_LEN];
3285 } u;
3286 };
3287
3288 struct wcn36xx_hal_host_offload_req_msg {
3289 struct wcn36xx_hal_msg_header header;
3290 struct wcn36xx_hal_host_offload_req host_offload_params;
3291 struct wcn36xx_hal_ns_offload_params ns_offload_params;
3292 };
3293
3294
3295 #define WCN36XX_HAL_KEEP_ALIVE_NULL_PKT 1
3296 #define WCN36XX_HAL_KEEP_ALIVE_UNSOLICIT_ARP_RSP 2
3297
3298
3299 #define WCN36XX_HAL_KEEP_ALIVE_DISABLE 0
3300 #define WCN36XX_HAL_KEEP_ALIVE_ENABLE 1
3301 #define WCN36XX_KEEP_ALIVE_TIME_PERIOD 30
3302
3303
3304 struct wcn36xx_hal_keep_alive_req_msg {
3305 struct wcn36xx_hal_msg_header header;
3306
3307 u8 packet_type;
3308 u32 time_period;
3309 u8 host_ipv4_addr[WCN36XX_HAL_IPV4_ADDR_LEN];
3310 u8 dest_ipv4_addr[WCN36XX_HAL_IPV4_ADDR_LEN];
3311 u8 dest_addr[ETH_ALEN];
3312 u8 bss_index;
3313 } __packed;
3314
3315 struct wcn36xx_hal_rssi_threshold_req_msg {
3316 struct wcn36xx_hal_msg_header header;
3317
3318 s8 threshold1:8;
3319 s8 threshold2:8;
3320 s8 threshold3:8;
3321 u8 thres1_pos_notify:1;
3322 u8 thres1_neg_notify:1;
3323 u8 thres2_pos_notify:1;
3324 u8 thres2_neg_notify:1;
3325 u8 thres3_pos_notify:1;
3326 u8 thres3_neg_notify:1;
3327 u8 reserved10:2;
3328 };
3329
3330 struct wcn36xx_hal_enter_uapsd_req_msg {
3331 struct wcn36xx_hal_msg_header header;
3332
3333 u8 bk_delivery:1;
3334 u8 be_delivery:1;
3335 u8 vi_delivery:1;
3336 u8 vo_delivery:1;
3337 u8 bk_trigger:1;
3338 u8 be_trigger:1;
3339 u8 vi_trigger:1;
3340 u8 vo_trigger:1;
3341 u8 bss_index;
3342 };
3343
3344 struct wcn36xx_hal_exit_uapsd_req_msg {
3345 struct wcn36xx_hal_msg_header header;
3346 u8 bss_index;
3347 };
3348
3349 #define WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE 128
3350 #define WCN36XX_HAL_WOWL_BCAST_MAX_NUM_PATTERNS 16
3351
3352 struct wcn36xx_hal_wowl_add_bcast_ptrn_req_msg {
3353 struct wcn36xx_hal_msg_header header;
3354
3355
3356 u8 id;
3357
3358
3359
3360 u8 byte_Offset;
3361
3362
3363 u8 size;
3364
3365
3366 u8 pattern[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
3367
3368
3369 u8 mask_size;
3370
3371
3372 u8 mask[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
3373
3374
3375 u8 extra[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
3376
3377
3378 u8 mask_extra[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
3379
3380 u8 bss_index;
3381 };
3382
3383 struct wcn36xx_hal_wow_del_bcast_ptrn_req_msg {
3384 struct wcn36xx_hal_msg_header header;
3385
3386
3387 u8 id;
3388 u8 bss_index;
3389 };
3390
3391 struct wcn36xx_hal_wowl_enter_req_msg {
3392 struct wcn36xx_hal_msg_header header;
3393
3394
3395 u8 magic_packet_enable;
3396
3397
3398 u8 magic_pattern[ETH_ALEN];
3399
3400
3401
3402
3403
3404
3405 u8 pattern_filtering_enable;
3406
3407
3408
3409
3410
3411
3412
3413 u8 ucast_pattern_filtering_enable;
3414
3415
3416
3417
3418
3419 u8 wow_channel_switch_receive;
3420
3421
3422
3423
3424
3425 u8 wow_deauth_receive;
3426
3427
3428
3429
3430
3431 u8 wow_disassoc_receive;
3432
3433
3434
3435
3436
3437
3438 u8 wow_max_missed_beacons;
3439
3440
3441
3442
3443
3444
3445 u8 wow_max_sleep;
3446
3447
3448
3449
3450
3451 u8 wow_eap_id_request_enable;
3452
3453
3454
3455
3456 u8 wow_eapol_4way_enable;
3457
3458
3459
3460
3461 u8 wow_net_scan_offload_match;
3462
3463
3464
3465
3466 u8 wow_gtk_rekey_error;
3467
3468
3469
3470 u8 wow_bss_connection_loss;
3471
3472 u8 bss_index;
3473 };
3474
3475 struct wcn36xx_hal_wowl_exit_req_msg {
3476 struct wcn36xx_hal_msg_header header;
3477
3478 u8 bss_index;
3479 };
3480
3481 struct wcn36xx_hal_get_rssi_req_msg {
3482 struct wcn36xx_hal_msg_header header;
3483 };
3484
3485 struct wcn36xx_hal_get_roam_rssi_req_msg {
3486 struct wcn36xx_hal_msg_header header;
3487
3488
3489 u32 sta_id;
3490 };
3491
3492 struct wcn36xx_hal_set_uapsd_ac_params_req_msg {
3493 struct wcn36xx_hal_msg_header header;
3494
3495
3496 u8 sta_idx;
3497
3498
3499 u8 ac;
3500
3501
3502 u8 up;
3503
3504
3505 u32 service_interval;
3506
3507
3508 u32 suspend_interval;
3509
3510
3511 u32 delay_interval;
3512 };
3513
3514 struct wcn36xx_hal_configure_rxp_filter_req_msg {
3515 struct wcn36xx_hal_msg_header header;
3516
3517 u8 set_mcst_bcst_filter_setting;
3518 u8 set_mcst_bcst_filter;
3519 };
3520
3521 struct wcn36xx_hal_enter_imps_rsp_msg {
3522 struct wcn36xx_hal_msg_header header;
3523
3524
3525 u32 status;
3526 };
3527
3528 struct wcn36xx_hal_exit_imps_rsp_msg {
3529 struct wcn36xx_hal_msg_header header;
3530
3531
3532 u32 status;
3533 };
3534
3535 struct wcn36xx_hal_enter_bmps_rsp_msg {
3536 struct wcn36xx_hal_msg_header header;
3537
3538
3539 u32 status;
3540
3541 u8 bss_index;
3542 } __packed;
3543
3544 struct wcn36xx_hal_exit_bmps_rsp_msg {
3545 struct wcn36xx_hal_msg_header header;
3546
3547
3548 u32 status;
3549
3550 u8 bss_index;
3551 } __packed;
3552
3553 struct wcn36xx_hal_enter_uapsd_rsp_msg {
3554 struct wcn36xx_hal_msg_header header;
3555
3556
3557 u32 status;
3558
3559 u8 bss_index;
3560 };
3561
3562 struct wcn36xx_hal_exit_uapsd_rsp_msg {
3563 struct wcn36xx_hal_msg_header header;
3564
3565
3566 u32 status;
3567
3568 u8 bss_index;
3569 };
3570
3571 struct wcn36xx_hal_rssi_notification_ind_msg {
3572 struct wcn36xx_hal_msg_header header;
3573
3574 u32 rssi_thres1_pos_cross:1;
3575 u32 rssi_thres1_neg_cross:1;
3576 u32 rssi_thres2_pos_cross:1;
3577 u32 rssi_thres2_neg_cross:1;
3578 u32 rssi_thres3_pos_cross:1;
3579 u32 rssi_thres3_neg_cross:1;
3580 u32 avg_rssi:8;
3581 u32 reserved:18;
3582
3583 };
3584
3585 struct wcn36xx_hal_get_rssio_rsp_msg {
3586 struct wcn36xx_hal_msg_header header;
3587
3588
3589 u32 status;
3590 s8 rssi;
3591
3592 };
3593
3594 struct wcn36xx_hal_get_roam_rssi_rsp_msg {
3595 struct wcn36xx_hal_msg_header header;
3596
3597
3598 u32 status;
3599
3600 u8 sta_id;
3601 s8 rssi;
3602 };
3603
3604 struct wcn36xx_hal_wowl_enter_rsp_msg {
3605 struct wcn36xx_hal_msg_header header;
3606
3607
3608 u32 status;
3609 u8 bss_index;
3610 };
3611
3612 struct wcn36xx_hal_wowl_exit_rsp_msg {
3613 struct wcn36xx_hal_msg_header header;
3614
3615
3616 u32 status;
3617 u8 bss_index;
3618 };
3619
3620 struct wcn36xx_hal_add_bcn_filter_rsp_msg {
3621 struct wcn36xx_hal_msg_header header;
3622
3623
3624 u32 status;
3625 };
3626
3627 struct wcn36xx_hal_rem_bcn_filter_rsp_msg {
3628 struct wcn36xx_hal_msg_header header;
3629
3630
3631 u32 status;
3632 };
3633
3634 struct wcn36xx_hal_add_wowl_bcast_ptrn_rsp_msg {
3635 struct wcn36xx_hal_msg_header header;
3636
3637
3638 u32 status;
3639 u8 bss_index;
3640 };
3641
3642 struct wcn36xx_hal_del_wowl_bcast_ptrn_rsp_msg {
3643 struct wcn36xx_hal_msg_header header;
3644
3645
3646 u32 status;
3647 u8 bss_index;
3648 };
3649
3650 struct wcn36xx_hal_host_offload_rsp_msg {
3651 struct wcn36xx_hal_msg_header header;
3652
3653
3654 u32 status;
3655 };
3656
3657 struct wcn36xx_hal_keep_alive_rsp_msg {
3658 struct wcn36xx_hal_msg_header header;
3659
3660
3661 u32 status;
3662 };
3663
3664 struct wcn36xx_hal_set_rssi_thresh_rsp_msg {
3665 struct wcn36xx_hal_msg_header header;
3666
3667
3668 u32 status;
3669 };
3670
3671 struct wcn36xx_hal_set_uapsd_ac_params_rsp_msg {
3672 struct wcn36xx_hal_msg_header header;
3673
3674
3675 u32 status;
3676 };
3677
3678 struct wcn36xx_hal_configure_rxp_filter_rsp_msg {
3679 struct wcn36xx_hal_msg_header header;
3680
3681
3682 u32 status;
3683 };
3684
3685 struct set_max_tx_pwr_req {
3686 struct wcn36xx_hal_msg_header header;
3687
3688
3689
3690
3691 u8 bssid[ETH_ALEN];
3692
3693 u8 self_addr[ETH_ALEN];
3694
3695
3696 u8 power;
3697 };
3698
3699 struct set_max_tx_pwr_rsp_msg {
3700 struct wcn36xx_hal_msg_header header;
3701
3702
3703 u8 power;
3704
3705
3706 u32 status;
3707 };
3708
3709 struct set_tx_pwr_req_msg {
3710 struct wcn36xx_hal_msg_header header;
3711
3712
3713 u32 tx_power;
3714
3715 u8 bss_index;
3716 };
3717
3718 struct set_tx_pwr_rsp_msg {
3719 struct wcn36xx_hal_msg_header header;
3720
3721
3722 u32 status;
3723 };
3724
3725 struct get_tx_pwr_req_msg {
3726 struct wcn36xx_hal_msg_header header;
3727
3728 u8 sta_id;
3729 };
3730
3731 struct get_tx_pwr_rsp_msg {
3732 struct wcn36xx_hal_msg_header header;
3733
3734
3735 u32 status;
3736
3737
3738 u32 tx_power;
3739 };
3740
3741 struct set_p2p_gonoa_req_msg {
3742 struct wcn36xx_hal_msg_header header;
3743
3744 u8 opp_ps;
3745 u32 ct_window;
3746 u8 count;
3747 u32 duration;
3748 u32 interval;
3749 u32 single_noa_duration;
3750 u8 ps_selection;
3751 };
3752
3753 struct set_p2p_gonoa_rsp_msg {
3754 struct wcn36xx_hal_msg_header header;
3755
3756
3757 u32 status;
3758 };
3759
3760 struct wcn36xx_hal_add_sta_self_req {
3761 struct wcn36xx_hal_msg_header header;
3762
3763 u8 self_addr[ETH_ALEN];
3764 u32 status;
3765 } __packed;
3766
3767 struct wcn36xx_hal_add_sta_self_rsp_msg {
3768 struct wcn36xx_hal_msg_header header;
3769
3770
3771 u32 status;
3772
3773
3774 u8 self_sta_index;
3775
3776
3777 u8 dpu_index;
3778
3779
3780 u8 dpu_signature;
3781 } __packed;
3782
3783 struct wcn36xx_hal_del_sta_self_req_msg {
3784 struct wcn36xx_hal_msg_header header;
3785
3786 u8 self_addr[ETH_ALEN];
3787 } __packed;
3788
3789 struct wcn36xx_hal_del_sta_self_rsp_msg {
3790 struct wcn36xx_hal_msg_header header;
3791
3792
3793 u32 status;
3794
3795 u8 self_addr[ETH_ALEN];
3796 } __packed;
3797
3798 struct aggr_add_ts_req {
3799 struct wcn36xx_hal_msg_header header;
3800
3801
3802 u16 sta_idx;
3803
3804
3805
3806
3807 u16 tspec_index;
3808
3809
3810 struct wcn36xx_hal_tspec_ie tspec[WCN36XX_HAL_MAX_AC];
3811
3812
3813
3814
3815 u8 uapsd;
3816
3817
3818
3819
3820 u32 service_interval[WCN36XX_HAL_MAX_AC];
3821
3822
3823 u32 suspend_interval[WCN36XX_HAL_MAX_AC];
3824
3825
3826 u32 delay_interval[WCN36XX_HAL_MAX_AC];
3827 };
3828
3829 struct aggr_add_ts_rsp_msg {
3830 struct wcn36xx_hal_msg_header header;
3831
3832
3833 u32 status0;
3834
3835
3836 u32 status1;
3837 };
3838
3839 struct wcn36xx_hal_configure_apps_cpu_wakeup_state_req_msg {
3840 struct wcn36xx_hal_msg_header header;
3841
3842 u8 is_apps_cpu_awake;
3843 };
3844
3845 struct wcn36xx_hal_configure_apps_cpu_wakeup_state_rsp_msg {
3846 struct wcn36xx_hal_msg_header header;
3847
3848
3849 u32 status;
3850 };
3851
3852 struct wcn36xx_hal_dump_cmd_req_msg {
3853 struct wcn36xx_hal_msg_header header;
3854
3855 u32 arg1;
3856 u32 arg2;
3857 u32 arg3;
3858 u32 arg4;
3859 u32 arg5;
3860 } __packed;
3861
3862 struct wcn36xx_hal_dump_cmd_rsp_msg {
3863 struct wcn36xx_hal_msg_header header;
3864
3865
3866 u32 status;
3867
3868
3869 u32 rsp_length;
3870
3871
3872
3873 u8 rsp_buffer[DUMPCMD_RSP_BUFFER];
3874 } __packed;
3875
3876 #define WLAN_COEX_IND_DATA_SIZE (4)
3877 #define WLAN_COEX_IND_TYPE_DISABLE_HB_MONITOR (0)
3878 #define WLAN_COEX_IND_TYPE_ENABLE_HB_MONITOR (1)
3879
3880 struct coex_ind_msg {
3881 struct wcn36xx_hal_msg_header header;
3882
3883
3884 u32 type;
3885
3886
3887 u32 data[WLAN_COEX_IND_DATA_SIZE];
3888 };
3889
3890 struct wcn36xx_hal_tx_compl_ind_msg {
3891 struct wcn36xx_hal_msg_header header;
3892
3893
3894 u32 status;
3895 };
3896
3897 struct wcn36xx_hal_wlan_host_suspend_ind_msg {
3898 struct wcn36xx_hal_msg_header header;
3899
3900 u32 configured_mcst_bcst_filter_setting;
3901 u32 active_session_count;
3902 };
3903
3904 struct wcn36xx_hal_wlan_exclude_unencrpted_ind_msg {
3905 struct wcn36xx_hal_msg_header header;
3906
3907 u8 dot11_exclude_unencrypted;
3908 u8 bssid[ETH_ALEN];
3909 };
3910
3911 struct noa_attr_ind_msg {
3912 struct wcn36xx_hal_msg_header header;
3913
3914 u8 index;
3915 u8 opp_ps_flag;
3916 u16 ctwin;
3917
3918 u16 noa1_interval_count;
3919 u16 bss_index;
3920 u32 noa1_duration;
3921 u32 noa1_interval;
3922 u32 noa1_starttime;
3923
3924 u16 noa2_interval_count;
3925 u16 reserved2;
3926 u32 noa2_duration;
3927 u32 noa2_interval;
3928 u32 noa2_start_time;
3929
3930 u32 status;
3931 };
3932
3933 struct noa_start_ind_msg {
3934 struct wcn36xx_hal_msg_header header;
3935
3936 u32 status;
3937 u32 bss_index;
3938 };
3939
3940 struct wcn36xx_hal_wlan_host_resume_req_msg {
3941 struct wcn36xx_hal_msg_header header;
3942
3943 u8 configured_mcst_bcst_filter_setting;
3944 };
3945
3946 struct wcn36xx_hal_host_resume_rsp_msg {
3947 struct wcn36xx_hal_msg_header header;
3948
3949
3950 u32 status;
3951 };
3952
3953 struct wcn36xx_hal_del_ba_ind_msg {
3954 struct wcn36xx_hal_msg_header header;
3955
3956 u16 sta_idx;
3957
3958
3959 u8 peer_addr[ETH_ALEN];
3960
3961
3962 u8 ba_tid;
3963
3964
3965
3966
3967
3968 u8 direction;
3969
3970 u32 reason_code;
3971
3972
3973 u8 bssid[ETH_ALEN];
3974 };
3975
3976
3977
3978
3979 #define WCN36XX_HAL_PNO_MAX_NETW_CHANNELS 26
3980
3981
3982 #define WCN36XX_HAL_PNO_MAX_NETW_CHANNELS_EX 60
3983
3984
3985 #define WCN36XX_HAL_PNO_MAX_SUPP_NETWORKS 16
3986
3987
3988 #define WCN36XX_HAL_PNO_MAX_SCAN_TIMERS 10
3989
3990
3991 #define WCN36XX_HAL_PNO_MAX_PROBE_SIZE 450
3992
3993
3994
3995
3996
3997
3998
3999
4000
4001
4002 enum pno_mode {
4003 PNO_MODE_IMMEDIATE,
4004 PNO_MODE_ON_SUSPEND,
4005 PNO_MODE_ON_RESUME,
4006 PNO_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
4007 };
4008
4009
4010 enum auth_type {
4011 AUTH_TYPE_ANY = 0,
4012 AUTH_TYPE_OPEN_SYSTEM = 1,
4013
4014
4015 AUTH_TYPE_WPA = 2,
4016 AUTH_TYPE_WPA_PSK = 3,
4017
4018 AUTH_TYPE_RSN = 4,
4019 AUTH_TYPE_RSN_PSK = 5,
4020 AUTH_TYPE_FT_RSN = 6,
4021 AUTH_TYPE_FT_RSN_PSK = 7,
4022 AUTH_TYPE_WAPI_WAI_CERTIFICATE = 8,
4023 AUTH_TYPE_WAPI_WAI_PSK = 9,
4024
4025 AUTH_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
4026 };
4027
4028
4029 enum ed_type {
4030 ED_ANY = 0,
4031 ED_NONE = 1,
4032 ED_WEP = 2,
4033 ED_TKIP = 3,
4034 ED_CCMP = 4,
4035 ED_WPI = 5,
4036
4037 ED_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
4038 };
4039
4040
4041 enum ssid_bcast_type {
4042 BCAST_UNKNOWN = 0,
4043 BCAST_NORMAL = 1,
4044 BCAST_HIDDEN = 2,
4045
4046 BCAST_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
4047 };
4048
4049
4050 struct network_type {
4051
4052 struct wcn36xx_hal_mac_ssid ssid;
4053
4054
4055 enum auth_type authentication;
4056
4057
4058 enum ed_type encryption;
4059
4060
4061
4062 u8 channel_count;
4063 u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS];
4064
4065
4066 u8 rssi_threshold;
4067 };
4068
4069 struct scan_timer {
4070
4071 u32 value;
4072
4073
4074
4075 u32 repeat;
4076
4077
4078
4079
4080 };
4081
4082
4083 struct scan_timers_type {
4084
4085 u8 count;
4086
4087
4088
4089
4090
4091
4092
4093
4094 struct scan_timer values[WCN36XX_HAL_PNO_MAX_SCAN_TIMERS];
4095 };
4096
4097
4098 struct set_pref_netw_list_req {
4099 struct wcn36xx_hal_msg_header header;
4100
4101
4102 u32 enable;
4103
4104
4105 enum pno_mode mode;
4106
4107
4108 u32 networks_count;
4109
4110
4111 struct network_type networks[WCN36XX_HAL_PNO_MAX_SUPP_NETWORKS];
4112
4113
4114 struct scan_timers_type scan_timers;
4115
4116
4117 u16 band_24g_probe_size;
4118 u8 band_24g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
4119
4120
4121 u16 band_5g_probe_size;
4122 u8 band_5g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
4123 };
4124
4125
4126 struct network_type_new {
4127
4128 struct wcn36xx_hal_mac_ssid ssid;
4129
4130
4131 enum auth_type authentication;
4132
4133
4134 enum ed_type encryption;
4135
4136
4137 enum ssid_bcast_type bcast_network_type;
4138
4139
4140
4141 u8 channel_count;
4142 u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS];
4143
4144
4145 u8 rssi_threshold;
4146 };
4147
4148
4149 struct set_pref_netw_list_req_new {
4150 struct wcn36xx_hal_msg_header header;
4151
4152
4153 u32 enable;
4154
4155
4156 enum pno_mode mode;
4157
4158
4159 u32 networks_count;
4160
4161
4162 struct network_type_new networks[WCN36XX_HAL_PNO_MAX_SUPP_NETWORKS];
4163
4164
4165 struct scan_timers_type scan_timers;
4166
4167
4168 u16 band_24g_probe_size;
4169 u8 band_24g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
4170
4171
4172 u16 band_5g_probe_size;
4173 u8 band_5g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
4174 };
4175
4176
4177 struct set_pref_netw_list_resp {
4178 struct wcn36xx_hal_msg_header header;
4179
4180
4181
4182 u32 status;
4183 };
4184
4185
4186 struct pref_netw_found_ind {
4187
4188 struct wcn36xx_hal_msg_header header;
4189
4190
4191 struct wcn36xx_hal_mac_ssid ssid;
4192
4193
4194 u8 rssi;
4195 };
4196
4197
4198 struct set_rssi_filter_req {
4199 struct wcn36xx_hal_msg_header header;
4200
4201
4202 u8 rssi_threshold;
4203 };
4204
4205
4206 struct set_rssi_filter_resp {
4207 struct wcn36xx_hal_msg_header header;
4208
4209
4210 u32 status;
4211 };
4212
4213
4214
4215 struct wcn36xx_hal_update_scan_params_req {
4216
4217 struct wcn36xx_hal_msg_header header;
4218
4219
4220 u8 dot11d_enabled;
4221
4222
4223 u8 dot11d_resolved;
4224
4225
4226 u8 channel_count;
4227 u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS];
4228
4229
4230 u16 active_min_ch_time;
4231
4232
4233 u16 active_max_ch_time;
4234
4235
4236 u16 passive_min_ch_time;
4237
4238
4239 u16 passive_max_ch_time;
4240
4241
4242 enum phy_chan_bond_state state;
4243 } __packed;
4244
4245
4246
4247 struct wcn36xx_hal_update_scan_params_req_ex {
4248
4249 struct wcn36xx_hal_msg_header header;
4250
4251
4252 u8 dot11d_enabled;
4253
4254
4255 u8 dot11d_resolved;
4256
4257
4258 u8 channel_count;
4259 u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS_EX];
4260
4261
4262 u16 active_min_ch_time;
4263
4264
4265 u16 active_max_ch_time;
4266
4267
4268 u16 passive_min_ch_time;
4269
4270
4271 u16 passive_max_ch_time;
4272
4273
4274 enum phy_chan_bond_state state;
4275 } __packed;
4276
4277
4278
4279 struct wcn36xx_hal_update_scan_params_resp {
4280
4281 struct wcn36xx_hal_msg_header header;
4282
4283
4284 u32 status;
4285 } __packed;
4286
4287 struct wcn36xx_hal_set_tx_per_tracking_req_msg {
4288 struct wcn36xx_hal_msg_header header;
4289
4290
4291 u8 tx_per_tracking_enable;
4292
4293
4294 u8 tx_per_tracking_period;
4295
4296
4297 u8 tx_per_tracking_ratio;
4298
4299
4300
4301 u32 tx_per_tracking_watermark;
4302 };
4303
4304 struct wcn36xx_hal_set_tx_per_tracking_rsp_msg {
4305 struct wcn36xx_hal_msg_header header;
4306
4307
4308 u32 status;
4309
4310 };
4311
4312 struct tx_per_hit_ind_msg {
4313 struct wcn36xx_hal_msg_header header;
4314 };
4315
4316
4317 #define WCN36XX_HAL_PROTOCOL_DATA_LEN 8
4318 #define WCN36XX_HAL_MAX_NUM_MULTICAST_ADDRESS 240
4319 #define WCN36XX_HAL_MAX_NUM_FILTERS 20
4320 #define WCN36XX_HAL_MAX_CMP_PER_FILTER 10
4321
4322 enum wcn36xx_hal_receive_packet_filter_type {
4323 HAL_RCV_FILTER_TYPE_INVALID,
4324 HAL_RCV_FILTER_TYPE_FILTER_PKT,
4325 HAL_RCV_FILTER_TYPE_BUFFER_PKT,
4326 HAL_RCV_FILTER_TYPE_MAX_ENUM_SIZE
4327 };
4328
4329 enum wcn36xx_hal_rcv_pkt_flt_protocol_type {
4330 HAL_FILTER_PROTO_TYPE_INVALID,
4331 HAL_FILTER_PROTO_TYPE_MAC,
4332 HAL_FILTER_PROTO_TYPE_ARP,
4333 HAL_FILTER_PROTO_TYPE_IPV4,
4334 HAL_FILTER_PROTO_TYPE_IPV6,
4335 HAL_FILTER_PROTO_TYPE_UDP,
4336 HAL_FILTER_PROTO_TYPE_MAX
4337 };
4338
4339 enum wcn36xx_hal_rcv_pkt_flt_cmp_flag_type {
4340 HAL_FILTER_CMP_TYPE_INVALID,
4341 HAL_FILTER_CMP_TYPE_EQUAL,
4342 HAL_FILTER_CMP_TYPE_MASK_EQUAL,
4343 HAL_FILTER_CMP_TYPE_NOT_EQUAL,
4344 HAL_FILTER_CMP_TYPE_MAX
4345 };
4346
4347 struct wcn36xx_hal_rcv_pkt_filter_params {
4348 u8 protocol_layer;
4349 u8 cmp_flag;
4350
4351
4352 u16 data_length;
4353
4354
4355 u8 data_offset;
4356
4357
4358 u8 reserved;
4359
4360
4361 u8 compare_data[WCN36XX_HAL_PROTOCOL_DATA_LEN];
4362
4363
4364 u8 data_mask[WCN36XX_HAL_PROTOCOL_DATA_LEN];
4365 };
4366
4367 struct wcn36xx_hal_sessionized_rcv_pkt_filter_cfg_type {
4368 u8 id;
4369 u8 type;
4370 u8 params_count;
4371 u32 coleasce_time;
4372 u8 bss_index;
4373 struct wcn36xx_hal_rcv_pkt_filter_params params[1];
4374 };
4375
4376 struct wcn36xx_hal_set_rcv_pkt_filter_req_msg {
4377 struct wcn36xx_hal_msg_header header;
4378
4379 u8 id;
4380 u8 type;
4381 u8 params_count;
4382 u32 coalesce_time;
4383 struct wcn36xx_hal_rcv_pkt_filter_params params[1];
4384 };
4385
4386 struct wcn36xx_hal_rcv_flt_mc_addr_list_type {
4387
4388 u8 data_offset;
4389
4390 u32 mc_addr_count;
4391 u8 mc_addr[WCN36XX_HAL_MAX_NUM_MULTICAST_ADDRESS][ETH_ALEN];
4392 u8 bss_index;
4393 } __packed;
4394
4395 struct wcn36xx_hal_set_pkt_filter_rsp_msg {
4396 struct wcn36xx_hal_msg_header header;
4397
4398
4399 u32 status;
4400
4401 u8 bss_index;
4402 };
4403
4404 struct wcn36xx_hal_rcv_flt_pkt_match_cnt_req_msg {
4405 struct wcn36xx_hal_msg_header header;
4406
4407 u8 bss_index;
4408 };
4409
4410 struct wcn36xx_hal_rcv_flt_pkt_match_cnt {
4411 u8 id;
4412 u32 match_cnt;
4413 };
4414
4415 struct wcn36xx_hal_rcv_flt_pkt_match_cnt_rsp_msg {
4416 struct wcn36xx_hal_msg_header header;
4417
4418
4419 u32 status;
4420
4421 u32 match_count;
4422 struct wcn36xx_hal_rcv_flt_pkt_match_cnt
4423 matches[WCN36XX_HAL_MAX_NUM_FILTERS];
4424 u8 bss_index;
4425 };
4426
4427 struct wcn36xx_hal_rcv_flt_pkt_clear_param {
4428
4429 u32 status;
4430 u8 id;
4431 u8 bss_index;
4432 };
4433
4434 struct wcn36xx_hal_rcv_flt_pkt_clear_req_msg {
4435 struct wcn36xx_hal_msg_header header;
4436 struct wcn36xx_hal_rcv_flt_pkt_clear_param param;
4437 };
4438
4439 struct wcn36xx_hal_rcv_flt_pkt_clear_rsp_msg {
4440 struct wcn36xx_hal_msg_header header;
4441 struct wcn36xx_hal_rcv_flt_pkt_clear_param param;
4442 };
4443
4444 struct wcn36xx_hal_rcv_flt_pkt_set_mc_list_req_msg {
4445 struct wcn36xx_hal_msg_header header;
4446 struct wcn36xx_hal_rcv_flt_mc_addr_list_type mc_addr_list;
4447 } __packed;
4448
4449 struct wcn36xx_hal_rcv_flt_pkt_set_mc_list_rsp_msg {
4450 struct wcn36xx_hal_msg_header header;
4451 u32 status;
4452 u8 bss_index;
4453 };
4454
4455
4456
4457 struct wcn36xx_hal_set_power_params_req_msg {
4458 struct wcn36xx_hal_msg_header header;
4459
4460
4461 u32 ignore_dtim;
4462
4463
4464 u32 dtim_period;
4465
4466
4467 u32 listen_interval;
4468
4469
4470 u32 bcast_mcast_filter;
4471
4472
4473 u32 enable_bet;
4474
4475
4476 u32 bet_interval;
4477 } __packed;
4478
4479 struct wcn36xx_hal_set_power_params_resp {
4480
4481 struct wcn36xx_hal_msg_header header;
4482
4483
4484 u32 status;
4485 } __packed;
4486
4487
4488
4489 enum place_holder_in_cap_bitmap {
4490 MCC = 0,
4491 P2P = 1,
4492 DOT11AC = 2,
4493 SLM_SESSIONIZATION = 3,
4494 DOT11AC_OPMODE = 4,
4495 SAP32STA = 5,
4496 TDLS = 6,
4497 P2P_GO_NOA_DECOUPLE_INIT_SCAN = 7,
4498 WLANACTIVE_OFFLOAD = 8,
4499 BEACON_OFFLOAD = 9,
4500 SCAN_OFFLOAD = 10,
4501 ROAM_OFFLOAD = 11,
4502 BCN_MISS_OFFLOAD = 12,
4503 STA_POWERSAVE = 13,
4504 STA_ADVANCED_PWRSAVE = 14,
4505 AP_UAPSD = 15,
4506 AP_DFS = 16,
4507 BLOCKACK = 17,
4508 PHY_ERR = 18,
4509 BCN_FILTER = 19,
4510 RTT = 20,
4511 RATECTRL = 21,
4512 WOW = 22,
4513 WLAN_ROAM_SCAN_OFFLOAD = 23,
4514 SPECULATIVE_PS_POLL = 24,
4515 SCAN_SCH = 25,
4516 IBSS_HEARTBEAT_OFFLOAD = 26,
4517 WLAN_SCAN_OFFLOAD = 27,
4518 WLAN_PERIODIC_TX_PTRN = 28,
4519 ADVANCE_TDLS = 29,
4520 BATCH_SCAN = 30,
4521 FW_IN_TX_PATH = 31,
4522 EXTENDED_NSOFFLOAD_SLOT = 32,
4523 CH_SWITCH_V1 = 33,
4524 HT40_OBSS_SCAN = 34,
4525 UPDATE_CHANNEL_LIST = 35,
4526 WLAN_MCADDR_FLT = 36,
4527 WLAN_CH144 = 37,
4528 NAN = 38,
4529 TDLS_SCAN_COEXISTENCE = 39,
4530 LINK_LAYER_STATS_MEAS = 40,
4531 MU_MIMO = 41,
4532 EXTENDED_SCAN = 42,
4533 DYNAMIC_WMM_PS = 43,
4534 MAC_SPOOFED_SCAN = 44,
4535 BMU_ERROR_GENERIC_RECOVERY = 45,
4536 DISA = 46,
4537 FW_STATS = 47,
4538 WPS_PRBRSP_TMPL = 48,
4539 BCN_IE_FLT_DELTA = 49,
4540 TDLS_OFF_CHANNEL = 51,
4541 RTT3 = 52,
4542 MGMT_FRAME_LOGGING = 53,
4543 ENHANCED_TXBD_COMPLETION = 54,
4544 LOGGING_ENHANCEMENT = 55,
4545 EXT_SCAN_ENHANCED = 56,
4546 MEMORY_DUMP_SUPPORTED = 57,
4547 PER_PKT_STATS_SUPPORTED = 58,
4548 EXT_LL_STAT = 60,
4549 WIFI_CONFIG = 61,
4550 ANTENNA_DIVERSITY_SELECTION = 62,
4551
4552 MAX_FEATURE_SUPPORTED = 128,
4553 };
4554
4555 #define WCN36XX_HAL_CAPS_SIZE 4
4556
4557 struct wcn36xx_hal_feat_caps_msg {
4558
4559 struct wcn36xx_hal_msg_header header;
4560
4561 u32 feat_caps[WCN36XX_HAL_CAPS_SIZE];
4562 } __packed;
4563
4564
4565 enum gtk_rekey_status {
4566 WCN36XX_HAL_GTK_REKEY_STATUS_SUCCESS = 0,
4567
4568
4569 WCN36XX_HAL_GTK_REKEY_STATUS_NOT_HANDLED = 1,
4570
4571
4572 WCN36XX_HAL_GTK_REKEY_STATUS_MIC_ERROR = 2,
4573
4574
4575 WCN36XX_HAL_GTK_REKEY_STATUS_DECRYPT_ERROR = 3,
4576
4577
4578 WCN36XX_HAL_GTK_REKEY_STATUS_REPLAY_ERROR = 4,
4579
4580
4581 WCN36XX_HAL_GTK_REKEY_STATUS_MISSING_KDE = 5,
4582
4583
4584 WCN36XX_HAL_GTK_REKEY_STATUS_MISSING_IGTK_KDE = 6,
4585
4586
4587 WCN36XX_HAL_GTK_REKEY_STATUS_INSTALL_ERROR = 7,
4588
4589
4590 WCN36XX_HAL_GTK_REKEY_STATUS_IGTK_INSTALL_ERROR = 8,
4591
4592
4593 WCN36XX_HAL_GTK_REKEY_STATUS_RESP_TX_ERROR = 9,
4594
4595
4596 WCN36XX_HAL_GTK_REKEY_STATUS_GEN_ERROR = 255
4597 };
4598
4599
4600 enum wake_reason_type {
4601 WCN36XX_HAL_WAKE_REASON_NONE = 0,
4602
4603
4604 WCN36XX_HAL_WAKE_REASON_MAGIC_PACKET = 1,
4605
4606
4607 WCN36XX_HAL_WAKE_REASON_PATTERN_MATCH = 2,
4608
4609
4610 WCN36XX_HAL_WAKE_REASON_EAPID_PACKET = 3,
4611
4612
4613 WCN36XX_HAL_WAKE_REASON_EAPOL4WAY_PACKET = 4,
4614
4615
4616 WCN36XX_HAL_WAKE_REASON_NETSCAN_OFFL_MATCH = 5,
4617
4618
4619 WCN36XX_HAL_WAKE_REASON_GTK_REKEY_STATUS = 6,
4620
4621
4622 WCN36XX_HAL_WAKE_REASON_BSS_CONN_LOST = 7,
4623 };
4624
4625
4626
4627
4628
4629
4630
4631
4632
4633
4634
4635
4636
4637
4638
4639
4640 struct wcn36xx_hal_wake_reason_ind {
4641 struct wcn36xx_hal_msg_header header;
4642
4643
4644 u32 reason;
4645
4646
4647 u32 reason_arg;
4648
4649
4650
4651
4652 u32 stored_data_len;
4653
4654
4655 u32 actual_data_len;
4656
4657
4658
4659 u8 data_start[1];
4660
4661 u32 bss_index:8;
4662 u32 reserved:24;
4663 };
4664
4665 #define WCN36XX_HAL_GTK_KEK_BYTES 16
4666 #define WCN36XX_HAL_GTK_KCK_BYTES 16
4667
4668 #define WCN36XX_HAL_GTK_OFFLOAD_FLAGS_DISABLE (1 << 0)
4669
4670 #define GTK_SET_BSS_KEY_TAG 0x1234AA55
4671
4672 struct wcn36xx_hal_gtk_offload_req_msg {
4673 struct wcn36xx_hal_msg_header header;
4674
4675
4676 u32 flags;
4677
4678
4679 u8 kck[WCN36XX_HAL_GTK_KCK_BYTES];
4680
4681
4682 u8 kek[WCN36XX_HAL_GTK_KEK_BYTES];
4683
4684
4685 u64 key_replay_counter;
4686
4687 u8 bss_index;
4688 };
4689
4690 struct wcn36xx_hal_gtk_offload_rsp_msg {
4691 struct wcn36xx_hal_msg_header header;
4692
4693
4694 u32 status;
4695
4696 u8 bss_index;
4697 };
4698
4699 struct wcn36xx_hal_gtk_offload_get_info_req_msg {
4700 struct wcn36xx_hal_msg_header header;
4701 u8 bss_index;
4702 };
4703
4704 struct wcn36xx_hal_gtk_offload_get_info_rsp_msg {
4705 struct wcn36xx_hal_msg_header header;
4706
4707
4708 u32 status;
4709
4710
4711 u32 last_rekey_status;
4712
4713
4714 u64 key_replay_counter;
4715
4716
4717 u32 total_rekey_count;
4718
4719
4720 u32 gtk_rekey_count;
4721
4722
4723 u32 igtk_rekey_count;
4724
4725 u8 bss_index;
4726 };
4727
4728 struct dhcp_info {
4729
4730 u8 device_mode;
4731
4732 u8 addr[ETH_ALEN];
4733 };
4734
4735 struct dhcp_ind_status {
4736 struct wcn36xx_hal_msg_header header;
4737
4738
4739 u32 status;
4740 };
4741
4742
4743
4744
4745
4746
4747
4748
4749
4750
4751 enum wcn36xx_hal_thermal_mitigation_mode_type {
4752 HAL_THERMAL_MITIGATION_MODE_INVALID = -1,
4753 HAL_THERMAL_MITIGATION_MODE_0,
4754 HAL_THERMAL_MITIGATION_MODE_1,
4755 HAL_THERMAL_MITIGATION_MODE_2,
4756 HAL_THERMAL_MITIGATION_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE,
4757 };
4758
4759
4760
4761
4762
4763
4764
4765
4766
4767
4768
4769
4770
4771
4772
4773
4774
4775
4776
4777 enum wcn36xx_hal_thermal_mitigation_level_type {
4778 HAL_THERMAL_MITIGATION_LEVEL_INVALID = -1,
4779 HAL_THERMAL_MITIGATION_LEVEL_0,
4780 HAL_THERMAL_MITIGATION_LEVEL_1,
4781 HAL_THERMAL_MITIGATION_LEVEL_2,
4782 HAL_THERMAL_MITIGATION_LEVEL_3,
4783 HAL_THERMAL_MITIGATION_LEVEL_4,
4784 HAL_THERMAL_MITIGATION_LEVEL_MAX = WCN36XX_HAL_MAX_ENUM_SIZE,
4785 };
4786
4787
4788
4789 struct set_thermal_mitigation_req_msg {
4790 struct wcn36xx_hal_msg_header header;
4791
4792
4793 enum wcn36xx_hal_thermal_mitigation_mode_type mode;
4794
4795
4796 enum wcn36xx_hal_thermal_mitigation_level_type level;
4797 };
4798
4799 struct set_thermal_mitigation_resp {
4800
4801 struct wcn36xx_hal_msg_header header;
4802
4803
4804 u32 status;
4805 };
4806
4807
4808
4809 struct stats_class_b_ind {
4810 struct wcn36xx_hal_msg_header header;
4811
4812
4813 u32 duration;
4814
4815
4816
4817
4818 u32 tx_bytes_pushed;
4819 u32 tx_packets_pushed;
4820
4821
4822 u32 rx_bytes_rcvd;
4823 u32 rx_packets_rcvd;
4824 u32 rx_time_total;
4825 };
4826
4827
4828 struct wcn36xx_hal_print_reg_info_ind {
4829 struct wcn36xx_hal_msg_header header;
4830
4831 u32 count;
4832 u32 scenario;
4833 u32 reason;
4834
4835 struct {
4836 u32 addr;
4837 u32 value;
4838 } regs[];
4839 } __packed;
4840
4841 #endif