root/drivers/net/wireless/ath/ath10k/sdio.h

INCLUDED FROM

DEFINITIONS

1. ath10k_sdio_priv

   1 /* SPDX-License-Identifier: ISC */
   2 /*
   3  * Copyright (c) 2004-2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
   5  * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
   6  */
   7 
   8 #ifndef _SDIO_H_
   9 #define _SDIO_H_
  10 
  11 #define ATH10K_HIF_MBOX_BLOCK_SIZE              256
  12 
  13 #define QCA_MANUFACTURER_ID_BASE                GENMASK(11, 8)
  14 #define QCA_MANUFACTURER_ID_AR6005_BASE         0x5
  15 #define QCA_MANUFACTURER_ID_QCA9377_BASE        0x7
  16 #define QCA_SDIO_ID_AR6005_BASE                 0x500
  17 #define QCA_SDIO_ID_QCA9377_BASE                0x700
  18 #define QCA_MANUFACTURER_ID_REV_MASK            0x00FF
  19 #define QCA_MANUFACTURER_CODE                   0x271 /* Qualcomm/Atheros */
  20 
  21 #define ATH10K_SDIO_MAX_BUFFER_SIZE             4096 /*Unsure of this constant*/
  22 
  23 /* Mailbox address in SDIO address space */
  24 #define ATH10K_HIF_MBOX_BASE_ADDR               0x1000
  25 #define ATH10K_HIF_MBOX_WIDTH                   0x800
  26 
  27 #define ATH10K_HIF_MBOX_TOT_WIDTH \
  28         (ATH10K_HIF_MBOX_NUM_MAX * ATH10K_HIF_MBOX_WIDTH)
  29 
  30 #define ATH10K_HIF_MBOX0_EXT_BASE_ADDR          0x5000
  31 #define ATH10K_HIF_MBOX0_EXT_WIDTH              (36 * 1024)
  32 #define ATH10K_HIF_MBOX0_EXT_WIDTH_ROME_2_0     (56 * 1024)
  33 #define ATH10K_HIF_MBOX1_EXT_WIDTH              (36 * 1024)
  34 #define ATH10K_HIF_MBOX_DUMMY_SPACE_SIZE        (2 * 1024)
  35 
  36 #define ATH10K_HTC_MBOX_MAX_PAYLOAD_LENGTH \
  37         (ATH10K_SDIO_MAX_BUFFER_SIZE - sizeof(struct ath10k_htc_hdr))
  38 
  39 #define ATH10K_HIF_MBOX_NUM_MAX                 4
  40 #define ATH10K_SDIO_BUS_REQUEST_MAX_NUM         64
  41 
  42 #define ATH10K_SDIO_HIF_COMMUNICATION_TIMEOUT_HZ (100 * HZ)
  43 
  44 /* HTC runs over mailbox 0 */
  45 #define ATH10K_HTC_MAILBOX                      0
  46 #define ATH10K_HTC_MAILBOX_MASK                 BIT(ATH10K_HTC_MAILBOX)
  47 
  48 /* GMBOX addresses */
  49 #define ATH10K_HIF_GMBOX_BASE_ADDR              0x7000
  50 #define ATH10K_HIF_GMBOX_WIDTH                  0x4000
  51 
  52 /* Modified versions of the sdio.h macros.
  53  * The macros in sdio.h can't be used easily with the FIELD_{PREP|GET}
  54  * macros in bitfield.h, so we define our own macros here.
  55  */
  56 #define ATH10K_SDIO_DRIVE_DTSX_MASK \
  57         (SDIO_DRIVE_DTSx_MASK << SDIO_DRIVE_DTSx_SHIFT)
  58 
  59 #define ATH10K_SDIO_DRIVE_DTSX_TYPE_B           0
  60 #define ATH10K_SDIO_DRIVE_DTSX_TYPE_A           1
  61 #define ATH10K_SDIO_DRIVE_DTSX_TYPE_C           2
  62 #define ATH10K_SDIO_DRIVE_DTSX_TYPE_D           3
  63 
  64 /* SDIO CCCR register definitions */
  65 #define CCCR_SDIO_IRQ_MODE_REG                  0xF0
  66 #define CCCR_SDIO_IRQ_MODE_REG_SDIO3            0x16
  67 
  68 #define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_ADDR   0xF2
  69 
  70 #define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_A      0x02
  71 #define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_C      0x04
  72 #define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_D      0x08
  73 
  74 #define CCCR_SDIO_ASYNC_INT_DELAY_ADDRESS       0xF0
  75 #define CCCR_SDIO_ASYNC_INT_DELAY_MASK          0xC0
  76 
  77 /* mode to enable special 4-bit interrupt assertion without clock */
  78 #define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ            BIT(0)
  79 #define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ_SDIO3      BIT(1)
  80 
  81 #define ATH10K_SDIO_TARGET_DEBUG_INTR_MASK      0x01
  82 
  83 /* The theoretical maximum number of RX messages that can be fetched
  84  * from the mbox interrupt handler in one loop is derived in the following
  85  * way:
  86  *
  87  * Let's assume that each packet in a bundle of the maximum bundle size
  88  * (HTC_HOST_MAX_MSG_PER_RX_BUNDLE) has the HTC header bundle count set
  89  * to the maximum value (HTC_HOST_MAX_MSG_PER_RX_BUNDLE).
  90  *
  91  * in this case the driver must allocate
  92  * (HTC_HOST_MAX_MSG_PER_RX_BUNDLE * HTC_HOST_MAX_MSG_PER_RX_BUNDLE) skb's.
  93  */
  94 #define ATH10K_SDIO_MAX_RX_MSGS \
  95         (HTC_HOST_MAX_MSG_PER_RX_BUNDLE * HTC_HOST_MAX_MSG_PER_RX_BUNDLE)
  96 
  97 #define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL   0x00000868u
  98 #define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_OFF 0xFFFEFFFF
  99 #define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_ON 0x10000
 100 
 101 struct ath10k_sdio_bus_request {
 102         struct list_head list;
 103 
 104         /* sdio address */
 105         u32 address;
 106 
 107         struct sk_buff *skb;
 108         enum ath10k_htc_ep_id eid;
 109         int status;
 110         /* Specifies if the current request is an HTC message.
 111          * If not, the eid is not applicable an the TX completion handler
 112          * associated with the endpoint will not be invoked.
 113          */
 114         bool htc_msg;
 115         /* Completion that (if set) will be invoked for non HTC requests
 116          * (htc_msg == false) when the request has been processed.
 117          */
 118         struct completion *comp;
 119 };
 120 
 121 struct ath10k_sdio_rx_data {
 122         struct sk_buff *skb;
 123         size_t alloc_len;
 124         size_t act_len;
 125         enum ath10k_htc_ep_id eid;
 126         bool part_of_bundle;
 127         bool last_in_bundle;
 128         bool trailer_only;
 129         int status;
 130 };
 131 
 132 struct ath10k_sdio_irq_proc_regs {
 133         u8 host_int_status;
 134         u8 cpu_int_status;
 135         u8 error_int_status;
 136         u8 counter_int_status;
 137         u8 mbox_frame;
 138         u8 rx_lookahead_valid;
 139         u8 host_int_status2;
 140         u8 gmbox_rx_avail;
 141         __le32 rx_lookahead[2];
 142         __le32 rx_gmbox_lookahead_alias[2];
 143 };
 144 
 145 struct ath10k_sdio_irq_enable_regs {
 146         u8 int_status_en;
 147         u8 cpu_int_status_en;
 148         u8 err_int_status_en;
 149         u8 cntr_int_status_en;
 150 };
 151 
 152 struct ath10k_sdio_irq_data {
 153         /* protects irq_proc_reg and irq_en_reg below.
 154          * We use a mutex here and not a spinlock since we will have the
 155          * mutex locked while calling the sdio_memcpy_ functions.
 156          * These function require non atomic context, and hence, spinlocks
 157          * can be held while calling these functions.
 158          */
 159         struct mutex mtx;
 160         struct ath10k_sdio_irq_proc_regs *irq_proc_reg;
 161         struct ath10k_sdio_irq_enable_regs *irq_en_reg;
 162 };
 163 
 164 struct ath10k_mbox_ext_info {
 165         u32 htc_ext_addr;
 166         u32 htc_ext_sz;
 167 };
 168 
 169 struct ath10k_mbox_info {
 170         u32 htc_addr;
 171         struct ath10k_mbox_ext_info ext_info[2];
 172         u32 block_size;
 173         u32 block_mask;
 174         u32 gmbox_addr;
 175         u32 gmbox_sz;
 176 };
 177 
 178 struct ath10k_sdio {
 179         struct sdio_func *func;
 180 
 181         struct ath10k_mbox_info mbox_info;
 182         bool swap_mbox;
 183         u32 mbox_addr[ATH10K_HTC_EP_COUNT];
 184         u32 mbox_size[ATH10K_HTC_EP_COUNT];
 185 
 186         /* available bus requests */
 187         struct ath10k_sdio_bus_request bus_req[ATH10K_SDIO_BUS_REQUEST_MAX_NUM];
 188         /* free list of bus requests */
 189         struct list_head bus_req_freeq;
 190         /* protects access to bus_req_freeq */
 191         spinlock_t lock;
 192 
 193         struct ath10k_sdio_rx_data rx_pkts[ATH10K_SDIO_MAX_RX_MSGS];
 194         size_t n_rx_pkts;
 195 
 196         struct ath10k *ar;
 197         struct ath10k_sdio_irq_data irq_data;
 198 
 199         /* temporary buffer for BMI requests */
 200         u8 *bmi_buf;
 201 
 202         bool is_disabled;
 203 
 204         struct workqueue_struct *workqueue;
 205         struct work_struct wr_async_work;
 206         struct list_head wr_asyncq;
 207         /* protects access to wr_asyncq */
 208         spinlock_t wr_async_lock;
 209 };
 210 
 211 static inline struct ath10k_sdio *ath10k_sdio_priv(struct ath10k *ar)
 212 {
 213         return (struct ath10k_sdio *)ar->drv_priv;
 214 }
 215 
 216 #endif