This source file includes following definitions.
- a_cpu_to_sle32
- a_sle32_to_cpu
- wmi_service_name
- wmi_10x_svc_map
- wmi_main_svc_map
- wmi_10_4_svc_map
- ath10k_wmi_phymode_str
- wow_wakeup_event
- wow_reason
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8 #ifndef _WMI_H_
9 #define _WMI_H_
10
11 #include <linux/types.h>
12 #include <linux/ieee80211.h>
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54 struct wmi_cmd_hdr {
55 __le32 cmd_id;
56 } __packed;
57
58 #define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF
59 #define WMI_CMD_HDR_CMD_ID_LSB 0
60 #define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
61 #define WMI_CMD_HDR_PLT_PRIV_LSB 24
62
63 #define HTC_PROTOCOL_VERSION 0x0002
64 #define WMI_PROTOCOL_VERSION 0x0002
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73 typedef __s32 __bitwise a_sle32;
74
75 static inline a_sle32 a_cpu_to_sle32(s32 val)
76 {
77 return (__force a_sle32)cpu_to_le32(val);
78 }
79
80 static inline s32 a_sle32_to_cpu(a_sle32 val)
81 {
82 return le32_to_cpu((__force __le32)val);
83 }
84
85 enum wmi_service {
86 WMI_SERVICE_BEACON_OFFLOAD = 0,
87 WMI_SERVICE_SCAN_OFFLOAD,
88 WMI_SERVICE_ROAM_OFFLOAD,
89 WMI_SERVICE_BCN_MISS_OFFLOAD,
90 WMI_SERVICE_STA_PWRSAVE,
91 WMI_SERVICE_STA_ADVANCED_PWRSAVE,
92 WMI_SERVICE_AP_UAPSD,
93 WMI_SERVICE_AP_DFS,
94 WMI_SERVICE_11AC,
95 WMI_SERVICE_BLOCKACK,
96 WMI_SERVICE_PHYERR,
97 WMI_SERVICE_BCN_FILTER,
98 WMI_SERVICE_RTT,
99 WMI_SERVICE_RATECTRL,
100 WMI_SERVICE_WOW,
101 WMI_SERVICE_RATECTRL_CACHE,
102 WMI_SERVICE_IRAM_TIDS,
103 WMI_SERVICE_ARPNS_OFFLOAD,
104 WMI_SERVICE_NLO,
105 WMI_SERVICE_GTK_OFFLOAD,
106 WMI_SERVICE_SCAN_SCH,
107 WMI_SERVICE_CSA_OFFLOAD,
108 WMI_SERVICE_CHATTER,
109 WMI_SERVICE_COEX_FREQAVOID,
110 WMI_SERVICE_PACKET_POWER_SAVE,
111 WMI_SERVICE_FORCE_FW_HANG,
112 WMI_SERVICE_GPIO,
113 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
114 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
115 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
116 WMI_SERVICE_STA_KEEP_ALIVE,
117 WMI_SERVICE_TX_ENCAP,
118 WMI_SERVICE_BURST,
119 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
120 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
121 WMI_SERVICE_ROAM_SCAN_OFFLOAD,
122 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
123 WMI_SERVICE_EARLY_RX,
124 WMI_SERVICE_STA_SMPS,
125 WMI_SERVICE_FWTEST,
126 WMI_SERVICE_STA_WMMAC,
127 WMI_SERVICE_TDLS,
128 WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
129 WMI_SERVICE_ADAPTIVE_OCS,
130 WMI_SERVICE_BA_SSN_SUPPORT,
131 WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
132 WMI_SERVICE_WLAN_HB,
133 WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
134 WMI_SERVICE_BATCH_SCAN,
135 WMI_SERVICE_QPOWER,
136 WMI_SERVICE_PLMREQ,
137 WMI_SERVICE_THERMAL_MGMT,
138 WMI_SERVICE_RMC,
139 WMI_SERVICE_MHF_OFFLOAD,
140 WMI_SERVICE_COEX_SAR,
141 WMI_SERVICE_BCN_TXRATE_OVERRIDE,
142 WMI_SERVICE_NAN,
143 WMI_SERVICE_L1SS_STAT,
144 WMI_SERVICE_ESTIMATE_LINKSPEED,
145 WMI_SERVICE_OBSS_SCAN,
146 WMI_SERVICE_TDLS_OFFCHAN,
147 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
148 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
149 WMI_SERVICE_IBSS_PWRSAVE,
150 WMI_SERVICE_LPASS,
151 WMI_SERVICE_EXTSCAN,
152 WMI_SERVICE_D0WOW,
153 WMI_SERVICE_HSOFFLOAD,
154 WMI_SERVICE_ROAM_HO_OFFLOAD,
155 WMI_SERVICE_RX_FULL_REORDER,
156 WMI_SERVICE_DHCP_OFFLOAD,
157 WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
158 WMI_SERVICE_MDNS_OFFLOAD,
159 WMI_SERVICE_SAP_AUTH_OFFLOAD,
160 WMI_SERVICE_ATF,
161 WMI_SERVICE_COEX_GPIO,
162 WMI_SERVICE_ENHANCED_PROXY_STA,
163 WMI_SERVICE_TT,
164 WMI_SERVICE_PEER_CACHING,
165 WMI_SERVICE_AUX_SPECTRAL_INTF,
166 WMI_SERVICE_AUX_CHAN_LOAD_INTF,
167 WMI_SERVICE_BSS_CHANNEL_INFO_64,
168 WMI_SERVICE_EXT_RES_CFG_SUPPORT,
169 WMI_SERVICE_MESH_11S,
170 WMI_SERVICE_MESH_NON_11S,
171 WMI_SERVICE_PEER_STATS,
172 WMI_SERVICE_RESTRT_CHNL_SUPPORT,
173 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
174 WMI_SERVICE_TX_MODE_PUSH_ONLY,
175 WMI_SERVICE_TX_MODE_PUSH_PULL,
176 WMI_SERVICE_TX_MODE_DYNAMIC,
177 WMI_SERVICE_VDEV_RX_FILTER,
178 WMI_SERVICE_BTCOEX,
179 WMI_SERVICE_CHECK_CAL_VERSION,
180 WMI_SERVICE_DBGLOG_WARN2,
181 WMI_SERVICE_BTCOEX_DUTY_CYCLE,
182 WMI_SERVICE_4_WIRE_COEX_SUPPORT,
183 WMI_SERVICE_EXTENDED_NSS_SUPPORT,
184 WMI_SERVICE_PROG_GPIO_BAND_SELECT,
185 WMI_SERVICE_SMART_LOGGING_SUPPORT,
186 WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
187 WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
188 WMI_SERVICE_MGMT_TX_WMI,
189 WMI_SERVICE_TDLS_WIDER_BANDWIDTH,
190 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
191 WMI_SERVICE_HOST_DFS_CHECK_SUPPORT,
192 WMI_SERVICE_TPC_STATS_FINAL,
193 WMI_SERVICE_RESET_CHIP,
194 WMI_SERVICE_SPOOF_MAC_SUPPORT,
195 WMI_SERVICE_TX_DATA_ACK_RSSI,
196 WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
197 WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
198 WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT,
199 WMI_SERVICE_THERM_THROT,
200 WMI_SERVICE_RTT_RESPONDER_ROLE,
201 WMI_SERVICE_PER_PACKET_SW_ENCRYPT,
202 WMI_SERVICE_REPORT_AIRTIME,
203 WMI_SERVICE_SYNC_DELETE_CMDS,
204 WMI_SERVICE_TX_PWR_PER_PEER,
205
206
207
208
209 WMI_SERVICE_MAX,
210 };
211
212 enum wmi_10x_service {
213 WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
214 WMI_10X_SERVICE_SCAN_OFFLOAD,
215 WMI_10X_SERVICE_ROAM_OFFLOAD,
216 WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
217 WMI_10X_SERVICE_STA_PWRSAVE,
218 WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
219 WMI_10X_SERVICE_AP_UAPSD,
220 WMI_10X_SERVICE_AP_DFS,
221 WMI_10X_SERVICE_11AC,
222 WMI_10X_SERVICE_BLOCKACK,
223 WMI_10X_SERVICE_PHYERR,
224 WMI_10X_SERVICE_BCN_FILTER,
225 WMI_10X_SERVICE_RTT,
226 WMI_10X_SERVICE_RATECTRL,
227 WMI_10X_SERVICE_WOW,
228 WMI_10X_SERVICE_RATECTRL_CACHE,
229 WMI_10X_SERVICE_IRAM_TIDS,
230 WMI_10X_SERVICE_BURST,
231
232
233 WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
234 WMI_10X_SERVICE_FORCE_FW_HANG,
235 WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
236 WMI_10X_SERVICE_ATF,
237 WMI_10X_SERVICE_COEX_GPIO,
238 WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
239 WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
240 WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
241 WMI_10X_SERVICE_MESH,
242 WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
243 WMI_10X_SERVICE_PEER_STATS,
244 WMI_10X_SERVICE_RESET_CHIP,
245 WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
246 WMI_10X_SERVICE_VDEV_BCN_RATE_CONTROL,
247 WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
248 WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
249 };
250
251 enum wmi_main_service {
252 WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
253 WMI_MAIN_SERVICE_SCAN_OFFLOAD,
254 WMI_MAIN_SERVICE_ROAM_OFFLOAD,
255 WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
256 WMI_MAIN_SERVICE_STA_PWRSAVE,
257 WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
258 WMI_MAIN_SERVICE_AP_UAPSD,
259 WMI_MAIN_SERVICE_AP_DFS,
260 WMI_MAIN_SERVICE_11AC,
261 WMI_MAIN_SERVICE_BLOCKACK,
262 WMI_MAIN_SERVICE_PHYERR,
263 WMI_MAIN_SERVICE_BCN_FILTER,
264 WMI_MAIN_SERVICE_RTT,
265 WMI_MAIN_SERVICE_RATECTRL,
266 WMI_MAIN_SERVICE_WOW,
267 WMI_MAIN_SERVICE_RATECTRL_CACHE,
268 WMI_MAIN_SERVICE_IRAM_TIDS,
269 WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
270 WMI_MAIN_SERVICE_NLO,
271 WMI_MAIN_SERVICE_GTK_OFFLOAD,
272 WMI_MAIN_SERVICE_SCAN_SCH,
273 WMI_MAIN_SERVICE_CSA_OFFLOAD,
274 WMI_MAIN_SERVICE_CHATTER,
275 WMI_MAIN_SERVICE_COEX_FREQAVOID,
276 WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
277 WMI_MAIN_SERVICE_FORCE_FW_HANG,
278 WMI_MAIN_SERVICE_GPIO,
279 WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
280 WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
281 WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
282 WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
283 WMI_MAIN_SERVICE_TX_ENCAP,
284 };
285
286 enum wmi_10_4_service {
287 WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
288 WMI_10_4_SERVICE_SCAN_OFFLOAD,
289 WMI_10_4_SERVICE_ROAM_OFFLOAD,
290 WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
291 WMI_10_4_SERVICE_STA_PWRSAVE,
292 WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
293 WMI_10_4_SERVICE_AP_UAPSD,
294 WMI_10_4_SERVICE_AP_DFS,
295 WMI_10_4_SERVICE_11AC,
296 WMI_10_4_SERVICE_BLOCKACK,
297 WMI_10_4_SERVICE_PHYERR,
298 WMI_10_4_SERVICE_BCN_FILTER,
299 WMI_10_4_SERVICE_RTT,
300 WMI_10_4_SERVICE_RATECTRL,
301 WMI_10_4_SERVICE_WOW,
302 WMI_10_4_SERVICE_RATECTRL_CACHE,
303 WMI_10_4_SERVICE_IRAM_TIDS,
304 WMI_10_4_SERVICE_BURST,
305 WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
306 WMI_10_4_SERVICE_GTK_OFFLOAD,
307 WMI_10_4_SERVICE_SCAN_SCH,
308 WMI_10_4_SERVICE_CSA_OFFLOAD,
309 WMI_10_4_SERVICE_CHATTER,
310 WMI_10_4_SERVICE_COEX_FREQAVOID,
311 WMI_10_4_SERVICE_PACKET_POWER_SAVE,
312 WMI_10_4_SERVICE_FORCE_FW_HANG,
313 WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
314 WMI_10_4_SERVICE_GPIO,
315 WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
316 WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
317 WMI_10_4_SERVICE_STA_KEEP_ALIVE,
318 WMI_10_4_SERVICE_TX_ENCAP,
319 WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
320 WMI_10_4_SERVICE_EARLY_RX,
321 WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
322 WMI_10_4_SERVICE_TT,
323 WMI_10_4_SERVICE_ATF,
324 WMI_10_4_SERVICE_PEER_CACHING,
325 WMI_10_4_SERVICE_COEX_GPIO,
326 WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
327 WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
328 WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
329 WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
330 WMI_10_4_SERVICE_MESH_NON_11S,
331 WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
332 WMI_10_4_SERVICE_PEER_STATS,
333 WMI_10_4_SERVICE_MESH_11S,
334 WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
335 WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
336 WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
337 WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
338 WMI_10_4_SERVICE_VDEV_RX_FILTER,
339 WMI_10_4_SERVICE_BTCOEX,
340 WMI_10_4_SERVICE_CHECK_CAL_VERSION,
341 WMI_10_4_SERVICE_DBGLOG_WARN2,
342 WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
343 WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
344 WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
345 WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
346 WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
347 WMI_10_4_SERVICE_TDLS,
348 WMI_10_4_SERVICE_TDLS_OFFCHAN,
349 WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
350 WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
351 WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
352 WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
353 WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
354 WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
355 WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
356 WMI_10_4_SERVICE_TPC_STATS_FINAL,
357 WMI_10_4_SERVICE_CFR_CAPTURE_SUPPORT,
358 WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
359 WMI_10_4_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_LEGACY,
360 WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
361 WMI_10_4_SERVICE_PEER_TID_CONFIGS_SUPPORT,
362 WMI_10_4_SERVICE_VDEV_BCN_RATE_CONTROL,
363 WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
364 WMI_10_4_SERVICE_HTT_ASSERT_TRIGGER_SUPPORT,
365 WMI_10_4_SERVICE_VDEV_FILTER_NEIGHBOR_RX_PACKETS,
366 WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
367 WMI_10_4_SERVICE_PEER_CHWIDTH_CHANGE,
368 WMI_10_4_SERVICE_RX_FILTER_OUT_COUNT,
369 WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
370 WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
371 WMI_10_4_SERVICE_REPORT_AIRTIME,
372 WMI_10_4_SERVICE_TX_PWR_PER_PEER,
373 };
374
375 static inline char *wmi_service_name(enum wmi_service service_id)
376 {
377 #define SVCSTR(x) case x: return #x
378
379 switch (service_id) {
380 SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
381 SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
382 SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
383 SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
384 SVCSTR(WMI_SERVICE_STA_PWRSAVE);
385 SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
386 SVCSTR(WMI_SERVICE_AP_UAPSD);
387 SVCSTR(WMI_SERVICE_AP_DFS);
388 SVCSTR(WMI_SERVICE_11AC);
389 SVCSTR(WMI_SERVICE_BLOCKACK);
390 SVCSTR(WMI_SERVICE_PHYERR);
391 SVCSTR(WMI_SERVICE_BCN_FILTER);
392 SVCSTR(WMI_SERVICE_RTT);
393 SVCSTR(WMI_SERVICE_RATECTRL);
394 SVCSTR(WMI_SERVICE_WOW);
395 SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
396 SVCSTR(WMI_SERVICE_IRAM_TIDS);
397 SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
398 SVCSTR(WMI_SERVICE_NLO);
399 SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
400 SVCSTR(WMI_SERVICE_SCAN_SCH);
401 SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
402 SVCSTR(WMI_SERVICE_CHATTER);
403 SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
404 SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
405 SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
406 SVCSTR(WMI_SERVICE_GPIO);
407 SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
408 SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
409 SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
410 SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
411 SVCSTR(WMI_SERVICE_TX_ENCAP);
412 SVCSTR(WMI_SERVICE_BURST);
413 SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
414 SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
415 SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
416 SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
417 SVCSTR(WMI_SERVICE_EARLY_RX);
418 SVCSTR(WMI_SERVICE_STA_SMPS);
419 SVCSTR(WMI_SERVICE_FWTEST);
420 SVCSTR(WMI_SERVICE_STA_WMMAC);
421 SVCSTR(WMI_SERVICE_TDLS);
422 SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
423 SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
424 SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
425 SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
426 SVCSTR(WMI_SERVICE_WLAN_HB);
427 SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
428 SVCSTR(WMI_SERVICE_BATCH_SCAN);
429 SVCSTR(WMI_SERVICE_QPOWER);
430 SVCSTR(WMI_SERVICE_PLMREQ);
431 SVCSTR(WMI_SERVICE_THERMAL_MGMT);
432 SVCSTR(WMI_SERVICE_RMC);
433 SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
434 SVCSTR(WMI_SERVICE_COEX_SAR);
435 SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
436 SVCSTR(WMI_SERVICE_NAN);
437 SVCSTR(WMI_SERVICE_L1SS_STAT);
438 SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
439 SVCSTR(WMI_SERVICE_OBSS_SCAN);
440 SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
441 SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
442 SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
443 SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
444 SVCSTR(WMI_SERVICE_LPASS);
445 SVCSTR(WMI_SERVICE_EXTSCAN);
446 SVCSTR(WMI_SERVICE_D0WOW);
447 SVCSTR(WMI_SERVICE_HSOFFLOAD);
448 SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
449 SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
450 SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
451 SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
452 SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
453 SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
454 SVCSTR(WMI_SERVICE_ATF);
455 SVCSTR(WMI_SERVICE_COEX_GPIO);
456 SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
457 SVCSTR(WMI_SERVICE_TT);
458 SVCSTR(WMI_SERVICE_PEER_CACHING);
459 SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
460 SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
461 SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
462 SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
463 SVCSTR(WMI_SERVICE_MESH_11S);
464 SVCSTR(WMI_SERVICE_MESH_NON_11S);
465 SVCSTR(WMI_SERVICE_PEER_STATS);
466 SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
467 SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT);
468 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
469 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
470 SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
471 SVCSTR(WMI_SERVICE_VDEV_RX_FILTER);
472 SVCSTR(WMI_SERVICE_BTCOEX);
473 SVCSTR(WMI_SERVICE_CHECK_CAL_VERSION);
474 SVCSTR(WMI_SERVICE_DBGLOG_WARN2);
475 SVCSTR(WMI_SERVICE_BTCOEX_DUTY_CYCLE);
476 SVCSTR(WMI_SERVICE_4_WIRE_COEX_SUPPORT);
477 SVCSTR(WMI_SERVICE_EXTENDED_NSS_SUPPORT);
478 SVCSTR(WMI_SERVICE_PROG_GPIO_BAND_SELECT);
479 SVCSTR(WMI_SERVICE_SMART_LOGGING_SUPPORT);
480 SVCSTR(WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE);
481 SVCSTR(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY);
482 SVCSTR(WMI_SERVICE_MGMT_TX_WMI);
483 SVCSTR(WMI_SERVICE_TDLS_WIDER_BANDWIDTH);
484 SVCSTR(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS);
485 SVCSTR(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT);
486 SVCSTR(WMI_SERVICE_TPC_STATS_FINAL);
487 SVCSTR(WMI_SERVICE_RESET_CHIP);
488 SVCSTR(WMI_SERVICE_SPOOF_MAC_SUPPORT);
489 SVCSTR(WMI_SERVICE_TX_DATA_ACK_RSSI);
490 SVCSTR(WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT);
491 SVCSTR(WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT);
492 SVCSTR(WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT);
493 SVCSTR(WMI_SERVICE_THERM_THROT);
494 SVCSTR(WMI_SERVICE_RTT_RESPONDER_ROLE);
495 SVCSTR(WMI_SERVICE_PER_PACKET_SW_ENCRYPT);
496 SVCSTR(WMI_SERVICE_REPORT_AIRTIME);
497 SVCSTR(WMI_SERVICE_SYNC_DELETE_CMDS);
498 SVCSTR(WMI_SERVICE_TX_PWR_PER_PEER);
499
500 case WMI_SERVICE_MAX:
501 return NULL;
502 }
503
504 #undef SVCSTR
505
506 return NULL;
507 }
508
509 #define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
510 ((svc_id) < (len) && \
511 __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
512 BIT((svc_id) % (sizeof(u32))))
513
514
515
516
517
518
519 #define WMI_EXT_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
520 ((svc_id) >= (len) && \
521 __le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \
522 BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4))
523
524 #define SVCMAP(x, y, len) \
525 do { \
526 if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \
527 (WMI_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \
528 __set_bit(y, out); \
529 } while (0)
530
531 static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
532 size_t len)
533 {
534 SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
535 WMI_SERVICE_BEACON_OFFLOAD, len);
536 SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
537 WMI_SERVICE_SCAN_OFFLOAD, len);
538 SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
539 WMI_SERVICE_ROAM_OFFLOAD, len);
540 SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
541 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
542 SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
543 WMI_SERVICE_STA_PWRSAVE, len);
544 SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
545 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
546 SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
547 WMI_SERVICE_AP_UAPSD, len);
548 SVCMAP(WMI_10X_SERVICE_AP_DFS,
549 WMI_SERVICE_AP_DFS, len);
550 SVCMAP(WMI_10X_SERVICE_11AC,
551 WMI_SERVICE_11AC, len);
552 SVCMAP(WMI_10X_SERVICE_BLOCKACK,
553 WMI_SERVICE_BLOCKACK, len);
554 SVCMAP(WMI_10X_SERVICE_PHYERR,
555 WMI_SERVICE_PHYERR, len);
556 SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
557 WMI_SERVICE_BCN_FILTER, len);
558 SVCMAP(WMI_10X_SERVICE_RTT,
559 WMI_SERVICE_RTT, len);
560 SVCMAP(WMI_10X_SERVICE_RATECTRL,
561 WMI_SERVICE_RATECTRL, len);
562 SVCMAP(WMI_10X_SERVICE_WOW,
563 WMI_SERVICE_WOW, len);
564 SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
565 WMI_SERVICE_RATECTRL_CACHE, len);
566 SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
567 WMI_SERVICE_IRAM_TIDS, len);
568 SVCMAP(WMI_10X_SERVICE_BURST,
569 WMI_SERVICE_BURST, len);
570 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
571 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
572 SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
573 WMI_SERVICE_FORCE_FW_HANG, len);
574 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
575 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
576 SVCMAP(WMI_10X_SERVICE_ATF,
577 WMI_SERVICE_ATF, len);
578 SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
579 WMI_SERVICE_COEX_GPIO, len);
580 SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
581 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
582 SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
583 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
584 SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
585 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
586 SVCMAP(WMI_10X_SERVICE_MESH,
587 WMI_SERVICE_MESH_11S, len);
588 SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
589 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
590 SVCMAP(WMI_10X_SERVICE_PEER_STATS,
591 WMI_SERVICE_PEER_STATS, len);
592 SVCMAP(WMI_10X_SERVICE_RESET_CHIP,
593 WMI_SERVICE_RESET_CHIP, len);
594 SVCMAP(WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
595 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
596 SVCMAP(WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
597 WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT, len);
598 SVCMAP(WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
599 WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
600 }
601
602 static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
603 size_t len)
604 {
605 SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
606 WMI_SERVICE_BEACON_OFFLOAD, len);
607 SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
608 WMI_SERVICE_SCAN_OFFLOAD, len);
609 SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
610 WMI_SERVICE_ROAM_OFFLOAD, len);
611 SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
612 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
613 SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
614 WMI_SERVICE_STA_PWRSAVE, len);
615 SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
616 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
617 SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
618 WMI_SERVICE_AP_UAPSD, len);
619 SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
620 WMI_SERVICE_AP_DFS, len);
621 SVCMAP(WMI_MAIN_SERVICE_11AC,
622 WMI_SERVICE_11AC, len);
623 SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
624 WMI_SERVICE_BLOCKACK, len);
625 SVCMAP(WMI_MAIN_SERVICE_PHYERR,
626 WMI_SERVICE_PHYERR, len);
627 SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
628 WMI_SERVICE_BCN_FILTER, len);
629 SVCMAP(WMI_MAIN_SERVICE_RTT,
630 WMI_SERVICE_RTT, len);
631 SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
632 WMI_SERVICE_RATECTRL, len);
633 SVCMAP(WMI_MAIN_SERVICE_WOW,
634 WMI_SERVICE_WOW, len);
635 SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
636 WMI_SERVICE_RATECTRL_CACHE, len);
637 SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
638 WMI_SERVICE_IRAM_TIDS, len);
639 SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
640 WMI_SERVICE_ARPNS_OFFLOAD, len);
641 SVCMAP(WMI_MAIN_SERVICE_NLO,
642 WMI_SERVICE_NLO, len);
643 SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
644 WMI_SERVICE_GTK_OFFLOAD, len);
645 SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
646 WMI_SERVICE_SCAN_SCH, len);
647 SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
648 WMI_SERVICE_CSA_OFFLOAD, len);
649 SVCMAP(WMI_MAIN_SERVICE_CHATTER,
650 WMI_SERVICE_CHATTER, len);
651 SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
652 WMI_SERVICE_COEX_FREQAVOID, len);
653 SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
654 WMI_SERVICE_PACKET_POWER_SAVE, len);
655 SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
656 WMI_SERVICE_FORCE_FW_HANG, len);
657 SVCMAP(WMI_MAIN_SERVICE_GPIO,
658 WMI_SERVICE_GPIO, len);
659 SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
660 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
661 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
662 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
663 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
664 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
665 SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
666 WMI_SERVICE_STA_KEEP_ALIVE, len);
667 SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
668 WMI_SERVICE_TX_ENCAP, len);
669 }
670
671 static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
672 size_t len)
673 {
674 SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
675 WMI_SERVICE_BEACON_OFFLOAD, len);
676 SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
677 WMI_SERVICE_SCAN_OFFLOAD, len);
678 SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
679 WMI_SERVICE_ROAM_OFFLOAD, len);
680 SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
681 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
682 SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
683 WMI_SERVICE_STA_PWRSAVE, len);
684 SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
685 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
686 SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
687 WMI_SERVICE_AP_UAPSD, len);
688 SVCMAP(WMI_10_4_SERVICE_AP_DFS,
689 WMI_SERVICE_AP_DFS, len);
690 SVCMAP(WMI_10_4_SERVICE_11AC,
691 WMI_SERVICE_11AC, len);
692 SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
693 WMI_SERVICE_BLOCKACK, len);
694 SVCMAP(WMI_10_4_SERVICE_PHYERR,
695 WMI_SERVICE_PHYERR, len);
696 SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
697 WMI_SERVICE_BCN_FILTER, len);
698 SVCMAP(WMI_10_4_SERVICE_RTT,
699 WMI_SERVICE_RTT, len);
700 SVCMAP(WMI_10_4_SERVICE_RATECTRL,
701 WMI_SERVICE_RATECTRL, len);
702 SVCMAP(WMI_10_4_SERVICE_WOW,
703 WMI_SERVICE_WOW, len);
704 SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
705 WMI_SERVICE_RATECTRL_CACHE, len);
706 SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
707 WMI_SERVICE_IRAM_TIDS, len);
708 SVCMAP(WMI_10_4_SERVICE_BURST,
709 WMI_SERVICE_BURST, len);
710 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
711 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
712 SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
713 WMI_SERVICE_GTK_OFFLOAD, len);
714 SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
715 WMI_SERVICE_SCAN_SCH, len);
716 SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
717 WMI_SERVICE_CSA_OFFLOAD, len);
718 SVCMAP(WMI_10_4_SERVICE_CHATTER,
719 WMI_SERVICE_CHATTER, len);
720 SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
721 WMI_SERVICE_COEX_FREQAVOID, len);
722 SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
723 WMI_SERVICE_PACKET_POWER_SAVE, len);
724 SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
725 WMI_SERVICE_FORCE_FW_HANG, len);
726 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
727 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
728 SVCMAP(WMI_10_4_SERVICE_GPIO,
729 WMI_SERVICE_GPIO, len);
730 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
731 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
732 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
733 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
734 SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
735 WMI_SERVICE_STA_KEEP_ALIVE, len);
736 SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
737 WMI_SERVICE_TX_ENCAP, len);
738 SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
739 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
740 SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
741 WMI_SERVICE_EARLY_RX, len);
742 SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
743 WMI_SERVICE_ENHANCED_PROXY_STA, len);
744 SVCMAP(WMI_10_4_SERVICE_TT,
745 WMI_SERVICE_TT, len);
746 SVCMAP(WMI_10_4_SERVICE_ATF,
747 WMI_SERVICE_ATF, len);
748 SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
749 WMI_SERVICE_PEER_CACHING, len);
750 SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
751 WMI_SERVICE_COEX_GPIO, len);
752 SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
753 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
754 SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
755 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
756 SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
757 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
758 SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
759 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
760 SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
761 WMI_SERVICE_MESH_NON_11S, len);
762 SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
763 WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
764 SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
765 WMI_SERVICE_PEER_STATS, len);
766 SVCMAP(WMI_10_4_SERVICE_MESH_11S,
767 WMI_SERVICE_MESH_11S, len);
768 SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
769 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len);
770 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
771 WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
772 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
773 WMI_SERVICE_TX_MODE_PUSH_PULL, len);
774 SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
775 WMI_SERVICE_TX_MODE_DYNAMIC, len);
776 SVCMAP(WMI_10_4_SERVICE_VDEV_RX_FILTER,
777 WMI_SERVICE_VDEV_RX_FILTER, len);
778 SVCMAP(WMI_10_4_SERVICE_BTCOEX,
779 WMI_SERVICE_BTCOEX, len);
780 SVCMAP(WMI_10_4_SERVICE_CHECK_CAL_VERSION,
781 WMI_SERVICE_CHECK_CAL_VERSION, len);
782 SVCMAP(WMI_10_4_SERVICE_DBGLOG_WARN2,
783 WMI_SERVICE_DBGLOG_WARN2, len);
784 SVCMAP(WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
785 WMI_SERVICE_BTCOEX_DUTY_CYCLE, len);
786 SVCMAP(WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
787 WMI_SERVICE_4_WIRE_COEX_SUPPORT, len);
788 SVCMAP(WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
789 WMI_SERVICE_EXTENDED_NSS_SUPPORT, len);
790 SVCMAP(WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
791 WMI_SERVICE_PROG_GPIO_BAND_SELECT, len);
792 SVCMAP(WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
793 WMI_SERVICE_SMART_LOGGING_SUPPORT, len);
794 SVCMAP(WMI_10_4_SERVICE_TDLS,
795 WMI_SERVICE_TDLS, len);
796 SVCMAP(WMI_10_4_SERVICE_TDLS_OFFCHAN,
797 WMI_SERVICE_TDLS_OFFCHAN, len);
798 SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
799 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, len);
800 SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
801 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, len);
802 SVCMAP(WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
803 WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, len);
804 SVCMAP(WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
805 WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, len);
806 SVCMAP(WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
807 WMI_SERVICE_TDLS_WIDER_BANDWIDTH, len);
808 SVCMAP(WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
809 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
810 SVCMAP(WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
811 WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, len);
812 SVCMAP(WMI_10_4_SERVICE_TPC_STATS_FINAL,
813 WMI_SERVICE_TPC_STATS_FINAL, len);
814 SVCMAP(WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
815 WMI_SERVICE_TX_DATA_ACK_RSSI, len);
816 SVCMAP(WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
817 WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT, len);
818 SVCMAP(WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
819 WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT, len);
820 SVCMAP(WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
821 WMI_SERVICE_RTT_RESPONDER_ROLE, len);
822 SVCMAP(WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
823 WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
824 SVCMAP(WMI_10_4_SERVICE_REPORT_AIRTIME,
825 WMI_SERVICE_REPORT_AIRTIME, len);
826 SVCMAP(WMI_10_4_SERVICE_TX_PWR_PER_PEER,
827 WMI_SERVICE_TX_PWR_PER_PEER, len);
828 }
829
830 #undef SVCMAP
831
832
833 struct wmi_mac_addr {
834 union {
835 u8 addr[6];
836 struct {
837 u32 word0;
838 u32 word1;
839 } __packed;
840 } __packed;
841 } __packed;
842
843 struct wmi_cmd_map {
844 u32 init_cmdid;
845 u32 start_scan_cmdid;
846 u32 stop_scan_cmdid;
847 u32 scan_chan_list_cmdid;
848 u32 scan_sch_prio_tbl_cmdid;
849 u32 scan_prob_req_oui_cmdid;
850 u32 pdev_set_regdomain_cmdid;
851 u32 pdev_set_channel_cmdid;
852 u32 pdev_set_param_cmdid;
853 u32 pdev_pktlog_enable_cmdid;
854 u32 pdev_pktlog_disable_cmdid;
855 u32 pdev_set_wmm_params_cmdid;
856 u32 pdev_set_ht_cap_ie_cmdid;
857 u32 pdev_set_vht_cap_ie_cmdid;
858 u32 pdev_set_dscp_tid_map_cmdid;
859 u32 pdev_set_quiet_mode_cmdid;
860 u32 pdev_green_ap_ps_enable_cmdid;
861 u32 pdev_get_tpc_config_cmdid;
862 u32 pdev_set_base_macaddr_cmdid;
863 u32 vdev_create_cmdid;
864 u32 vdev_delete_cmdid;
865 u32 vdev_start_request_cmdid;
866 u32 vdev_restart_request_cmdid;
867 u32 vdev_up_cmdid;
868 u32 vdev_stop_cmdid;
869 u32 vdev_down_cmdid;
870 u32 vdev_set_param_cmdid;
871 u32 vdev_install_key_cmdid;
872 u32 peer_create_cmdid;
873 u32 peer_delete_cmdid;
874 u32 peer_flush_tids_cmdid;
875 u32 peer_set_param_cmdid;
876 u32 peer_assoc_cmdid;
877 u32 peer_add_wds_entry_cmdid;
878 u32 peer_remove_wds_entry_cmdid;
879 u32 peer_mcast_group_cmdid;
880 u32 bcn_tx_cmdid;
881 u32 pdev_send_bcn_cmdid;
882 u32 bcn_tmpl_cmdid;
883 u32 bcn_filter_rx_cmdid;
884 u32 prb_req_filter_rx_cmdid;
885 u32 mgmt_tx_cmdid;
886 u32 mgmt_tx_send_cmdid;
887 u32 prb_tmpl_cmdid;
888 u32 addba_clear_resp_cmdid;
889 u32 addba_send_cmdid;
890 u32 addba_status_cmdid;
891 u32 delba_send_cmdid;
892 u32 addba_set_resp_cmdid;
893 u32 send_singleamsdu_cmdid;
894 u32 sta_powersave_mode_cmdid;
895 u32 sta_powersave_param_cmdid;
896 u32 sta_mimo_ps_mode_cmdid;
897 u32 pdev_dfs_enable_cmdid;
898 u32 pdev_dfs_disable_cmdid;
899 u32 roam_scan_mode;
900 u32 roam_scan_rssi_threshold;
901 u32 roam_scan_period;
902 u32 roam_scan_rssi_change_threshold;
903 u32 roam_ap_profile;
904 u32 ofl_scan_add_ap_profile;
905 u32 ofl_scan_remove_ap_profile;
906 u32 ofl_scan_period;
907 u32 p2p_dev_set_device_info;
908 u32 p2p_dev_set_discoverability;
909 u32 p2p_go_set_beacon_ie;
910 u32 p2p_go_set_probe_resp_ie;
911 u32 p2p_set_vendor_ie_data_cmdid;
912 u32 ap_ps_peer_param_cmdid;
913 u32 ap_ps_peer_uapsd_coex_cmdid;
914 u32 peer_rate_retry_sched_cmdid;
915 u32 wlan_profile_trigger_cmdid;
916 u32 wlan_profile_set_hist_intvl_cmdid;
917 u32 wlan_profile_get_profile_data_cmdid;
918 u32 wlan_profile_enable_profile_id_cmdid;
919 u32 wlan_profile_list_profile_id_cmdid;
920 u32 pdev_suspend_cmdid;
921 u32 pdev_resume_cmdid;
922 u32 add_bcn_filter_cmdid;
923 u32 rmv_bcn_filter_cmdid;
924 u32 wow_add_wake_pattern_cmdid;
925 u32 wow_del_wake_pattern_cmdid;
926 u32 wow_enable_disable_wake_event_cmdid;
927 u32 wow_enable_cmdid;
928 u32 wow_hostwakeup_from_sleep_cmdid;
929 u32 rtt_measreq_cmdid;
930 u32 rtt_tsf_cmdid;
931 u32 vdev_spectral_scan_configure_cmdid;
932 u32 vdev_spectral_scan_enable_cmdid;
933 u32 request_stats_cmdid;
934 u32 set_arp_ns_offload_cmdid;
935 u32 network_list_offload_config_cmdid;
936 u32 gtk_offload_cmdid;
937 u32 csa_offload_enable_cmdid;
938 u32 csa_offload_chanswitch_cmdid;
939 u32 chatter_set_mode_cmdid;
940 u32 peer_tid_addba_cmdid;
941 u32 peer_tid_delba_cmdid;
942 u32 sta_dtim_ps_method_cmdid;
943 u32 sta_uapsd_auto_trig_cmdid;
944 u32 sta_keepalive_cmd;
945 u32 echo_cmdid;
946 u32 pdev_utf_cmdid;
947 u32 dbglog_cfg_cmdid;
948 u32 pdev_qvit_cmdid;
949 u32 pdev_ftm_intg_cmdid;
950 u32 vdev_set_keepalive_cmdid;
951 u32 vdev_get_keepalive_cmdid;
952 u32 force_fw_hang_cmdid;
953 u32 gpio_config_cmdid;
954 u32 gpio_output_cmdid;
955 u32 pdev_get_temperature_cmdid;
956 u32 vdev_set_wmm_params_cmdid;
957 u32 tdls_set_state_cmdid;
958 u32 tdls_peer_update_cmdid;
959 u32 adaptive_qcs_cmdid;
960 u32 scan_update_request_cmdid;
961 u32 vdev_standby_response_cmdid;
962 u32 vdev_resume_response_cmdid;
963 u32 wlan_peer_caching_add_peer_cmdid;
964 u32 wlan_peer_caching_evict_peer_cmdid;
965 u32 wlan_peer_caching_restore_peer_cmdid;
966 u32 wlan_peer_caching_print_all_peers_info_cmdid;
967 u32 peer_update_wds_entry_cmdid;
968 u32 peer_add_proxy_sta_entry_cmdid;
969 u32 rtt_keepalive_cmdid;
970 u32 oem_req_cmdid;
971 u32 nan_cmdid;
972 u32 vdev_ratemask_cmdid;
973 u32 qboost_cfg_cmdid;
974 u32 pdev_smart_ant_enable_cmdid;
975 u32 pdev_smart_ant_set_rx_antenna_cmdid;
976 u32 peer_smart_ant_set_tx_antenna_cmdid;
977 u32 peer_smart_ant_set_train_info_cmdid;
978 u32 peer_smart_ant_set_node_config_ops_cmdid;
979 u32 pdev_set_antenna_switch_table_cmdid;
980 u32 pdev_set_ctl_table_cmdid;
981 u32 pdev_set_mimogain_table_cmdid;
982 u32 pdev_ratepwr_table_cmdid;
983 u32 pdev_ratepwr_chainmsk_table_cmdid;
984 u32 pdev_fips_cmdid;
985 u32 tt_set_conf_cmdid;
986 u32 fwtest_cmdid;
987 u32 vdev_atf_request_cmdid;
988 u32 peer_atf_request_cmdid;
989 u32 pdev_get_ani_cck_config_cmdid;
990 u32 pdev_get_ani_ofdm_config_cmdid;
991 u32 pdev_reserve_ast_entry_cmdid;
992 u32 pdev_get_nfcal_power_cmdid;
993 u32 pdev_get_tpc_cmdid;
994 u32 pdev_get_ast_info_cmdid;
995 u32 vdev_set_dscp_tid_map_cmdid;
996 u32 pdev_get_info_cmdid;
997 u32 vdev_get_info_cmdid;
998 u32 vdev_filter_neighbor_rx_packets_cmdid;
999 u32 mu_cal_start_cmdid;
1000 u32 set_cca_params_cmdid;
1001 u32 pdev_bss_chan_info_request_cmdid;
1002 u32 pdev_enable_adaptive_cca_cmdid;
1003 u32 ext_resource_cfg_cmdid;
1004 u32 vdev_set_ie_cmdid;
1005 u32 set_lteu_config_cmdid;
1006 u32 atf_ssid_grouping_request_cmdid;
1007 u32 peer_atf_ext_request_cmdid;
1008 u32 set_periodic_channel_stats_cfg_cmdid;
1009 u32 peer_bwf_request_cmdid;
1010 u32 btcoex_cfg_cmdid;
1011 u32 peer_tx_mu_txmit_count_cmdid;
1012 u32 peer_tx_mu_txmit_rstcnt_cmdid;
1013 u32 peer_gid_userpos_list_cmdid;
1014 u32 pdev_check_cal_version_cmdid;
1015 u32 coex_version_cfg_cmid;
1016 u32 pdev_get_rx_filter_cmdid;
1017 u32 pdev_extended_nss_cfg_cmdid;
1018 u32 vdev_set_scan_nac_rssi_cmdid;
1019 u32 prog_gpio_band_select_cmdid;
1020 u32 config_smart_logging_cmdid;
1021 u32 debug_fatal_condition_cmdid;
1022 u32 get_tsf_timer_cmdid;
1023 u32 pdev_get_tpc_table_cmdid;
1024 u32 vdev_sifs_trigger_time_cmdid;
1025 u32 pdev_wds_entry_list_cmdid;
1026 u32 tdls_set_offchan_mode_cmdid;
1027 u32 radar_found_cmdid;
1028 u32 set_bb_timing_cmdid;
1029 };
1030
1031
1032
1033
1034 enum wmi_cmd_group {
1035
1036 WMI_GRP_START = 0x3,
1037 WMI_GRP_SCAN = WMI_GRP_START,
1038 WMI_GRP_PDEV,
1039 WMI_GRP_VDEV,
1040 WMI_GRP_PEER,
1041 WMI_GRP_MGMT,
1042 WMI_GRP_BA_NEG,
1043 WMI_GRP_STA_PS,
1044 WMI_GRP_DFS,
1045 WMI_GRP_ROAM,
1046 WMI_GRP_OFL_SCAN,
1047 WMI_GRP_P2P,
1048 WMI_GRP_AP_PS,
1049 WMI_GRP_RATE_CTRL,
1050 WMI_GRP_PROFILE,
1051 WMI_GRP_SUSPEND,
1052 WMI_GRP_BCN_FILTER,
1053 WMI_GRP_WOW,
1054 WMI_GRP_RTT,
1055 WMI_GRP_SPECTRAL,
1056 WMI_GRP_STATS,
1057 WMI_GRP_ARP_NS_OFL,
1058 WMI_GRP_NLO_OFL,
1059 WMI_GRP_GTK_OFL,
1060 WMI_GRP_CSA_OFL,
1061 WMI_GRP_CHATTER,
1062 WMI_GRP_TID_ADDBA,
1063 WMI_GRP_MISC,
1064 WMI_GRP_GPIO,
1065 };
1066
1067 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
1068 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
1069
1070 #define WMI_CMD_UNSUPPORTED 0
1071
1072
1073 enum wmi_cmd_id {
1074 WMI_INIT_CMDID = 0x1,
1075
1076
1077 WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
1078 WMI_STOP_SCAN_CMDID,
1079 WMI_SCAN_CHAN_LIST_CMDID,
1080 WMI_SCAN_SCH_PRIO_TBL_CMDID,
1081
1082
1083 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
1084 WMI_PDEV_SET_CHANNEL_CMDID,
1085 WMI_PDEV_SET_PARAM_CMDID,
1086 WMI_PDEV_PKTLOG_ENABLE_CMDID,
1087 WMI_PDEV_PKTLOG_DISABLE_CMDID,
1088 WMI_PDEV_SET_WMM_PARAMS_CMDID,
1089 WMI_PDEV_SET_HT_CAP_IE_CMDID,
1090 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
1091 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
1092 WMI_PDEV_SET_QUIET_MODE_CMDID,
1093 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1094 WMI_PDEV_GET_TPC_CONFIG_CMDID,
1095 WMI_PDEV_SET_BASE_MACADDR_CMDID,
1096
1097
1098 WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
1099 WMI_VDEV_DELETE_CMDID,
1100 WMI_VDEV_START_REQUEST_CMDID,
1101 WMI_VDEV_RESTART_REQUEST_CMDID,
1102 WMI_VDEV_UP_CMDID,
1103 WMI_VDEV_STOP_CMDID,
1104 WMI_VDEV_DOWN_CMDID,
1105 WMI_VDEV_SET_PARAM_CMDID,
1106 WMI_VDEV_INSTALL_KEY_CMDID,
1107
1108
1109 WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
1110 WMI_PEER_DELETE_CMDID,
1111 WMI_PEER_FLUSH_TIDS_CMDID,
1112 WMI_PEER_SET_PARAM_CMDID,
1113 WMI_PEER_ASSOC_CMDID,
1114 WMI_PEER_ADD_WDS_ENTRY_CMDID,
1115 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
1116 WMI_PEER_MCAST_GROUP_CMDID,
1117
1118
1119 WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
1120 WMI_PDEV_SEND_BCN_CMDID,
1121 WMI_BCN_TMPL_CMDID,
1122 WMI_BCN_FILTER_RX_CMDID,
1123 WMI_PRB_REQ_FILTER_RX_CMDID,
1124 WMI_MGMT_TX_CMDID,
1125 WMI_PRB_TMPL_CMDID,
1126
1127
1128 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
1129 WMI_ADDBA_SEND_CMDID,
1130 WMI_ADDBA_STATUS_CMDID,
1131 WMI_DELBA_SEND_CMDID,
1132 WMI_ADDBA_SET_RESP_CMDID,
1133 WMI_SEND_SINGLEAMSDU_CMDID,
1134
1135
1136 WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
1137 WMI_STA_POWERSAVE_PARAM_CMDID,
1138 WMI_STA_MIMO_PS_MODE_CMDID,
1139
1140
1141 WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
1142 WMI_PDEV_DFS_DISABLE_CMDID,
1143
1144
1145 WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
1146 WMI_ROAM_SCAN_RSSI_THRESHOLD,
1147 WMI_ROAM_SCAN_PERIOD,
1148 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1149 WMI_ROAM_AP_PROFILE,
1150
1151
1152 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
1153 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
1154 WMI_OFL_SCAN_PERIOD,
1155
1156
1157 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
1158 WMI_P2P_DEV_SET_DISCOVERABILITY,
1159 WMI_P2P_GO_SET_BEACON_IE,
1160 WMI_P2P_GO_SET_PROBE_RESP_IE,
1161 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
1162
1163
1164 WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
1165 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
1166
1167
1168 WMI_PEER_RATE_RETRY_SCHED_CMDID =
1169 WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
1170
1171
1172 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
1173 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1174 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1175 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1176 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1177
1178
1179 WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
1180 WMI_PDEV_RESUME_CMDID,
1181
1182
1183 WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
1184 WMI_RMV_BCN_FILTER_CMDID,
1185
1186
1187 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
1188 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
1189 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1190 WMI_WOW_ENABLE_CMDID,
1191 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1192
1193
1194 WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
1195 WMI_RTT_TSF_CMDID,
1196
1197
1198 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
1199 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1200
1201
1202 WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
1203
1204
1205 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
1206
1207
1208 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
1209
1210
1211 WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
1212
1213
1214 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
1215 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
1216
1217
1218 WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
1219
1220
1221 WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
1222 WMI_PEER_TID_DELBA_CMDID,
1223
1224
1225 WMI_STA_DTIM_PS_METHOD_CMDID,
1226
1227 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
1228
1229
1230
1231
1232 WMI_STA_KEEPALIVE_CMD,
1233
1234
1235 WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
1236 WMI_PDEV_UTF_CMDID,
1237 WMI_DBGLOG_CFG_CMDID,
1238 WMI_PDEV_QVIT_CMDID,
1239 WMI_PDEV_FTM_INTG_CMDID,
1240 WMI_VDEV_SET_KEEPALIVE_CMDID,
1241 WMI_VDEV_GET_KEEPALIVE_CMDID,
1242 WMI_FORCE_FW_HANG_CMDID,
1243
1244
1245 WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
1246 WMI_GPIO_OUTPUT_CMDID,
1247 };
1248
1249 enum wmi_event_id {
1250 WMI_SERVICE_READY_EVENTID = 0x1,
1251 WMI_READY_EVENTID,
1252 WMI_SERVICE_AVAILABLE_EVENTID,
1253
1254
1255 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
1256
1257
1258 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
1259 WMI_CHAN_INFO_EVENTID,
1260 WMI_PHYERR_EVENTID,
1261
1262
1263 WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
1264 WMI_VDEV_STOPPED_EVENTID,
1265 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
1266
1267
1268 WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
1269
1270
1271 WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
1272 WMI_HOST_SWBA_EVENTID,
1273 WMI_TBTTOFFSET_UPDATE_EVENTID,
1274
1275
1276 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
1277 WMI_TX_ADDBA_COMPLETE_EVENTID,
1278
1279
1280 WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
1281 WMI_PROFILE_MATCH,
1282
1283
1284 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
1285
1286
1287 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
1288 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
1289 WMI_RTT_ERROR_REPORT_EVENTID,
1290
1291
1292 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
1293 WMI_GTK_REKEY_FAIL_EVENTID,
1294
1295
1296 WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
1297
1298
1299 WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
1300 WMI_PDEV_UTF_EVENTID,
1301 WMI_DEBUG_MESG_EVENTID,
1302 WMI_UPDATE_STATS_EVENTID,
1303 WMI_DEBUG_PRINT_EVENTID,
1304 WMI_DCS_INTERFERENCE_EVENTID,
1305 WMI_PDEV_QVIT_EVENTID,
1306 WMI_WLAN_PROFILE_DATA_EVENTID,
1307 WMI_PDEV_FTM_INTG_EVENTID,
1308 WMI_WLAN_FREQ_AVOID_EVENTID,
1309 WMI_VDEV_GET_KEEPALIVE_EVENTID,
1310
1311
1312 WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
1313 };
1314
1315
1316 enum wmi_10x_cmd_id {
1317 WMI_10X_START_CMDID = 0x9000,
1318 WMI_10X_END_CMDID = 0x9FFF,
1319
1320
1321 WMI_10X_INIT_CMDID,
1322
1323
1324
1325 WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1326 WMI_10X_STOP_SCAN_CMDID,
1327 WMI_10X_SCAN_CHAN_LIST_CMDID,
1328 WMI_10X_ECHO_CMDID,
1329
1330
1331 WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1332 WMI_10X_PDEV_SET_CHANNEL_CMDID,
1333 WMI_10X_PDEV_SET_PARAM_CMDID,
1334 WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1335 WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1336 WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1337 WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1338 WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1339 WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1340 WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1341 WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1342 WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1343 WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1344
1345
1346 WMI_10X_VDEV_CREATE_CMDID,
1347 WMI_10X_VDEV_DELETE_CMDID,
1348 WMI_10X_VDEV_START_REQUEST_CMDID,
1349 WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1350 WMI_10X_VDEV_UP_CMDID,
1351 WMI_10X_VDEV_STOP_CMDID,
1352 WMI_10X_VDEV_DOWN_CMDID,
1353 WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1354 WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1355 WMI_10X_VDEV_SET_PARAM_CMDID,
1356 WMI_10X_VDEV_INSTALL_KEY_CMDID,
1357
1358
1359 WMI_10X_PEER_CREATE_CMDID,
1360 WMI_10X_PEER_DELETE_CMDID,
1361 WMI_10X_PEER_FLUSH_TIDS_CMDID,
1362 WMI_10X_PEER_SET_PARAM_CMDID,
1363 WMI_10X_PEER_ASSOC_CMDID,
1364 WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1365 WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1366 WMI_10X_PEER_MCAST_GROUP_CMDID,
1367
1368
1369
1370 WMI_10X_BCN_TX_CMDID,
1371 WMI_10X_BCN_PRB_TMPL_CMDID,
1372 WMI_10X_BCN_FILTER_RX_CMDID,
1373 WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1374 WMI_10X_MGMT_TX_CMDID,
1375
1376
1377 WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1378 WMI_10X_ADDBA_SEND_CMDID,
1379 WMI_10X_ADDBA_STATUS_CMDID,
1380 WMI_10X_DELBA_SEND_CMDID,
1381 WMI_10X_ADDBA_SET_RESP_CMDID,
1382 WMI_10X_SEND_SINGLEAMSDU_CMDID,
1383
1384
1385 WMI_10X_STA_POWERSAVE_MODE_CMDID,
1386 WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1387 WMI_10X_STA_MIMO_PS_MODE_CMDID,
1388
1389
1390 WMI_10X_DBGLOG_CFG_CMDID,
1391
1392
1393 WMI_10X_PDEV_DFS_ENABLE_CMDID,
1394 WMI_10X_PDEV_DFS_DISABLE_CMDID,
1395
1396
1397 WMI_10X_PDEV_QVIT_CMDID,
1398
1399
1400 WMI_10X_ROAM_SCAN_MODE,
1401 WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1402 WMI_10X_ROAM_SCAN_PERIOD,
1403 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1404 WMI_10X_ROAM_AP_PROFILE,
1405 WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1406 WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1407 WMI_10X_OFL_SCAN_PERIOD,
1408
1409
1410 WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1411 WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1412 WMI_10X_P2P_GO_SET_BEACON_IE,
1413 WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1414
1415
1416 WMI_10X_AP_PS_PEER_PARAM_CMDID,
1417 WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1418
1419
1420 WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1421
1422
1423 WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1424 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1425 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1426 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1427 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1428
1429
1430 WMI_10X_PDEV_SUSPEND_CMDID,
1431 WMI_10X_PDEV_RESUME_CMDID,
1432
1433
1434 WMI_10X_ADD_BCN_FILTER_CMDID,
1435 WMI_10X_RMV_BCN_FILTER_CMDID,
1436
1437
1438 WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1439 WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1440 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1441 WMI_10X_WOW_ENABLE_CMDID,
1442 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1443
1444
1445 WMI_10X_RTT_MEASREQ_CMDID,
1446 WMI_10X_RTT_TSF_CMDID,
1447
1448
1449 WMI_10X_PDEV_SEND_BCN_CMDID,
1450
1451
1452 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1453 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1454 WMI_10X_REQUEST_STATS_CMDID,
1455
1456
1457 WMI_10X_GPIO_CONFIG_CMDID,
1458 WMI_10X_GPIO_OUTPUT_CMDID,
1459
1460 WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1461 };
1462
1463 enum wmi_10x_event_id {
1464 WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1465 WMI_10X_READY_EVENTID,
1466 WMI_10X_START_EVENTID = 0x9000,
1467 WMI_10X_END_EVENTID = 0x9FFF,
1468
1469
1470 WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1471 WMI_10X_ECHO_EVENTID,
1472 WMI_10X_DEBUG_MESG_EVENTID,
1473 WMI_10X_UPDATE_STATS_EVENTID,
1474
1475
1476 WMI_10X_INST_RSSI_STATS_EVENTID,
1477
1478
1479 WMI_10X_VDEV_START_RESP_EVENTID,
1480 WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1481 WMI_10X_VDEV_RESUME_REQ_EVENTID,
1482 WMI_10X_VDEV_STOPPED_EVENTID,
1483
1484
1485 WMI_10X_PEER_STA_KICKOUT_EVENTID,
1486
1487
1488 WMI_10X_HOST_SWBA_EVENTID,
1489 WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1490 WMI_10X_MGMT_RX_EVENTID,
1491
1492
1493 WMI_10X_CHAN_INFO_EVENTID,
1494
1495
1496 WMI_10X_PHYERR_EVENTID,
1497
1498
1499 WMI_10X_ROAM_EVENTID,
1500
1501
1502 WMI_10X_PROFILE_MATCH,
1503
1504
1505 WMI_10X_DEBUG_PRINT_EVENTID,
1506
1507 WMI_10X_PDEV_QVIT_EVENTID,
1508
1509 WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1510
1511
1512 WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1513 WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1514 WMI_10X_RTT_ERROR_REPORT_EVENTID,
1515
1516 WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1517 WMI_10X_DCS_INTERFERENCE_EVENTID,
1518
1519
1520 WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1521
1522 WMI_10X_GPIO_INPUT_EVENTID,
1523 WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
1524 };
1525
1526 enum wmi_10_2_cmd_id {
1527 WMI_10_2_START_CMDID = 0x9000,
1528 WMI_10_2_END_CMDID = 0x9FFF,
1529 WMI_10_2_INIT_CMDID,
1530 WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
1531 WMI_10_2_STOP_SCAN_CMDID,
1532 WMI_10_2_SCAN_CHAN_LIST_CMDID,
1533 WMI_10_2_ECHO_CMDID,
1534 WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1535 WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1536 WMI_10_2_PDEV_SET_PARAM_CMDID,
1537 WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1538 WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1539 WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1540 WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1541 WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1542 WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1543 WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1544 WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1545 WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1546 WMI_10_2_VDEV_CREATE_CMDID,
1547 WMI_10_2_VDEV_DELETE_CMDID,
1548 WMI_10_2_VDEV_START_REQUEST_CMDID,
1549 WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1550 WMI_10_2_VDEV_UP_CMDID,
1551 WMI_10_2_VDEV_STOP_CMDID,
1552 WMI_10_2_VDEV_DOWN_CMDID,
1553 WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
1554 WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
1555 WMI_10_2_VDEV_SET_PARAM_CMDID,
1556 WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1557 WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
1558 WMI_10_2_PEER_CREATE_CMDID,
1559 WMI_10_2_PEER_DELETE_CMDID,
1560 WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1561 WMI_10_2_PEER_SET_PARAM_CMDID,
1562 WMI_10_2_PEER_ASSOC_CMDID,
1563 WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1564 WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
1565 WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1566 WMI_10_2_PEER_MCAST_GROUP_CMDID,
1567 WMI_10_2_BCN_TX_CMDID,
1568 WMI_10_2_BCN_PRB_TMPL_CMDID,
1569 WMI_10_2_BCN_FILTER_RX_CMDID,
1570 WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1571 WMI_10_2_MGMT_TX_CMDID,
1572 WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1573 WMI_10_2_ADDBA_SEND_CMDID,
1574 WMI_10_2_ADDBA_STATUS_CMDID,
1575 WMI_10_2_DELBA_SEND_CMDID,
1576 WMI_10_2_ADDBA_SET_RESP_CMDID,
1577 WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1578 WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1579 WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1580 WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1581 WMI_10_2_DBGLOG_CFG_CMDID,
1582 WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1583 WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1584 WMI_10_2_PDEV_QVIT_CMDID,
1585 WMI_10_2_ROAM_SCAN_MODE,
1586 WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1587 WMI_10_2_ROAM_SCAN_PERIOD,
1588 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1589 WMI_10_2_ROAM_AP_PROFILE,
1590 WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1591 WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1592 WMI_10_2_OFL_SCAN_PERIOD,
1593 WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1594 WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1595 WMI_10_2_P2P_GO_SET_BEACON_IE,
1596 WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1597 WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1598 WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
1599 WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1600 WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1601 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1602 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1603 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1604 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1605 WMI_10_2_PDEV_SUSPEND_CMDID,
1606 WMI_10_2_PDEV_RESUME_CMDID,
1607 WMI_10_2_ADD_BCN_FILTER_CMDID,
1608 WMI_10_2_RMV_BCN_FILTER_CMDID,
1609 WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1610 WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1611 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1612 WMI_10_2_WOW_ENABLE_CMDID,
1613 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1614 WMI_10_2_RTT_MEASREQ_CMDID,
1615 WMI_10_2_RTT_TSF_CMDID,
1616 WMI_10_2_RTT_KEEPALIVE_CMDID,
1617 WMI_10_2_PDEV_SEND_BCN_CMDID,
1618 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1619 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1620 WMI_10_2_REQUEST_STATS_CMDID,
1621 WMI_10_2_GPIO_CONFIG_CMDID,
1622 WMI_10_2_GPIO_OUTPUT_CMDID,
1623 WMI_10_2_VDEV_RATEMASK_CMDID,
1624 WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
1625 WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1626 WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1627 WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1628 WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1629 WMI_10_2_FORCE_FW_HANG_CMDID,
1630 WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1631 WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
1632 WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1633 WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
1634 WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1635 WMI_10_2_PDEV_GET_INFO,
1636 WMI_10_2_VDEV_GET_INFO,
1637 WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1638 WMI_10_2_PEER_ATF_REQUEST_CMDID,
1639 WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
1640 WMI_10_2_MU_CAL_START_CMDID,
1641 WMI_10_2_SET_LTEU_CONFIG_CMDID,
1642 WMI_10_2_SET_CCA_PARAMS,
1643 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1644 WMI_10_2_FWTEST_CMDID,
1645 WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
1646 WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
1647 };
1648
1649 enum wmi_10_2_event_id {
1650 WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
1651 WMI_10_2_READY_EVENTID,
1652 WMI_10_2_DEBUG_MESG_EVENTID,
1653 WMI_10_2_START_EVENTID = 0x9000,
1654 WMI_10_2_END_EVENTID = 0x9FFF,
1655 WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
1656 WMI_10_2_ECHO_EVENTID,
1657 WMI_10_2_UPDATE_STATS_EVENTID,
1658 WMI_10_2_INST_RSSI_STATS_EVENTID,
1659 WMI_10_2_VDEV_START_RESP_EVENTID,
1660 WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
1661 WMI_10_2_VDEV_RESUME_REQ_EVENTID,
1662 WMI_10_2_VDEV_STOPPED_EVENTID,
1663 WMI_10_2_PEER_STA_KICKOUT_EVENTID,
1664 WMI_10_2_HOST_SWBA_EVENTID,
1665 WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
1666 WMI_10_2_MGMT_RX_EVENTID,
1667 WMI_10_2_CHAN_INFO_EVENTID,
1668 WMI_10_2_PHYERR_EVENTID,
1669 WMI_10_2_ROAM_EVENTID,
1670 WMI_10_2_PROFILE_MATCH,
1671 WMI_10_2_DEBUG_PRINT_EVENTID,
1672 WMI_10_2_PDEV_QVIT_EVENTID,
1673 WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
1674 WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
1675 WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
1676 WMI_10_2_RTT_ERROR_REPORT_EVENTID,
1677 WMI_10_2_RTT_KEEPALIVE_EVENTID,
1678 WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
1679 WMI_10_2_DCS_INTERFERENCE_EVENTID,
1680 WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
1681 WMI_10_2_GPIO_INPUT_EVENTID,
1682 WMI_10_2_PEER_RATECODE_LIST_EVENTID,
1683 WMI_10_2_GENERIC_BUFFER_EVENTID,
1684 WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
1685 WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
1686 WMI_10_2_WDS_PEER_EVENTID,
1687 WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1688 WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1689 WMI_10_2_MU_REPORT_EVENTID,
1690 WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
1691 WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
1692 };
1693
1694 enum wmi_10_4_cmd_id {
1695 WMI_10_4_START_CMDID = 0x9000,
1696 WMI_10_4_END_CMDID = 0x9FFF,
1697 WMI_10_4_INIT_CMDID,
1698 WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
1699 WMI_10_4_STOP_SCAN_CMDID,
1700 WMI_10_4_SCAN_CHAN_LIST_CMDID,
1701 WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
1702 WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
1703 WMI_10_4_ECHO_CMDID,
1704 WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
1705 WMI_10_4_PDEV_SET_CHANNEL_CMDID,
1706 WMI_10_4_PDEV_SET_PARAM_CMDID,
1707 WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
1708 WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
1709 WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
1710 WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
1711 WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
1712 WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
1713 WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
1714 WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
1715 WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1716 WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
1717 WMI_10_4_VDEV_CREATE_CMDID,
1718 WMI_10_4_VDEV_DELETE_CMDID,
1719 WMI_10_4_VDEV_START_REQUEST_CMDID,
1720 WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
1721 WMI_10_4_VDEV_UP_CMDID,
1722 WMI_10_4_VDEV_STOP_CMDID,
1723 WMI_10_4_VDEV_DOWN_CMDID,
1724 WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
1725 WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
1726 WMI_10_4_VDEV_SET_PARAM_CMDID,
1727 WMI_10_4_VDEV_INSTALL_KEY_CMDID,
1728 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
1729 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
1730 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
1731 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
1732 WMI_10_4_PEER_CREATE_CMDID,
1733 WMI_10_4_PEER_DELETE_CMDID,
1734 WMI_10_4_PEER_FLUSH_TIDS_CMDID,
1735 WMI_10_4_PEER_SET_PARAM_CMDID,
1736 WMI_10_4_PEER_ASSOC_CMDID,
1737 WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
1738 WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
1739 WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
1740 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
1741 WMI_10_4_PEER_MCAST_GROUP_CMDID,
1742 WMI_10_4_BCN_TX_CMDID,
1743 WMI_10_4_PDEV_SEND_BCN_CMDID,
1744 WMI_10_4_BCN_PRB_TMPL_CMDID,
1745 WMI_10_4_BCN_FILTER_RX_CMDID,
1746 WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
1747 WMI_10_4_MGMT_TX_CMDID,
1748 WMI_10_4_PRB_TMPL_CMDID,
1749 WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
1750 WMI_10_4_ADDBA_SEND_CMDID,
1751 WMI_10_4_ADDBA_STATUS_CMDID,
1752 WMI_10_4_DELBA_SEND_CMDID,
1753 WMI_10_4_ADDBA_SET_RESP_CMDID,
1754 WMI_10_4_SEND_SINGLEAMSDU_CMDID,
1755 WMI_10_4_STA_POWERSAVE_MODE_CMDID,
1756 WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
1757 WMI_10_4_STA_MIMO_PS_MODE_CMDID,
1758 WMI_10_4_DBGLOG_CFG_CMDID,
1759 WMI_10_4_PDEV_DFS_ENABLE_CMDID,
1760 WMI_10_4_PDEV_DFS_DISABLE_CMDID,
1761 WMI_10_4_PDEV_QVIT_CMDID,
1762 WMI_10_4_ROAM_SCAN_MODE,
1763 WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
1764 WMI_10_4_ROAM_SCAN_PERIOD,
1765 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1766 WMI_10_4_ROAM_AP_PROFILE,
1767 WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
1768 WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
1769 WMI_10_4_OFL_SCAN_PERIOD,
1770 WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
1771 WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
1772 WMI_10_4_P2P_GO_SET_BEACON_IE,
1773 WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
1774 WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
1775 WMI_10_4_AP_PS_PEER_PARAM_CMDID,
1776 WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
1777 WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
1778 WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
1779 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1780 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1781 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1782 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1783 WMI_10_4_PDEV_SUSPEND_CMDID,
1784 WMI_10_4_PDEV_RESUME_CMDID,
1785 WMI_10_4_ADD_BCN_FILTER_CMDID,
1786 WMI_10_4_RMV_BCN_FILTER_CMDID,
1787 WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
1788 WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
1789 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1790 WMI_10_4_WOW_ENABLE_CMDID,
1791 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1792 WMI_10_4_RTT_MEASREQ_CMDID,
1793 WMI_10_4_RTT_TSF_CMDID,
1794 WMI_10_4_RTT_KEEPALIVE_CMDID,
1795 WMI_10_4_OEM_REQ_CMDID,
1796 WMI_10_4_NAN_CMDID,
1797 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1798 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1799 WMI_10_4_REQUEST_STATS_CMDID,
1800 WMI_10_4_GPIO_CONFIG_CMDID,
1801 WMI_10_4_GPIO_OUTPUT_CMDID,
1802 WMI_10_4_VDEV_RATEMASK_CMDID,
1803 WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
1804 WMI_10_4_GTK_OFFLOAD_CMDID,
1805 WMI_10_4_QBOOST_CFG_CMDID,
1806 WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
1807 WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
1808 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1809 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1810 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1811 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1812 WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
1813 WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
1814 WMI_10_4_FORCE_FW_HANG_CMDID,
1815 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1816 WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
1817 WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1818 WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
1819 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1820 WMI_10_4_PDEV_FIPS_CMDID,
1821 WMI_10_4_TT_SET_CONF_CMDID,
1822 WMI_10_4_FWTEST_CMDID,
1823 WMI_10_4_VDEV_ATF_REQUEST_CMDID,
1824 WMI_10_4_PEER_ATF_REQUEST_CMDID,
1825 WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
1826 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
1827 WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
1828 WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
1829 WMI_10_4_PDEV_GET_TPC_CMDID,
1830 WMI_10_4_PDEV_GET_AST_INFO_CMDID,
1831 WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
1832 WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
1833 WMI_10_4_PDEV_GET_INFO_CMDID,
1834 WMI_10_4_VDEV_GET_INFO_CMDID,
1835 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
1836 WMI_10_4_MU_CAL_START_CMDID,
1837 WMI_10_4_SET_CCA_PARAMS_CMDID,
1838 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1839 WMI_10_4_EXT_RESOURCE_CFG_CMDID,
1840 WMI_10_4_VDEV_SET_IE_CMDID,
1841 WMI_10_4_SET_LTEU_CONFIG_CMDID,
1842 WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
1843 WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
1844 WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1845 WMI_10_4_PEER_BWF_REQUEST_CMDID,
1846 WMI_10_4_BTCOEX_CFG_CMDID,
1847 WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
1848 WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
1849 WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
1850 WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
1851 WMI_10_4_COEX_VERSION_CFG_CMID,
1852 WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
1853 WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
1854 WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
1855 WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
1856 WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
1857 WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
1858 WMI_10_4_GET_TSF_TIMER_CMDID,
1859 WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
1860 WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
1861 WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
1862 WMI_10_4_TDLS_SET_STATE_CMDID,
1863 WMI_10_4_TDLS_PEER_UPDATE_CMDID,
1864 WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
1865 WMI_10_4_PDEV_SEND_FD_CMDID,
1866 WMI_10_4_ENABLE_FILS_CMDID,
1867 WMI_10_4_PDEV_SET_BRIDGE_MACADDR_CMDID,
1868 WMI_10_4_ATF_GROUP_WMM_AC_CONFIG_REQUEST_CMDID,
1869 WMI_10_4_RADAR_FOUND_CMDID,
1870 WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
1871 };
1872
1873 enum wmi_10_4_event_id {
1874 WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
1875 WMI_10_4_READY_EVENTID,
1876 WMI_10_4_DEBUG_MESG_EVENTID,
1877 WMI_10_4_START_EVENTID = 0x9000,
1878 WMI_10_4_END_EVENTID = 0x9FFF,
1879 WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
1880 WMI_10_4_ECHO_EVENTID,
1881 WMI_10_4_UPDATE_STATS_EVENTID,
1882 WMI_10_4_INST_RSSI_STATS_EVENTID,
1883 WMI_10_4_VDEV_START_RESP_EVENTID,
1884 WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
1885 WMI_10_4_VDEV_RESUME_REQ_EVENTID,
1886 WMI_10_4_VDEV_STOPPED_EVENTID,
1887 WMI_10_4_PEER_STA_KICKOUT_EVENTID,
1888 WMI_10_4_HOST_SWBA_EVENTID,
1889 WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
1890 WMI_10_4_MGMT_RX_EVENTID,
1891 WMI_10_4_CHAN_INFO_EVENTID,
1892 WMI_10_4_PHYERR_EVENTID,
1893 WMI_10_4_ROAM_EVENTID,
1894 WMI_10_4_PROFILE_MATCH,
1895 WMI_10_4_DEBUG_PRINT_EVENTID,
1896 WMI_10_4_PDEV_QVIT_EVENTID,
1897 WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
1898 WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
1899 WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
1900 WMI_10_4_RTT_ERROR_REPORT_EVENTID,
1901 WMI_10_4_RTT_KEEPALIVE_EVENTID,
1902 WMI_10_4_OEM_CAPABILITY_EVENTID,
1903 WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
1904 WMI_10_4_OEM_ERROR_REPORT_EVENTID,
1905 WMI_10_4_NAN_EVENTID,
1906 WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
1907 WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
1908 WMI_10_4_GTK_REKEY_FAIL_EVENTID,
1909 WMI_10_4_DCS_INTERFERENCE_EVENTID,
1910 WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
1911 WMI_10_4_CSA_HANDLING_EVENTID,
1912 WMI_10_4_GPIO_INPUT_EVENTID,
1913 WMI_10_4_PEER_RATECODE_LIST_EVENTID,
1914 WMI_10_4_GENERIC_BUFFER_EVENTID,
1915 WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
1916 WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
1917 WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
1918 WMI_10_4_WDS_PEER_EVENTID,
1919 WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
1920 WMI_10_4_PDEV_FIPS_EVENTID,
1921 WMI_10_4_TT_STATS_EVENTID,
1922 WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
1923 WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
1924 WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
1925 WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
1926 WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
1927 WMI_10_4_PDEV_TPC_EVENTID,
1928 WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
1929 WMI_10_4_PDEV_TEMPERATURE_EVENTID,
1930 WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
1931 WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
1932 WMI_10_4_MU_REPORT_EVENTID,
1933 WMI_10_4_TX_DATA_TRAFFIC_CTRL_EVENTID,
1934 WMI_10_4_PEER_TX_MU_TXMIT_COUNT_EVENTID,
1935 WMI_10_4_PEER_GID_USERPOS_LIST_EVENTID,
1936 WMI_10_4_PDEV_CHECK_CAL_VERSION_EVENTID,
1937 WMI_10_4_ATF_PEER_STATS_EVENTID,
1938 WMI_10_4_PDEV_GET_RX_FILTER_EVENTID,
1939 WMI_10_4_NAC_RSSI_EVENTID,
1940 WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID,
1941 WMI_10_4_GET_TSF_TIMER_RESP_EVENTID,
1942 WMI_10_4_PDEV_TPC_TABLE_EVENTID,
1943 WMI_10_4_PDEV_WDS_ENTRY_LIST_EVENTID,
1944 WMI_10_4_TDLS_PEER_EVENTID,
1945 WMI_10_4_HOST_SWFDA_EVENTID,
1946 WMI_10_4_ESP_ESTIMATE_EVENTID,
1947 WMI_10_4_DFS_STATUS_CHECK_EVENTID,
1948 WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
1949 };
1950
1951 enum wmi_phy_mode {
1952 MODE_11A = 0,
1953 MODE_11G = 1,
1954 MODE_11B = 2,
1955 MODE_11GONLY = 3,
1956 MODE_11NA_HT20 = 4,
1957 MODE_11NG_HT20 = 5,
1958 MODE_11NA_HT40 = 6,
1959 MODE_11NG_HT40 = 7,
1960 MODE_11AC_VHT20 = 8,
1961 MODE_11AC_VHT40 = 9,
1962 MODE_11AC_VHT80 = 10,
1963
1964 MODE_11AC_VHT20_2G = 11,
1965 MODE_11AC_VHT40_2G = 12,
1966 MODE_11AC_VHT80_2G = 13,
1967 MODE_11AC_VHT80_80 = 14,
1968 MODE_11AC_VHT160 = 15,
1969 MODE_UNKNOWN = 16,
1970 MODE_MAX = 16
1971 };
1972
1973 static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
1974 {
1975 switch (mode) {
1976 case MODE_11A:
1977 return "11a";
1978 case MODE_11G:
1979 return "11g";
1980 case MODE_11B:
1981 return "11b";
1982 case MODE_11GONLY:
1983 return "11gonly";
1984 case MODE_11NA_HT20:
1985 return "11na-ht20";
1986 case MODE_11NG_HT20:
1987 return "11ng-ht20";
1988 case MODE_11NA_HT40:
1989 return "11na-ht40";
1990 case MODE_11NG_HT40:
1991 return "11ng-ht40";
1992 case MODE_11AC_VHT20:
1993 return "11ac-vht20";
1994 case MODE_11AC_VHT40:
1995 return "11ac-vht40";
1996 case MODE_11AC_VHT80:
1997 return "11ac-vht80";
1998 case MODE_11AC_VHT160:
1999 return "11ac-vht160";
2000 case MODE_11AC_VHT80_80:
2001 return "11ac-vht80+80";
2002 case MODE_11AC_VHT20_2G:
2003 return "11ac-vht20-2g";
2004 case MODE_11AC_VHT40_2G:
2005 return "11ac-vht40-2g";
2006 case MODE_11AC_VHT80_2G:
2007 return "11ac-vht80-2g";
2008 case MODE_UNKNOWN:
2009
2010 break;
2011
2012
2013
2014
2015 }
2016
2017 return "<unknown>";
2018 }
2019
2020 #define WMI_CHAN_LIST_TAG 0x1
2021 #define WMI_SSID_LIST_TAG 0x2
2022 #define WMI_BSSID_LIST_TAG 0x3
2023 #define WMI_IE_TAG 0x4
2024
2025 struct wmi_channel {
2026 __le32 mhz;
2027 __le32 band_center_freq1;
2028 __le32 band_center_freq2;
2029 union {
2030 __le32 flags;
2031 struct {
2032 u8 mode;
2033 } __packed;
2034 } __packed;
2035 union {
2036 __le32 reginfo0;
2037 struct {
2038
2039 u8 min_power;
2040 u8 max_power;
2041 u8 reg_power;
2042 u8 reg_classid;
2043 } __packed;
2044 } __packed;
2045 union {
2046 __le32 reginfo1;
2047 struct {
2048 u8 antenna_max;
2049 u8 max_tx_power;
2050 } __packed;
2051 } __packed;
2052 } __packed;
2053
2054 struct wmi_channel_arg {
2055 u32 freq;
2056 u32 band_center_freq1;
2057 u32 band_center_freq2;
2058 bool passive;
2059 bool allow_ibss;
2060 bool allow_ht;
2061 bool allow_vht;
2062 bool ht40plus;
2063 bool chan_radar;
2064
2065 u32 min_power;
2066 u32 max_power;
2067 u32 max_reg_power;
2068 u32 max_antenna_gain;
2069 u32 reg_class_id;
2070 enum wmi_phy_mode mode;
2071 };
2072
2073 enum wmi_channel_change_cause {
2074 WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
2075 WMI_CHANNEL_CHANGE_CAUSE_CSA,
2076 };
2077
2078 #define WMI_CHAN_FLAG_HT40_PLUS (1 << 6)
2079 #define WMI_CHAN_FLAG_PASSIVE (1 << 7)
2080 #define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8)
2081 #define WMI_CHAN_FLAG_AP_DISABLED (1 << 9)
2082 #define WMI_CHAN_FLAG_DFS (1 << 10)
2083 #define WMI_CHAN_FLAG_ALLOW_HT (1 << 11)
2084 #define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12)
2085
2086
2087 #define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
2088
2089 #define WMI_MAX_SPATIAL_STREAM 3
2090
2091
2092 #define WMI_HT_CAP_ENABLED 0x0001
2093 #define WMI_HT_CAP_HT20_SGI 0x0002
2094 #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
2095 #define WMI_HT_CAP_TX_STBC 0x0008
2096 #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
2097 #define WMI_HT_CAP_RX_STBC 0x0030
2098 #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
2099 #define WMI_HT_CAP_LDPC 0x0040
2100 #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
2101 #define WMI_HT_CAP_MPDU_DENSITY 0x0700
2102 #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
2103 #define WMI_HT_CAP_HT40_SGI 0x0800
2104 #define WMI_HT_CAP_RX_LDPC 0x1000
2105 #define WMI_HT_CAP_TX_LDPC 0x2000
2106
2107 #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
2108 WMI_HT_CAP_HT20_SGI | \
2109 WMI_HT_CAP_HT40_SGI | \
2110 WMI_HT_CAP_TX_STBC | \
2111 WMI_HT_CAP_RX_STBC | \
2112 WMI_HT_CAP_LDPC)
2113
2114
2115
2116
2117
2118
2119
2120
2121 #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
2122 #define WMI_VHT_CAP_RX_LDPC 0x00000010
2123 #define WMI_VHT_CAP_SGI_80MHZ 0x00000020
2124 #define WMI_VHT_CAP_SGI_160MHZ 0x00000040
2125 #define WMI_VHT_CAP_TX_STBC 0x00000080
2126 #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
2127 #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
2128 #define WMI_VHT_CAP_SU_BFER 0x00000800
2129 #define WMI_VHT_CAP_SU_BFEE 0x00001000
2130 #define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000
2131 #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13
2132 #define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000
2133 #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16
2134 #define WMI_VHT_CAP_MU_BFER 0x00080000
2135 #define WMI_VHT_CAP_MU_BFEE 0x00100000
2136 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
2137 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23
2138 #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
2139 #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
2140
2141
2142 #define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000
2143 #define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001
2144 #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
2145
2146 #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
2147 WMI_VHT_CAP_RX_LDPC | \
2148 WMI_VHT_CAP_SGI_80MHZ | \
2149 WMI_VHT_CAP_TX_STBC | \
2150 WMI_VHT_CAP_RX_STBC_MASK | \
2151 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
2152 WMI_VHT_CAP_RX_FIXED_ANT | \
2153 WMI_VHT_CAP_TX_FIXED_ANT)
2154
2155
2156
2157
2158
2159 #define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
2160 #define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
2161 #define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
2162
2163 enum {
2164 REGDMN_MODE_11A = 0x00001,
2165 REGDMN_MODE_TURBO = 0x00002,
2166 REGDMN_MODE_11B = 0x00004,
2167 REGDMN_MODE_PUREG = 0x00008,
2168 REGDMN_MODE_11G = 0x00008,
2169 REGDMN_MODE_108G = 0x00020,
2170 REGDMN_MODE_108A = 0x00040,
2171 REGDMN_MODE_XR = 0x00100,
2172 REGDMN_MODE_11A_HALF_RATE = 0x00200,
2173 REGDMN_MODE_11A_QUARTER_RATE = 0x00400,
2174 REGDMN_MODE_11NG_HT20 = 0x00800,
2175 REGDMN_MODE_11NA_HT20 = 0x01000,
2176 REGDMN_MODE_11NG_HT40PLUS = 0x02000,
2177 REGDMN_MODE_11NG_HT40MINUS = 0x04000,
2178 REGDMN_MODE_11NA_HT40PLUS = 0x08000,
2179 REGDMN_MODE_11NA_HT40MINUS = 0x10000,
2180 REGDMN_MODE_11AC_VHT20 = 0x20000,
2181 REGDMN_MODE_11AC_VHT40PLUS = 0x40000,
2182 REGDMN_MODE_11AC_VHT40MINUS = 0x80000,
2183 REGDMN_MODE_11AC_VHT80 = 0x100000,
2184 REGDMN_MODE_11AC_VHT160 = 0x200000,
2185 REGDMN_MODE_11AC_VHT80_80 = 0x400000,
2186 REGDMN_MODE_ALL = 0xffffffff
2187 };
2188
2189 #define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
2190 #define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
2191 #define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
2192
2193
2194 #define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
2195 #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
2196 #define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
2197 #define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
2198 #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
2199 #define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
2200
2201 struct hal_reg_capabilities {
2202
2203 __le32 eeprom_rd;
2204
2205 __le32 eeprom_rd_ext;
2206
2207 __le32 regcap1;
2208
2209 __le32 regcap2;
2210
2211 __le32 wireless_modes;
2212 __le32 low_2ghz_chan;
2213 __le32 high_2ghz_chan;
2214 __le32 low_5ghz_chan;
2215 __le32 high_5ghz_chan;
2216 } __packed;
2217
2218 enum wlan_mode_capability {
2219 WHAL_WLAN_11A_CAPABILITY = 0x1,
2220 WHAL_WLAN_11G_CAPABILITY = 0x2,
2221 WHAL_WLAN_11AG_CAPABILITY = 0x3,
2222 };
2223
2224
2225 struct wlan_host_mem_req {
2226
2227 __le32 req_id;
2228
2229 __le32 unit_size;
2230
2231
2232
2233
2234 __le32 num_unit_info;
2235
2236
2237
2238
2239
2240
2241
2242 __le32 num_units;
2243 } __packed;
2244
2245
2246
2247
2248
2249
2250 struct wmi_service_ready_event {
2251 __le32 sw_version;
2252 __le32 sw_version_1;
2253 __le32 abi_version;
2254
2255 __le32 phy_capability;
2256
2257 __le32 max_frag_entry;
2258 __le32 wmi_service_bitmap[16];
2259 __le32 num_rf_chains;
2260
2261
2262
2263
2264 __le32 ht_cap_info;
2265 __le32 vht_cap_info;
2266 __le32 vht_supp_mcs;
2267 __le32 hw_min_tx_power;
2268 __le32 hw_max_tx_power;
2269 struct hal_reg_capabilities hal_reg_capabilities;
2270 __le32 sys_cap_info;
2271 __le32 min_pkt_size_enable;
2272
2273
2274
2275
2276 __le32 max_bcn_ie_size;
2277
2278
2279
2280
2281
2282
2283 __le32 num_mem_reqs;
2284 struct wlan_host_mem_req mem_reqs[0];
2285 } __packed;
2286
2287
2288 struct wmi_10x_service_ready_event {
2289 __le32 sw_version;
2290 __le32 abi_version;
2291
2292
2293 __le32 phy_capability;
2294
2295
2296 __le32 max_frag_entry;
2297 __le32 wmi_service_bitmap[16];
2298 __le32 num_rf_chains;
2299
2300
2301
2302
2303
2304 __le32 ht_cap_info;
2305 __le32 vht_cap_info;
2306 __le32 vht_supp_mcs;
2307 __le32 hw_min_tx_power;
2308 __le32 hw_max_tx_power;
2309
2310 struct hal_reg_capabilities hal_reg_capabilities;
2311
2312 __le32 sys_cap_info;
2313 __le32 min_pkt_size_enable;
2314
2315
2316
2317
2318
2319
2320
2321 __le32 num_mem_reqs;
2322
2323 struct wlan_host_mem_req mem_reqs[0];
2324 } __packed;
2325
2326 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
2327 #define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
2328
2329 struct wmi_ready_event {
2330 __le32 sw_version;
2331 __le32 abi_version;
2332 struct wmi_mac_addr mac_addr;
2333 __le32 status;
2334 } __packed;
2335
2336 struct wmi_resource_config {
2337
2338 __le32 num_vdevs;
2339
2340
2341 __le32 num_peers;
2342
2343
2344
2345
2346
2347
2348
2349
2350 __le32 num_offload_peers;
2351
2352
2353 __le32 num_offload_reorder_bufs;
2354
2355
2356 __le32 num_peer_keys;
2357
2358
2359 __le32 num_tids;
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371 __le32 ast_skid_limit;
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381 __le32 tx_chain_mask;
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393 __le32 rx_chain_mask;
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405 __le32 rx_timeout_pri_vi;
2406 __le32 rx_timeout_pri_vo;
2407 __le32 rx_timeout_pri_be;
2408 __le32 rx_timeout_pri_bk;
2409
2410
2411
2412
2413
2414
2415
2416
2417 __le32 rx_decap_mode;
2418
2419
2420 __le32 scan_max_pending_reqs;
2421
2422
2423 __le32 bmiss_offload_max_vdev;
2424
2425
2426 __le32 roam_offload_max_vdev;
2427
2428
2429 __le32 roam_offload_max_ap_profiles;
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443 __le32 num_mcast_groups;
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454 __le32 num_mcast_table_elems;
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474 __le32 mcast2ucast_mode;
2475
2476
2477
2478
2479
2480
2481
2482
2483 __le32 tx_dbg_log_size;
2484
2485
2486 __le32 num_wds_entries;
2487
2488
2489
2490
2491
2492 __le32 dma_burst_size;
2493
2494
2495
2496
2497
2498 __le32 mac_aggr_delim;
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509 __le32 rx_skip_defrag_timeout_dup_detection_check;
2510
2511
2512
2513
2514
2515
2516 __le32 vow_config;
2517
2518
2519 __le32 gtk_offload_max_vdev;
2520
2521
2522 __le32 num_msdu_desc;
2523
2524
2525
2526
2527
2528
2529
2530 __le32 max_frag_entries;
2531 } __packed;
2532
2533 struct wmi_resource_config_10x {
2534
2535 __le32 num_vdevs;
2536
2537
2538 __le32 num_peers;
2539
2540
2541 __le32 num_peer_keys;
2542
2543
2544 __le32 num_tids;
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556 __le32 ast_skid_limit;
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566 __le32 tx_chain_mask;
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578 __le32 rx_chain_mask;
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590 __le32 rx_timeout_pri_vi;
2591 __le32 rx_timeout_pri_vo;
2592 __le32 rx_timeout_pri_be;
2593 __le32 rx_timeout_pri_bk;
2594
2595
2596
2597
2598
2599
2600
2601
2602 __le32 rx_decap_mode;
2603
2604
2605 __le32 scan_max_pending_reqs;
2606
2607
2608 __le32 bmiss_offload_max_vdev;
2609
2610
2611 __le32 roam_offload_max_vdev;
2612
2613
2614 __le32 roam_offload_max_ap_profiles;
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628 __le32 num_mcast_groups;
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639 __le32 num_mcast_table_elems;
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659 __le32 mcast2ucast_mode;
2660
2661
2662
2663
2664
2665
2666
2667
2668 __le32 tx_dbg_log_size;
2669
2670
2671 __le32 num_wds_entries;
2672
2673
2674
2675
2676
2677 __le32 dma_burst_size;
2678
2679
2680
2681
2682
2683 __le32 mac_aggr_delim;
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694 __le32 rx_skip_defrag_timeout_dup_detection_check;
2695
2696
2697
2698
2699
2700
2701 __le32 vow_config;
2702
2703
2704 __le32 num_msdu_desc;
2705
2706
2707
2708
2709
2710
2711
2712 __le32 max_frag_entries;
2713 } __packed;
2714
2715 enum wmi_10_2_feature_mask {
2716 WMI_10_2_RX_BATCH_MODE = BIT(0),
2717 WMI_10_2_ATF_CONFIG = BIT(1),
2718 WMI_10_2_COEX_GPIO = BIT(3),
2719 WMI_10_2_BSS_CHAN_INFO = BIT(6),
2720 WMI_10_2_PEER_STATS = BIT(7),
2721 };
2722
2723 struct wmi_resource_config_10_2 {
2724 struct wmi_resource_config_10x common;
2725 __le32 max_peer_ext_stats;
2726 __le32 smart_ant_cap;
2727 __le32 bk_min_free;
2728 __le32 be_min_free;
2729 __le32 vi_min_free;
2730 __le32 vo_min_free;
2731 __le32 feature_mask;
2732 } __packed;
2733
2734 #define NUM_UNITS_IS_NUM_VDEVS BIT(0)
2735 #define NUM_UNITS_IS_NUM_PEERS BIT(1)
2736 #define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2)
2737
2738 struct wmi_resource_config_10_4 {
2739
2740 __le32 num_vdevs;
2741
2742
2743 __le32 num_peers;
2744
2745
2746 __le32 num_active_peers;
2747
2748
2749
2750
2751
2752
2753
2754 __le32 num_offload_peers;
2755
2756
2757
2758
2759 __le32 num_offload_reorder_buffs;
2760
2761
2762 __le32 num_peer_keys;
2763
2764
2765 __le32 num_tids;
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775 __le32 ast_skid_limit;
2776
2777
2778
2779
2780
2781
2782
2783 __le32 tx_chain_mask;
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793 __le32 rx_chain_mask;
2794
2795
2796
2797
2798
2799
2800
2801
2802 __le32 rx_timeout_pri[4];
2803
2804
2805
2806
2807
2808
2809 __le32 rx_decap_mode;
2810
2811 __le32 scan_max_pending_req;
2812
2813 __le32 bmiss_offload_max_vdev;
2814
2815 __le32 roam_offload_max_vdev;
2816
2817 __le32 roam_offload_max_ap_profiles;
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828 __le32 num_mcast_groups;
2829
2830
2831
2832
2833
2834
2835
2836
2837 __le32 num_mcast_table_elems;
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854 __le32 mcast2ucast_mode;
2855
2856
2857
2858
2859
2860
2861 __le32 tx_dbg_log_size;
2862
2863
2864 __le32 num_wds_entries;
2865
2866
2867 __le32 dma_burst_size;
2868
2869
2870
2871
2872 __le32 mac_aggr_delim;
2873
2874
2875
2876
2877
2878
2879
2880
2881 __le32 rx_skip_defrag_timeout_dup_detection_check;
2882
2883
2884
2885
2886 __le32 vow_config;
2887
2888
2889 __le32 gtk_offload_max_vdev;
2890
2891
2892 __le32 num_msdu_desc;
2893
2894
2895
2896
2897
2898
2899 __le32 max_frag_entries;
2900
2901
2902
2903
2904
2905 __le32 max_peer_ext_stats;
2906
2907
2908
2909
2910
2911
2912 __le32 smart_ant_cap;
2913
2914
2915
2916
2917 __le32 bk_minfree;
2918 __le32 be_minfree;
2919 __le32 vi_minfree;
2920 __le32 vo_minfree;
2921
2922
2923
2924
2925
2926 __le32 rx_batchmode;
2927
2928
2929
2930
2931
2932 __le32 tt_support;
2933
2934
2935
2936
2937
2938 __le32 atf_config;
2939
2940
2941
2942
2943
2944 __le32 iphdr_pad_config;
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955 __le32 qwrap_config;
2956 } __packed;
2957
2958 enum wmi_coex_version {
2959 WMI_NO_COEX_VERSION_SUPPORT = 0,
2960
2961 WMI_COEX_VERSION_1 = 1,
2962
2963 WMI_COEX_VERSION_2 = 2,
2964
2965 WMI_COEX_VERSION_3 = 3,
2966
2967 WMI_COEX_VERSION_4 = 4,
2968 };
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988 enum wmi_10_4_feature_mask {
2989 WMI_10_4_LTEU_SUPPORT = BIT(0),
2990 WMI_10_4_COEX_GPIO_SUPPORT = BIT(1),
2991 WMI_10_4_AUX_RADIO_SPECTRAL_INTF = BIT(2),
2992 WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF = BIT(3),
2993 WMI_10_4_BSS_CHANNEL_INFO_64 = BIT(4),
2994 WMI_10_4_PEER_STATS = BIT(5),
2995 WMI_10_4_VDEV_STATS = BIT(6),
2996 WMI_10_4_TDLS = BIT(7),
2997 WMI_10_4_TDLS_OFFCHAN = BIT(8),
2998 WMI_10_4_TDLS_UAPSD_BUFFER_STA = BIT(9),
2999 WMI_10_4_TDLS_UAPSD_SLEEP_STA = BIT(10),
3000 WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE = BIT(11),
3001 WMI_10_4_TDLS_EXPLICIT_MODE_ONLY = BIT(12),
3002 WMI_10_4_TX_DATA_ACK_RSSI = BIT(16),
3003 WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT = BIT(17),
3004 WMI_10_4_REPORT_AIRTIME = BIT(18),
3005
3006 };
3007
3008 struct wmi_ext_resource_config_10_4_cmd {
3009
3010 __le32 host_platform_config;
3011
3012 __le32 fw_feature_bitmap;
3013
3014 __le32 wlan_gpio_priority;
3015
3016 __le32 coex_version;
3017
3018 __le32 coex_gpio_pin1;
3019 __le32 coex_gpio_pin2;
3020 __le32 coex_gpio_pin3;
3021
3022 __le32 num_tdls_vdevs;
3023
3024 __le32 num_tdls_conn_table_entries;
3025
3026 __le32 max_tdls_concurrent_sleep_sta;
3027
3028 __le32 max_tdls_concurrent_buffer_sta;
3029 };
3030
3031
3032 struct host_memory_chunk {
3033
3034 __le32 req_id;
3035
3036 __le32 ptr;
3037
3038 __le32 size;
3039 } __packed;
3040
3041 struct wmi_host_mem_chunks {
3042 __le32 count;
3043
3044 struct host_memory_chunk items[1];
3045 } __packed;
3046
3047 struct wmi_init_cmd {
3048 struct wmi_resource_config resource_config;
3049 struct wmi_host_mem_chunks mem_chunks;
3050 } __packed;
3051
3052
3053 struct wmi_init_cmd_10x {
3054 struct wmi_resource_config_10x resource_config;
3055 struct wmi_host_mem_chunks mem_chunks;
3056 } __packed;
3057
3058 struct wmi_init_cmd_10_2 {
3059 struct wmi_resource_config_10_2 resource_config;
3060 struct wmi_host_mem_chunks mem_chunks;
3061 } __packed;
3062
3063 struct wmi_init_cmd_10_4 {
3064 struct wmi_resource_config_10_4 resource_config;
3065 struct wmi_host_mem_chunks mem_chunks;
3066 } __packed;
3067
3068 struct wmi_chan_list_entry {
3069 __le16 freq;
3070 u8 phy_mode;
3071 u8 reserved;
3072 } __packed;
3073
3074
3075 struct wmi_chan_list {
3076 __le32 tag;
3077 __le32 num_chan;
3078 struct wmi_chan_list_entry channel_list[0];
3079 } __packed;
3080
3081 struct wmi_bssid_list {
3082 __le32 tag;
3083 __le32 num_bssid;
3084 struct wmi_mac_addr bssid_list[0];
3085 } __packed;
3086
3087 struct wmi_ie_data {
3088 __le32 tag;
3089 __le32 ie_len;
3090 u8 ie_data[0];
3091 } __packed;
3092
3093 struct wmi_ssid {
3094 __le32 ssid_len;
3095 u8 ssid[32];
3096 } __packed;
3097
3098 struct wmi_ssid_list {
3099 __le32 tag;
3100 __le32 num_ssids;
3101 struct wmi_ssid ssids[0];
3102 } __packed;
3103
3104
3105 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3106
3107
3108
3109 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3110
3111 #define WLAN_SCAN_PARAMS_MAX_SSID 16
3112 #define WLAN_SCAN_PARAMS_MAX_BSSID 4
3113 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
3114
3115
3116
3117
3118 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3119
3120
3121 enum wmi_scan_priority {
3122 WMI_SCAN_PRIORITY_VERY_LOW = 0,
3123 WMI_SCAN_PRIORITY_LOW,
3124 WMI_SCAN_PRIORITY_MEDIUM,
3125 WMI_SCAN_PRIORITY_HIGH,
3126 WMI_SCAN_PRIORITY_VERY_HIGH,
3127 WMI_SCAN_PRIORITY_COUNT
3128 };
3129
3130 struct wmi_start_scan_common {
3131
3132 __le32 scan_id;
3133
3134 __le32 scan_req_id;
3135
3136 __le32 vdev_id;
3137
3138 __le32 scan_priority;
3139
3140 __le32 notify_scan_events;
3141
3142 __le32 dwell_time_active;
3143
3144 __le32 dwell_time_passive;
3145
3146
3147
3148
3149 __le32 min_rest_time;
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163 __le32 max_rest_time;
3164
3165
3166
3167
3168
3169
3170
3171 __le32 repeat_probe_time;
3172
3173 __le32 probe_spacing_time;
3174
3175
3176
3177
3178 __le32 idle_time;
3179
3180 __le32 max_scan_time;
3181
3182
3183
3184
3185 __le32 probe_delay;
3186
3187 __le32 scan_ctrl_flags;
3188 } __packed;
3189
3190 struct wmi_start_scan_tlvs {
3191
3192
3193
3194 u8 tlvs[0];
3195 } __packed;
3196
3197 struct wmi_start_scan_cmd {
3198 struct wmi_start_scan_common common;
3199 __le32 burst_duration_ms;
3200 struct wmi_start_scan_tlvs tlvs;
3201 } __packed;
3202
3203
3204 struct wmi_10x_start_scan_cmd {
3205 struct wmi_start_scan_common common;
3206 struct wmi_start_scan_tlvs tlvs;
3207 } __packed;
3208
3209 struct wmi_ssid_arg {
3210 int len;
3211 const u8 *ssid;
3212 };
3213
3214 struct wmi_bssid_arg {
3215 const u8 *bssid;
3216 };
3217
3218 struct wmi_start_scan_arg {
3219 u32 scan_id;
3220 u32 scan_req_id;
3221 u32 vdev_id;
3222 u32 scan_priority;
3223 u32 notify_scan_events;
3224 u32 dwell_time_active;
3225 u32 dwell_time_passive;
3226 u32 min_rest_time;
3227 u32 max_rest_time;
3228 u32 repeat_probe_time;
3229 u32 probe_spacing_time;
3230 u32 idle_time;
3231 u32 max_scan_time;
3232 u32 probe_delay;
3233 u32 scan_ctrl_flags;
3234 u32 burst_duration_ms;
3235
3236 u32 ie_len;
3237 u32 n_channels;
3238 u32 n_ssids;
3239 u32 n_bssids;
3240
3241 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3242 u16 channels[64];
3243 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3244 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3245 struct wmi_mac_addr mac_addr;
3246 struct wmi_mac_addr mac_mask;
3247 };
3248
3249
3250
3251
3252 #define WMI_SCAN_FLAG_PASSIVE 0x1
3253
3254 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3255
3256 #define WMI_SCAN_ADD_CCK_RATES 0x4
3257
3258 #define WMI_SCAN_ADD_OFDM_RATES 0x8
3259
3260 #define WMI_SCAN_CHAN_STAT_EVENT 0x10
3261
3262 #define WMI_SCAN_FILTER_PROBE_REQ 0x20
3263
3264 #define WMI_SCAN_BYPASS_DFS_CHN 0x40
3265
3266
3267
3268 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3269
3270
3271
3272
3273
3274 #define WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ 0x1000
3275
3276
3277 #define WMI_SCAN_CLASS_MASK 0xFF000000
3278
3279 enum wmi_stop_scan_type {
3280 WMI_SCAN_STOP_ONE = 0x00000000,
3281 WMI_SCAN_STOP_VDEV_ALL = 0x01000000,
3282 WMI_SCAN_STOP_ALL = 0x04000000,
3283 };
3284
3285 struct wmi_stop_scan_cmd {
3286 __le32 scan_req_id;
3287 __le32 scan_id;
3288 __le32 req_type;
3289 __le32 vdev_id;
3290 } __packed;
3291
3292 struct wmi_stop_scan_arg {
3293 u32 req_id;
3294 enum wmi_stop_scan_type req_type;
3295 union {
3296 u32 scan_id;
3297 u32 vdev_id;
3298 } u;
3299 };
3300
3301 struct wmi_scan_chan_list_cmd {
3302 __le32 num_scan_chans;
3303 struct wmi_channel chan_info[0];
3304 } __packed;
3305
3306 struct wmi_scan_chan_list_arg {
3307 u32 n_channels;
3308 struct wmi_channel_arg *channels;
3309 };
3310
3311 enum wmi_bss_filter {
3312 WMI_BSS_FILTER_NONE = 0,
3313 WMI_BSS_FILTER_ALL,
3314 WMI_BSS_FILTER_PROFILE,
3315 WMI_BSS_FILTER_ALL_BUT_PROFILE,
3316 WMI_BSS_FILTER_CURRENT_BSS,
3317 WMI_BSS_FILTER_ALL_BUT_BSS,
3318 WMI_BSS_FILTER_PROBED_SSID,
3319 WMI_BSS_FILTER_LAST_BSS,
3320 };
3321
3322 enum wmi_scan_event_type {
3323 WMI_SCAN_EVENT_STARTED = BIT(0),
3324 WMI_SCAN_EVENT_COMPLETED = BIT(1),
3325 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3326 WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3),
3327 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3328
3329 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3330 WMI_SCAN_EVENT_START_FAILED = BIT(6),
3331 WMI_SCAN_EVENT_RESTARTED = BIT(7),
3332 WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
3333 WMI_SCAN_EVENT_MAX = BIT(15),
3334 };
3335
3336 enum wmi_scan_completion_reason {
3337 WMI_SCAN_REASON_COMPLETED,
3338 WMI_SCAN_REASON_CANCELLED,
3339 WMI_SCAN_REASON_PREEMPTED,
3340 WMI_SCAN_REASON_TIMEDOUT,
3341 WMI_SCAN_REASON_INTERNAL_FAILURE,
3342 WMI_SCAN_REASON_MAX,
3343 };
3344
3345 struct wmi_scan_event {
3346 __le32 event_type;
3347 __le32 reason;
3348 __le32 channel_freq;
3349 __le32 scan_req_id;
3350 __le32 scan_id;
3351 __le32 vdev_id;
3352 } __packed;
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362 #define WMI_MGMT_RX_HDR_HEADROOM 52
3363
3364
3365
3366
3367
3368
3369
3370
3371 struct wmi_mgmt_rx_hdr_v1 {
3372 __le32 channel;
3373 __le32 snr;
3374 __le32 rate;
3375 __le32 phy_mode;
3376 __le32 buf_len;
3377 __le32 status;
3378 } __packed;
3379
3380 struct wmi_mgmt_rx_hdr_v2 {
3381 struct wmi_mgmt_rx_hdr_v1 v1;
3382 __le32 rssi_ctl[4];
3383 } __packed;
3384
3385 struct wmi_mgmt_rx_event_v1 {
3386 struct wmi_mgmt_rx_hdr_v1 hdr;
3387 u8 buf[0];
3388 } __packed;
3389
3390 struct wmi_mgmt_rx_event_v2 {
3391 struct wmi_mgmt_rx_hdr_v2 hdr;
3392 u8 buf[0];
3393 } __packed;
3394
3395 struct wmi_10_4_mgmt_rx_hdr {
3396 __le32 channel;
3397 __le32 snr;
3398 u8 rssi_ctl[4];
3399 __le32 rate;
3400 __le32 phy_mode;
3401 __le32 buf_len;
3402 __le32 status;
3403 } __packed;
3404
3405 struct wmi_10_4_mgmt_rx_event {
3406 struct wmi_10_4_mgmt_rx_hdr hdr;
3407 u8 buf[0];
3408 } __packed;
3409
3410 struct wmi_mgmt_rx_ext_info {
3411 __le64 rx_mac_timestamp;
3412 } __packed __aligned(4);
3413
3414 #define WMI_RX_STATUS_OK 0x00
3415 #define WMI_RX_STATUS_ERR_CRC 0x01
3416 #define WMI_RX_STATUS_ERR_DECRYPT 0x08
3417 #define WMI_RX_STATUS_ERR_MIC 0x10
3418 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
3419
3420 #define WMI_RX_STATUS_EXT_INFO 0x40
3421
3422 #define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26
3423 #define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24
3424 #define PHY_ERROR_GEN_RADAR 0x05
3425
3426 #define PHY_ERROR_10_4_RADAR_MASK 0x4
3427 #define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000
3428
3429 enum phy_err_type {
3430 PHY_ERROR_UNKNOWN,
3431 PHY_ERROR_SPECTRAL_SCAN,
3432 PHY_ERROR_FALSE_RADAR_EXT,
3433 PHY_ERROR_RADAR
3434 };
3435
3436 struct wmi_phyerr {
3437 __le32 tsf_timestamp;
3438 __le16 freq1;
3439 __le16 freq2;
3440 u8 rssi_combined;
3441 u8 chan_width_mhz;
3442 u8 phy_err_code;
3443 u8 rsvd0;
3444 __le32 rssi_chains[4];
3445 __le16 nf_chains[4];
3446 __le32 buf_len;
3447 u8 buf[0];
3448 } __packed;
3449
3450 struct wmi_phyerr_event {
3451 __le32 num_phyerrs;
3452 __le32 tsf_l32;
3453 __le32 tsf_u32;
3454 struct wmi_phyerr phyerrs[0];
3455 } __packed;
3456
3457 struct wmi_10_4_phyerr_event {
3458 __le32 tsf_l32;
3459 __le32 tsf_u32;
3460 __le16 freq1;
3461 __le16 freq2;
3462 u8 rssi_combined;
3463 u8 chan_width_mhz;
3464 u8 phy_err_code;
3465 u8 rsvd0;
3466 __le32 rssi_chains[4];
3467 __le16 nf_chains[4];
3468 __le32 phy_err_mask[2];
3469 __le32 tsf_timestamp;
3470 __le32 buf_len;
3471 u8 buf[0];
3472 } __packed;
3473
3474 struct wmi_radar_found_info {
3475 __le32 pri_min;
3476 __le32 pri_max;
3477 __le32 width_min;
3478 __le32 width_max;
3479 __le32 sidx_min;
3480 __le32 sidx_max;
3481 } __packed;
3482
3483 enum wmi_radar_confirmation_status {
3484
3485 WMI_SW_RADAR_DETECTED = 0,
3486
3487 WMI_RADAR_DETECTION_FAIL = 1,
3488
3489
3490 WMI_HW_RADAR_DETECTED = 2,
3491 };
3492
3493 #define PHYERR_TLV_SIG 0xBB
3494 #define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
3495 #define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
3496 #define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9
3497
3498 struct phyerr_radar_report {
3499 __le32 reg0;
3500 __le32 reg1;
3501 } __packed;
3502
3503 #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
3504 #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
3505
3506 #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
3507 #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
3508
3509 #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
3510 #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
3511
3512 #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
3513 #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
3514
3515 #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
3516 #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
3517
3518 #define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
3519 #define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
3520
3521 #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
3522 #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
3523
3524 #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
3525 #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
3526
3527 #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
3528 #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
3529
3530 #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
3531 #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
3532
3533 #define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
3534 #define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
3535
3536 struct phyerr_fft_report {
3537 __le32 reg0;
3538 __le32 reg1;
3539 } __packed;
3540
3541 #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
3542 #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
3543
3544 #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
3545 #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
3546
3547 #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
3548 #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
3549
3550 #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
3551 #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
3552
3553 #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
3554 #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
3555
3556 #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
3557 #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
3558
3559 #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
3560 #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
3561
3562 #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
3563 #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
3564
3565 struct phyerr_tlv {
3566 __le16 len;
3567 u8 tag;
3568 u8 sig;
3569 } __packed;
3570
3571 #define DFS_RSSI_POSSIBLY_FALSE 50
3572 #define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
3573
3574 struct wmi_mgmt_tx_hdr {
3575 __le32 vdev_id;
3576 struct wmi_mac_addr peer_macaddr;
3577 __le32 tx_rate;
3578 __le32 tx_power;
3579 __le32 buf_len;
3580 } __packed;
3581
3582 struct wmi_mgmt_tx_cmd {
3583 struct wmi_mgmt_tx_hdr hdr;
3584 u8 buf[0];
3585 } __packed;
3586
3587 struct wmi_echo_event {
3588 __le32 value;
3589 } __packed;
3590
3591 struct wmi_echo_cmd {
3592 __le32 value;
3593 } __packed;
3594
3595 struct wmi_pdev_set_regdomain_cmd {
3596 __le32 reg_domain;
3597 __le32 reg_domain_2G;
3598 __le32 reg_domain_5G;
3599 __le32 conformance_test_limit_2G;
3600 __le32 conformance_test_limit_5G;
3601 } __packed;
3602
3603 enum wmi_dfs_region {
3604
3605 WMI_UNINIT_DFS_DOMAIN = 0,
3606
3607
3608 WMI_FCC_DFS_DOMAIN = 1,
3609
3610
3611 WMI_ETSI_DFS_DOMAIN = 2,
3612
3613
3614 WMI_MKK4_DFS_DOMAIN = 3,
3615 };
3616
3617 struct wmi_pdev_set_regdomain_cmd_10x {
3618 __le32 reg_domain;
3619 __le32 reg_domain_2G;
3620 __le32 reg_domain_5G;
3621 __le32 conformance_test_limit_2G;
3622 __le32 conformance_test_limit_5G;
3623
3624
3625 __le32 dfs_domain;
3626 } __packed;
3627
3628
3629 struct wmi_pdev_set_quiet_cmd {
3630
3631 __le32 period;
3632
3633
3634 __le32 duration;
3635
3636
3637 __le32 next_start;
3638
3639
3640 __le32 enabled;
3641 } __packed;
3642
3643
3644
3645
3646 enum ath10k_protmode {
3647 ATH10K_PROT_NONE = 0,
3648 ATH10K_PROT_CTSONLY = 1,
3649 ATH10K_PROT_RTSCTS = 2,
3650 };
3651
3652 enum wmi_rtscts_profile {
3653 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3654 WMI_RTSCTS_FOR_SECOND_RATESERIES,
3655 WMI_RTSCTS_ACROSS_SW_RETRIES
3656 };
3657
3658 #define WMI_RTSCTS_ENABLED 1
3659 #define WMI_RTSCTS_SET_MASK 0x0f
3660 #define WMI_RTSCTS_SET_LSB 0
3661
3662 #define WMI_RTSCTS_PROFILE_MASK 0xf0
3663 #define WMI_RTSCTS_PROFILE_LSB 4
3664
3665 enum wmi_beacon_gen_mode {
3666 WMI_BEACON_STAGGERED_MODE = 0,
3667 WMI_BEACON_BURST_MODE = 1
3668 };
3669
3670 enum wmi_csa_event_ies_present_flag {
3671 WMI_CSA_IE_PRESENT = 0x00000001,
3672 WMI_XCSA_IE_PRESENT = 0x00000002,
3673 WMI_WBW_IE_PRESENT = 0x00000004,
3674 WMI_CSWARP_IE_PRESENT = 0x00000008,
3675 };
3676
3677
3678 struct wmi_csa_event {
3679 __le32 i_fc_dur;
3680
3681
3682 struct wmi_mac_addr i_addr1;
3683 struct wmi_mac_addr i_addr2;
3684 __le32 csa_ie[2];
3685 __le32 xcsa_ie[2];
3686 __le32 wb_ie[2];
3687 __le32 cswarp_ie;
3688 __le32 ies_present_flag;
3689 } __packed;
3690
3691
3692 #define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3693 #define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3694 #define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
3695
3696 struct wmi_pdev_param_map {
3697 u32 tx_chain_mask;
3698 u32 rx_chain_mask;
3699 u32 txpower_limit2g;
3700 u32 txpower_limit5g;
3701 u32 txpower_scale;
3702 u32 beacon_gen_mode;
3703 u32 beacon_tx_mode;
3704 u32 resmgr_offchan_mode;
3705 u32 protection_mode;
3706 u32 dynamic_bw;
3707 u32 non_agg_sw_retry_th;
3708 u32 agg_sw_retry_th;
3709 u32 sta_kickout_th;
3710 u32 ac_aggrsize_scaling;
3711 u32 ltr_enable;
3712 u32 ltr_ac_latency_be;
3713 u32 ltr_ac_latency_bk;
3714 u32 ltr_ac_latency_vi;
3715 u32 ltr_ac_latency_vo;
3716 u32 ltr_ac_latency_timeout;
3717 u32 ltr_sleep_override;
3718 u32 ltr_rx_override;
3719 u32 ltr_tx_activity_timeout;
3720 u32 l1ss_enable;
3721 u32 dsleep_enable;
3722 u32 pcielp_txbuf_flush;
3723 u32 pcielp_txbuf_watermark;
3724 u32 pcielp_txbuf_tmo_en;
3725 u32 pcielp_txbuf_tmo_value;
3726 u32 pdev_stats_update_period;
3727 u32 vdev_stats_update_period;
3728 u32 peer_stats_update_period;
3729 u32 bcnflt_stats_update_period;
3730 u32 pmf_qos;
3731 u32 arp_ac_override;
3732 u32 dcs;
3733 u32 ani_enable;
3734 u32 ani_poll_period;
3735 u32 ani_listen_period;
3736 u32 ani_ofdm_level;
3737 u32 ani_cck_level;
3738 u32 dyntxchain;
3739 u32 proxy_sta;
3740 u32 idle_ps_config;
3741 u32 power_gating_sleep;
3742 u32 fast_channel_reset;
3743 u32 burst_dur;
3744 u32 burst_enable;
3745 u32 cal_period;
3746 u32 aggr_burst;
3747 u32 rx_decap_mode;
3748 u32 smart_antenna_default_antenna;
3749 u32 igmpmld_override;
3750 u32 igmpmld_tid;
3751 u32 antenna_gain;
3752 u32 rx_filter;
3753 u32 set_mcast_to_ucast_tid;
3754 u32 proxy_sta_mode;
3755 u32 set_mcast2ucast_mode;
3756 u32 set_mcast2ucast_buffer;
3757 u32 remove_mcast2ucast_buffer;
3758 u32 peer_sta_ps_statechg_enable;
3759 u32 igmpmld_ac_override;
3760 u32 block_interbss;
3761 u32 set_disable_reset_cmdid;
3762 u32 set_msdu_ttl_cmdid;
3763 u32 set_ppdu_duration_cmdid;
3764 u32 txbf_sound_period_cmdid;
3765 u32 set_promisc_mode_cmdid;
3766 u32 set_burst_mode_cmdid;
3767 u32 en_stats;
3768 u32 mu_group_policy;
3769 u32 noise_detection;
3770 u32 noise_threshold;
3771 u32 dpd_enable;
3772 u32 set_mcast_bcast_echo;
3773 u32 atf_strict_sch;
3774 u32 atf_sched_duration;
3775 u32 ant_plzn;
3776 u32 mgmt_retry_limit;
3777 u32 sensitivity_level;
3778 u32 signed_txpower_2g;
3779 u32 signed_txpower_5g;
3780 u32 enable_per_tid_amsdu;
3781 u32 enable_per_tid_ampdu;
3782 u32 cca_threshold;
3783 u32 rts_fixed_rate;
3784 u32 pdev_reset;
3785 u32 wapi_mbssid_offset;
3786 u32 arp_srcaddr;
3787 u32 arp_dstaddr;
3788 u32 enable_btcoex;
3789 };
3790
3791 #define WMI_PDEV_PARAM_UNSUPPORTED 0
3792
3793 enum wmi_pdev_param {
3794
3795 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3796
3797 WMI_PDEV_PARAM_RX_CHAIN_MASK,
3798
3799 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
3800
3801 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
3802
3803 WMI_PDEV_PARAM_TXPOWER_SCALE,
3804
3805 WMI_PDEV_PARAM_BEACON_GEN_MODE,
3806
3807 WMI_PDEV_PARAM_BEACON_TX_MODE,
3808
3809
3810
3811
3812 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3813
3814
3815
3816
3817 WMI_PDEV_PARAM_PROTECTION_MODE,
3818
3819
3820
3821
3822
3823
3824 WMI_PDEV_PARAM_DYNAMIC_BW,
3825
3826 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3827
3828 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
3829
3830 WMI_PDEV_PARAM_STA_KICKOUT_TH,
3831
3832 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3833
3834 WMI_PDEV_PARAM_LTR_ENABLE,
3835
3836 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
3837
3838 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
3839
3840 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
3841
3842 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
3843
3844 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3845
3846 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3847
3848 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
3849
3850 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3851
3852 WMI_PDEV_PARAM_L1SS_ENABLE,
3853
3854 WMI_PDEV_PARAM_DSLEEP_ENABLE,
3855
3856 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3857
3858 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3859
3860 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3861
3862 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3863
3864 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3865
3866 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3867
3868 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3869
3870 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3871
3872 WMI_PDEV_PARAM_PMF_QOS,
3873
3874 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
3875
3876 WMI_PDEV_PARAM_DCS,
3877
3878 WMI_PDEV_PARAM_ANI_ENABLE,
3879
3880 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
3881
3882 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
3883
3884 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
3885
3886 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
3887
3888 WMI_PDEV_PARAM_DYNTXCHAIN,
3889
3890 WMI_PDEV_PARAM_PROXY_STA,
3891
3892 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
3893
3894 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
3895 };
3896
3897 enum wmi_10x_pdev_param {
3898
3899 WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3900
3901 WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3902
3903 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3904
3905 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3906
3907 WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3908
3909 WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3910
3911 WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3912
3913
3914
3915
3916 WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3917
3918
3919
3920
3921 WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3922
3923 WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3924
3925 WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3926
3927 WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3928
3929 WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3930
3931 WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3932
3933 WMI_10X_PDEV_PARAM_LTR_ENABLE,
3934
3935 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3936
3937 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3938
3939 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3940
3941 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3942
3943 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3944
3945 WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3946
3947 WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3948
3949 WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3950
3951 WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3952
3953 WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3954
3955 WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3956
3957 WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3958
3959 WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3960
3961 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3962
3963 WMI_10X_PDEV_PARAM_PMF_QOS,
3964
3965 WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3966
3967 WMI_10X_PDEV_PARAM_DCS,
3968
3969 WMI_10X_PDEV_PARAM_ANI_ENABLE,
3970
3971 WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
3972
3973 WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
3974
3975 WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
3976
3977 WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
3978
3979 WMI_10X_PDEV_PARAM_DYNTXCHAIN,
3980
3981 WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
3982
3983 WMI_10X_PDEV_PARAM_BURST_DUR,
3984
3985 WMI_10X_PDEV_PARAM_BURST_ENABLE,
3986
3987
3988 WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
3989 WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
3990 WMI_10X_PDEV_PARAM_IGMPMLD_TID,
3991 WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
3992 WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
3993 WMI_10X_PDEV_PARAM_RX_FILTER,
3994 WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
3995 WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
3996 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
3997 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
3998 WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
3999 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
4000 WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
4001 WMI_10X_PDEV_PARAM_CAL_PERIOD,
4002 WMI_10X_PDEV_PARAM_ATF_STRICT_SCH,
4003 WMI_10X_PDEV_PARAM_ATF_SCHED_DURATION,
4004 WMI_10X_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4005 WMI_10X_PDEV_PARAM_PDEV_RESET
4006 };
4007
4008 enum wmi_10_4_pdev_param {
4009 WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
4010 WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
4011 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
4012 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
4013 WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
4014 WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
4015 WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
4016 WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
4017 WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
4018 WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
4019 WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
4020 WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
4021 WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
4022 WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
4023 WMI_10_4_PDEV_PARAM_LTR_ENABLE,
4024 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
4025 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
4026 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
4027 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
4028 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
4029 WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
4030 WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
4031 WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
4032 WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
4033 WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
4034 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
4035 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
4036 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
4037 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
4038 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
4039 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
4040 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
4041 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
4042 WMI_10_4_PDEV_PARAM_PMF_QOS,
4043 WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
4044 WMI_10_4_PDEV_PARAM_DCS,
4045 WMI_10_4_PDEV_PARAM_ANI_ENABLE,
4046 WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
4047 WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
4048 WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
4049 WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
4050 WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
4051 WMI_10_4_PDEV_PARAM_PROXY_STA,
4052 WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
4053 WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
4054 WMI_10_4_PDEV_PARAM_AGGR_BURST,
4055 WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
4056 WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
4057 WMI_10_4_PDEV_PARAM_BURST_DUR,
4058 WMI_10_4_PDEV_PARAM_BURST_ENABLE,
4059 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
4060 WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
4061 WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
4062 WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
4063 WMI_10_4_PDEV_PARAM_RX_FILTER,
4064 WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
4065 WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
4066 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4067 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4068 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4069 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
4070 WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
4071 WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
4072 WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
4073 WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
4074 WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
4075 WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
4076 WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4077 WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
4078 WMI_10_4_PDEV_PARAM_EN_STATS,
4079 WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
4080 WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
4081 WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
4082 WMI_10_4_PDEV_PARAM_DPD_ENABLE,
4083 WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
4084 WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
4085 WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
4086 WMI_10_4_PDEV_PARAM_ANT_PLZN,
4087 WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
4088 WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
4089 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
4090 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
4091 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
4092 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
4093 WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
4094 WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
4095 WMI_10_4_PDEV_PARAM_CAL_PERIOD,
4096 WMI_10_4_PDEV_PARAM_PDEV_RESET,
4097 WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
4098 WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
4099 WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
4100 WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
4101 WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
4102 WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
4103 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
4104 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
4105 WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
4106 WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
4107 WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
4108 WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
4109 };
4110
4111 struct wmi_pdev_set_param_cmd {
4112 __le32 param_id;
4113 __le32 param_value;
4114 } __packed;
4115
4116 struct wmi_pdev_set_base_macaddr_cmd {
4117 struct wmi_mac_addr mac_addr;
4118 } __packed;
4119
4120
4121 #define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
4122
4123 struct wmi_pdev_get_tpc_config_cmd {
4124
4125 __le32 param;
4126 } __packed;
4127
4128 #define WMI_TPC_CONFIG_PARAM 1
4129 #define WMI_TPC_FINAL_RATE_MAX 240
4130 #define WMI_TPC_TX_N_CHAIN 4
4131 #define WMI_TPC_RATE_MAX (WMI_TPC_TX_N_CHAIN * 65)
4132 #define WMI_TPC_PREAM_TABLE_MAX 10
4133 #define WMI_TPC_FLAG 3
4134 #define WMI_TPC_BUF_SIZE 10
4135 #define WMI_TPC_BEAMFORMING 2
4136
4137 enum wmi_tpc_table_type {
4138 WMI_TPC_TABLE_TYPE_CDD = 0,
4139 WMI_TPC_TABLE_TYPE_STBC = 1,
4140 WMI_TPC_TABLE_TYPE_TXBF = 2,
4141 };
4142
4143 enum wmi_tpc_config_event_flag {
4144 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
4145 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
4146 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
4147 };
4148
4149 struct wmi_pdev_tpc_config_event {
4150 __le32 reg_domain;
4151 __le32 chan_freq;
4152 __le32 phy_mode;
4153 __le32 twice_antenna_reduction;
4154 __le32 twice_max_rd_power;
4155 a_sle32 twice_antenna_gain;
4156 __le32 power_limit;
4157 __le32 rate_max;
4158 __le32 num_tx_chain;
4159 __le32 ctl;
4160 __le32 flags;
4161 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4162 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4163 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4164 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4165 u8 rates_array[WMI_TPC_RATE_MAX];
4166 } __packed;
4167
4168
4169 enum wmi_tp_scale {
4170 WMI_TP_SCALE_MAX = 0,
4171 WMI_TP_SCALE_50 = 1,
4172 WMI_TP_SCALE_25 = 2,
4173 WMI_TP_SCALE_12 = 3,
4174 WMI_TP_SCALE_MIN = 4,
4175 WMI_TP_SCALE_SIZE = 5,
4176 };
4177
4178 struct wmi_pdev_tpc_final_table_event {
4179 __le32 reg_domain;
4180 __le32 chan_freq;
4181 __le32 phy_mode;
4182 __le32 twice_antenna_reduction;
4183 __le32 twice_max_rd_power;
4184 a_sle32 twice_antenna_gain;
4185 __le32 power_limit;
4186 __le32 rate_max;
4187 __le32 num_tx_chain;
4188 __le32 ctl;
4189 __le32 flags;
4190 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4191 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4192 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4193 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4194 u8 rates_array[WMI_TPC_FINAL_RATE_MAX];
4195 u8 ctl_power_table[WMI_TPC_BEAMFORMING][WMI_TPC_TX_N_CHAIN]
4196 [WMI_TPC_TX_N_CHAIN];
4197 } __packed;
4198
4199 struct wmi_pdev_get_tpc_table_cmd {
4200 __le32 param;
4201 } __packed;
4202
4203 enum wmi_tpc_pream_2ghz {
4204 WMI_TPC_PREAM_2GHZ_CCK = 0,
4205 WMI_TPC_PREAM_2GHZ_OFDM,
4206 WMI_TPC_PREAM_2GHZ_HT20,
4207 WMI_TPC_PREAM_2GHZ_HT40,
4208 WMI_TPC_PREAM_2GHZ_VHT20,
4209 WMI_TPC_PREAM_2GHZ_VHT40,
4210 WMI_TPC_PREAM_2GHZ_VHT80,
4211 };
4212
4213 enum wmi_tpc_pream_5ghz {
4214 WMI_TPC_PREAM_5GHZ_OFDM = 1,
4215 WMI_TPC_PREAM_5GHZ_HT20,
4216 WMI_TPC_PREAM_5GHZ_HT40,
4217 WMI_TPC_PREAM_5GHZ_VHT20,
4218 WMI_TPC_PREAM_5GHZ_VHT40,
4219 WMI_TPC_PREAM_5GHZ_VHT80,
4220 WMI_TPC_PREAM_5GHZ_HTCUP,
4221 };
4222
4223 #define WMI_PEER_PS_STATE_DISABLED 2
4224
4225 struct wmi_peer_sta_ps_state_chg_event {
4226 struct wmi_mac_addr peer_macaddr;
4227 __le32 peer_ps_state;
4228 } __packed;
4229
4230 struct wmi_pdev_chanlist_update_event {
4231
4232 __le32 num_chan;
4233
4234 struct wmi_channel channel_list[1];
4235 } __packed;
4236
4237 #define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
4238
4239 struct wmi_debug_mesg_event {
4240
4241 char bufp[WMI_MAX_DEBUG_MESG];
4242 } __packed;
4243
4244 enum {
4245
4246 VDEV_SUBTYPE_P2PDEV = 0,
4247
4248 VDEV_SUBTYPE_P2PCLI,
4249
4250 VDEV_SUBTYPE_P2PGO,
4251
4252 VDEV_SUBTYPE_BT,
4253 };
4254
4255 struct wmi_pdev_set_channel_cmd {
4256
4257 struct wmi_channel chan;
4258 } __packed;
4259
4260 struct wmi_pdev_pktlog_enable_cmd {
4261 __le32 ev_bitmap;
4262 } __packed;
4263
4264
4265 #define WMI_DSCP_MAP_MAX (64)
4266 struct wmi_pdev_set_dscp_tid_map_cmd {
4267
4268 __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
4269 } __packed;
4270
4271 enum mcast_bcast_rate_id {
4272 WMI_SET_MCAST_RATE,
4273 WMI_SET_BCAST_RATE
4274 };
4275
4276 struct mcast_bcast_rate {
4277 enum mcast_bcast_rate_id rate_id;
4278 __le32 rate;
4279 } __packed;
4280
4281 struct wmi_wmm_params {
4282 __le32 cwmin;
4283 __le32 cwmax;
4284 __le32 aifs;
4285 __le32 txop;
4286 __le32 acm;
4287 __le32 no_ack;
4288 } __packed;
4289
4290 struct wmi_pdev_set_wmm_params {
4291 struct wmi_wmm_params ac_be;
4292 struct wmi_wmm_params ac_bk;
4293 struct wmi_wmm_params ac_vi;
4294 struct wmi_wmm_params ac_vo;
4295 } __packed;
4296
4297 struct wmi_wmm_params_arg {
4298 u32 cwmin;
4299 u32 cwmax;
4300 u32 aifs;
4301 u32 txop;
4302 u32 acm;
4303 u32 no_ack;
4304 };
4305
4306 struct wmi_wmm_params_all_arg {
4307 struct wmi_wmm_params_arg ac_be;
4308 struct wmi_wmm_params_arg ac_bk;
4309 struct wmi_wmm_params_arg ac_vi;
4310 struct wmi_wmm_params_arg ac_vo;
4311 };
4312
4313 struct wmi_pdev_stats_tx {
4314
4315 __le32 comp_queued;
4316
4317
4318 __le32 comp_delivered;
4319
4320
4321 __le32 msdu_enqued;
4322
4323
4324 __le32 mpdu_enqued;
4325
4326
4327 __le32 wmm_drop;
4328
4329
4330 __le32 local_enqued;
4331
4332
4333 __le32 local_freed;
4334
4335
4336 __le32 hw_queued;
4337
4338
4339 __le32 hw_reaped;
4340
4341
4342 __le32 underrun;
4343
4344
4345 __le32 tx_abort;
4346
4347
4348 __le32 mpdus_requed;
4349
4350
4351 __le32 tx_ko;
4352
4353
4354 __le32 data_rc;
4355
4356
4357 __le32 self_triggers;
4358
4359
4360 __le32 sw_retry_failure;
4361
4362
4363 __le32 illgl_rate_phy_err;
4364
4365
4366 __le32 pdev_cont_xretry;
4367
4368
4369 __le32 pdev_tx_timeout;
4370
4371
4372 __le32 pdev_resets;
4373
4374
4375 __le32 stateless_tid_alloc_failure;
4376
4377 __le32 phy_underrun;
4378
4379
4380 __le32 txop_ovf;
4381 } __packed;
4382
4383 struct wmi_10_4_pdev_stats_tx {
4384
4385 __le32 comp_queued;
4386
4387
4388 __le32 comp_delivered;
4389
4390
4391 __le32 msdu_enqued;
4392
4393
4394 __le32 mpdu_enqued;
4395
4396
4397 __le32 wmm_drop;
4398
4399
4400 __le32 local_enqued;
4401
4402
4403 __le32 local_freed;
4404
4405
4406 __le32 hw_queued;
4407
4408
4409 __le32 hw_reaped;
4410
4411
4412 __le32 underrun;
4413
4414
4415 __le32 hw_paused;
4416
4417
4418 __le32 tx_abort;
4419
4420
4421 __le32 mpdus_requed;
4422
4423
4424 __le32 tx_ko;
4425
4426
4427 __le32 data_rc;
4428
4429
4430 __le32 self_triggers;
4431
4432
4433 __le32 sw_retry_failure;
4434
4435
4436 __le32 illgl_rate_phy_err;
4437
4438
4439 __le32 pdev_cont_xretry;
4440
4441
4442 __le32 pdev_tx_timeout;
4443
4444
4445 __le32 pdev_resets;
4446
4447
4448 __le32 stateless_tid_alloc_failure;
4449
4450 __le32 phy_underrun;
4451
4452
4453 __le32 txop_ovf;
4454
4455
4456 __le32 seq_posted;
4457
4458
4459 __le32 seq_failed_queueing;
4460
4461
4462 __le32 seq_completed;
4463
4464
4465 __le32 seq_restarted;
4466
4467
4468 __le32 mu_seq_posted;
4469
4470
4471 __le32 mpdus_sw_flush;
4472
4473
4474 __le32 mpdus_hw_filter;
4475
4476
4477
4478
4479 __le32 mpdus_truncated;
4480
4481
4482 __le32 mpdus_ack_failed;
4483
4484
4485 __le32 mpdus_expired;
4486 } __packed;
4487
4488 struct wmi_pdev_stats_rx {
4489
4490 __le32 mid_ppdu_route_change;
4491
4492
4493 __le32 status_rcvd;
4494
4495
4496 __le32 r0_frags;
4497 __le32 r1_frags;
4498 __le32 r2_frags;
4499 __le32 r3_frags;
4500
4501
4502 __le32 htt_msdus;
4503 __le32 htt_mpdus;
4504
4505
4506 __le32 loc_msdus;
4507 __le32 loc_mpdus;
4508
4509
4510 __le32 oversize_amsdu;
4511
4512
4513 __le32 phy_errs;
4514
4515
4516 __le32 phy_err_drop;
4517
4518
4519 __le32 mpdu_errs;
4520 } __packed;
4521
4522 struct wmi_pdev_stats_peer {
4523
4524 __le32 dummy;
4525 } __packed;
4526
4527 enum wmi_stats_id {
4528 WMI_STAT_PEER = BIT(0),
4529 WMI_STAT_AP = BIT(1),
4530 WMI_STAT_PDEV = BIT(2),
4531 WMI_STAT_VDEV = BIT(3),
4532 WMI_STAT_BCNFLT = BIT(4),
4533 WMI_STAT_VDEV_RATE = BIT(5),
4534 };
4535
4536 enum wmi_10_4_stats_id {
4537 WMI_10_4_STAT_PEER = BIT(0),
4538 WMI_10_4_STAT_AP = BIT(1),
4539 WMI_10_4_STAT_INST = BIT(2),
4540 WMI_10_4_STAT_PEER_EXTD = BIT(3),
4541 WMI_10_4_STAT_VDEV_EXTD = BIT(4),
4542 };
4543
4544 enum wmi_tlv_stats_id {
4545 WMI_TLV_STAT_PEER = BIT(0),
4546 WMI_TLV_STAT_AP = BIT(1),
4547 WMI_TLV_STAT_PDEV = BIT(2),
4548 WMI_TLV_STAT_VDEV = BIT(3),
4549 WMI_TLV_STAT_PEER_EXTD = BIT(10),
4550 };
4551
4552 struct wlan_inst_rssi_args {
4553 __le16 cfg_retry_count;
4554 __le16 retry_count;
4555 };
4556
4557 struct wmi_request_stats_cmd {
4558 __le32 stats_id;
4559
4560 __le32 vdev_id;
4561
4562
4563 struct wmi_mac_addr peer_macaddr;
4564
4565
4566 struct wlan_inst_rssi_args inst_rssi_args;
4567 } __packed;
4568
4569
4570 enum {
4571
4572 WMI_PDEV_SUSPEND,
4573
4574
4575 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
4576 };
4577
4578 struct wmi_pdev_suspend_cmd {
4579
4580 __le32 suspend_opt;
4581 } __packed;
4582
4583 struct wmi_stats_event {
4584 __le32 stats_id;
4585
4586
4587
4588
4589 __le32 num_pdev_stats;
4590
4591
4592
4593
4594 __le32 num_vdev_stats;
4595
4596
4597
4598
4599 __le32 num_peer_stats;
4600 __le32 num_bcnflt_stats;
4601
4602
4603
4604
4605
4606
4607
4608
4609
4610 u8 data[0];
4611 } __packed;
4612
4613 struct wmi_10_2_stats_event {
4614 __le32 stats_id;
4615 __le32 num_pdev_stats;
4616 __le32 num_pdev_ext_stats;
4617 __le32 num_vdev_stats;
4618 __le32 num_peer_stats;
4619 __le32 num_bcnflt_stats;
4620 u8 data[0];
4621 } __packed;
4622
4623
4624
4625
4626
4627 struct wmi_pdev_stats_base {
4628 __le32 chan_nf;
4629 __le32 tx_frame_count;
4630 __le32 rx_frame_count;
4631 __le32 rx_clear_count;
4632 __le32 cycle_count;
4633 __le32 phy_err_count;
4634 __le32 chan_tx_pwr;
4635 } __packed;
4636
4637 struct wmi_pdev_stats {
4638 struct wmi_pdev_stats_base base;
4639 struct wmi_pdev_stats_tx tx;
4640 struct wmi_pdev_stats_rx rx;
4641 struct wmi_pdev_stats_peer peer;
4642 } __packed;
4643
4644 struct wmi_pdev_stats_extra {
4645 __le32 ack_rx_bad;
4646 __le32 rts_bad;
4647 __le32 rts_good;
4648 __le32 fcs_bad;
4649 __le32 no_beacons;
4650 __le32 mib_int_count;
4651 } __packed;
4652
4653 struct wmi_10x_pdev_stats {
4654 struct wmi_pdev_stats_base base;
4655 struct wmi_pdev_stats_tx tx;
4656 struct wmi_pdev_stats_rx rx;
4657 struct wmi_pdev_stats_peer peer;
4658 struct wmi_pdev_stats_extra extra;
4659 } __packed;
4660
4661 struct wmi_pdev_stats_mem {
4662 __le32 dram_free;
4663 __le32 iram_free;
4664 } __packed;
4665
4666 struct wmi_10_2_pdev_stats {
4667 struct wmi_pdev_stats_base base;
4668 struct wmi_pdev_stats_tx tx;
4669 __le32 mc_drop;
4670 struct wmi_pdev_stats_rx rx;
4671 __le32 pdev_rx_timeout;
4672 struct wmi_pdev_stats_mem mem;
4673 struct wmi_pdev_stats_peer peer;
4674 struct wmi_pdev_stats_extra extra;
4675 } __packed;
4676
4677 struct wmi_10_4_pdev_stats {
4678 struct wmi_pdev_stats_base base;
4679 struct wmi_10_4_pdev_stats_tx tx;
4680 struct wmi_pdev_stats_rx rx;
4681 __le32 rx_ovfl_errs;
4682 struct wmi_pdev_stats_mem mem;
4683 __le32 sram_free_size;
4684 struct wmi_pdev_stats_extra extra;
4685 } __packed;
4686
4687
4688
4689
4690
4691 #define WMI_VDEV_STATS_FTM_COUNT_VALID BIT(31)
4692 #define WMI_VDEV_STATS_FTM_COUNT_LSB 0
4693 #define WMI_VDEV_STATS_FTM_COUNT_MASK 0x7fffffff
4694
4695 struct wmi_vdev_stats {
4696 __le32 vdev_id;
4697 } __packed;
4698
4699 struct wmi_vdev_stats_extd {
4700 __le32 vdev_id;
4701 __le32 ppdu_aggr_cnt;
4702 __le32 ppdu_noack;
4703 __le32 mpdu_queued;
4704 __le32 ppdu_nonaggr_cnt;
4705 __le32 mpdu_sw_requeued;
4706 __le32 mpdu_suc_retry;
4707 __le32 mpdu_suc_multitry;
4708 __le32 mpdu_fail_retry;
4709 __le32 tx_ftm_suc;
4710 __le32 tx_ftm_suc_retry;
4711 __le32 tx_ftm_fail;
4712 __le32 rx_ftmr_cnt;
4713 __le32 rx_ftmr_dup_cnt;
4714 __le32 rx_iftmr_cnt;
4715 __le32 rx_iftmr_dup_cnt;
4716 __le32 reserved[6];
4717 } __packed;
4718
4719
4720
4721
4722
4723 struct wmi_peer_stats {
4724 struct wmi_mac_addr peer_macaddr;
4725 __le32 peer_rssi;
4726 __le32 peer_tx_rate;
4727 } __packed;
4728
4729 struct wmi_10x_peer_stats {
4730 struct wmi_peer_stats old;
4731 __le32 peer_rx_rate;
4732 } __packed;
4733
4734 struct wmi_10_2_peer_stats {
4735 struct wmi_peer_stats old;
4736 __le32 peer_rx_rate;
4737 __le32 current_per;
4738 __le32 retries;
4739 __le32 tx_rate_count;
4740 __le32 max_4ms_frame_len;
4741 __le32 total_sub_frames;
4742 __le32 tx_bytes;
4743 __le32 num_pkt_loss_overflow[4];
4744 __le32 num_pkt_loss_excess_retry[4];
4745 } __packed;
4746
4747 struct wmi_10_2_4_peer_stats {
4748 struct wmi_10_2_peer_stats common;
4749 __le32 peer_rssi_changed;
4750 } __packed;
4751
4752 struct wmi_10_2_4_ext_peer_stats {
4753 struct wmi_10_2_peer_stats common;
4754 __le32 peer_rssi_changed;
4755 __le32 rx_duration;
4756 } __packed;
4757
4758 struct wmi_10_4_peer_stats {
4759 struct wmi_mac_addr peer_macaddr;
4760 __le32 peer_rssi;
4761 __le32 peer_rssi_seq_num;
4762 __le32 peer_tx_rate;
4763 __le32 peer_rx_rate;
4764 __le32 current_per;
4765 __le32 retries;
4766 __le32 tx_rate_count;
4767 __le32 max_4ms_frame_len;
4768 __le32 total_sub_frames;
4769 __le32 tx_bytes;
4770 __le32 num_pkt_loss_overflow[4];
4771 __le32 num_pkt_loss_excess_retry[4];
4772 __le32 peer_rssi_changed;
4773 } __packed;
4774
4775 struct wmi_10_4_peer_extd_stats {
4776 struct wmi_mac_addr peer_macaddr;
4777 __le32 inactive_time;
4778 __le32 peer_chain_rssi;
4779 __le32 rx_duration;
4780 __le32 reserved[10];
4781 } __packed;
4782
4783 struct wmi_10_4_bss_bcn_stats {
4784 __le32 vdev_id;
4785 __le32 bss_bcns_dropped;
4786 __le32 bss_bcn_delivered;
4787 } __packed;
4788
4789 struct wmi_10_4_bss_bcn_filter_stats {
4790 __le32 bcns_dropped;
4791 __le32 bcns_delivered;
4792 __le32 active_filters;
4793 struct wmi_10_4_bss_bcn_stats bss_stats;
4794 } __packed;
4795
4796 struct wmi_10_2_pdev_ext_stats {
4797 __le32 rx_rssi_comb;
4798 __le32 rx_rssi[4];
4799 __le32 rx_mcs[10];
4800 __le32 tx_mcs[10];
4801 __le32 ack_rssi;
4802 } __packed;
4803
4804 struct wmi_vdev_create_cmd {
4805 __le32 vdev_id;
4806 __le32 vdev_type;
4807 __le32 vdev_subtype;
4808 struct wmi_mac_addr vdev_macaddr;
4809 } __packed;
4810
4811 enum wmi_vdev_type {
4812 WMI_VDEV_TYPE_AP = 1,
4813 WMI_VDEV_TYPE_STA = 2,
4814 WMI_VDEV_TYPE_IBSS = 3,
4815 WMI_VDEV_TYPE_MONITOR = 4,
4816 };
4817
4818 enum wmi_vdev_subtype {
4819 WMI_VDEV_SUBTYPE_NONE,
4820 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4821 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4822 WMI_VDEV_SUBTYPE_P2P_GO,
4823 WMI_VDEV_SUBTYPE_PROXY_STA,
4824 WMI_VDEV_SUBTYPE_MESH_11S,
4825 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4826 };
4827
4828 enum wmi_vdev_subtype_legacy {
4829 WMI_VDEV_SUBTYPE_LEGACY_NONE = 0,
4830 WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV = 1,
4831 WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI = 2,
4832 WMI_VDEV_SUBTYPE_LEGACY_P2P_GO = 3,
4833 WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
4834 };
4835
4836 enum wmi_vdev_subtype_10_2_4 {
4837 WMI_VDEV_SUBTYPE_10_2_4_NONE = 0,
4838 WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV = 1,
4839 WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI = 2,
4840 WMI_VDEV_SUBTYPE_10_2_4_P2P_GO = 3,
4841 WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
4842 WMI_VDEV_SUBTYPE_10_2_4_MESH_11S = 5,
4843 };
4844
4845 enum wmi_vdev_subtype_10_4 {
4846 WMI_VDEV_SUBTYPE_10_4_NONE = 0,
4847 WMI_VDEV_SUBTYPE_10_4_P2P_DEV = 1,
4848 WMI_VDEV_SUBTYPE_10_4_P2P_CLI = 2,
4849 WMI_VDEV_SUBTYPE_10_4_P2P_GO = 3,
4850 WMI_VDEV_SUBTYPE_10_4_PROXY_STA = 4,
4851 WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
4852 WMI_VDEV_SUBTYPE_10_4_MESH_11S = 6,
4853 };
4854
4855
4856
4857
4858
4859
4860
4861
4862 #define WMI_VDEV_START_HIDDEN_SSID (1 << 0)
4863
4864
4865
4866
4867
4868
4869
4870 #define WMI_VDEV_START_PMF_ENABLED (1 << 1)
4871
4872 struct wmi_p2p_noa_descriptor {
4873 __le32 type_count;
4874 __le32 duration;
4875 __le32 interval;
4876 __le32 start_time;
4877 } __packed;
4878
4879 struct wmi_vdev_start_request_cmd {
4880
4881 struct wmi_channel chan;
4882
4883 __le32 vdev_id;
4884
4885 __le32 requestor_id;
4886
4887 __le32 beacon_interval;
4888
4889 __le32 dtim_period;
4890
4891 __le32 flags;
4892
4893 struct wmi_ssid ssid;
4894
4895 __le32 bcn_tx_rate;
4896
4897 __le32 bcn_tx_power;
4898
4899 __le32 num_noa_descriptors;
4900
4901
4902
4903
4904 __le32 disable_hw_ack;
4905
4906 struct wmi_p2p_noa_descriptor noa_descriptors[2];
4907 } __packed;
4908
4909 struct wmi_vdev_restart_request_cmd {
4910 struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
4911 } __packed;
4912
4913 struct wmi_vdev_start_request_arg {
4914 u32 vdev_id;
4915 struct wmi_channel_arg channel;
4916 u32 bcn_intval;
4917 u32 dtim_period;
4918 u8 *ssid;
4919 u32 ssid_len;
4920 u32 bcn_tx_rate;
4921 u32 bcn_tx_power;
4922 bool disable_hw_ack;
4923 bool hidden_ssid;
4924 bool pmf_enabled;
4925 };
4926
4927 struct wmi_vdev_delete_cmd {
4928
4929 __le32 vdev_id;
4930 } __packed;
4931
4932 struct wmi_vdev_up_cmd {
4933 __le32 vdev_id;
4934 __le32 vdev_assoc_id;
4935 struct wmi_mac_addr vdev_bssid;
4936 } __packed;
4937
4938 struct wmi_vdev_stop_cmd {
4939 __le32 vdev_id;
4940 } __packed;
4941
4942 struct wmi_vdev_down_cmd {
4943 __le32 vdev_id;
4944 } __packed;
4945
4946 struct wmi_vdev_standby_response_cmd {
4947
4948 __le32 vdev_id;
4949 } __packed;
4950
4951 struct wmi_vdev_resume_response_cmd {
4952
4953 __le32 vdev_id;
4954 } __packed;
4955
4956 struct wmi_vdev_set_param_cmd {
4957 __le32 vdev_id;
4958 __le32 param_id;
4959 __le32 param_value;
4960 } __packed;
4961
4962 #define WMI_MAX_KEY_INDEX 3
4963 #define WMI_MAX_KEY_LEN 32
4964
4965 #define WMI_KEY_PAIRWISE 0x00
4966 #define WMI_KEY_GROUP 0x01
4967 #define WMI_KEY_TX_USAGE 0x02
4968
4969 struct wmi_key_seq_counter {
4970 __le32 key_seq_counter_l;
4971 __le32 key_seq_counter_h;
4972 } __packed;
4973
4974 enum wmi_cipher_suites {
4975 WMI_CIPHER_NONE,
4976 WMI_CIPHER_WEP,
4977 WMI_CIPHER_TKIP,
4978 WMI_CIPHER_AES_OCB,
4979 WMI_CIPHER_AES_CCM,
4980 WMI_CIPHER_WAPI,
4981 WMI_CIPHER_CKIP,
4982 WMI_CIPHER_AES_CMAC,
4983 WMI_CIPHER_AES_GCM,
4984 };
4985
4986 enum wmi_tlv_cipher_suites {
4987 WMI_TLV_CIPHER_NONE,
4988 WMI_TLV_CIPHER_WEP,
4989 WMI_TLV_CIPHER_TKIP,
4990 WMI_TLV_CIPHER_AES_OCB,
4991 WMI_TLV_CIPHER_AES_CCM,
4992 WMI_TLV_CIPHER_WAPI,
4993 WMI_TLV_CIPHER_CKIP,
4994 WMI_TLV_CIPHER_AES_CMAC,
4995 WMI_TLV_CIPHER_ANY,
4996 WMI_TLV_CIPHER_AES_GCM,
4997 };
4998
4999 struct wmi_vdev_install_key_cmd {
5000 __le32 vdev_id;
5001 struct wmi_mac_addr peer_macaddr;
5002 __le32 key_idx;
5003 __le32 key_flags;
5004 __le32 key_cipher;
5005 struct wmi_key_seq_counter key_rsc_counter;
5006 struct wmi_key_seq_counter key_global_rsc_counter;
5007 struct wmi_key_seq_counter key_tsc_counter;
5008 u8 wpi_key_rsc_counter[16];
5009 u8 wpi_key_tsc_counter[16];
5010 __le32 key_len;
5011 __le32 key_txmic_len;
5012 __le32 key_rxmic_len;
5013
5014
5015 u8 key_data[0];
5016 } __packed;
5017
5018 struct wmi_vdev_install_key_arg {
5019 u32 vdev_id;
5020 const u8 *macaddr;
5021 u32 key_idx;
5022 u32 key_flags;
5023 u32 key_cipher;
5024 u32 key_len;
5025 u32 key_txmic_len;
5026 u32 key_rxmic_len;
5027 const void *key_data;
5028 };
5029
5030
5031
5032
5033
5034
5035
5036
5037
5038
5039
5040
5041
5042
5043 enum wmi_rate_preamble {
5044 WMI_RATE_PREAMBLE_OFDM,
5045 WMI_RATE_PREAMBLE_CCK,
5046 WMI_RATE_PREAMBLE_HT,
5047 WMI_RATE_PREAMBLE_VHT,
5048 };
5049
5050 #define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3))
5051 #define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3)
5052 #define ATH10K_HW_MCS_RATE(rate) ((rate) & 0xf)
5053 #define ATH10K_HW_LEGACY_RATE(rate) ((rate) & 0x3f)
5054 #define ATH10K_HW_BW(flags) (((flags) >> 3) & 0x3)
5055 #define ATH10K_HW_GI(flags) (((flags) >> 5) & 0x1)
5056 #define ATH10K_HW_RATECODE(rate, nss, preamble) \
5057 (((preamble) << 6) | ((nss) << 4) | (rate))
5058 #define ATH10K_HW_AMPDU(flags) ((flags) & 0x1)
5059 #define ATH10K_HW_BA_FAIL(flags) (((flags) >> 1) & 0x3)
5060 #define ATH10K_FW_SKIPPED_RATE_CTRL(flags) (((flags) >> 6) & 0x1)
5061
5062 #define ATH10K_VHT_MCS_NUM 10
5063 #define ATH10K_BW_NUM 6
5064 #define ATH10K_NSS_NUM 4
5065 #define ATH10K_LEGACY_NUM 12
5066 #define ATH10K_GI_NUM 2
5067 #define ATH10K_HT_MCS_NUM 32
5068 #define ATH10K_RATE_TABLE_NUM 320
5069 #define ATH10K_RATE_INFO_FLAGS_SGI_BIT 2
5070
5071
5072 #define WMI_FIXED_RATE_NONE (0xff)
5073
5074 struct wmi_vdev_param_map {
5075 u32 rts_threshold;
5076 u32 fragmentation_threshold;
5077 u32 beacon_interval;
5078 u32 listen_interval;
5079 u32 multicast_rate;
5080 u32 mgmt_tx_rate;
5081 u32 slot_time;
5082 u32 preamble;
5083 u32 swba_time;
5084 u32 wmi_vdev_stats_update_period;
5085 u32 wmi_vdev_pwrsave_ageout_time;
5086 u32 wmi_vdev_host_swba_interval;
5087 u32 dtim_period;
5088 u32 wmi_vdev_oc_scheduler_air_time_limit;
5089 u32 wds;
5090 u32 atim_window;
5091 u32 bmiss_count_max;
5092 u32 bmiss_first_bcnt;
5093 u32 bmiss_final_bcnt;
5094 u32 feature_wmm;
5095 u32 chwidth;
5096 u32 chextoffset;
5097 u32 disable_htprotection;
5098 u32 sta_quickkickout;
5099 u32 mgmt_rate;
5100 u32 protection_mode;
5101 u32 fixed_rate;
5102 u32 sgi;
5103 u32 ldpc;
5104 u32 tx_stbc;
5105 u32 rx_stbc;
5106 u32 intra_bss_fwd;
5107 u32 def_keyid;
5108 u32 nss;
5109 u32 bcast_data_rate;
5110 u32 mcast_data_rate;
5111 u32 mcast_indicate;
5112 u32 dhcp_indicate;
5113 u32 unknown_dest_indicate;
5114 u32 ap_keepalive_min_idle_inactive_time_secs;
5115 u32 ap_keepalive_max_idle_inactive_time_secs;
5116 u32 ap_keepalive_max_unresponsive_time_secs;
5117 u32 ap_enable_nawds;
5118 u32 mcast2ucast_set;
5119 u32 enable_rtscts;
5120 u32 txbf;
5121 u32 packet_powersave;
5122 u32 drop_unencry;
5123 u32 tx_encap_type;
5124 u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
5125 u32 rc_num_retries;
5126 u32 cabq_maxdur;
5127 u32 mfptest_set;
5128 u32 rts_fixed_rate;
5129 u32 vht_sgimask;
5130 u32 vht80_ratemask;
5131 u32 early_rx_adjust_enable;
5132 u32 early_rx_tgt_bmiss_num;
5133 u32 early_rx_bmiss_sample_cycle;
5134 u32 early_rx_slop_step;
5135 u32 early_rx_init_slop;
5136 u32 early_rx_adjust_pause;
5137 u32 proxy_sta;
5138 u32 meru_vc;
5139 u32 rx_decap_type;
5140 u32 bw_nss_ratemask;
5141 u32 inc_tsf;
5142 u32 dec_tsf;
5143 u32 disable_4addr_src_lrn;
5144 u32 rtt_responder_role;
5145 };
5146
5147 #define WMI_VDEV_PARAM_UNSUPPORTED 0
5148
5149
5150 enum wmi_vdev_param {
5151
5152 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5153
5154 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5155
5156 WMI_VDEV_PARAM_BEACON_INTERVAL,
5157
5158 WMI_VDEV_PARAM_LISTEN_INTERVAL,
5159
5160 WMI_VDEV_PARAM_MULTICAST_RATE,
5161
5162 WMI_VDEV_PARAM_MGMT_TX_RATE,
5163
5164 WMI_VDEV_PARAM_SLOT_TIME,
5165
5166 WMI_VDEV_PARAM_PREAMBLE,
5167
5168 WMI_VDEV_PARAM_SWBA_TIME,
5169
5170 WMI_VDEV_STATS_UPDATE_PERIOD,
5171
5172 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
5173
5174
5175
5176
5177 WMI_VDEV_HOST_SWBA_INTERVAL,
5178
5179 WMI_VDEV_PARAM_DTIM_PERIOD,
5180
5181
5182
5183
5184 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5185
5186 WMI_VDEV_PARAM_WDS,
5187
5188 WMI_VDEV_PARAM_ATIM_WINDOW,
5189
5190 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
5191
5192 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
5193
5194 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
5195
5196 WMI_VDEV_PARAM_FEATURE_WMM,
5197
5198 WMI_VDEV_PARAM_CHWIDTH,
5199
5200 WMI_VDEV_PARAM_CHEXTOFFSET,
5201
5202 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
5203
5204 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
5205
5206 WMI_VDEV_PARAM_MGMT_RATE,
5207
5208 WMI_VDEV_PARAM_PROTECTION_MODE,
5209
5210 WMI_VDEV_PARAM_FIXED_RATE,
5211
5212 WMI_VDEV_PARAM_SGI,
5213
5214 WMI_VDEV_PARAM_LDPC,
5215
5216 WMI_VDEV_PARAM_TX_STBC,
5217
5218 WMI_VDEV_PARAM_RX_STBC,
5219
5220 WMI_VDEV_PARAM_INTRA_BSS_FWD,
5221
5222 WMI_VDEV_PARAM_DEF_KEYID,
5223
5224 WMI_VDEV_PARAM_NSS,
5225
5226 WMI_VDEV_PARAM_BCAST_DATA_RATE,
5227
5228 WMI_VDEV_PARAM_MCAST_DATA_RATE,
5229
5230 WMI_VDEV_PARAM_MCAST_INDICATE,
5231
5232 WMI_VDEV_PARAM_DHCP_INDICATE,
5233
5234 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5235
5236
5237 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5238
5239
5240
5241
5242
5243
5244
5245
5246
5247
5248
5249 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5250
5251
5252
5253
5254
5255
5256
5257 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5258
5259
5260 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
5261
5262 WMI_VDEV_PARAM_ENABLE_RTSCTS,
5263
5264 WMI_VDEV_PARAM_TXBF,
5265
5266
5267 WMI_VDEV_PARAM_PACKET_POWERSAVE,
5268
5269
5270
5271
5272
5273 WMI_VDEV_PARAM_DROP_UNENCRY,
5274
5275
5276
5277
5278 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
5279 };
5280
5281
5282 enum wmi_10x_vdev_param {
5283
5284 WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5285
5286 WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5287
5288 WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
5289
5290 WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
5291
5292 WMI_10X_VDEV_PARAM_MULTICAST_RATE,
5293
5294 WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
5295
5296 WMI_10X_VDEV_PARAM_SLOT_TIME,
5297
5298 WMI_10X_VDEV_PARAM_PREAMBLE,
5299
5300 WMI_10X_VDEV_PARAM_SWBA_TIME,
5301
5302 WMI_10X_VDEV_STATS_UPDATE_PERIOD,
5303
5304 WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
5305
5306
5307
5308
5309 WMI_10X_VDEV_HOST_SWBA_INTERVAL,
5310
5311 WMI_10X_VDEV_PARAM_DTIM_PERIOD,
5312
5313
5314
5315
5316 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5317
5318 WMI_10X_VDEV_PARAM_WDS,
5319
5320 WMI_10X_VDEV_PARAM_ATIM_WINDOW,
5321
5322 WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
5323
5324 WMI_10X_VDEV_PARAM_FEATURE_WMM,
5325
5326 WMI_10X_VDEV_PARAM_CHWIDTH,
5327
5328 WMI_10X_VDEV_PARAM_CHEXTOFFSET,
5329
5330 WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
5331
5332 WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
5333
5334 WMI_10X_VDEV_PARAM_MGMT_RATE,
5335
5336 WMI_10X_VDEV_PARAM_PROTECTION_MODE,
5337
5338 WMI_10X_VDEV_PARAM_FIXED_RATE,
5339
5340 WMI_10X_VDEV_PARAM_SGI,
5341
5342 WMI_10X_VDEV_PARAM_LDPC,
5343
5344 WMI_10X_VDEV_PARAM_TX_STBC,
5345
5346 WMI_10X_VDEV_PARAM_RX_STBC,
5347
5348 WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
5349
5350 WMI_10X_VDEV_PARAM_DEF_KEYID,
5351
5352 WMI_10X_VDEV_PARAM_NSS,
5353
5354 WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
5355
5356 WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
5357
5358 WMI_10X_VDEV_PARAM_MCAST_INDICATE,
5359
5360 WMI_10X_VDEV_PARAM_DHCP_INDICATE,
5361
5362 WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5363
5364
5365 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5366
5367
5368
5369
5370
5371
5372
5373
5374
5375
5376
5377 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5378
5379
5380
5381
5382
5383
5384
5385 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5386
5387
5388 WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
5389
5390 WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
5391
5392 WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
5393
5394 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5395
5396
5397 WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
5398 WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
5399 WMI_10X_VDEV_PARAM_MFPTEST_SET,
5400 WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
5401 WMI_10X_VDEV_PARAM_VHT_SGIMASK,
5402 WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
5403 WMI_10X_VDEV_PARAM_TSF_INCREMENT,
5404 };
5405
5406 enum wmi_10_4_vdev_param {
5407 WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5408 WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5409 WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
5410 WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
5411 WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
5412 WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
5413 WMI_10_4_VDEV_PARAM_SLOT_TIME,
5414 WMI_10_4_VDEV_PARAM_PREAMBLE,
5415 WMI_10_4_VDEV_PARAM_SWBA_TIME,
5416 WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
5417 WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
5418 WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
5419 WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
5420 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5421 WMI_10_4_VDEV_PARAM_WDS,
5422 WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
5423 WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
5424 WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
5425 WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
5426 WMI_10_4_VDEV_PARAM_FEATURE_WMM,
5427 WMI_10_4_VDEV_PARAM_CHWIDTH,
5428 WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
5429 WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
5430 WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
5431 WMI_10_4_VDEV_PARAM_MGMT_RATE,
5432 WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
5433 WMI_10_4_VDEV_PARAM_FIXED_RATE,
5434 WMI_10_4_VDEV_PARAM_SGI,
5435 WMI_10_4_VDEV_PARAM_LDPC,
5436 WMI_10_4_VDEV_PARAM_TX_STBC,
5437 WMI_10_4_VDEV_PARAM_RX_STBC,
5438 WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
5439 WMI_10_4_VDEV_PARAM_DEF_KEYID,
5440 WMI_10_4_VDEV_PARAM_NSS,
5441 WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
5442 WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
5443 WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
5444 WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
5445 WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5446 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5447 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5448 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5449 WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
5450 WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
5451 WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
5452 WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
5453 WMI_10_4_VDEV_PARAM_TXBF,
5454 WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
5455 WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
5456 WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
5457 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5458 WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
5459 WMI_10_4_VDEV_PARAM_MFPTEST_SET,
5460 WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
5461 WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
5462 WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
5463 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
5464 WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
5465 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
5466 WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
5467 WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
5468 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
5469 WMI_10_4_VDEV_PARAM_PROXY_STA,
5470 WMI_10_4_VDEV_PARAM_MERU_VC,
5471 WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
5472 WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
5473 WMI_10_4_VDEV_PARAM_SENSOR_AP,
5474 WMI_10_4_VDEV_PARAM_BEACON_RATE,
5475 WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
5476 WMI_10_4_VDEV_PARAM_STA_KICKOUT,
5477 WMI_10_4_VDEV_PARAM_CAPABILITIES,
5478 WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
5479 WMI_10_4_VDEV_PARAM_RX_FILTER,
5480 WMI_10_4_VDEV_PARAM_MGMT_TX_POWER,
5481 WMI_10_4_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
5482 WMI_10_4_VDEV_PARAM_DISABLE_DYN_BW_RTS,
5483 WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
5484 WMI_10_4_VDEV_PARAM_SELFGEN_FIXED_RATE,
5485 WMI_10_4_VDEV_PARAM_AMPDU_SUBFRAME_SIZE_PER_AC,
5486 WMI_10_4_VDEV_PARAM_NSS_VHT160,
5487 WMI_10_4_VDEV_PARAM_NSS_VHT80_80,
5488 WMI_10_4_VDEV_PARAM_AMSDU_SUBFRAME_SIZE_PER_AC,
5489 WMI_10_4_VDEV_PARAM_DISABLE_CABQ,
5490 WMI_10_4_VDEV_PARAM_SIFS_TRIGGER_RATE,
5491 WMI_10_4_VDEV_PARAM_TX_POWER,
5492 WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
5493 WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
5494 };
5495
5496 #define WMI_VDEV_DISABLE_4_ADDR_SRC_LRN 1
5497
5498 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
5499 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
5500 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
5501 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
5502
5503 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4
5504 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
5505 #define WMI_TXBF_CONF_IMPLICIT_BF BIT(7)
5506 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8
5507 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00
5508
5509
5510 #define WMI_VDEV_SLOT_TIME_LONG 0x1
5511
5512 #define WMI_VDEV_SLOT_TIME_SHORT 0x2
5513
5514 #define WMI_VDEV_PREAMBLE_LONG 0x1
5515
5516 #define WMI_VDEV_PREAMBLE_SHORT 0x2
5517
5518 enum wmi_start_event_param {
5519 WMI_VDEV_RESP_START_EVENT = 0,
5520 WMI_VDEV_RESP_RESTART_EVENT,
5521 };
5522
5523 struct wmi_vdev_start_response_event {
5524 __le32 vdev_id;
5525 __le32 req_id;
5526 __le32 resp_type;
5527 __le32 status;
5528 } __packed;
5529
5530 struct wmi_vdev_standby_req_event {
5531
5532 __le32 vdev_id;
5533 } __packed;
5534
5535 struct wmi_vdev_resume_req_event {
5536
5537 __le32 vdev_id;
5538 } __packed;
5539
5540 struct wmi_vdev_stopped_event {
5541
5542 __le32 vdev_id;
5543 } __packed;
5544
5545
5546
5547
5548
5549 struct wmi_vdev_simple_event {
5550
5551 __le32 vdev_id;
5552 } __packed;
5553
5554
5555
5556 #define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
5557
5558
5559 #define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1
5560
5561
5562 #define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2
5563
5564
5565 struct wmi_vdev_spectral_conf_cmd {
5566 __le32 vdev_id;
5567
5568
5569 __le32 scan_count;
5570 __le32 scan_period;
5571 __le32 scan_priority;
5572
5573
5574 __le32 scan_fft_size;
5575 __le32 scan_gc_ena;
5576 __le32 scan_restart_ena;
5577 __le32 scan_noise_floor_ref;
5578 __le32 scan_init_delay;
5579 __le32 scan_nb_tone_thr;
5580 __le32 scan_str_bin_thr;
5581 __le32 scan_wb_rpt_mode;
5582 __le32 scan_rssi_rpt_mode;
5583 __le32 scan_rssi_thr;
5584 __le32 scan_pwr_format;
5585
5586
5587
5588
5589
5590
5591
5592
5593
5594
5595
5596
5597 __le32 scan_rpt_mode;
5598 __le32 scan_bin_scale;
5599 __le32 scan_dbm_adj;
5600 __le32 scan_chn_mask;
5601 } __packed;
5602
5603 struct wmi_vdev_spectral_conf_arg {
5604 u32 vdev_id;
5605 u32 scan_count;
5606 u32 scan_period;
5607 u32 scan_priority;
5608 u32 scan_fft_size;
5609 u32 scan_gc_ena;
5610 u32 scan_restart_ena;
5611 u32 scan_noise_floor_ref;
5612 u32 scan_init_delay;
5613 u32 scan_nb_tone_thr;
5614 u32 scan_str_bin_thr;
5615 u32 scan_wb_rpt_mode;
5616 u32 scan_rssi_rpt_mode;
5617 u32 scan_rssi_thr;
5618 u32 scan_pwr_format;
5619 u32 scan_rpt_mode;
5620 u32 scan_bin_scale;
5621 u32 scan_dbm_adj;
5622 u32 scan_chn_mask;
5623 };
5624
5625 #define WMI_SPECTRAL_ENABLE_DEFAULT 0
5626 #define WMI_SPECTRAL_COUNT_DEFAULT 0
5627 #define WMI_SPECTRAL_PERIOD_DEFAULT 35
5628 #define WMI_SPECTRAL_PRIORITY_DEFAULT 1
5629 #define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
5630 #define WMI_SPECTRAL_GC_ENA_DEFAULT 1
5631 #define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
5632 #define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
5633 #define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
5634 #define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
5635 #define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
5636 #define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
5637 #define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
5638 #define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
5639 #define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
5640 #define WMI_SPECTRAL_RPT_MODE_DEFAULT 2
5641 #define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
5642 #define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
5643 #define WMI_SPECTRAL_CHN_MASK_DEFAULT 1
5644
5645 struct wmi_vdev_spectral_enable_cmd {
5646 __le32 vdev_id;
5647 __le32 trigger_cmd;
5648 __le32 enable_cmd;
5649 } __packed;
5650
5651 #define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
5652 #define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
5653 #define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
5654 #define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
5655
5656
5657 struct wmi_bcn_tx_hdr {
5658 __le32 vdev_id;
5659 __le32 tx_rate;
5660 __le32 tx_power;
5661 __le32 bcn_len;
5662 } __packed;
5663
5664 struct wmi_bcn_tx_cmd {
5665 struct wmi_bcn_tx_hdr hdr;
5666 u8 *bcn[0];
5667 } __packed;
5668
5669 struct wmi_bcn_tx_arg {
5670 u32 vdev_id;
5671 u32 tx_rate;
5672 u32 tx_power;
5673 u32 bcn_len;
5674 const void *bcn;
5675 };
5676
5677 enum wmi_bcn_tx_ref_flags {
5678 WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5679 WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5680 };
5681
5682
5683
5684
5685 #define WMI_BCN_TX_REF_DEF_ANTENNA 0
5686
5687 struct wmi_bcn_tx_ref_cmd {
5688 __le32 vdev_id;
5689 __le32 data_len;
5690
5691 __le32 data_ptr;
5692
5693 __le32 msdu_id;
5694
5695 __le32 frame_control;
5696
5697 __le32 flags;
5698
5699 __le32 antenna_mask;
5700 } __packed;
5701
5702
5703 #define WMI_BCN_FILTER_ALL 0
5704 #define WMI_BCN_FILTER_NONE 1
5705 #define WMI_BCN_FILTER_RSSI 2
5706 #define WMI_BCN_FILTER_BSSID 3
5707 #define WMI_BCN_FILTER_SSID 4
5708
5709 struct wmi_bcn_filter_rx_cmd {
5710
5711 __le32 bcn_filter_id;
5712
5713 __le32 bcn_filter;
5714
5715 __le32 bcn_filter_len;
5716
5717 u8 *bcn_filter_buf;
5718 } __packed;
5719
5720
5721 struct wmi_bcn_prb_info {
5722
5723 __le32 caps;
5724
5725 __le32 erp;
5726
5727
5728
5729
5730
5731
5732
5733
5734
5735 } __packed;
5736
5737 struct wmi_bcn_tmpl_cmd {
5738
5739 __le32 vdev_id;
5740
5741 __le32 tim_ie_offset;
5742
5743 struct wmi_bcn_prb_info bcn_prb_info;
5744
5745 __le32 buf_len;
5746
5747 u8 data[1];
5748 } __packed;
5749
5750 struct wmi_prb_tmpl_cmd {
5751
5752 __le32 vdev_id;
5753
5754 struct wmi_bcn_prb_info bcn_prb_info;
5755
5756 __le32 buf_len;
5757
5758 u8 data[1];
5759 } __packed;
5760
5761 enum wmi_sta_ps_mode {
5762
5763 WMI_STA_PS_MODE_DISABLED = 0,
5764
5765 WMI_STA_PS_MODE_ENABLED = 1,
5766 };
5767
5768 struct wmi_sta_powersave_mode_cmd {
5769
5770 __le32 vdev_id;
5771
5772
5773
5774
5775
5776 __le32 sta_ps_mode;
5777 } __packed;
5778
5779 enum wmi_csa_offload_en {
5780 WMI_CSA_OFFLOAD_DISABLE = 0,
5781 WMI_CSA_OFFLOAD_ENABLE = 1,
5782 };
5783
5784 struct wmi_csa_offload_enable_cmd {
5785 __le32 vdev_id;
5786 __le32 csa_offload_enable;
5787 } __packed;
5788
5789 struct wmi_csa_offload_chanswitch_cmd {
5790 __le32 vdev_id;
5791 struct wmi_channel chan;
5792 } __packed;
5793
5794
5795
5796
5797
5798
5799
5800 enum wmi_sta_ps_param_rx_wake_policy {
5801
5802
5803
5804
5805
5806
5807 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5808
5809
5810
5811
5812
5813
5814
5815
5816 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5817 };
5818
5819
5820
5821
5822
5823
5824
5825
5826
5827 enum wmi_sta_ps_param_tx_wake_threshold {
5828 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5829 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5830
5831
5832
5833
5834
5835 };
5836
5837
5838
5839
5840
5841
5842
5843
5844
5845
5846 enum wmi_sta_ps_param_pspoll_count {
5847 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5848
5849
5850
5851
5852
5853
5854
5855
5856
5857
5858 WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
5859 };
5860
5861
5862
5863
5864
5865
5866
5867 #define WMI_UAPSD_AC_TYPE_DELI 0
5868 #define WMI_UAPSD_AC_TYPE_TRIG 1
5869
5870 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5871 (type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1))
5872
5873 enum wmi_sta_ps_param_uapsd {
5874 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5875 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5876 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5877 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5878 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5879 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5880 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5881 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5882 };
5883
5884 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5885
5886 struct wmi_sta_uapsd_auto_trig_param {
5887 __le32 wmm_ac;
5888 __le32 user_priority;
5889 __le32 service_interval;
5890 __le32 suspend_interval;
5891 __le32 delay_interval;
5892 };
5893
5894 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5895 __le32 vdev_id;
5896 struct wmi_mac_addr peer_macaddr;
5897 __le32 num_ac;
5898 };
5899
5900 struct wmi_sta_uapsd_auto_trig_arg {
5901 u32 wmm_ac;
5902 u32 user_priority;
5903 u32 service_interval;
5904 u32 suspend_interval;
5905 u32 delay_interval;
5906 };
5907
5908 enum wmi_sta_powersave_param {
5909
5910
5911
5912
5913
5914 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
5915
5916
5917
5918
5919
5920
5921 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5922
5923
5924
5925
5926
5927
5928
5929 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5930
5931
5932
5933
5934
5935
5936
5937
5938 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5939
5940
5941
5942
5943
5944
5945 WMI_STA_PS_PARAM_UAPSD = 4,
5946 };
5947
5948 struct wmi_sta_powersave_param_cmd {
5949 __le32 vdev_id;
5950 __le32 param_id;
5951 __le32 param_value;
5952 } __packed;
5953
5954
5955 #define WMI_STA_MIMO_PS_MODE_DISABLE
5956
5957 #define WMI_STA_MIMO_PS_MODE_STATIC
5958
5959 #define WMI_STA_MIMO_PS_MODE_DYNAMIC
5960
5961 struct wmi_sta_mimo_ps_mode_cmd {
5962
5963 __le32 vdev_id;
5964
5965 __le32 mimo_pwrsave_mode;
5966 } __packed;
5967
5968
5969 enum wmi_ap_ps_param_uapsd {
5970 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5971 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5972 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5973 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5974 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5975 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5976 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5977 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5978 };
5979
5980
5981 enum wmi_ap_ps_peer_param_max_sp {
5982 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
5983 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
5984 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
5985 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
5986 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
5987 };
5988
5989
5990
5991
5992
5993 enum wmi_ap_ps_peer_param {
5994
5995
5996
5997
5998
5999
6000
6001
6002
6003
6004
6005 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
6006
6007
6008
6009
6010
6011
6012
6013
6014 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
6015
6016
6017 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
6018 };
6019
6020 struct wmi_ap_ps_peer_cmd {
6021
6022 __le32 vdev_id;
6023
6024
6025 struct wmi_mac_addr peer_macaddr;
6026
6027
6028 __le32 param_id;
6029
6030
6031 __le32 param_value;
6032 } __packed;
6033
6034
6035 #define WMI_TIM_BITMAP_ARRAY_SIZE 4
6036
6037 struct wmi_tim_info {
6038 __le32 tim_len;
6039 __le32 tim_mcast;
6040 __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
6041 __le32 tim_changed;
6042 __le32 tim_num_ps_pending;
6043 } __packed;
6044
6045 struct wmi_tim_info_arg {
6046 __le32 tim_len;
6047 __le32 tim_mcast;
6048 const __le32 *tim_bitmap;
6049 __le32 tim_changed;
6050 __le32 tim_num_ps_pending;
6051 } __packed;
6052
6053
6054 #define WMI_P2P_MAX_NOA_DESCRIPTORS 4
6055 #define WMI_P2P_OPPPS_ENABLE_BIT BIT(0)
6056 #define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1
6057 #define WMI_P2P_NOA_CHANGED_BIT BIT(0)
6058
6059 struct wmi_p2p_noa_info {
6060
6061
6062
6063 u8 changed;
6064
6065 u8 index;
6066
6067
6068
6069 u8 ctwindow_oppps;
6070
6071 u8 num_descriptors;
6072
6073 struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
6074 } __packed;
6075
6076 struct wmi_bcn_info {
6077 struct wmi_tim_info tim_info;
6078 struct wmi_p2p_noa_info p2p_noa_info;
6079 } __packed;
6080
6081 struct wmi_host_swba_event {
6082 __le32 vdev_map;
6083 struct wmi_bcn_info bcn_info[0];
6084 } __packed;
6085
6086 struct wmi_10_2_4_bcn_info {
6087 struct wmi_tim_info tim_info;
6088
6089 } __packed;
6090
6091 struct wmi_10_2_4_host_swba_event {
6092 __le32 vdev_map;
6093 struct wmi_10_2_4_bcn_info bcn_info[0];
6094 } __packed;
6095
6096
6097 #define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
6098
6099 struct wmi_10_4_tim_info {
6100 __le32 tim_len;
6101 __le32 tim_mcast;
6102 __le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
6103 __le32 tim_changed;
6104 __le32 tim_num_ps_pending;
6105 } __packed;
6106
6107 #define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
6108
6109 struct wmi_10_4_p2p_noa_info {
6110
6111
6112
6113 u8 changed;
6114
6115 u8 index;
6116
6117
6118
6119 u8 ctwindow_oppps;
6120
6121 u8 num_descriptors;
6122
6123 struct wmi_p2p_noa_descriptor
6124 noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
6125 } __packed;
6126
6127 struct wmi_10_4_bcn_info {
6128 struct wmi_10_4_tim_info tim_info;
6129 struct wmi_10_4_p2p_noa_info p2p_noa_info;
6130 } __packed;
6131
6132 struct wmi_10_4_host_swba_event {
6133 __le32 vdev_map;
6134 struct wmi_10_4_bcn_info bcn_info[0];
6135 } __packed;
6136
6137 #define WMI_MAX_AP_VDEV 16
6138
6139 struct wmi_tbtt_offset_event {
6140 __le32 vdev_map;
6141 __le32 tbttoffset_list[WMI_MAX_AP_VDEV];
6142 } __packed;
6143
6144 struct wmi_peer_create_cmd {
6145 __le32 vdev_id;
6146 struct wmi_mac_addr peer_macaddr;
6147 __le32 peer_type;
6148 } __packed;
6149
6150 enum wmi_peer_type {
6151 WMI_PEER_TYPE_DEFAULT = 0,
6152 WMI_PEER_TYPE_BSS = 1,
6153 WMI_PEER_TYPE_TDLS = 2,
6154 };
6155
6156 struct wmi_peer_delete_cmd {
6157 __le32 vdev_id;
6158 struct wmi_mac_addr peer_macaddr;
6159 } __packed;
6160
6161 struct wmi_peer_flush_tids_cmd {
6162 __le32 vdev_id;
6163 struct wmi_mac_addr peer_macaddr;
6164 __le32 peer_tid_bitmap;
6165 } __packed;
6166
6167 struct wmi_fixed_rate {
6168
6169
6170
6171
6172
6173
6174 __le32 rate_mode;
6175
6176
6177
6178
6179 __le32 rate_series;
6180
6181
6182
6183
6184
6185 __le32 rate_retries;
6186 } __packed;
6187
6188 struct wmi_peer_fixed_rate_cmd {
6189
6190 __le32 vdev_id;
6191
6192 struct wmi_mac_addr peer_macaddr;
6193
6194 struct wmi_fixed_rate peer_fixed_rate;
6195 } __packed;
6196
6197 #define WMI_MGMT_TID 17
6198
6199 struct wmi_addba_clear_resp_cmd {
6200
6201 __le32 vdev_id;
6202
6203 struct wmi_mac_addr peer_macaddr;
6204 } __packed;
6205
6206 struct wmi_addba_send_cmd {
6207
6208 __le32 vdev_id;
6209
6210 struct wmi_mac_addr peer_macaddr;
6211
6212 __le32 tid;
6213
6214 __le32 buffersize;
6215 } __packed;
6216
6217 struct wmi_delba_send_cmd {
6218
6219 __le32 vdev_id;
6220
6221 struct wmi_mac_addr peer_macaddr;
6222
6223 __le32 tid;
6224
6225 __le32 initiator;
6226
6227 __le32 reasoncode;
6228 } __packed;
6229
6230 struct wmi_addba_setresponse_cmd {
6231
6232 __le32 vdev_id;
6233
6234 struct wmi_mac_addr peer_macaddr;
6235
6236 __le32 tid;
6237
6238 __le32 statuscode;
6239 } __packed;
6240
6241 struct wmi_send_singleamsdu_cmd {
6242
6243 __le32 vdev_id;
6244
6245 struct wmi_mac_addr peer_macaddr;
6246
6247 __le32 tid;
6248 } __packed;
6249
6250 enum wmi_peer_smps_state {
6251 WMI_PEER_SMPS_PS_NONE = 0x0,
6252 WMI_PEER_SMPS_STATIC = 0x1,
6253 WMI_PEER_SMPS_DYNAMIC = 0x2
6254 };
6255
6256 enum wmi_peer_chwidth {
6257 WMI_PEER_CHWIDTH_20MHZ = 0,
6258 WMI_PEER_CHWIDTH_40MHZ = 1,
6259 WMI_PEER_CHWIDTH_80MHZ = 2,
6260 WMI_PEER_CHWIDTH_160MHZ = 3,
6261 };
6262
6263 enum wmi_peer_param {
6264 WMI_PEER_SMPS_STATE = 0x1,
6265 WMI_PEER_AMPDU = 0x2,
6266 WMI_PEER_AUTHORIZE = 0x3,
6267 WMI_PEER_CHAN_WIDTH = 0x4,
6268 WMI_PEER_NSS = 0x5,
6269 WMI_PEER_USE_4ADDR = 0x6,
6270 WMI_PEER_USE_FIXED_PWR = 0x8,
6271 WMI_PEER_PARAM_FIXED_RATE = 0x9,
6272 WMI_PEER_DEBUG = 0xa,
6273 WMI_PEER_PHYMODE = 0xd,
6274 WMI_PEER_DUMMY_VAR = 0xff,
6275 };
6276
6277 struct wmi_peer_set_param_cmd {
6278 __le32 vdev_id;
6279 struct wmi_mac_addr peer_macaddr;
6280 __le32 param_id;
6281 __le32 param_value;
6282 } __packed;
6283
6284 #define MAX_SUPPORTED_RATES 128
6285
6286 struct wmi_rate_set {
6287
6288 __le32 num_rates;
6289
6290
6291
6292
6293
6294 __le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
6295 } __packed;
6296
6297 struct wmi_rate_set_arg {
6298 unsigned int num_rates;
6299 u8 rates[MAX_SUPPORTED_RATES];
6300 };
6301
6302
6303
6304
6305
6306
6307 struct wmi_vht_rate_set {
6308 __le32 rx_max_rate;
6309 __le32 rx_mcs_set;
6310 __le32 tx_max_rate;
6311 __le32 tx_mcs_set;
6312 } __packed;
6313
6314 struct wmi_vht_rate_set_arg {
6315 u32 rx_max_rate;
6316 u32 rx_mcs_set;
6317 u32 tx_max_rate;
6318 u32 tx_mcs_set;
6319 };
6320
6321 struct wmi_peer_set_rates_cmd {
6322
6323 struct wmi_mac_addr peer_macaddr;
6324
6325 struct wmi_rate_set peer_legacy_rates;
6326
6327 struct wmi_rate_set peer_ht_rates;
6328 } __packed;
6329
6330 struct wmi_peer_set_q_empty_callback_cmd {
6331
6332 __le32 vdev_id;
6333
6334 struct wmi_mac_addr peer_macaddr;
6335 __le32 callback_enable;
6336 } __packed;
6337
6338 struct wmi_peer_flags_map {
6339 u32 auth;
6340 u32 qos;
6341 u32 need_ptk_4_way;
6342 u32 need_gtk_2_way;
6343 u32 apsd;
6344 u32 ht;
6345 u32 bw40;
6346 u32 stbc;
6347 u32 ldbc;
6348 u32 dyn_mimops;
6349 u32 static_mimops;
6350 u32 spatial_mux;
6351 u32 vht;
6352 u32 bw80;
6353 u32 vht_2g;
6354 u32 pmf;
6355 u32 bw160;
6356 };
6357
6358 enum wmi_peer_flags {
6359 WMI_PEER_AUTH = 0x00000001,
6360 WMI_PEER_QOS = 0x00000002,
6361 WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
6362 WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
6363 WMI_PEER_APSD = 0x00000800,
6364 WMI_PEER_HT = 0x00001000,
6365 WMI_PEER_40MHZ = 0x00002000,
6366 WMI_PEER_STBC = 0x00008000,
6367 WMI_PEER_LDPC = 0x00010000,
6368 WMI_PEER_DYN_MIMOPS = 0x00020000,
6369 WMI_PEER_STATIC_MIMOPS = 0x00040000,
6370 WMI_PEER_SPATIAL_MUX = 0x00200000,
6371 WMI_PEER_VHT = 0x02000000,
6372 WMI_PEER_80MHZ = 0x04000000,
6373 WMI_PEER_VHT_2G = 0x08000000,
6374 WMI_PEER_PMF = 0x10000000,
6375 WMI_PEER_160MHZ = 0x20000000
6376 };
6377
6378 enum wmi_10x_peer_flags {
6379 WMI_10X_PEER_AUTH = 0x00000001,
6380 WMI_10X_PEER_QOS = 0x00000002,
6381 WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
6382 WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
6383 WMI_10X_PEER_APSD = 0x00000800,
6384 WMI_10X_PEER_HT = 0x00001000,
6385 WMI_10X_PEER_40MHZ = 0x00002000,
6386 WMI_10X_PEER_STBC = 0x00008000,
6387 WMI_10X_PEER_LDPC = 0x00010000,
6388 WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
6389 WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
6390 WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
6391 WMI_10X_PEER_VHT = 0x02000000,
6392 WMI_10X_PEER_80MHZ = 0x04000000,
6393 WMI_10X_PEER_160MHZ = 0x20000000
6394 };
6395
6396 enum wmi_10_2_peer_flags {
6397 WMI_10_2_PEER_AUTH = 0x00000001,
6398 WMI_10_2_PEER_QOS = 0x00000002,
6399 WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
6400 WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
6401 WMI_10_2_PEER_APSD = 0x00000800,
6402 WMI_10_2_PEER_HT = 0x00001000,
6403 WMI_10_2_PEER_40MHZ = 0x00002000,
6404 WMI_10_2_PEER_STBC = 0x00008000,
6405 WMI_10_2_PEER_LDPC = 0x00010000,
6406 WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
6407 WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
6408 WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
6409 WMI_10_2_PEER_VHT = 0x02000000,
6410 WMI_10_2_PEER_80MHZ = 0x04000000,
6411 WMI_10_2_PEER_VHT_2G = 0x08000000,
6412 WMI_10_2_PEER_PMF = 0x10000000,
6413 WMI_10_2_PEER_160MHZ = 0x20000000
6414 };
6415
6416
6417
6418
6419
6420
6421
6422
6423 #define WMI_RC_DS_FLAG 0x01
6424 #define WMI_RC_CW40_FLAG 0x02
6425 #define WMI_RC_SGI_FLAG 0x04
6426 #define WMI_RC_HT_FLAG 0x08
6427 #define WMI_RC_RTSCTS_FLAG 0x10
6428 #define WMI_RC_TX_STBC_FLAG 0x20
6429 #define WMI_RC_RX_STBC_FLAG 0xC0
6430 #define WMI_RC_RX_STBC_FLAG_S 6
6431 #define WMI_RC_WEP_TKIP_FLAG 0x100
6432 #define WMI_RC_TS_FLAG 0x200
6433 #define WMI_RC_UAPSD_FLAG 0x400
6434
6435
6436 #define ATH10K_MAX_HW_LISTEN_INTERVAL 5
6437
6438 struct wmi_common_peer_assoc_complete_cmd {
6439 struct wmi_mac_addr peer_macaddr;
6440 __le32 vdev_id;
6441 __le32 peer_new_assoc;
6442 __le32 peer_associd;
6443 __le32 peer_flags;
6444 __le32 peer_caps;
6445 __le32 peer_listen_intval;
6446 __le32 peer_ht_caps;
6447 __le32 peer_max_mpdu;
6448 __le32 peer_mpdu_density;
6449 __le32 peer_rate_caps;
6450 struct wmi_rate_set peer_legacy_rates;
6451 struct wmi_rate_set peer_ht_rates;
6452 __le32 peer_nss;
6453 __le32 peer_vht_caps;
6454 __le32 peer_phymode;
6455 struct wmi_vht_rate_set peer_vht_rates;
6456 };
6457
6458 struct wmi_main_peer_assoc_complete_cmd {
6459 struct wmi_common_peer_assoc_complete_cmd cmd;
6460
6461
6462
6463
6464 __le32 peer_ht_info[2];
6465 } __packed;
6466
6467 struct wmi_10_1_peer_assoc_complete_cmd {
6468 struct wmi_common_peer_assoc_complete_cmd cmd;
6469 } __packed;
6470
6471 #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
6472 #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
6473 #define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
6474 #define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
6475
6476 struct wmi_10_2_peer_assoc_complete_cmd {
6477 struct wmi_common_peer_assoc_complete_cmd cmd;
6478 __le32 info0;
6479 } __packed;
6480
6481 #define PEER_BW_RXNSS_OVERRIDE_OFFSET 31
6482
6483 struct wmi_10_4_peer_assoc_complete_cmd {
6484 struct wmi_10_2_peer_assoc_complete_cmd cmd;
6485 __le32 peer_bw_rxnss_override;
6486 } __packed;
6487
6488 struct wmi_peer_assoc_complete_arg {
6489 u8 addr[ETH_ALEN];
6490 u32 vdev_id;
6491 bool peer_reassoc;
6492 u16 peer_aid;
6493 u32 peer_flags;
6494 u16 peer_caps;
6495 u32 peer_listen_intval;
6496 u32 peer_ht_caps;
6497 u32 peer_max_mpdu;
6498 u32 peer_mpdu_density;
6499 u32 peer_rate_caps;
6500 struct wmi_rate_set_arg peer_legacy_rates;
6501 struct wmi_rate_set_arg peer_ht_rates;
6502 u32 peer_num_spatial_streams;
6503 u32 peer_vht_caps;
6504 enum wmi_phy_mode peer_phymode;
6505 struct wmi_vht_rate_set_arg peer_vht_rates;
6506 u32 peer_bw_rxnss_override;
6507 };
6508
6509 struct wmi_peer_add_wds_entry_cmd {
6510
6511 struct wmi_mac_addr peer_macaddr;
6512
6513 struct wmi_mac_addr wds_macaddr;
6514 } __packed;
6515
6516 struct wmi_peer_remove_wds_entry_cmd {
6517
6518 struct wmi_mac_addr wds_macaddr;
6519 } __packed;
6520
6521 struct wmi_peer_q_empty_callback_event {
6522
6523 struct wmi_mac_addr peer_macaddr;
6524 } __packed;
6525
6526
6527
6528
6529 struct wmi_chan_info_event {
6530 __le32 err_code;
6531 __le32 freq;
6532 __le32 cmd_flags;
6533 __le32 noise_floor;
6534 __le32 rx_clear_count;
6535 __le32 cycle_count;
6536 } __packed;
6537
6538 struct wmi_10_4_chan_info_event {
6539 __le32 err_code;
6540 __le32 freq;
6541 __le32 cmd_flags;
6542 __le32 noise_floor;
6543 __le32 rx_clear_count;
6544 __le32 cycle_count;
6545 __le32 chan_tx_pwr_range;
6546 __le32 chan_tx_pwr_tp;
6547 __le32 rx_frame_count;
6548 } __packed;
6549
6550 struct wmi_peer_sta_kickout_event {
6551 struct wmi_mac_addr peer_macaddr;
6552 } __packed;
6553
6554 #define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
6555 #define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
6556
6557
6558 #define BCN_FLT_MAX_SUPPORTED_IES 256
6559 #define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32)
6560
6561 struct bss_bcn_stats {
6562 __le32 vdev_id;
6563 __le32 bss_bcnsdropped;
6564 __le32 bss_bcnsdelivered;
6565 } __packed;
6566
6567 struct bcn_filter_stats {
6568 __le32 bcns_dropped;
6569 __le32 bcns_delivered;
6570 __le32 activefilters;
6571 struct bss_bcn_stats bss_stats;
6572 } __packed;
6573
6574 struct wmi_add_bcn_filter_cmd {
6575 u32 vdev_id;
6576 u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
6577 } __packed;
6578
6579 enum wmi_sta_keepalive_method {
6580 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
6581 WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
6582 };
6583
6584 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
6585
6586
6587 #define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
6588
6589
6590 struct wmi_sta_keepalive_arp_resp {
6591 __be32 src_ip4_addr;
6592 __be32 dest_ip4_addr;
6593 struct wmi_mac_addr dest_mac_addr;
6594 } __packed;
6595
6596 struct wmi_sta_keepalive_cmd {
6597 __le32 vdev_id;
6598 __le32 enabled;
6599 __le32 method;
6600 __le32 interval;
6601 struct wmi_sta_keepalive_arp_resp arp_resp;
6602 } __packed;
6603
6604 struct wmi_sta_keepalive_arg {
6605 u32 vdev_id;
6606 u32 enabled;
6607 u32 method;
6608 u32 interval;
6609 __be32 src_ip4_addr;
6610 __be32 dest_ip4_addr;
6611 const u8 dest_mac_addr[ETH_ALEN];
6612 };
6613
6614 enum wmi_force_fw_hang_type {
6615 WMI_FORCE_FW_HANG_ASSERT = 1,
6616 WMI_FORCE_FW_HANG_NO_DETECT,
6617 WMI_FORCE_FW_HANG_CTRL_EP_FULL,
6618 WMI_FORCE_FW_HANG_EMPTY_POINT,
6619 WMI_FORCE_FW_HANG_STACK_OVERFLOW,
6620 WMI_FORCE_FW_HANG_INFINITE_LOOP,
6621 };
6622
6623 #define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
6624
6625 struct wmi_force_fw_hang_cmd {
6626 __le32 type;
6627 __le32 delay_ms;
6628 } __packed;
6629
6630 enum wmi_pdev_reset_mode_type {
6631 WMI_RST_MODE_TX_FLUSH = 1,
6632 WMI_RST_MODE_WARM_RESET,
6633 WMI_RST_MODE_COLD_RESET,
6634 WMI_RST_MODE_WARM_RESET_RESTORE_CAL,
6635 WMI_RST_MODE_COLD_RESET_RESTORE_CAL,
6636 WMI_RST_MODE_MAX,
6637 };
6638
6639 enum ath10k_dbglog_level {
6640 ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
6641 ATH10K_DBGLOG_LEVEL_INFO = 1,
6642 ATH10K_DBGLOG_LEVEL_WARN = 2,
6643 ATH10K_DBGLOG_LEVEL_ERR = 3,
6644 };
6645
6646
6647 #define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0
6648 #define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff
6649
6650
6651 #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16
6652 #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000
6653
6654
6655 #define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17
6656 #define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000
6657
6658
6659 #define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20
6660 #define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000
6661
6662
6663
6664
6665
6666 #define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28
6667 #define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000
6668
6669
6670
6671
6672
6673 struct wmi_dbglog_cfg_cmd {
6674
6675 __le32 module_enable;
6676
6677
6678 __le32 config_enable;
6679
6680
6681 __le32 module_valid;
6682
6683
6684 __le32 config_valid;
6685 } __packed;
6686
6687 struct wmi_10_4_dbglog_cfg_cmd {
6688
6689 __le64 module_enable;
6690
6691
6692 __le32 config_enable;
6693
6694
6695 __le64 module_valid;
6696
6697
6698 __le32 config_valid;
6699 } __packed;
6700
6701 enum wmi_roam_reason {
6702 WMI_ROAM_REASON_BETTER_AP = 1,
6703 WMI_ROAM_REASON_BEACON_MISS = 2,
6704 WMI_ROAM_REASON_LOW_RSSI = 3,
6705 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
6706 WMI_ROAM_REASON_HO_FAILED = 5,
6707
6708
6709 WMI_ROAM_REASON_MAX,
6710 };
6711
6712 struct wmi_roam_ev {
6713 __le32 vdev_id;
6714 __le32 reason;
6715 } __packed;
6716
6717 #define ATH10K_FRAGMT_THRESHOLD_MIN 540
6718 #define ATH10K_FRAGMT_THRESHOLD_MAX 2346
6719
6720 #define WMI_MAX_EVENT 0x1000
6721
6722 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
6723
6724
6725 #define ATH10K_DEFAULT_ATIM 0
6726
6727 #define WMI_MAX_MEM_REQS 16
6728
6729 struct wmi_scan_ev_arg {
6730 __le32 event_type;
6731 __le32 reason;
6732 __le32 channel_freq;
6733 __le32 scan_req_id;
6734 __le32 scan_id;
6735 __le32 vdev_id;
6736 };
6737
6738 struct mgmt_tx_compl_params {
6739 u32 desc_id;
6740 u32 status;
6741 u32 ppdu_id;
6742 int ack_rssi;
6743 };
6744
6745 struct wmi_tlv_mgmt_tx_compl_ev_arg {
6746 __le32 desc_id;
6747 __le32 status;
6748 __le32 pdev_id;
6749 __le32 ppdu_id;
6750 __le32 ack_rssi;
6751 };
6752
6753 struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg {
6754 __le32 num_reports;
6755 const __le32 *desc_ids;
6756 const __le32 *status;
6757 const __le32 *ppdu_ids;
6758 const __le32 *ack_rssi;
6759 };
6760
6761 struct wmi_peer_delete_resp_ev_arg {
6762 __le32 vdev_id;
6763 struct wmi_mac_addr peer_addr;
6764 };
6765
6766 struct wmi_mgmt_rx_ev_arg {
6767 __le32 channel;
6768 __le32 snr;
6769 __le32 rate;
6770 __le32 phy_mode;
6771 __le32 buf_len;
6772 __le32 status;
6773 struct wmi_mgmt_rx_ext_info ext_info;
6774 };
6775
6776 struct wmi_ch_info_ev_arg {
6777 __le32 err_code;
6778 __le32 freq;
6779 __le32 cmd_flags;
6780 __le32 noise_floor;
6781 __le32 rx_clear_count;
6782 __le32 cycle_count;
6783 __le32 chan_tx_pwr_range;
6784 __le32 chan_tx_pwr_tp;
6785 __le32 rx_frame_count;
6786 __le32 my_bss_rx_cycle_count;
6787 __le32 rx_11b_mode_data_duration;
6788 __le32 tx_frame_cnt;
6789 __le32 mac_clk_mhz;
6790 };
6791
6792
6793 enum wmi_vdev_start_status {
6794 WMI_VDEV_START_OK = 0,
6795 WMI_VDEV_START_CHAN_INVALID,
6796 };
6797
6798 struct wmi_vdev_start_ev_arg {
6799 __le32 vdev_id;
6800 __le32 req_id;
6801 __le32 resp_type;
6802 __le32 status;
6803 };
6804
6805 struct wmi_peer_kick_ev_arg {
6806 const u8 *mac_addr;
6807 };
6808
6809 struct wmi_swba_ev_arg {
6810 __le32 vdev_map;
6811 struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
6812 const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
6813 };
6814
6815 struct wmi_phyerr_ev_arg {
6816 u32 tsf_timestamp;
6817 u16 freq1;
6818 u16 freq2;
6819 u8 rssi_combined;
6820 u8 chan_width_mhz;
6821 u8 phy_err_code;
6822 u16 nf_chains[4];
6823 u32 buf_len;
6824 const u8 *buf;
6825 u8 hdr_len;
6826 };
6827
6828 struct wmi_phyerr_hdr_arg {
6829 u32 num_phyerrs;
6830 u32 tsf_l32;
6831 u32 tsf_u32;
6832 u32 buf_len;
6833 const void *phyerrs;
6834 };
6835
6836 struct wmi_dfs_status_ev_arg {
6837 u32 status;
6838 };
6839
6840 struct wmi_svc_rdy_ev_arg {
6841 __le32 min_tx_power;
6842 __le32 max_tx_power;
6843 __le32 ht_cap;
6844 __le32 vht_cap;
6845 __le32 sw_ver0;
6846 __le32 sw_ver1;
6847 __le32 fw_build;
6848 __le32 phy_capab;
6849 __le32 num_rf_chains;
6850 __le32 eeprom_rd;
6851 __le32 num_mem_reqs;
6852 __le32 low_5ghz_chan;
6853 __le32 high_5ghz_chan;
6854 const __le32 *service_map;
6855 size_t service_map_len;
6856 const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
6857 };
6858
6859 struct wmi_svc_avail_ev_arg {
6860 __le32 service_map_ext_len;
6861 const __le32 *service_map_ext;
6862 };
6863
6864 struct wmi_rdy_ev_arg {
6865 __le32 sw_version;
6866 __le32 abi_version;
6867 __le32 status;
6868 const u8 *mac_addr;
6869 };
6870
6871 struct wmi_roam_ev_arg {
6872 __le32 vdev_id;
6873 __le32 reason;
6874 __le32 rssi;
6875 };
6876
6877 struct wmi_echo_ev_arg {
6878 __le32 value;
6879 };
6880
6881 struct wmi_pdev_temperature_event {
6882
6883 __le32 temperature;
6884 } __packed;
6885
6886 struct wmi_pdev_bss_chan_info_event {
6887 __le32 freq;
6888 __le32 noise_floor;
6889 __le64 cycle_busy;
6890 __le64 cycle_total;
6891 __le64 cycle_tx;
6892 __le64 cycle_rx;
6893 __le64 cycle_rx_bss;
6894 __le32 reserved;
6895 } __packed;
6896
6897
6898 enum wmi_wow_wakeup_event {
6899 WOW_BMISS_EVENT = 0,
6900 WOW_BETTER_AP_EVENT,
6901 WOW_DEAUTH_RECVD_EVENT,
6902 WOW_MAGIC_PKT_RECVD_EVENT,
6903 WOW_GTK_ERR_EVENT,
6904 WOW_FOURWAY_HSHAKE_EVENT,
6905 WOW_EAPOL_RECVD_EVENT,
6906 WOW_NLO_DETECTED_EVENT,
6907 WOW_DISASSOC_RECVD_EVENT,
6908 WOW_PATTERN_MATCH_EVENT,
6909 WOW_CSA_IE_EVENT,
6910 WOW_PROBE_REQ_WPS_IE_EVENT,
6911 WOW_AUTH_REQ_EVENT,
6912 WOW_ASSOC_REQ_EVENT,
6913 WOW_HTT_EVENT,
6914 WOW_RA_MATCH_EVENT,
6915 WOW_HOST_AUTO_SHUTDOWN_EVENT,
6916 WOW_IOAC_MAGIC_EVENT,
6917 WOW_IOAC_SHORT_EVENT,
6918 WOW_IOAC_EXTEND_EVENT,
6919 WOW_IOAC_TIMER_EVENT,
6920 WOW_DFS_PHYERR_RADAR_EVENT,
6921 WOW_BEACON_EVENT,
6922 WOW_CLIENT_KICKOUT_EVENT,
6923 WOW_EVENT_MAX,
6924 };
6925
6926 #define C2S(x) case x: return #x
6927
6928 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6929 {
6930 switch (ev) {
6931 C2S(WOW_BMISS_EVENT);
6932 C2S(WOW_BETTER_AP_EVENT);
6933 C2S(WOW_DEAUTH_RECVD_EVENT);
6934 C2S(WOW_MAGIC_PKT_RECVD_EVENT);
6935 C2S(WOW_GTK_ERR_EVENT);
6936 C2S(WOW_FOURWAY_HSHAKE_EVENT);
6937 C2S(WOW_EAPOL_RECVD_EVENT);
6938 C2S(WOW_NLO_DETECTED_EVENT);
6939 C2S(WOW_DISASSOC_RECVD_EVENT);
6940 C2S(WOW_PATTERN_MATCH_EVENT);
6941 C2S(WOW_CSA_IE_EVENT);
6942 C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
6943 C2S(WOW_AUTH_REQ_EVENT);
6944 C2S(WOW_ASSOC_REQ_EVENT);
6945 C2S(WOW_HTT_EVENT);
6946 C2S(WOW_RA_MATCH_EVENT);
6947 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
6948 C2S(WOW_IOAC_MAGIC_EVENT);
6949 C2S(WOW_IOAC_SHORT_EVENT);
6950 C2S(WOW_IOAC_EXTEND_EVENT);
6951 C2S(WOW_IOAC_TIMER_EVENT);
6952 C2S(WOW_DFS_PHYERR_RADAR_EVENT);
6953 C2S(WOW_BEACON_EVENT);
6954 C2S(WOW_CLIENT_KICKOUT_EVENT);
6955 C2S(WOW_EVENT_MAX);
6956 default:
6957 return NULL;
6958 }
6959 }
6960
6961 enum wmi_wow_wake_reason {
6962 WOW_REASON_UNSPECIFIED = -1,
6963 WOW_REASON_NLOD = 0,
6964 WOW_REASON_AP_ASSOC_LOST,
6965 WOW_REASON_LOW_RSSI,
6966 WOW_REASON_DEAUTH_RECVD,
6967 WOW_REASON_DISASSOC_RECVD,
6968 WOW_REASON_GTK_HS_ERR,
6969 WOW_REASON_EAP_REQ,
6970 WOW_REASON_FOURWAY_HS_RECV,
6971 WOW_REASON_TIMER_INTR_RECV,
6972 WOW_REASON_PATTERN_MATCH_FOUND,
6973 WOW_REASON_RECV_MAGIC_PATTERN,
6974 WOW_REASON_P2P_DISC,
6975 WOW_REASON_WLAN_HB,
6976 WOW_REASON_CSA_EVENT,
6977 WOW_REASON_PROBE_REQ_WPS_IE_RECV,
6978 WOW_REASON_AUTH_REQ_RECV,
6979 WOW_REASON_ASSOC_REQ_RECV,
6980 WOW_REASON_HTT_EVENT,
6981 WOW_REASON_RA_MATCH,
6982 WOW_REASON_HOST_AUTO_SHUTDOWN,
6983 WOW_REASON_IOAC_MAGIC_EVENT,
6984 WOW_REASON_IOAC_SHORT_EVENT,
6985 WOW_REASON_IOAC_EXTEND_EVENT,
6986 WOW_REASON_IOAC_TIMER_EVENT,
6987 WOW_REASON_ROAM_HO,
6988 WOW_REASON_DFS_PHYERR_RADADR_EVENT,
6989 WOW_REASON_BEACON_RECV,
6990 WOW_REASON_CLIENT_KICKOUT_EVENT,
6991 WOW_REASON_DEBUG_TEST = 0xFF,
6992 };
6993
6994 static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
6995 {
6996 switch (reason) {
6997 C2S(WOW_REASON_UNSPECIFIED);
6998 C2S(WOW_REASON_NLOD);
6999 C2S(WOW_REASON_AP_ASSOC_LOST);
7000 C2S(WOW_REASON_LOW_RSSI);
7001 C2S(WOW_REASON_DEAUTH_RECVD);
7002 C2S(WOW_REASON_DISASSOC_RECVD);
7003 C2S(WOW_REASON_GTK_HS_ERR);
7004 C2S(WOW_REASON_EAP_REQ);
7005 C2S(WOW_REASON_FOURWAY_HS_RECV);
7006 C2S(WOW_REASON_TIMER_INTR_RECV);
7007 C2S(WOW_REASON_PATTERN_MATCH_FOUND);
7008 C2S(WOW_REASON_RECV_MAGIC_PATTERN);
7009 C2S(WOW_REASON_P2P_DISC);
7010 C2S(WOW_REASON_WLAN_HB);
7011 C2S(WOW_REASON_CSA_EVENT);
7012 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
7013 C2S(WOW_REASON_AUTH_REQ_RECV);
7014 C2S(WOW_REASON_ASSOC_REQ_RECV);
7015 C2S(WOW_REASON_HTT_EVENT);
7016 C2S(WOW_REASON_RA_MATCH);
7017 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
7018 C2S(WOW_REASON_IOAC_MAGIC_EVENT);
7019 C2S(WOW_REASON_IOAC_SHORT_EVENT);
7020 C2S(WOW_REASON_IOAC_EXTEND_EVENT);
7021 C2S(WOW_REASON_IOAC_TIMER_EVENT);
7022 C2S(WOW_REASON_ROAM_HO);
7023 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
7024 C2S(WOW_REASON_BEACON_RECV);
7025 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
7026 C2S(WOW_REASON_DEBUG_TEST);
7027 default:
7028 return NULL;
7029 }
7030 }
7031
7032 #undef C2S
7033
7034 struct wmi_wow_ev_arg {
7035 u32 vdev_id;
7036 u32 flag;
7037 enum wmi_wow_wake_reason wake_reason;
7038 u32 data_len;
7039 };
7040
7041 #define WOW_MIN_PATTERN_SIZE 1
7042 #define WOW_MAX_PATTERN_SIZE 148
7043 #define WOW_MAX_PKT_OFFSET 128
7044 #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \
7045 sizeof(struct rfc1042_hdr))
7046 #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \
7047 offsetof(struct ieee80211_hdr_3addr, addr1))
7048
7049 enum wmi_tdls_state {
7050 WMI_TDLS_DISABLE,
7051 WMI_TDLS_ENABLE_PASSIVE,
7052 WMI_TDLS_ENABLE_ACTIVE,
7053 WMI_TDLS_ENABLE_ACTIVE_EXTERNAL_CONTROL,
7054 };
7055
7056 enum wmi_tdls_peer_state {
7057 WMI_TDLS_PEER_STATE_PEERING,
7058 WMI_TDLS_PEER_STATE_CONNECTED,
7059 WMI_TDLS_PEER_STATE_TEARDOWN,
7060 };
7061
7062 struct wmi_tdls_peer_update_cmd_arg {
7063 u32 vdev_id;
7064 enum wmi_tdls_peer_state peer_state;
7065 u8 addr[ETH_ALEN];
7066 };
7067
7068 #define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
7069
7070 #define WMI_TDLS_PEER_SP_MASK 0x60
7071 #define WMI_TDLS_PEER_SP_LSB 5
7072
7073 enum wmi_tdls_options {
7074 WMI_TDLS_OFFCHAN_EN = BIT(0),
7075 WMI_TDLS_BUFFER_STA_EN = BIT(1),
7076 WMI_TDLS_SLEEP_STA_EN = BIT(2),
7077 };
7078
7079 enum {
7080 WMI_TDLS_PEER_QOS_AC_VO = BIT(0),
7081 WMI_TDLS_PEER_QOS_AC_VI = BIT(1),
7082 WMI_TDLS_PEER_QOS_AC_BK = BIT(2),
7083 WMI_TDLS_PEER_QOS_AC_BE = BIT(3),
7084 };
7085
7086 struct wmi_tdls_peer_capab_arg {
7087 u8 peer_uapsd_queues;
7088 u8 peer_max_sp;
7089 u32 buff_sta_support;
7090 u32 off_chan_support;
7091 u32 peer_curr_operclass;
7092 u32 self_curr_operclass;
7093 u32 peer_chan_len;
7094 u32 peer_operclass_len;
7095 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7096 u32 is_peer_responder;
7097 u32 pref_offchan_num;
7098 u32 pref_offchan_bw;
7099 };
7100
7101 struct wmi_10_4_tdls_set_state_cmd {
7102 __le32 vdev_id;
7103 __le32 state;
7104 __le32 notification_interval_ms;
7105 __le32 tx_discovery_threshold;
7106 __le32 tx_teardown_threshold;
7107 __le32 rssi_teardown_threshold;
7108 __le32 rssi_delta;
7109 __le32 tdls_options;
7110 __le32 tdls_peer_traffic_ind_window;
7111 __le32 tdls_peer_traffic_response_timeout_ms;
7112 __le32 tdls_puapsd_mask;
7113 __le32 tdls_puapsd_inactivity_time_ms;
7114 __le32 tdls_puapsd_rx_frame_threshold;
7115 __le32 teardown_notification_ms;
7116 __le32 tdls_peer_kickout_threshold;
7117 } __packed;
7118
7119 struct wmi_tdls_peer_capabilities {
7120 __le32 peer_qos;
7121 __le32 buff_sta_support;
7122 __le32 off_chan_support;
7123 __le32 peer_curr_operclass;
7124 __le32 self_curr_operclass;
7125 __le32 peer_chan_len;
7126 __le32 peer_operclass_len;
7127 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7128 __le32 is_peer_responder;
7129 __le32 pref_offchan_num;
7130 __le32 pref_offchan_bw;
7131 struct wmi_channel peer_chan_list[1];
7132 } __packed;
7133
7134 struct wmi_10_4_tdls_peer_update_cmd {
7135 __le32 vdev_id;
7136 struct wmi_mac_addr peer_macaddr;
7137 __le32 peer_state;
7138 __le32 reserved[4];
7139 struct wmi_tdls_peer_capabilities peer_capab;
7140 } __packed;
7141
7142 enum wmi_tdls_peer_reason {
7143 WMI_TDLS_TEARDOWN_REASON_TX,
7144 WMI_TDLS_TEARDOWN_REASON_RSSI,
7145 WMI_TDLS_TEARDOWN_REASON_SCAN,
7146 WMI_TDLS_DISCONNECTED_REASON_PEER_DELETE,
7147 WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT,
7148 WMI_TDLS_TEARDOWN_REASON_BAD_PTR,
7149 WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE,
7150 WMI_TDLS_ENTER_BUF_STA,
7151 WMI_TDLS_EXIT_BUF_STA,
7152 WMI_TDLS_ENTER_BT_BUSY_MODE,
7153 WMI_TDLS_EXIT_BT_BUSY_MODE,
7154 WMI_TDLS_SCAN_STARTED_EVENT,
7155 WMI_TDLS_SCAN_COMPLETED_EVENT,
7156 };
7157
7158 enum wmi_tdls_peer_notification {
7159 WMI_TDLS_SHOULD_DISCOVER,
7160 WMI_TDLS_SHOULD_TEARDOWN,
7161 WMI_TDLS_PEER_DISCONNECTED,
7162 WMI_TDLS_CONNECTION_TRACKER_NOTIFICATION,
7163 };
7164
7165 struct wmi_tdls_peer_event {
7166 struct wmi_mac_addr peer_macaddr;
7167
7168 __le32 peer_status;
7169
7170 __le32 peer_reason;
7171 __le32 vdev_id;
7172 } __packed;
7173
7174 enum wmi_txbf_conf {
7175 WMI_TXBF_CONF_UNSUPPORTED,
7176 WMI_TXBF_CONF_BEFORE_ASSOC,
7177 WMI_TXBF_CONF_AFTER_ASSOC,
7178 };
7179
7180 #define WMI_CCA_DETECT_LEVEL_AUTO 0
7181 #define WMI_CCA_DETECT_MARGIN_AUTO 0
7182
7183 struct wmi_pdev_set_adaptive_cca_params {
7184 __le32 enable;
7185 __le32 cca_detect_level;
7186 __le32 cca_detect_margin;
7187 } __packed;
7188
7189 #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2
7190 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200
7191 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
7192 #define WMI_PNO_MAX_NETW_CHANNELS 26
7193 #define WMI_PNO_MAX_NETW_CHANNELS_EX 60
7194 #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID
7195 #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN
7196
7197
7198 #define WMI_PNO_MAX_PB_REQ_SIZE 450
7199
7200 #define WMI_PNO_24G_DEFAULT_CH 1
7201 #define WMI_PNO_5G_DEFAULT_CH 36
7202
7203 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40
7204 #define WMI_PASSIVE_MAX_CHANNEL_TIME 110
7205
7206
7207 enum wmi_SSID_bcast_type {
7208 BCAST_UNKNOWN = 0,
7209 BCAST_NORMAL = 1,
7210 BCAST_HIDDEN = 2,
7211 };
7212
7213 struct wmi_network_type {
7214 struct wmi_ssid ssid;
7215 u32 authentication;
7216 u32 encryption;
7217 u32 bcast_nw_type;
7218 u8 channel_count;
7219 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
7220 s32 rssi_threshold;
7221 } __packed;
7222
7223 struct wmi_pno_scan_req {
7224 u8 enable;
7225 u8 vdev_id;
7226 u8 uc_networks_count;
7227 struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
7228 u32 fast_scan_period;
7229 u32 slow_scan_period;
7230 u8 fast_scan_max_cycles;
7231
7232 bool do_passive_scan;
7233
7234 u32 delay_start_time;
7235 u32 active_min_time;
7236 u32 active_max_time;
7237 u32 passive_min_time;
7238 u32 passive_max_time;
7239
7240
7241 u32 enable_pno_scan_randomization;
7242 u8 mac_addr[ETH_ALEN];
7243 u8 mac_addr_mask[ETH_ALEN];
7244 } __packed;
7245
7246 enum wmi_host_platform_type {
7247 WMI_HOST_PLATFORM_HIGH_PERF,
7248 WMI_HOST_PLATFORM_LOW_PERF,
7249 };
7250
7251 enum wmi_bss_survey_req_type {
7252 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
7253 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
7254 };
7255
7256 struct wmi_pdev_chan_info_req_cmd {
7257 __le32 type;
7258 __le32 reserved;
7259 } __packed;
7260
7261
7262 struct wmi_bb_timing_cfg_arg {
7263
7264 u32 bb_tx_timing;
7265
7266
7267 u32 bb_xpa_timing;
7268 };
7269
7270 struct wmi_pdev_bb_timing_cfg_cmd {
7271
7272 __le32 bb_tx_timing;
7273
7274
7275 __le32 bb_xpa_timing;
7276 } __packed;
7277
7278 struct ath10k;
7279 struct ath10k_vif;
7280 struct ath10k_fw_stats_pdev;
7281 struct ath10k_fw_stats_peer;
7282 struct ath10k_fw_stats;
7283
7284 int ath10k_wmi_attach(struct ath10k *ar);
7285 void ath10k_wmi_detach(struct ath10k *ar);
7286 void ath10k_wmi_free_host_mem(struct ath10k *ar);
7287 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
7288 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
7289
7290 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
7291 int ath10k_wmi_connect(struct ath10k *ar);
7292
7293 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
7294 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
7295 int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
7296 u32 cmd_id);
7297 void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *arg);
7298
7299 void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
7300 struct ath10k_fw_stats_pdev *dst);
7301 void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
7302 struct ath10k_fw_stats_pdev *dst);
7303 void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
7304 struct ath10k_fw_stats_pdev *dst);
7305 void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
7306 struct ath10k_fw_stats_pdev *dst);
7307 void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
7308 struct ath10k_fw_stats_peer *dst);
7309 void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
7310 struct wmi_host_mem_chunks *chunks);
7311 void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
7312 const struct wmi_start_scan_arg *arg);
7313 void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
7314 const struct wmi_wmm_params_arg *arg);
7315 void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
7316 const struct wmi_channel_arg *arg);
7317 int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
7318
7319 int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
7320 int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
7321 int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb);
7322 int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb);
7323 void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
7324 void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
7325 int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
7326 void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
7327 void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
7328 void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
7329 void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
7330 void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
7331 void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
7332 void ath10k_wmi_event_dfs(struct ath10k *ar,
7333 struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
7334 void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
7335 struct wmi_phyerr_ev_arg *phyerr,
7336 u64 tsf);
7337 void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
7338 void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
7339 void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
7340 void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
7341 void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
7342 void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
7343 void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
7344 struct sk_buff *skb);
7345 void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
7346 struct sk_buff *skb);
7347 void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
7348 void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
7349 void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
7350 void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
7351 void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
7352 void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
7353 struct sk_buff *skb);
7354 void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
7355 void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
7356 void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
7357 void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
7358 struct sk_buff *skb);
7359 void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
7360 void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
7361 void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
7362 void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
7363 int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
7364 void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb);
7365 int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
7366 int left_len, struct wmi_phyerr_ev_arg *arg);
7367 void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7368 struct ath10k_fw_stats *fw_stats,
7369 char *buf);
7370 void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7371 struct ath10k_fw_stats *fw_stats,
7372 char *buf);
7373 size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
7374 size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
7375 void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
7376 struct ath10k_fw_stats *fw_stats,
7377 char *buf);
7378 int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
7379 enum wmi_vdev_subtype subtype);
7380 int ath10k_wmi_barrier(struct ath10k *ar);
7381 void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
7382 u32 num_tx_chain);
7383 void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb);
7384
7385 #endif