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5 #ifndef _ATH10K_QMI_H_
6 #define _ATH10K_QMI_H_
7
8 #include <linux/soc/qcom/qmi.h>
9 #include <linux/qrtr.h>
10 #include "qmi_wlfw_v01.h"
11
12 #define MAX_NUM_MEMORY_REGIONS 2
13 #define MAX_TIMESTAMP_LEN 32
14 #define MAX_BUILD_ID_LEN 128
15 #define MAX_NUM_CAL_V01 5
16
17 enum ath10k_qmi_driver_event_type {
18 ATH10K_QMI_EVENT_SERVER_ARRIVE,
19 ATH10K_QMI_EVENT_SERVER_EXIT,
20 ATH10K_QMI_EVENT_FW_READY_IND,
21 ATH10K_QMI_EVENT_FW_DOWN_IND,
22 ATH10K_QMI_EVENT_MSA_READY_IND,
23 ATH10K_QMI_EVENT_MAX,
24 };
25
26 struct ath10k_msa_mem_info {
27 phys_addr_t addr;
28 u32 size;
29 bool secure;
30 };
31
32 struct ath10k_qmi_chip_info {
33 u32 chip_id;
34 u32 chip_family;
35 };
36
37 struct ath10k_qmi_board_info {
38 u32 board_id;
39 };
40
41 struct ath10k_qmi_soc_info {
42 u32 soc_id;
43 };
44
45 struct ath10k_qmi_cal_data {
46 u32 cal_id;
47 u32 total_size;
48 u8 *data;
49 };
50
51 struct ath10k_tgt_pipe_cfg {
52 __le32 pipe_num;
53 __le32 pipe_dir;
54 __le32 nentries;
55 __le32 nbytes_max;
56 __le32 flags;
57 __le32 reserved;
58 };
59
60 struct ath10k_svc_pipe_cfg {
61 __le32 service_id;
62 __le32 pipe_dir;
63 __le32 pipe_num;
64 };
65
66 struct ath10k_shadow_reg_cfg {
67 __le16 ce_id;
68 __le16 reg_offset;
69 };
70
71 struct ath10k_qmi_wlan_enable_cfg {
72 u32 num_ce_tgt_cfg;
73 struct ath10k_tgt_pipe_cfg *ce_tgt_cfg;
74 u32 num_ce_svc_pipe_cfg;
75 struct ath10k_svc_pipe_cfg *ce_svc_cfg;
76 u32 num_shadow_reg_cfg;
77 struct ath10k_shadow_reg_cfg *shadow_reg_cfg;
78 };
79
80 struct ath10k_qmi_driver_event {
81 struct list_head list;
82 enum ath10k_qmi_driver_event_type type;
83 void *data;
84 };
85
86 struct ath10k_qmi {
87 struct ath10k *ar;
88 struct qmi_handle qmi_hdl;
89 struct sockaddr_qrtr sq;
90 struct work_struct event_work;
91 struct workqueue_struct *event_wq;
92 struct list_head event_list;
93 spinlock_t event_lock;
94 u32 nr_mem_region;
95 struct ath10k_msa_mem_info mem_region[MAX_NUM_MEMORY_REGIONS];
96 dma_addr_t msa_pa;
97 u32 msa_mem_size;
98 void *msa_va;
99 struct ath10k_qmi_chip_info chip_info;
100 struct ath10k_qmi_board_info board_info;
101 struct ath10k_qmi_soc_info soc_info;
102 char fw_build_id[MAX_BUILD_ID_LEN + 1];
103 u32 fw_version;
104 bool fw_ready;
105 char fw_build_timestamp[MAX_TIMESTAMP_LEN + 1];
106 struct ath10k_qmi_cal_data cal_data[MAX_NUM_CAL_V01];
107 };
108
109 int ath10k_qmi_wlan_enable(struct ath10k *ar,
110 struct ath10k_qmi_wlan_enable_cfg *config,
111 enum wlfw_driver_mode_enum_v01 mode,
112 const char *version);
113 int ath10k_qmi_wlan_disable(struct ath10k *ar);
114 int ath10k_qmi_register_service_notifier(struct notifier_block *nb);
115 int ath10k_qmi_init(struct ath10k *ar, u32 msa_size);
116 int ath10k_qmi_deinit(struct ath10k *ar);
117 int ath10k_qmi_set_fw_log_mode(struct ath10k *ar, u8 fw_log_mode);
118
119 #endif