drivers/net/wireless/intel/iwlegacy/common.h

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This source file includes following definitions.
il_queue_used
il_get_cmd_idx
il_txq_ctx_activate
il_txq_ctx_deactivate
il_is_associated
il_is_any_associated
il_is_channel_valid
il_is_channel_radar
il_is_channel_a_band
il_is_channel_passive
il_is_channel_ibss
__il_free_pages
il_free_pages
il_update_stats
il_print_rx_config_cmd
il_is_ready
il_is_alive
il_is_init
il_is_rfkill
il_is_ctkill
il_is_ready_rf
il_send_rxon_assoc
il_commit_rxon
il_get_hw_mode
il_need_reclaim
_il_write8
_il_wr
_il_rd
_il_clear_bit
_il_set_bit
_il_release_nic_access
il_rd
il_wr
_il_rd_prph
_il_wr_prph
il_set_bits_prph
il_set_bits_mask_prph
il_clear_bits_prph
il_clear_driver_stations
il_sta_id
il_sta_id_or_broadcast
il_queue_inc_wrap
il_queue_dec_wrap
il_free_fw_desc
il_alloc_fw_desc
il_set_swq_id
_il_wake_queue
_il_stop_queue
il_wake_queue
il_stop_queue
il_wake_queues_by_reason
il_stop_queues_by_reason
il_disable_interrupts
il_enable_rfkill_int
il_enable_interrupts
il_beacon_time_mask_low
il_beacon_time_mask_high
il_get_dma_hi_addr
il4965_num_of_ant
il4965_first_antenna
il_get_debug_level
il_get_debug_level
il_print_hex_dump
il_dbgfs_register
il_dbgfs_unregister
   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   5  *
   6  * Contact Information:
   7  *  Intel Linux Wireless <ilw@linux.intel.com>
   8  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
   9  *
  10  *****************************************************************************/
  11 #ifndef __il_core_h__
  12 #define __il_core_h__
  13 
  14 #include <linux/interrupt.h>
  15 #include <linux/pci.h>          /* for struct pci_device_id */
  16 #include <linux/kernel.h>
  17 #include <linux/leds.h>
  18 #include <linux/wait.h>
  19 #include <linux/io.h>
  20 #include <net/mac80211.h>
  21 #include <net/ieee80211_radiotap.h>
  22 
  23 #include "commands.h"
  24 #include "csr.h"
  25 #include "prph.h"
  26 
  27 struct il_host_cmd;
  28 struct il_cmd;
  29 struct il_tx_queue;
  30 
  31 #define IL_ERR(f, a...) dev_err(&il->pci_dev->dev, f, ## a)
  32 #define IL_WARN(f, a...) dev_warn(&il->pci_dev->dev, f, ## a)
  33 #define IL_WARN_ONCE(f, a...) dev_warn_once(&il->pci_dev->dev, f, ## a)
  34 #define IL_INFO(f, a...) dev_info(&il->pci_dev->dev, f, ## a)
  35 
  36 #define RX_QUEUE_SIZE                         256
  37 #define RX_QUEUE_MASK                         255
  38 #define RX_QUEUE_SIZE_LOG                     8
  39 
  40 /*
  41  * RX related structures and functions
  42  */
  43 #define RX_FREE_BUFFERS 64
  44 #define RX_LOW_WATERMARK 8
  45 
  46 #define U32_PAD(n)              ((4-(n))&0x3)
  47 
  48 /* CT-KILL constants */
  49 #define CT_KILL_THRESHOLD_LEGACY   110  /* in Celsius */
  50 
  51 /* Default noise level to report when noise measurement is not available.
  52  *   This may be because we're:
  53  *   1)  Not associated (4965, no beacon stats being sent to driver)
  54  *   2)  Scanning (noise measurement does not apply to associated channel)
  55  *   3)  Receiving CCK (3945 delivers noise info only for OFDM frames)
  56  * Use default noise value of -127 ... this is below the range of measurable
  57  *   Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
  58  *   Also, -127 works better than 0 when averaging frames with/without
  59  *   noise info (e.g. averaging might be done in app); measured dBm values are
  60  *   always negative ... using a negative value as the default keeps all
  61  *   averages within an s8's (used in some apps) range of negative values. */
  62 #define IL_NOISE_MEAS_NOT_AVAILABLE (-127)
  63 
  64 /*
  65  * RTS threshold here is total size [2347] minus 4 FCS bytes
  66  * Per spec:
  67  *   a value of 0 means RTS on all data/management packets
  68  *   a value > max MSDU size means no RTS
  69  * else RTS for data/management frames where MPDU is larger
  70  *   than RTS value.
  71  */
  72 #define DEFAULT_RTS_THRESHOLD     2347U
  73 #define MIN_RTS_THRESHOLD         0U
  74 #define MAX_RTS_THRESHOLD         2347U
  75 #define MAX_MSDU_SIZE             2304U
  76 #define MAX_MPDU_SIZE             2346U
  77 #define DEFAULT_BEACON_INTERVAL   100U
  78 #define DEFAULT_SHORT_RETRY_LIMIT 7U
  79 #define DEFAULT_LONG_RETRY_LIMIT  4U
  80 
  81 struct il_rx_buf {
  82         dma_addr_t page_dma;
  83         struct page *page;
  84         struct list_head list;
  85 };
  86 
  87 #define rxb_addr(r) page_address(r->page)
  88 
  89 /* defined below */
  90 struct il_device_cmd;
  91 
  92 struct il_cmd_meta {
  93         /* only for SYNC commands, iff the reply skb is wanted */
  94         struct il_host_cmd *source;
  95         /*
  96          * only for ASYNC commands
  97          * (which is somewhat stupid -- look at common.c for instance
  98          * which duplicates a bunch of code because the callback isn't
  99          * invoked for SYNC commands, if it were and its result passed
 100          * through it would be simpler...)
 101          */
 102         void (*callback) (struct il_priv *il, struct il_device_cmd *cmd,
 103                           struct il_rx_pkt *pkt);
 104 
 105         /* The CMD_SIZE_HUGE flag bit indicates that the command
 106          * structure is stored at the end of the shared queue memory. */
 107         u32 flags;
 108 
 109          DEFINE_DMA_UNMAP_ADDR(mapping);
 110          DEFINE_DMA_UNMAP_LEN(len);
 111 };
 112 
 113 /*
 114  * Generic queue structure
 115  *
 116  * Contains common data for Rx and Tx queues
 117  */
 118 struct il_queue {
 119         int n_bd;               /* number of BDs in this queue */
 120         int write_ptr;          /* 1-st empty entry (idx) host_w */
 121         int read_ptr;           /* last used entry (idx) host_r */
 122         /* use for monitoring and recovering the stuck queue */
 123         dma_addr_t dma_addr;    /* physical addr for BD's */
 124         int n_win;              /* safe queue win */
 125         u32 id;
 126         int low_mark;           /* low watermark, resume queue if free
 127                                  * space more than this */
 128         int high_mark;          /* high watermark, stop queue if free
 129                                  * space less than this */
 130 };
 131 
 132 /**
 133  * struct il_tx_queue - Tx Queue for DMA
 134  * @q: generic Rx/Tx queue descriptor
 135  * @bd: base of circular buffer of TFDs
 136  * @cmd: array of command/TX buffer pointers
 137  * @meta: array of meta data for each command/tx buffer
 138  * @dma_addr_cmd: physical address of cmd/tx buffer array
 139  * @skbs: array of per-TFD socket buffer pointers
 140  * @time_stamp: time (in jiffies) of last read_ptr change
 141  * @need_update: indicates need to update read/write idx
 142  * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
 143  *
 144  * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
 145  * descriptors) and required locking structures.
 146  */
 147 #define TFD_TX_CMD_SLOTS 256
 148 #define TFD_CMD_SLOTS 32
 149 
 150 struct il_tx_queue {
 151         struct il_queue q;
 152         void *tfds;
 153         struct il_device_cmd **cmd;
 154         struct il_cmd_meta *meta;
 155         struct sk_buff **skbs;
 156         unsigned long time_stamp;
 157         u8 need_update;
 158         u8 sched_retry;
 159         u8 active;
 160         u8 swq_id;
 161 };
 162 
 163 /*
 164  * EEPROM access time values:
 165  *
 166  * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG.
 167  * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1).
 168  * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
 169  * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
 170  */
 171 #define IL_EEPROM_ACCESS_TIMEOUT        5000    /* uSec */
 172 
 173 #define IL_EEPROM_SEM_TIMEOUT           10      /* microseconds */
 174 #define IL_EEPROM_SEM_RETRY_LIMIT       1000    /* number of attempts (not time) */
 175 
 176 /*
 177  * Regulatory channel usage flags in EEPROM struct il4965_eeprom_channel.flags.
 178  *
 179  * IBSS and/or AP operation is allowed *only* on those channels with
 180  * (VALID && IBSS && ACTIVE && !RADAR).  This restriction is in place because
 181  * RADAR detection is not supported by the 4965 driver, but is a
 182  * requirement for establishing a new network for legal operation on channels
 183  * requiring RADAR detection or restricting ACTIVE scanning.
 184  *
 185  * NOTE:  "WIDE" flag does not indicate anything about "HT40" 40 MHz channels.
 186  *        It only indicates that 20 MHz channel use is supported; HT40 channel
 187  *        usage is indicated by a separate set of regulatory flags for each
 188  *        HT40 channel pair.
 189  *
 190  * NOTE:  Using a channel inappropriately will result in a uCode error!
 191  */
 192 #define IL_NUM_TX_CALIB_GROUPS 5
 193 enum {
 194         EEPROM_CHANNEL_VALID = (1 << 0),        /* usable for this SKU/geo */
 195         EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
 196         /* Bit 2 Reserved */
 197         EEPROM_CHANNEL_ACTIVE = (1 << 3),       /* active scanning allowed */
 198         EEPROM_CHANNEL_RADAR = (1 << 4),        /* radar detection required */
 199         EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */
 200         /* Bit 6 Reserved (was Narrow Channel) */
 201         EEPROM_CHANNEL_DFS = (1 << 7),  /* dynamic freq selection candidate */
 202 };
 203 
 204 /* SKU Capabilities */
 205 /* 3945 only */
 206 #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE                (1 << 0)
 207 #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE                (1 << 1)
 208 
 209 /* *regulatory* channel data format in eeprom, one for each channel.
 210  * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */
 211 struct il_eeprom_channel {
 212         u8 flags;               /* EEPROM_CHANNEL_* flags copied from EEPROM */
 213         s8 max_power_avg;       /* max power (dBm) on this chnl, limit 31 */
 214 } __packed;
 215 
 216 /* 3945 Specific */
 217 #define EEPROM_3945_EEPROM_VERSION      (0x2f)
 218 
 219 /* 4965 has two radio transmitters (and 3 radio receivers) */
 220 #define EEPROM_TX_POWER_TX_CHAINS      (2)
 221 
 222 /* 4965 has room for up to 8 sets of txpower calibration data */
 223 #define EEPROM_TX_POWER_BANDS          (8)
 224 
 225 /* 4965 factory calibration measures txpower gain settings for
 226  * each of 3 target output levels */
 227 #define EEPROM_TX_POWER_MEASUREMENTS   (3)
 228 
 229 /* 4965 Specific */
 230 /* 4965 driver does not work with txpower calibration version < 5 */
 231 #define EEPROM_4965_TX_POWER_VERSION    (5)
 232 #define EEPROM_4965_EEPROM_VERSION      (0x2f)
 233 #define EEPROM_4965_CALIB_VERSION_OFFSET       (2*0xB6) /* 2 bytes */
 234 #define EEPROM_4965_CALIB_TXPOWER_OFFSET       (2*0xE8) /* 48  bytes */
 235 #define EEPROM_4965_BOARD_REVISION             (2*0x4F) /* 2 bytes */
 236 #define EEPROM_4965_BOARD_PBA                  (2*0x56+1)       /* 9 bytes */
 237 
 238 /* 2.4 GHz */
 239 extern const u8 il_eeprom_band_1[14];
 240 
 241 /*
 242  * factory calibration data for one txpower level, on one channel,
 243  * measured on one of the 2 tx chains (radio transmitter and associated
 244  * antenna).  EEPROM contains:
 245  *
 246  * 1)  Temperature (degrees Celsius) of device when measurement was made.
 247  *
 248  * 2)  Gain table idx used to achieve the target measurement power.
 249  *     This refers to the "well-known" gain tables (see 4965.h).
 250  *
 251  * 3)  Actual measured output power, in half-dBm ("34" = 17 dBm).
 252  *
 253  * 4)  RF power amplifier detector level measurement (not used).
 254  */
 255 struct il_eeprom_calib_measure {
 256         u8 temperature;         /* Device temperature (Celsius) */
 257         u8 gain_idx;            /* Index into gain table */
 258         u8 actual_pow;          /* Measured RF output power, half-dBm */
 259         s8 pa_det;              /* Power amp detector level (not used) */
 260 } __packed;
 261 
 262 /*
 263  * measurement set for one channel.  EEPROM contains:
 264  *
 265  * 1)  Channel number measured
 266  *
 267  * 2)  Measurements for each of 3 power levels for each of 2 radio transmitters
 268  *     (a.k.a. "tx chains") (6 measurements altogether)
 269  */
 270 struct il_eeprom_calib_ch_info {
 271         u8 ch_num;
 272         struct il_eeprom_calib_measure
 273             measurements[EEPROM_TX_POWER_TX_CHAINS]
 274             [EEPROM_TX_POWER_MEASUREMENTS];
 275 } __packed;
 276 
 277 /*
 278  * txpower subband info.
 279  *
 280  * For each frequency subband, EEPROM contains the following:
 281  *
 282  * 1)  First and last channels within range of the subband.  "0" values
 283  *     indicate that this sample set is not being used.
 284  *
 285  * 2)  Sample measurement sets for 2 channels close to the range endpoints.
 286  */
 287 struct il_eeprom_calib_subband_info {
 288         u8 ch_from;             /* channel number of lowest channel in subband */
 289         u8 ch_to;               /* channel number of highest channel in subband */
 290         struct il_eeprom_calib_ch_info ch1;
 291         struct il_eeprom_calib_ch_info ch2;
 292 } __packed;
 293 
 294 /*
 295  * txpower calibration info.  EEPROM contains:
 296  *
 297  * 1)  Factory-measured saturation power levels (maximum levels at which
 298  *     tx power amplifier can output a signal without too much distortion).
 299  *     There is one level for 2.4 GHz band and one for 5 GHz band.  These
 300  *     values apply to all channels within each of the bands.
 301  *
 302  * 2)  Factory-measured power supply voltage level.  This is assumed to be
 303  *     constant (i.e. same value applies to all channels/bands) while the
 304  *     factory measurements are being made.
 305  *
 306  * 3)  Up to 8 sets of factory-measured txpower calibration values.
 307  *     These are for different frequency ranges, since txpower gain
 308  *     characteristics of the analog radio circuitry vary with frequency.
 309  *
 310  *     Not all sets need to be filled with data;
 311  *     struct il_eeprom_calib_subband_info contains range of channels
 312  *     (0 if unused) for each set of data.
 313  */
 314 struct il_eeprom_calib_info {
 315         u8 saturation_power24;  /* half-dBm (e.g. "34" = 17 dBm) */
 316         u8 saturation_power52;  /* half-dBm */
 317         __le16 voltage;         /* signed */
 318         struct il_eeprom_calib_subband_info band_info[EEPROM_TX_POWER_BANDS];
 319 } __packed;
 320 
 321 /* General */
 322 #define EEPROM_DEVICE_ID                    (2*0x08)    /* 2 bytes */
 323 #define EEPROM_MAC_ADDRESS                  (2*0x15)    /* 6  bytes */
 324 #define EEPROM_BOARD_REVISION               (2*0x35)    /* 2  bytes */
 325 #define EEPROM_BOARD_PBA_NUMBER             (2*0x3B+1)  /* 9  bytes */
 326 #define EEPROM_VERSION                      (2*0x44)    /* 2  bytes */
 327 #define EEPROM_SKU_CAP                      (2*0x45)    /* 2  bytes */
 328 #define EEPROM_OEM_MODE                     (2*0x46)    /* 2  bytes */
 329 #define EEPROM_WOWLAN_MODE                  (2*0x47)    /* 2  bytes */
 330 #define EEPROM_RADIO_CONFIG                 (2*0x48)    /* 2  bytes */
 331 #define EEPROM_NUM_MAC_ADDRESS              (2*0x4C)    /* 2  bytes */
 332 
 333 /* The following masks are to be applied on EEPROM_RADIO_CONFIG */
 334 #define EEPROM_RF_CFG_TYPE_MSK(x)   (x & 0x3)   /* bits 0-1   */
 335 #define EEPROM_RF_CFG_STEP_MSK(x)   ((x >> 2)  & 0x3)   /* bits 2-3   */
 336 #define EEPROM_RF_CFG_DASH_MSK(x)   ((x >> 4)  & 0x3)   /* bits 4-5   */
 337 #define EEPROM_RF_CFG_PNUM_MSK(x)   ((x >> 6)  & 0x3)   /* bits 6-7   */
 338 #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8)  & 0xF)   /* bits 8-11  */
 339 #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF)   /* bits 12-15 */
 340 
 341 #define EEPROM_3945_RF_CFG_TYPE_MAX  0x0
 342 #define EEPROM_4965_RF_CFG_TYPE_MAX  0x1
 343 
 344 /*
 345  * Per-channel regulatory data.
 346  *
 347  * Each channel that *might* be supported by iwl has a fixed location
 348  * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
 349  * txpower (MSB).
 350  *
 351  * Entries immediately below are for 20 MHz channel width.  HT40 (40 MHz)
 352  * channels (only for 4965, not supported by 3945) appear later in the EEPROM.
 353  *
 354  * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 355  */
 356 #define EEPROM_REGULATORY_SKU_ID            (2*0x60)    /* 4  bytes */
 357 #define EEPROM_REGULATORY_BAND_1            (2*0x62)    /* 2  bytes */
 358 #define EEPROM_REGULATORY_BAND_1_CHANNELS   (2*0x63)    /* 28 bytes */
 359 
 360 /*
 361  * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
 362  * 5.0 GHz channels 7, 8, 11, 12, 16
 363  * (4915-5080MHz) (none of these is ever supported)
 364  */
 365 #define EEPROM_REGULATORY_BAND_2            (2*0x71)    /* 2  bytes */
 366 #define EEPROM_REGULATORY_BAND_2_CHANNELS   (2*0x72)    /* 26 bytes */
 367 
 368 /*
 369  * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 370  * (5170-5320MHz)
 371  */
 372 #define EEPROM_REGULATORY_BAND_3            (2*0x7F)    /* 2  bytes */
 373 #define EEPROM_REGULATORY_BAND_3_CHANNELS   (2*0x80)    /* 24 bytes */
 374 
 375 /*
 376  * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 377  * (5500-5700MHz)
 378  */
 379 #define EEPROM_REGULATORY_BAND_4            (2*0x8C)    /* 2  bytes */
 380 #define EEPROM_REGULATORY_BAND_4_CHANNELS   (2*0x8D)    /* 22 bytes */
 381 
 382 /*
 383  * 5.7 GHz channels 145, 149, 153, 157, 161, 165
 384  * (5725-5825MHz)
 385  */
 386 #define EEPROM_REGULATORY_BAND_5            (2*0x98)    /* 2  bytes */
 387 #define EEPROM_REGULATORY_BAND_5_CHANNELS   (2*0x99)    /* 12 bytes */
 388 
 389 /*
 390  * 2.4 GHz HT40 channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11)
 391  *
 392  * The channel listed is the center of the lower 20 MHz half of the channel.
 393  * The overall center frequency is actually 2 channels (10 MHz) above that,
 394  * and the upper half of each HT40 channel is centered 4 channels (20 MHz) away
 395  * from the lower half; e.g. the upper half of HT40 channel 1 is channel 5,
 396  * and the overall HT40 channel width centers on channel 3.
 397  *
 398  * NOTE:  The RXON command uses 20 MHz channel numbers to specify the
 399  *        control channel to which to tune.  RXON also specifies whether the
 400  *        control channel is the upper or lower half of a HT40 channel.
 401  *
 402  * NOTE:  4965 does not support HT40 channels on 2.4 GHz.
 403  */
 404 #define EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS (2*0xA0)   /* 14 bytes */
 405 
 406 /*
 407  * 5.2 GHz HT40 channels 36 (40), 44 (48), 52 (56), 60 (64),
 408  * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161)
 409  */
 410 #define EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS (2*0xA8)   /* 22 bytes */
 411 
 412 #define EEPROM_REGULATORY_BAND_NO_HT40                  (0)
 413 
 414 int il_eeprom_init(struct il_priv *il);
 415 void il_eeprom_free(struct il_priv *il);
 416 const u8 *il_eeprom_query_addr(const struct il_priv *il, size_t offset);
 417 u16 il_eeprom_query16(const struct il_priv *il, size_t offset);
 418 int il_init_channel_map(struct il_priv *il);
 419 void il_free_channel_map(struct il_priv *il);
 420 const struct il_channel_info *il_get_channel_info(const struct il_priv *il,
 421                                                   enum nl80211_band band,
 422                                                   u16 channel);
 423 
 424 #define IL_NUM_SCAN_RATES         (2)
 425 
 426 struct il4965_channel_tgd_info {
 427         u8 type;
 428         s8 max_power;
 429 };
 430 
 431 struct il4965_channel_tgh_info {
 432         s64 last_radar_time;
 433 };
 434 
 435 #define IL4965_MAX_RATE (33)
 436 
 437 struct il3945_clip_group {
 438         /* maximum power level to prevent clipping for each rate, derived by
 439          *   us from this band's saturation power in EEPROM */
 440         const s8 clip_powers[IL_MAX_RATES];
 441 };
 442 
 443 /* current Tx power values to use, one for each rate for each channel.
 444  * requested power is limited by:
 445  * -- regulatory EEPROM limits for this channel
 446  * -- hardware capabilities (clip-powers)
 447  * -- spectrum management
 448  * -- user preference (e.g. iwconfig)
 449  * when requested power is set, base power idx must also be set. */
 450 struct il3945_channel_power_info {
 451         struct il3945_tx_power tpc;     /* actual radio and DSP gain settings */
 452         s8 power_table_idx;     /* actual (compenst'd) idx into gain table */
 453         s8 base_power_idx;      /* gain idx for power at factory temp. */
 454         s8 requested_power;     /* power (dBm) requested for this chnl/rate */
 455 };
 456 
 457 /* current scan Tx power values to use, one for each scan rate for each
 458  * channel. */
 459 struct il3945_scan_power_info {
 460         struct il3945_tx_power tpc;     /* actual radio and DSP gain settings */
 461         s8 power_table_idx;     /* actual (compenst'd) idx into gain table */
 462         s8 requested_power;     /* scan pwr (dBm) requested for chnl/rate */
 463 };
 464 
 465 /*
 466  * One for each channel, holds all channel setup data
 467  * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
 468  *     with one another!
 469  */
 470 struct il_channel_info {
 471         struct il4965_channel_tgd_info tgd;
 472         struct il4965_channel_tgh_info tgh;
 473         struct il_eeprom_channel eeprom;        /* EEPROM regulatory limit */
 474         struct il_eeprom_channel ht40_eeprom;   /* EEPROM regulatory limit for
 475                                                  * HT40 channel */
 476 
 477         u8 channel;             /* channel number */
 478         u8 flags;               /* flags copied from EEPROM */
 479         s8 max_power_avg;       /* (dBm) regul. eeprom, normal Tx, any rate */
 480         s8 curr_txpow;          /* (dBm) regulatory/spectrum/user (not h/w) limit */
 481         s8 min_power;           /* always 0 */
 482         s8 scan_power;          /* (dBm) regul. eeprom, direct scans, any rate */
 483 
 484         u8 group_idx;           /* 0-4, maps channel to group1/2/3/4/5 */
 485         u8 band_idx;            /* 0-4, maps channel to band1/2/3/4/5 */
 486         enum nl80211_band band;
 487 
 488         /* HT40 channel info */
 489         s8 ht40_max_power_avg;  /* (dBm) regul. eeprom, normal Tx, any rate */
 490         u8 ht40_flags;          /* flags copied from EEPROM */
 491         u8 ht40_extension_channel;      /* HT_IE_EXT_CHANNEL_* */
 492 
 493         /* Radio/DSP gain settings for each "normal" data Tx rate.
 494          * These include, in addition to RF and DSP gain, a few fields for
 495          *   remembering/modifying gain settings (idxes). */
 496         struct il3945_channel_power_info power_info[IL4965_MAX_RATE];
 497 
 498         /* Radio/DSP gain settings for each scan rate, for directed scans. */
 499         struct il3945_scan_power_info scan_pwr_info[IL_NUM_SCAN_RATES];
 500 };
 501 
 502 #define IL_TX_FIFO_BK           0       /* shared */
 503 #define IL_TX_FIFO_BE           1
 504 #define IL_TX_FIFO_VI           2       /* shared */
 505 #define IL_TX_FIFO_VO           3
 506 #define IL_TX_FIFO_UNUSED       -1
 507 
 508 /* Minimum number of queues. MAX_NUM is defined in hw specific files.
 509  * Set the minimum to accommodate the 4 standard TX queues, 1 command
 510  * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
 511 #define IL_MIN_NUM_QUEUES       10
 512 
 513 #define IL_DEFAULT_CMD_QUEUE_NUM        4
 514 
 515 #define IEEE80211_DATA_LEN              2304
 516 #define IEEE80211_4ADDR_LEN             30
 517 #define IEEE80211_HLEN                  (IEEE80211_4ADDR_LEN)
 518 #define IEEE80211_FRAME_LEN             (IEEE80211_DATA_LEN + IEEE80211_HLEN)
 519 
 520 struct il_frame {
 521         union {
 522                 struct ieee80211_hdr frame;
 523                 struct il_tx_beacon_cmd beacon;
 524                 u8 raw[IEEE80211_FRAME_LEN];
 525                 u8 cmd[360];
 526         } u;
 527         struct list_head list;
 528 };
 529 
 530 enum {
 531         CMD_SYNC = 0,
 532         CMD_SIZE_NORMAL = 0,
 533         CMD_NO_SKB = 0,
 534         CMD_SIZE_HUGE = (1 << 0),
 535         CMD_ASYNC = (1 << 1),
 536         CMD_WANT_SKB = (1 << 2),
 537         CMD_MAPPED = (1 << 3),
 538 };
 539 
 540 #define DEF_CMD_PAYLOAD_SIZE 320
 541 
 542 /**
 543  * struct il_device_cmd
 544  *
 545  * For allocation of the command and tx queues, this establishes the overall
 546  * size of the largest command we send to uCode, except for a scan command
 547  * (which is relatively huge; space is allocated separately).
 548  */
 549 struct il_device_cmd {
 550         struct il_cmd_header hdr;       /* uCode API */
 551         union {
 552                 u32 flags;
 553                 u8 val8;
 554                 u16 val16;
 555                 u32 val32;
 556                 struct il_tx_cmd tx;
 557                 u8 payload[DEF_CMD_PAYLOAD_SIZE];
 558         } __packed cmd;
 559 } __packed;
 560 
 561 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct il_device_cmd))
 562 
 563 struct il_host_cmd {
 564         const void *data;
 565         unsigned long reply_page;
 566         void (*callback) (struct il_priv *il, struct il_device_cmd *cmd,
 567                           struct il_rx_pkt *pkt);
 568         u32 flags;
 569         u16 len;
 570         u8 id;
 571 };
 572 
 573 #define SUP_RATE_11A_MAX_NUM_CHANNELS  8
 574 #define SUP_RATE_11B_MAX_NUM_CHANNELS  4
 575 #define SUP_RATE_11G_MAX_NUM_CHANNELS  12
 576 
 577 /**
 578  * struct il_rx_queue - Rx queue
 579  * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
 580  * @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
 581  * @read: Shared idx to newest available Rx buffer
 582  * @write: Shared idx to oldest written Rx packet
 583  * @free_count: Number of pre-allocated buffers in rx_free
 584  * @rx_free: list of free SKBs for use
 585  * @rx_used: List of Rx buffers with no SKB
 586  * @need_update: flag to indicate we need to update read/write idx
 587  * @rb_stts: driver's pointer to receive buffer status
 588  * @rb_stts_dma: bus address of receive buffer status
 589  *
 590  * NOTE:  rx_free and rx_used are used as a FIFO for il_rx_bufs
 591  */
 592 struct il_rx_queue {
 593         __le32 *bd;
 594         dma_addr_t bd_dma;
 595         struct il_rx_buf pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
 596         struct il_rx_buf *queue[RX_QUEUE_SIZE];
 597         u32 read;
 598         u32 write;
 599         u32 free_count;
 600         u32 write_actual;
 601         struct list_head rx_free;
 602         struct list_head rx_used;
 603         int need_update;
 604         struct il_rb_status *rb_stts;
 605         dma_addr_t rb_stts_dma;
 606         spinlock_t lock;
 607 };
 608 
 609 #define IL_SUPPORTED_RATES_IE_LEN         8
 610 
 611 #define MAX_TID_COUNT        9
 612 
 613 #define IL_INVALID_RATE     0xFF
 614 #define IL_INVALID_VALUE    -1
 615 
 616 /**
 617  * struct il_ht_agg -- aggregation status while waiting for block-ack
 618  * @txq_id: Tx queue used for Tx attempt
 619  * @frame_count: # frames attempted by Tx command
 620  * @wait_for_ba: Expect block-ack before next Tx reply
 621  * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx win
 622  * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx win
 623  * @bitmap1: High order, one bit for each frame pending ACK in Tx win
 624  * @rate_n_flags: Rate at which Tx was attempted
 625  *
 626  * If C_TX indicates that aggregation was attempted, driver must wait
 627  * for block ack (N_COMPRESSED_BA).  This struct stores tx reply info
 628  * until block ack arrives.
 629  */
 630 struct il_ht_agg {
 631         u16 txq_id;
 632         u16 frame_count;
 633         u16 wait_for_ba;
 634         u16 start_idx;
 635         u64 bitmap;
 636         u32 rate_n_flags;
 637 #define IL_AGG_OFF 0
 638 #define IL_AGG_ON 1
 639 #define IL_EMPTYING_HW_QUEUE_ADDBA 2
 640 #define IL_EMPTYING_HW_QUEUE_DELBA 3
 641         u8 state;
 642 };
 643 
 644 struct il_tid_data {
 645         u16 seq_number;         /* 4965 only */
 646         u16 tfds_in_queue;
 647         struct il_ht_agg agg;
 648 };
 649 
 650 struct il_hw_key {
 651         u32 cipher;
 652         int keylen;
 653         u8 keyidx;
 654         u8 key[32];
 655 };
 656 
 657 union il_ht_rate_supp {
 658         u16 rates;
 659         struct {
 660                 u8 siso_rate;
 661                 u8 mimo_rate;
 662         };
 663 };
 664 
 665 #define CFG_HT_RX_AMPDU_FACTOR_8K   (0x0)
 666 #define CFG_HT_RX_AMPDU_FACTOR_16K  (0x1)
 667 #define CFG_HT_RX_AMPDU_FACTOR_32K  (0x2)
 668 #define CFG_HT_RX_AMPDU_FACTOR_64K  (0x3)
 669 #define CFG_HT_RX_AMPDU_FACTOR_DEF  CFG_HT_RX_AMPDU_FACTOR_64K
 670 #define CFG_HT_RX_AMPDU_FACTOR_MAX  CFG_HT_RX_AMPDU_FACTOR_64K
 671 #define CFG_HT_RX_AMPDU_FACTOR_MIN  CFG_HT_RX_AMPDU_FACTOR_8K
 672 
 673 /*
 674  * Maximal MPDU density for TX aggregation
 675  * 4 - 2us density
 676  * 5 - 4us density
 677  * 6 - 8us density
 678  * 7 - 16us density
 679  */
 680 #define CFG_HT_MPDU_DENSITY_2USEC   (0x4)
 681 #define CFG_HT_MPDU_DENSITY_4USEC   (0x5)
 682 #define CFG_HT_MPDU_DENSITY_8USEC   (0x6)
 683 #define CFG_HT_MPDU_DENSITY_16USEC  (0x7)
 684 #define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
 685 #define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC
 686 #define CFG_HT_MPDU_DENSITY_MIN     (0x1)
 687 
 688 struct il_ht_config {
 689         bool single_chain_sufficient;
 690         enum ieee80211_smps_mode smps;  /* current smps mode */
 691 };
 692 
 693 /* QoS structures */
 694 struct il_qos_info {
 695         int qos_active;
 696         struct il_qosparam_cmd def_qos_parm;
 697 };
 698 
 699 /*
 700  * Structure should be accessed with sta_lock held. When station addition
 701  * is in progress (IL_STA_UCODE_INPROGRESS) it is possible to access only
 702  * the commands (il_addsta_cmd and il_link_quality_cmd) without
 703  * sta_lock held.
 704  */
 705 struct il_station_entry {
 706         struct il_addsta_cmd sta;
 707         struct il_tid_data tid[MAX_TID_COUNT];
 708         u8 used;
 709         struct il_hw_key keyinfo;
 710         struct il_link_quality_cmd *lq;
 711 };
 712 
 713 struct il_station_priv_common {
 714         u8 sta_id;
 715 };
 716 
 717 /**
 718  * struct il_vif_priv - driver's ilate per-interface information
 719  *
 720  * When mac80211 allocates a virtual interface, it can allocate
 721  * space for us to put data into.
 722  */
 723 struct il_vif_priv {
 724         u8 ibss_bssid_sta_id;
 725 };
 726 
 727 /* one for each uCode image (inst/data, boot/init/runtime) */
 728 struct fw_desc {
 729         void *v_addr;           /* access by driver */
 730         dma_addr_t p_addr;      /* access by card's busmaster DMA */
 731         u32 len;                /* bytes */
 732 };
 733 
 734 /* uCode file layout */
 735 struct il_ucode_header {
 736         __le32 ver;             /* major/minor/API/serial */
 737         struct {
 738                 __le32 inst_size;       /* bytes of runtime code */
 739                 __le32 data_size;       /* bytes of runtime data */
 740                 __le32 init_size;       /* bytes of init code */
 741                 __le32 init_data_size;  /* bytes of init data */
 742                 __le32 boot_size;       /* bytes of bootstrap code */
 743                 u8 data[0];     /* in same order as sizes */
 744         } v1;
 745 };
 746 
 747 struct il4965_ibss_seq {
 748         u8 mac[ETH_ALEN];
 749         u16 seq_num;
 750         u16 frag_num;
 751         unsigned long packet_time;
 752         struct list_head list;
 753 };
 754 
 755 struct il_sensitivity_ranges {
 756         u16 min_nrg_cck;
 757         u16 max_nrg_cck;
 758 
 759         u16 nrg_th_cck;
 760         u16 nrg_th_ofdm;
 761 
 762         u16 auto_corr_min_ofdm;
 763         u16 auto_corr_min_ofdm_mrc;
 764         u16 auto_corr_min_ofdm_x1;
 765         u16 auto_corr_min_ofdm_mrc_x1;
 766 
 767         u16 auto_corr_max_ofdm;
 768         u16 auto_corr_max_ofdm_mrc;
 769         u16 auto_corr_max_ofdm_x1;
 770         u16 auto_corr_max_ofdm_mrc_x1;
 771 
 772         u16 auto_corr_max_cck;
 773         u16 auto_corr_max_cck_mrc;
 774         u16 auto_corr_min_cck;
 775         u16 auto_corr_min_cck_mrc;
 776 
 777         u16 barker_corr_th_min;
 778         u16 barker_corr_th_min_mrc;
 779         u16 nrg_th_cca;
 780 };
 781 
 782 #define KELVIN_TO_CELSIUS(x) ((x)-273)
 783 #define CELSIUS_TO_KELVIN(x) ((x)+273)
 784 
 785 /**
 786  * struct il_hw_params
 787  * @bcast_id: f/w broadcast station ID
 788  * @max_txq_num: Max # Tx queues supported
 789  * @dma_chnl_num: Number of Tx DMA/FIFO channels
 790  * @scd_bc_tbls_size: size of scheduler byte count tables
 791  * @tfd_size: TFD size
 792  * @tx/rx_chains_num: Number of TX/RX chains
 793  * @valid_tx/rx_ant: usable antennas
 794  * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
 795  * @max_rxq_log: Log-base-2 of max_rxq_size
 796  * @rx_page_order: Rx buffer page order
 797  * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
 798  * @max_stations:
 799  * @ht40_channel: is 40MHz width possible in band 2.4
 800  * BIT(NL80211_BAND_5GHZ) BIT(NL80211_BAND_5GHZ)
 801  * @sw_crypto: 0 for hw, 1 for sw
 802  * @max_xxx_size: for ucode uses
 803  * @ct_kill_threshold: temperature threshold
 804  * @beacon_time_tsf_bits: number of valid tsf bits for beacon time
 805  * @struct il_sensitivity_ranges: range of sensitivity values
 806  */
 807 struct il_hw_params {
 808         u8 bcast_id;
 809         u8 max_txq_num;
 810         u8 dma_chnl_num;
 811         u16 scd_bc_tbls_size;
 812         u32 tfd_size;
 813         u8 tx_chains_num;
 814         u8 rx_chains_num;
 815         u8 valid_tx_ant;
 816         u8 valid_rx_ant;
 817         u16 max_rxq_size;
 818         u16 max_rxq_log;
 819         u32 rx_page_order;
 820         u32 rx_wrt_ptr_reg;
 821         u8 max_stations;
 822         u8 ht40_channel;
 823         u8 max_beacon_itrvl;    /* in 1024 ms */
 824         u32 max_inst_size;
 825         u32 max_data_size;
 826         u32 max_bsm_size;
 827         u32 ct_kill_threshold;  /* value in hw-dependent units */
 828         u16 beacon_time_tsf_bits;
 829         const struct il_sensitivity_ranges *sens;
 830 };
 831 
 832 /******************************************************************************
 833  *
 834  * Functions implemented in core module which are forward declared here
 835  * for use by iwl-[4-5].c
 836  *
 837  * NOTE:  The implementation of these functions are not hardware specific
 838  * which is why they are in the core module files.
 839  *
 840  * Naming convention --
 841  * il_         <-- Is part of iwlwifi
 842  * iwlXXXX_     <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
 843  * il4965_bg_      <-- Called from work queue context
 844  * il4965_mac_     <-- mac80211 callback
 845  *
 846  ****************************************************************************/
 847 void il4965_update_chain_flags(struct il_priv *il);
 848 extern const u8 il_bcast_addr[ETH_ALEN];
 849 int il_queue_space(const struct il_queue *q);
 850 static inline int
 851 il_queue_used(const struct il_queue *q, int i)
 852 {
 853         return q->write_ptr >= q->read_ptr ? (i >= q->read_ptr &&
 854                                               i < q->write_ptr) : !(i <
 855                                                                     q->read_ptr
 856                                                                     && i >=
 857                                                                     q->
 858                                                                     write_ptr);
 859 }
 860 
 861 static inline u8
 862 il_get_cmd_idx(struct il_queue *q, u32 idx, int is_huge)
 863 {
 864         /*
 865          * This is for init calibration result and scan command which
 866          * required buffer > TFD_MAX_PAYLOAD_SIZE,
 867          * the big buffer at end of command array
 868          */
 869         if (is_huge)
 870                 return q->n_win;        /* must be power of 2 */
 871 
 872         /* Otherwise, use normal size buffers */
 873         return idx & (q->n_win - 1);
 874 }
 875 
 876 struct il_dma_ptr {
 877         dma_addr_t dma;
 878         void *addr;
 879         size_t size;
 880 };
 881 
 882 #define IL_OPERATION_MODE_AUTO     0
 883 #define IL_OPERATION_MODE_HT_ONLY  1
 884 #define IL_OPERATION_MODE_MIXED    2
 885 #define IL_OPERATION_MODE_20MHZ    3
 886 
 887 #define IL_TX_CRC_SIZE 4
 888 #define IL_TX_DELIMITER_SIZE 4
 889 
 890 #define TX_POWER_IL_ILLEGAL_VOLTAGE -10000
 891 
 892 /* Sensitivity and chain noise calibration */
 893 #define INITIALIZATION_VALUE            0xFFFF
 894 #define IL4965_CAL_NUM_BEACONS          20
 895 #define IL_CAL_NUM_BEACONS              16
 896 #define MAXIMUM_ALLOWED_PATHLOSS        15
 897 
 898 #define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
 899 
 900 #define MAX_FA_OFDM  50
 901 #define MIN_FA_OFDM  5
 902 #define MAX_FA_CCK   50
 903 #define MIN_FA_CCK   5
 904 
 905 #define AUTO_CORR_STEP_OFDM       1
 906 
 907 #define AUTO_CORR_STEP_CCK     3
 908 #define AUTO_CORR_MAX_TH_CCK   160
 909 
 910 #define NRG_DIFF               2
 911 #define NRG_STEP_CCK           2
 912 #define NRG_MARGIN             8
 913 #define MAX_NUMBER_CCK_NO_FA 100
 914 
 915 #define AUTO_CORR_CCK_MIN_VAL_DEF    (125)
 916 
 917 #define CHAIN_A             0
 918 #define CHAIN_B             1
 919 #define CHAIN_C             2
 920 #define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
 921 #define ALL_BAND_FILTER                 0xFF00
 922 #define IN_BAND_FILTER                  0xFF
 923 #define MIN_AVERAGE_NOISE_MAX_VALUE     0xFFFFFFFF
 924 
 925 #define NRG_NUM_PREV_STAT_L     20
 926 #define NUM_RX_CHAINS           3
 927 
 928 enum il4965_false_alarm_state {
 929         IL_FA_TOO_MANY = 0,
 930         IL_FA_TOO_FEW = 1,
 931         IL_FA_GOOD_RANGE = 2,
 932 };
 933 
 934 enum il4965_chain_noise_state {
 935         IL_CHAIN_NOISE_ALIVE = 0,       /* must be 0 */
 936         IL_CHAIN_NOISE_ACCUMULATE,
 937         IL_CHAIN_NOISE_CALIBRATED,
 938         IL_CHAIN_NOISE_DONE,
 939 };
 940 
 941 enum ucode_type {
 942         UCODE_NONE = 0,
 943         UCODE_INIT,
 944         UCODE_RT
 945 };
 946 
 947 /* Sensitivity calib data */
 948 struct il_sensitivity_data {
 949         u32 auto_corr_ofdm;
 950         u32 auto_corr_ofdm_mrc;
 951         u32 auto_corr_ofdm_x1;
 952         u32 auto_corr_ofdm_mrc_x1;
 953         u32 auto_corr_cck;
 954         u32 auto_corr_cck_mrc;
 955 
 956         u32 last_bad_plcp_cnt_ofdm;
 957         u32 last_fa_cnt_ofdm;
 958         u32 last_bad_plcp_cnt_cck;
 959         u32 last_fa_cnt_cck;
 960 
 961         u32 nrg_curr_state;
 962         u32 nrg_prev_state;
 963         u32 nrg_value[10];
 964         u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
 965         u32 nrg_silence_ref;
 966         u32 nrg_energy_idx;
 967         u32 nrg_silence_idx;
 968         u32 nrg_th_cck;
 969         s32 nrg_auto_corr_silence_diff;
 970         u32 num_in_cck_no_fa;
 971         u32 nrg_th_ofdm;
 972 
 973         u16 barker_corr_th_min;
 974         u16 barker_corr_th_min_mrc;
 975         u16 nrg_th_cca;
 976 };
 977 
 978 /* Chain noise (differential Rx gain) calib data */
 979 struct il_chain_noise_data {
 980         u32 active_chains;
 981         u32 chain_noise_a;
 982         u32 chain_noise_b;
 983         u32 chain_noise_c;
 984         u32 chain_signal_a;
 985         u32 chain_signal_b;
 986         u32 chain_signal_c;
 987         u16 beacon_count;
 988         u8 disconn_array[NUM_RX_CHAINS];
 989         u8 delta_gain_code[NUM_RX_CHAINS];
 990         u8 radio_write;
 991         u8 state;
 992 };
 993 
 994 #define EEPROM_SEM_TIMEOUT 10   /* milliseconds */
 995 #define EEPROM_SEM_RETRY_LIMIT 1000     /* number of attempts (not time) */
 996 
 997 #define IL_TRAFFIC_ENTRIES      (256)
 998 #define IL_TRAFFIC_ENTRY_SIZE  (64)
 999 
1000 enum {
1001         MEASUREMENT_READY = (1 << 0),
1002         MEASUREMENT_ACTIVE = (1 << 1),
1003 };
1004 
1005 /* interrupt stats */
1006 struct isr_stats {
1007         u32 hw;
1008         u32 sw;
1009         u32 err_code;
1010         u32 sch;
1011         u32 alive;
1012         u32 rfkill;
1013         u32 ctkill;
1014         u32 wakeup;
1015         u32 rx;
1016         u32 handlers[IL_CN_MAX];
1017         u32 tx;
1018         u32 unhandled;
1019 };
1020 
1021 /* management stats */
1022 enum il_mgmt_stats {
1023         MANAGEMENT_ASSOC_REQ = 0,
1024         MANAGEMENT_ASSOC_RESP,
1025         MANAGEMENT_REASSOC_REQ,
1026         MANAGEMENT_REASSOC_RESP,
1027         MANAGEMENT_PROBE_REQ,
1028         MANAGEMENT_PROBE_RESP,
1029         MANAGEMENT_BEACON,
1030         MANAGEMENT_ATIM,
1031         MANAGEMENT_DISASSOC,
1032         MANAGEMENT_AUTH,
1033         MANAGEMENT_DEAUTH,
1034         MANAGEMENT_ACTION,
1035         MANAGEMENT_MAX,
1036 };
1037 /* control stats */
1038 enum il_ctrl_stats {
1039         CONTROL_BACK_REQ = 0,
1040         CONTROL_BACK,
1041         CONTROL_PSPOLL,
1042         CONTROL_RTS,
1043         CONTROL_CTS,
1044         CONTROL_ACK,
1045         CONTROL_CFEND,
1046         CONTROL_CFENDACK,
1047         CONTROL_MAX,
1048 };
1049 
1050 struct traffic_stats {
1051 #ifdef CONFIG_IWLEGACY_DEBUGFS
1052         u32 mgmt[MANAGEMENT_MAX];
1053         u32 ctrl[CONTROL_MAX];
1054         u32 data_cnt;
1055         u64 data_bytes;
1056 #endif
1057 };
1058 
1059 /*
1060  * host interrupt timeout value
1061  * used with setting interrupt coalescing timer
1062  * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
1063  *
1064  * default interrupt coalescing timer is 64 x 32 = 2048 usecs
1065  * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
1066  */
1067 #define IL_HOST_INT_TIMEOUT_MAX (0xFF)
1068 #define IL_HOST_INT_TIMEOUT_DEF (0x40)
1069 #define IL_HOST_INT_TIMEOUT_MIN (0x0)
1070 #define IL_HOST_INT_CALIB_TIMEOUT_MAX   (0xFF)
1071 #define IL_HOST_INT_CALIB_TIMEOUT_DEF   (0x10)
1072 #define IL_HOST_INT_CALIB_TIMEOUT_MIN   (0x0)
1073 
1074 #define IL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
1075 
1076 /* TX queue watchdog timeouts in mSecs */
1077 #define IL_DEF_WD_TIMEOUT       (2000)
1078 #define IL_LONG_WD_TIMEOUT      (10000)
1079 #define IL_MAX_WD_TIMEOUT       (120000)
1080 
1081 struct il_force_reset {
1082         int reset_request_count;
1083         int reset_success_count;
1084         int reset_reject_count;
1085         unsigned long reset_duration;
1086         unsigned long last_force_reset_jiffies;
1087 };
1088 
1089 /* extend beacon time format bit shifting  */
1090 /*
1091  * for _3945 devices
1092  * bits 31:24 - extended
1093  * bits 23:0  - interval
1094  */
1095 #define IL3945_EXT_BEACON_TIME_POS      24
1096 /*
1097  * for _4965 devices
1098  * bits 31:22 - extended
1099  * bits 21:0  - interval
1100  */
1101 #define IL4965_EXT_BEACON_TIME_POS      22
1102 
1103 struct il_rxon_context {
1104         struct ieee80211_vif *vif;
1105 };
1106 
1107 struct il_power_mgr {
1108         struct il_powertable_cmd sleep_cmd;
1109         struct il_powertable_cmd sleep_cmd_next;
1110         int debug_sleep_level_override;
1111         bool pci_pm;
1112         bool ps_disabled;
1113 };
1114 
1115 struct il_priv {
1116         struct ieee80211_hw *hw;
1117         struct ieee80211_channel *ieee_channels;
1118         struct ieee80211_rate *ieee_rates;
1119 
1120         struct il_cfg *cfg;
1121         const struct il_ops *ops;
1122 #ifdef CONFIG_IWLEGACY_DEBUGFS
1123         const struct il_debugfs_ops *debugfs_ops;
1124 #endif
1125 
1126         /* temporary frame storage list */
1127         struct list_head free_frames;
1128         int frames_count;
1129 
1130         enum nl80211_band band;
1131         int alloc_rxb_page;
1132 
1133         void (*handlers[IL_CN_MAX]) (struct il_priv *il,
1134                                      struct il_rx_buf *rxb);
1135 
1136         struct ieee80211_supported_band bands[NUM_NL80211_BANDS];
1137 
1138         /* spectrum measurement report caching */
1139         struct il_spectrum_notification measure_report;
1140         u8 measurement_status;
1141 
1142         /* ucode beacon time */
1143         u32 ucode_beacon_time;
1144         int missed_beacon_threshold;
1145 
1146         /* track IBSS manager (last beacon) status */
1147         u32 ibss_manager;
1148 
1149         /* force reset */
1150         struct il_force_reset force_reset;
1151 
1152         /* we allocate array of il_channel_info for NIC's valid channels.
1153          *    Access via channel # using indirect idx array */
1154         struct il_channel_info *channel_info;   /* channel info array */
1155         u8 channel_count;       /* # of channels */
1156 
1157         /* thermal calibration */
1158         s32 temperature;        /* degrees Kelvin */
1159         s32 last_temperature;
1160 
1161         /* Scan related variables */
1162         unsigned long scan_start;
1163         unsigned long scan_start_tsf;
1164         void *scan_cmd;
1165         enum nl80211_band scan_band;
1166         struct cfg80211_scan_request *scan_request;
1167         struct ieee80211_vif *scan_vif;
1168         u8 scan_tx_ant[NUM_NL80211_BANDS];
1169         u8 mgmt_tx_ant;
1170 
1171         /* spinlock */
1172         spinlock_t lock;        /* protect general shared data */
1173         spinlock_t hcmd_lock;   /* protect hcmd */
1174         spinlock_t reg_lock;    /* protect hw register access */
1175         struct mutex mutex;
1176 
1177         /* basic pci-network driver stuff */
1178         struct pci_dev *pci_dev;
1179 
1180         /* pci hardware address support */
1181         void __iomem *hw_base;
1182         u32 hw_rev;
1183         u32 hw_wa_rev;
1184         u8 rev_id;
1185 
1186         /* command queue number */
1187         u8 cmd_queue;
1188 
1189         /* max number of station keys */
1190         u8 sta_key_max_num;
1191 
1192         /* EEPROM MAC addresses */
1193         struct mac_address addresses[1];
1194 
1195         /* uCode images, save to reload in case of failure */
1196         int fw_idx;             /* firmware we're trying to load */
1197         u32 ucode_ver;          /* version of ucode, copy of
1198                                    il_ucode.ver */
1199         struct fw_desc ucode_code;      /* runtime inst */
1200         struct fw_desc ucode_data;      /* runtime data original */
1201         struct fw_desc ucode_data_backup;       /* runtime data save/restore */
1202         struct fw_desc ucode_init;      /* initialization inst */
1203         struct fw_desc ucode_init_data; /* initialization data */
1204         struct fw_desc ucode_boot;      /* bootstrap inst */
1205         enum ucode_type ucode_type;
1206         u8 ucode_write_complete;        /* the image write is complete */
1207         char firmware_name[25];
1208 
1209         struct ieee80211_vif *vif;
1210 
1211         struct il_qos_info qos_data;
1212 
1213         struct {
1214                 bool enabled;
1215                 bool is_40mhz;
1216                 bool non_gf_sta_present;
1217                 u8 protection;
1218                 u8 extension_chan_offset;
1219         } ht;
1220 
1221         /*
1222          * We declare this const so it can only be
1223          * changed via explicit cast within the
1224          * routines that actually update the physical
1225          * hardware.
1226          */
1227         const struct il_rxon_cmd active;
1228         struct il_rxon_cmd staging;
1229 
1230         struct il_rxon_time_cmd timing;
1231 
1232         __le16 switch_channel;
1233 
1234         /* 1st responses from initialize and runtime uCode images.
1235          * _4965's initialize alive response contains some calibration data. */
1236         struct il_init_alive_resp card_alive_init;
1237         struct il_alive_resp card_alive;
1238 
1239         u16 active_rate;
1240 
1241         u8 start_calib;
1242         struct il_sensitivity_data sensitivity_data;
1243         struct il_chain_noise_data chain_noise_data;
1244         __le16 sensitivity_tbl[HD_TBL_SIZE];
1245 
1246         struct il_ht_config current_ht_config;
1247 
1248         /* Rate scaling data */
1249         u8 retry_rate;
1250 
1251         wait_queue_head_t wait_command_queue;
1252 
1253         int activity_timer_active;
1254 
1255         /* Rx and Tx DMA processing queues */
1256         struct il_rx_queue rxq;
1257         struct il_tx_queue *txq;
1258         unsigned long txq_ctx_active_msk;
1259         struct il_dma_ptr kw;   /* keep warm address */
1260         struct il_dma_ptr scd_bc_tbls;
1261 
1262         u32 scd_base_addr;      /* scheduler sram base address */
1263 
1264         unsigned long status;
1265 
1266         /* counts mgmt, ctl, and data packets */
1267         struct traffic_stats tx_stats;
1268         struct traffic_stats rx_stats;
1269 
1270         /* counts interrupts */
1271         struct isr_stats isr_stats;
1272 
1273         struct il_power_mgr power_data;
1274 
1275         /* context information */
1276         u8 bssid[ETH_ALEN];     /* used only on 3945 but filled by core */
1277 
1278         /* station table variables */
1279 
1280         /* Note: if lock and sta_lock are needed, lock must be acquired first */
1281         spinlock_t sta_lock;
1282         int num_stations;
1283         struct il_station_entry stations[IL_STATION_COUNT];
1284         unsigned long ucode_key_table;
1285 
1286         /* queue refcounts */
1287 #define IL_MAX_HW_QUEUES        32
1288         unsigned long queue_stopped[BITS_TO_LONGS(IL_MAX_HW_QUEUES)];
1289 #define IL_STOP_REASON_PASSIVE  0
1290         unsigned long stop_reason;
1291         /* for each AC */
1292         atomic_t queue_stop_count[4];
1293 
1294         /* Indication if ieee80211_ops->open has been called */
1295         u8 is_open;
1296 
1297         u8 mac80211_registered;
1298 
1299         /* eeprom -- this is in the card's little endian byte order */
1300         u8 *eeprom;
1301         struct il_eeprom_calib_info *calib_info;
1302 
1303         enum nl80211_iftype iw_mode;
1304 
1305         /* Last Rx'd beacon timestamp */
1306         u64 timestamp;
1307 
1308         union {
1309 #if IS_ENABLED(CONFIG_IWL3945)
1310                 struct {
1311                         void *shared_virt;
1312                         dma_addr_t shared_phys;
1313 
1314                         struct delayed_work thermal_periodic;
1315                         struct delayed_work rfkill_poll;
1316 
1317                         struct il3945_notif_stats stats;
1318 #ifdef CONFIG_IWLEGACY_DEBUGFS
1319                         struct il3945_notif_stats accum_stats;
1320                         struct il3945_notif_stats delta_stats;
1321                         struct il3945_notif_stats max_delta;
1322 #endif
1323 
1324                         u32 sta_supp_rates;
1325                         int last_rx_rssi;       /* From Rx packet stats */
1326 
1327                         /* Rx'd packet timing information */
1328                         u32 last_beacon_time;
1329                         u64 last_tsf;
1330 
1331                         /*
1332                          * each calibration channel group in the
1333                          * EEPROM has a derived clip setting for
1334                          * each rate.
1335                          */
1336                         const struct il3945_clip_group clip_groups[5];
1337 
1338                 } _3945;
1339 #endif
1340 #if IS_ENABLED(CONFIG_IWL4965)
1341                 struct {
1342                         struct il_rx_phy_res last_phy_res;
1343                         bool last_phy_res_valid;
1344                         u32 ampdu_ref;
1345 
1346                         struct completion firmware_loading_complete;
1347 
1348                         /*
1349                          * chain noise reset and gain commands are the
1350                          * two extra calibration commands follows the standard
1351                          * phy calibration commands
1352                          */
1353                         u8 phy_calib_chain_noise_reset_cmd;
1354                         u8 phy_calib_chain_noise_gain_cmd;
1355 
1356                         u8 key_mapping_keys;
1357                         struct il_wep_key wep_keys[WEP_KEYS_MAX];
1358 
1359                         struct il_notif_stats stats;
1360 #ifdef CONFIG_IWLEGACY_DEBUGFS
1361                         struct il_notif_stats accum_stats;
1362                         struct il_notif_stats delta_stats;
1363                         struct il_notif_stats max_delta;
1364 #endif
1365 
1366                 } _4965;
1367 #endif
1368         };
1369 
1370         struct il_hw_params hw_params;
1371 
1372         u32 inta_mask;
1373 
1374         struct workqueue_struct *workqueue;
1375 
1376         struct work_struct restart;
1377         struct work_struct scan_completed;
1378         struct work_struct rx_replenish;
1379         struct work_struct abort_scan;
1380 
1381         bool beacon_enabled;
1382         struct sk_buff *beacon_skb;
1383 
1384         struct work_struct tx_flush;
1385 
1386         struct tasklet_struct irq_tasklet;
1387 
1388         struct delayed_work init_alive_start;
1389         struct delayed_work alive_start;
1390         struct delayed_work scan_check;
1391 
1392         /* TX Power */
1393         s8 tx_power_user_lmt;
1394         s8 tx_power_device_lmt;
1395         s8 tx_power_next;
1396 
1397 #ifdef CONFIG_IWLEGACY_DEBUG
1398         /* debugging info */
1399         u32 debug_level;        /* per device debugging will override global
1400                                    il_debug_level if set */
1401 #endif                          /* CONFIG_IWLEGACY_DEBUG */
1402 #ifdef CONFIG_IWLEGACY_DEBUGFS
1403         /* debugfs */
1404         u16 tx_traffic_idx;
1405         u16 rx_traffic_idx;
1406         u8 *tx_traffic;
1407         u8 *rx_traffic;
1408         struct dentry *debugfs_dir;
1409         u32 dbgfs_sram_offset, dbgfs_sram_len;
1410         bool disable_ht40;
1411 #endif                          /* CONFIG_IWLEGACY_DEBUGFS */
1412 
1413         struct work_struct txpower_work;
1414         bool disable_sens_cal;
1415         bool disable_chain_noise_cal;
1416         bool disable_tx_power_cal;
1417         struct work_struct run_time_calib_work;
1418         struct timer_list stats_periodic;
1419         struct timer_list watchdog;
1420         bool hw_ready;
1421 
1422         struct led_classdev led;
1423         unsigned long blink_on, blink_off;
1424         bool led_registered;
1425 };                              /*il_priv */
1426 
1427 static inline void
1428 il_txq_ctx_activate(struct il_priv *il, int txq_id)
1429 {
1430         set_bit(txq_id, &il->txq_ctx_active_msk);
1431 }
1432 
1433 static inline void
1434 il_txq_ctx_deactivate(struct il_priv *il, int txq_id)
1435 {
1436         clear_bit(txq_id, &il->txq_ctx_active_msk);
1437 }
1438 
1439 static inline int
1440 il_is_associated(struct il_priv *il)
1441 {
1442         return (il->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1443 }
1444 
1445 static inline int
1446 il_is_any_associated(struct il_priv *il)
1447 {
1448         return il_is_associated(il);
1449 }
1450 
1451 static inline int
1452 il_is_channel_valid(const struct il_channel_info *ch_info)
1453 {
1454         if (ch_info == NULL)
1455                 return 0;
1456         return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1457 }
1458 
1459 static inline int
1460 il_is_channel_radar(const struct il_channel_info *ch_info)
1461 {
1462         return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1463 }
1464 
1465 static inline u8
1466 il_is_channel_a_band(const struct il_channel_info *ch_info)
1467 {
1468         return ch_info->band == NL80211_BAND_5GHZ;
1469 }
1470 
1471 static inline int
1472 il_is_channel_passive(const struct il_channel_info *ch)
1473 {
1474         return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1475 }
1476 
1477 static inline int
1478 il_is_channel_ibss(const struct il_channel_info *ch)
1479 {
1480         return (ch->flags & EEPROM_CHANNEL_IBSS) ? 1 : 0;
1481 }
1482 
1483 static inline void
1484 __il_free_pages(struct il_priv *il, struct page *page)
1485 {
1486         __free_pages(page, il->hw_params.rx_page_order);
1487         il->alloc_rxb_page--;
1488 }
1489 
1490 static inline void
1491 il_free_pages(struct il_priv *il, unsigned long page)
1492 {
1493         free_pages(page, il->hw_params.rx_page_order);
1494         il->alloc_rxb_page--;
1495 }
1496 
1497 #define IWLWIFI_VERSION "in-tree:"
1498 #define DRV_COPYRIGHT   "Copyright(c) 2003-2011 Intel Corporation"
1499 #define DRV_AUTHOR     "<ilw@linux.intel.com>"
1500 
1501 #define IL_PCI_DEVICE(dev, subdev, cfg) \
1502         .vendor = PCI_VENDOR_ID_INTEL,  .device = (dev), \
1503         .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
1504         .driver_data = (kernel_ulong_t)&(cfg)
1505 
1506 #define TIME_UNIT               1024
1507 
1508 #define IL_SKU_G       0x1
1509 #define IL_SKU_A       0x2
1510 #define IL_SKU_N       0x8
1511 
1512 #define IL_CMD(x) case x: return #x
1513 
1514 /* Size of one Rx buffer in host DRAM */
1515 #define IL_RX_BUF_SIZE_3K (3 * 1000)    /* 3945 only */
1516 #define IL_RX_BUF_SIZE_4K (4 * 1024)
1517 #define IL_RX_BUF_SIZE_8K (8 * 1024)
1518 
1519 #ifdef CONFIG_IWLEGACY_DEBUGFS
1520 struct il_debugfs_ops {
1521         ssize_t(*rx_stats_read) (struct file *file, char __user *user_buf,
1522                                  size_t count, loff_t *ppos);
1523         ssize_t(*tx_stats_read) (struct file *file, char __user *user_buf,
1524                                  size_t count, loff_t *ppos);
1525         ssize_t(*general_stats_read) (struct file *file,
1526                                       char __user *user_buf, size_t count,
1527                                       loff_t *ppos);
1528 };
1529 #endif
1530 
1531 struct il_ops {
1532         /* Handling TX */
1533         void (*txq_update_byte_cnt_tbl) (struct il_priv *il,
1534                                          struct il_tx_queue *txq,
1535                                          u16 byte_cnt);
1536         int (*txq_attach_buf_to_tfd) (struct il_priv *il,
1537                                       struct il_tx_queue *txq, dma_addr_t addr,
1538                                       u16 len, u8 reset, u8 pad);
1539         void (*txq_free_tfd) (struct il_priv *il, struct il_tx_queue *txq);
1540         int (*txq_init) (struct il_priv *il, struct il_tx_queue *txq);
1541         /* alive notification after init uCode load */
1542         void (*init_alive_start) (struct il_priv *il);
1543         /* check validity of rtc data address */
1544         int (*is_valid_rtc_data_addr) (u32 addr);
1545         /* 1st ucode load */
1546         int (*load_ucode) (struct il_priv *il);
1547 
1548         void (*dump_nic_error_log) (struct il_priv *il);
1549         int (*dump_fh) (struct il_priv *il, char **buf, bool display);
1550         int (*set_channel_switch) (struct il_priv *il,
1551                                    struct ieee80211_channel_switch *ch_switch);
1552         /* power management */
1553         int (*apm_init) (struct il_priv *il);
1554 
1555         /* tx power */
1556         int (*send_tx_power) (struct il_priv *il);
1557         void (*update_chain_flags) (struct il_priv *il);
1558 
1559         /* eeprom operations */
1560         int (*eeprom_acquire_semaphore) (struct il_priv *il);
1561         void (*eeprom_release_semaphore) (struct il_priv *il);
1562 
1563         int (*rxon_assoc) (struct il_priv *il);
1564         int (*commit_rxon) (struct il_priv *il);
1565         void (*set_rxon_chain) (struct il_priv *il);
1566 
1567         u16(*get_hcmd_size) (u8 cmd_id, u16 len);
1568         u16(*build_addsta_hcmd) (const struct il_addsta_cmd *cmd, u8 *data);
1569 
1570         int (*request_scan) (struct il_priv *il, struct ieee80211_vif *vif);
1571         void (*post_scan) (struct il_priv *il);
1572         void (*post_associate) (struct il_priv *il);
1573         void (*config_ap) (struct il_priv *il);
1574         /* station management */
1575         int (*update_bcast_stations) (struct il_priv *il);
1576         int (*manage_ibss_station) (struct il_priv *il,
1577                                     struct ieee80211_vif *vif, bool add);
1578 
1579         int (*send_led_cmd) (struct il_priv *il, struct il_led_cmd *led_cmd);
1580 };
1581 
1582 struct il_mod_params {
1583         int sw_crypto;          /* def: 0 = using hardware encryption */
1584         int disable_hw_scan;    /* def: 0 = use h/w scan */
1585         int num_of_queues;      /* def: HW dependent */
1586         int disable_11n;        /* def: 0 = 11n capabilities enabled */
1587         int amsdu_size_8K;      /* def: 0 = disable 8K amsdu size */
1588         int antenna;            /* def: 0 = both antennas (use diversity) */
1589         int restart_fw;         /* def: 1 = restart firmware */
1590 };
1591 
1592 #define IL_LED_SOLID 11
1593 #define IL_DEF_LED_INTRVL cpu_to_le32(1000)
1594 
1595 #define IL_LED_ACTIVITY       (0<<1)
1596 #define IL_LED_LINK           (1<<1)
1597 
1598 /*
1599  * LED mode
1600  *    IL_LED_DEFAULT:  use device default
1601  *    IL_LED_RF_STATE: turn LED on/off based on RF state
1602  *                      LED ON  = RF ON
1603  *                      LED OFF = RF OFF
1604  *    IL_LED_BLINK:    adjust led blink rate based on blink table
1605  */
1606 enum il_led_mode {
1607         IL_LED_DEFAULT,
1608         IL_LED_RF_STATE,
1609         IL_LED_BLINK,
1610 };
1611 
1612 void il_leds_init(struct il_priv *il);
1613 void il_leds_exit(struct il_priv *il);
1614 
1615 /**
1616  * struct il_cfg
1617  * @fw_name_pre: Firmware filename prefix. The api version and extension
1618  *      (.ucode) will be added to filename before loading from disk. The
1619  *      filename is constructed as fw_name_pre<api>.ucode.
1620  * @ucode_api_max: Highest version of uCode API supported by driver.
1621  * @ucode_api_min: Lowest version of uCode API supported by driver.
1622  * @scan_antennas: available antenna for scan operation
1623  * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
1624  *
1625  * We enable the driver to be backward compatible wrt API version. The
1626  * driver specifies which APIs it supports (with @ucode_api_max being the
1627  * highest and @ucode_api_min the lowest). Firmware will only be loaded if
1628  * it has a supported API version. The firmware's API version will be
1629  * stored in @il_priv, enabling the driver to make runtime changes based
1630  * on firmware version used.
1631  *
1632  * For example,
1633  * if (IL_UCODE_API(il->ucode_ver) >= 2) {
1634  *      Driver interacts with Firmware API version >= 2.
1635  * } else {
1636  *      Driver interacts with Firmware API version 1.
1637  * }
1638  *
1639  * The ideal usage of this infrastructure is to treat a new ucode API
1640  * release as a new hardware revision. That is, through utilizing the
1641  * il_hcmd_utils_ops etc. we accommodate different command structures
1642  * and flows between hardware versions as well as their API
1643  * versions.
1644  *
1645  */
1646 struct il_cfg {
1647         /* params specific to an individual device within a device family */
1648         const char *name;
1649         const char *fw_name_pre;
1650         const unsigned int ucode_api_max;
1651         const unsigned int ucode_api_min;
1652         u8 valid_tx_ant;
1653         u8 valid_rx_ant;
1654         unsigned int sku;
1655         u16 eeprom_ver;
1656         u16 eeprom_calib_ver;
1657         /* module based parameters which can be set from modprobe cmd */
1658         const struct il_mod_params *mod_params;
1659         /* params not likely to change within a device family */
1660         struct il_base_params *base_params;
1661         /* params likely to change within a device family */
1662         u8 scan_rx_antennas[NUM_NL80211_BANDS];
1663         enum il_led_mode led_mode;
1664 
1665         int eeprom_size;
1666         int num_of_queues;              /* def: HW dependent */
1667         int num_of_ampdu_queues;        /* def: HW dependent */
1668         /* for il_apm_init() */
1669         u32 pll_cfg_val;
1670         bool set_l0s;
1671         bool use_bsm;
1672 
1673         u16 led_compensation;
1674         int chain_noise_num_beacons;
1675         unsigned int wd_timeout;
1676         bool temperature_kelvin;
1677         const bool ucode_tracing;
1678         const bool sensitivity_calib_by_driver;
1679         const bool chain_noise_calib_by_driver;
1680 
1681         const u32 regulatory_bands[7];
1682 };
1683 
1684 /***************************
1685  *   L i b                 *
1686  ***************************/
1687 
1688 int il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1689                    u16 queue, const struct ieee80211_tx_queue_params *params);
1690 int il_mac_tx_last_beacon(struct ieee80211_hw *hw);
1691 
1692 void il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt);
1693 int il_check_rxon_cmd(struct il_priv *il);
1694 int il_full_rxon_required(struct il_priv *il);
1695 int il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch);
1696 void il_set_flags_for_band(struct il_priv *il, enum nl80211_band band,
1697                            struct ieee80211_vif *vif);
1698 u8 il_get_single_channel_number(struct il_priv *il, enum nl80211_band band);
1699 void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf);
1700 bool il_is_ht40_tx_allowed(struct il_priv *il,
1701                            struct ieee80211_sta_ht_cap *ht_cap);
1702 void il_connection_init_rx_config(struct il_priv *il);
1703 void il_set_rate(struct il_priv *il);
1704 int il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
1705                           u32 decrypt_res, struct ieee80211_rx_status *stats);
1706 void il_irq_handle_error(struct il_priv *il);
1707 int il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
1708 void il_mac_remove_interface(struct ieee80211_hw *hw,
1709                              struct ieee80211_vif *vif);
1710 int il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1711                             enum nl80211_iftype newtype, bool newp2p);
1712 void il_mac_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1713                   u32 queues, bool drop);
1714 int il_alloc_txq_mem(struct il_priv *il);
1715 void il_free_txq_mem(struct il_priv *il);
1716 
1717 #ifdef CONFIG_IWLEGACY_DEBUGFS
1718 void il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len);
1719 #else
1720 static inline void
1721 il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
1722 {
1723 }
1724 #endif
1725 
1726 /*****************************************************
1727  * Handlers
1728  ***************************************************/
1729 void il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb);
1730 void il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb);
1731 void il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb);
1732 void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb);
1733 
1734 /*****************************************************
1735 * RX
1736 ******************************************************/
1737 void il_cmd_queue_unmap(struct il_priv *il);
1738 void il_cmd_queue_free(struct il_priv *il);
1739 int il_rx_queue_alloc(struct il_priv *il);
1740 void il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q);
1741 int il_rx_queue_space(const struct il_rx_queue *q);
1742 void il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb);
1743 
1744 void il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb);
1745 void il_recover_from_stats(struct il_priv *il, struct il_rx_pkt *pkt);
1746 void il_chswitch_done(struct il_priv *il, bool is_success);
1747 
1748 /*****************************************************
1749 * TX
1750 ******************************************************/
1751 void il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq);
1752 int il_tx_queue_init(struct il_priv *il, u32 txq_id);
1753 void il_tx_queue_reset(struct il_priv *il, u32 txq_id);
1754 void il_tx_queue_unmap(struct il_priv *il, int txq_id);
1755 void il_tx_queue_free(struct il_priv *il, int txq_id);
1756 void il_setup_watchdog(struct il_priv *il);
1757 /*****************************************************
1758  * TX power
1759  ****************************************************/
1760 int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force);
1761 
1762 /*******************************************************************************
1763  * Rate
1764  ******************************************************************************/
1765 
1766 u8 il_get_lowest_plcp(struct il_priv *il);
1767 
1768 /*******************************************************************************
1769  * Scanning
1770  ******************************************************************************/
1771 void il_init_scan_params(struct il_priv *il);
1772 int il_scan_cancel(struct il_priv *il);
1773 int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms);
1774 void il_force_scan_end(struct il_priv *il);
1775 int il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1776                    struct ieee80211_scan_request *hw_req);
1777 void il_internal_short_hw_scan(struct il_priv *il);
1778 int il_force_reset(struct il_priv *il, bool external);
1779 u16 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1780                       const u8 *ta, const u8 *ie, int ie_len, int left);
1781 void il_setup_rx_scan_handlers(struct il_priv *il);
1782 u16 il_get_active_dwell_time(struct il_priv *il, enum nl80211_band band,
1783                              u8 n_probes);
1784 u16 il_get_passive_dwell_time(struct il_priv *il, enum nl80211_band band,
1785                               struct ieee80211_vif *vif);
1786 void il_setup_scan_deferred_work(struct il_priv *il);
1787 void il_cancel_scan_deferred_work(struct il_priv *il);
1788 
1789 /* For faster active scanning, scan will move to the next channel if fewer than
1790  * PLCP_QUIET_THRESH packets are heard on this channel within
1791  * ACTIVE_QUIET_TIME after sending probe request.  This shortens the dwell
1792  * time if it's a quiet channel (nothing responded to our probe, and there's
1793  * no other traffic).
1794  * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
1795 #define IL_ACTIVE_QUIET_TIME       cpu_to_le16(10)      /* msec */
1796 #define IL_PLCP_QUIET_THRESH       cpu_to_le16(1)       /* packets */
1797 
1798 #define IL_SCAN_CHECK_WATCHDOG          (HZ * 7)
1799 
1800 /*****************************************************
1801  *   S e n d i n g     H o s t     C o m m a n d s   *
1802  *****************************************************/
1803 
1804 const char *il_get_cmd_string(u8 cmd);
1805 int __must_check il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd);
1806 int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd);
1807 int __must_check il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len,
1808                                  const void *data);
1809 int il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
1810                           void (*callback) (struct il_priv *il,
1811                                             struct il_device_cmd *cmd,
1812                                             struct il_rx_pkt *pkt));
1813 
1814 int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd);
1815 
1816 /*****************************************************
1817  * PCI                                               *
1818  *****************************************************/
1819 
1820 void il_bg_watchdog(struct timer_list *t);
1821 u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval);
1822 __le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
1823                           u32 beacon_interval);
1824 
1825 #ifdef CONFIG_PM_SLEEP
1826 extern const struct dev_pm_ops il_pm_ops;
1827 
1828 #define IL_LEGACY_PM_OPS        (&il_pm_ops)
1829 
1830 #else /* !CONFIG_PM_SLEEP */
1831 
1832 #define IL_LEGACY_PM_OPS        NULL
1833 
1834 #endif /* !CONFIG_PM_SLEEP */
1835 
1836 /*****************************************************
1837 *  Error Handling Debugging
1838 ******************************************************/
1839 void il4965_dump_nic_error_log(struct il_priv *il);
1840 #ifdef CONFIG_IWLEGACY_DEBUG
1841 void il_print_rx_config_cmd(struct il_priv *il);
1842 #else
1843 static inline void
1844 il_print_rx_config_cmd(struct il_priv *il)
1845 {
1846 }
1847 #endif
1848 
1849 void il_clear_isr_stats(struct il_priv *il);
1850 
1851 /*****************************************************
1852 *  GEOS
1853 ******************************************************/
1854 int il_init_geos(struct il_priv *il);
1855 void il_free_geos(struct il_priv *il);
1856 
1857 /*************** DRIVER STATUS FUNCTIONS   *****/
1858 
1859 #define S_HCMD_ACTIVE   0       /* host command in progress */
1860 /* 1 is unused (used to be S_HCMD_SYNC_ACTIVE) */
1861 #define S_INT_ENABLED   2
1862 #define S_RFKILL        3
1863 #define S_CT_KILL               4
1864 #define S_INIT          5
1865 #define S_ALIVE         6
1866 #define S_READY         7
1867 #define S_TEMPERATURE   8
1868 #define S_GEO_CONFIGURED        9
1869 #define S_EXIT_PENDING  10
1870 #define S_STATS         12
1871 #define S_SCANNING              13
1872 #define S_SCAN_ABORTING 14
1873 #define S_SCAN_HW               15
1874 #define S_POWER_PMI     16
1875 #define S_FW_ERROR              17
1876 #define S_CHANNEL_SWITCH_PENDING 18
1877 
1878 static inline int
1879 il_is_ready(struct il_priv *il)
1880 {
1881         /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
1882          * set but EXIT_PENDING is not */
1883         return test_bit(S_READY, &il->status) &&
1884             test_bit(S_GEO_CONFIGURED, &il->status) &&
1885             !test_bit(S_EXIT_PENDING, &il->status);
1886 }
1887 
1888 static inline int
1889 il_is_alive(struct il_priv *il)
1890 {
1891         return test_bit(S_ALIVE, &il->status);
1892 }
1893 
1894 static inline int
1895 il_is_init(struct il_priv *il)
1896 {
1897         return test_bit(S_INIT, &il->status);
1898 }
1899 
1900 static inline int
1901 il_is_rfkill(struct il_priv *il)
1902 {
1903         return test_bit(S_RFKILL, &il->status);
1904 }
1905 
1906 static inline int
1907 il_is_ctkill(struct il_priv *il)
1908 {
1909         return test_bit(S_CT_KILL, &il->status);
1910 }
1911 
1912 static inline int
1913 il_is_ready_rf(struct il_priv *il)
1914 {
1915 
1916         if (il_is_rfkill(il))
1917                 return 0;
1918 
1919         return il_is_ready(il);
1920 }
1921 
1922 void il_send_bt_config(struct il_priv *il);
1923 int il_send_stats_request(struct il_priv *il, u8 flags, bool clear);
1924 void il_apm_stop(struct il_priv *il);
1925 void _il_apm_stop(struct il_priv *il);
1926 
1927 int il_apm_init(struct il_priv *il);
1928 
1929 int il_send_rxon_timing(struct il_priv *il);
1930 
1931 static inline int
1932 il_send_rxon_assoc(struct il_priv *il)
1933 {
1934         return il->ops->rxon_assoc(il);
1935 }
1936 
1937 static inline int
1938 il_commit_rxon(struct il_priv *il)
1939 {
1940         return il->ops->commit_rxon(il);
1941 }
1942 
1943 static inline const struct ieee80211_supported_band *
1944 il_get_hw_mode(struct il_priv *il, enum nl80211_band band)
1945 {
1946         return il->hw->wiphy->bands[band];
1947 }
1948 
1949 /* mac80211 handlers */
1950 int il_mac_config(struct ieee80211_hw *hw, u32 changed);
1951 void il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
1952 void il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1953                              struct ieee80211_bss_conf *bss_conf, u32 changes);
1954 void il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
1955                           __le16 fc, __le32 *tx_flags);
1956 
1957 irqreturn_t il_isr(int irq, void *data);
1958 
1959 void il_set_bit(struct il_priv *p, u32 r, u32 m);
1960 void il_clear_bit(struct il_priv *p, u32 r, u32 m);
1961 bool _il_grab_nic_access(struct il_priv *il);
1962 int _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout);
1963 int il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout);
1964 u32 il_rd_prph(struct il_priv *il, u32 reg);
1965 void il_wr_prph(struct il_priv *il, u32 addr, u32 val);
1966 u32 il_read_targ_mem(struct il_priv *il, u32 addr);
1967 void il_write_targ_mem(struct il_priv *il, u32 addr, u32 val);
1968 
1969 static inline bool il_need_reclaim(struct il_priv *il, struct il_rx_pkt *pkt)
1970 {
1971         /* Reclaim a command buffer only if this packet is a response
1972          * to a (driver-originated) command. If the packet (e.g. Rx frame)
1973          * originated from uCode, there is no command buffer to reclaim.
1974          * Ucode should set SEQ_RX_FRAME bit if ucode-originated, but
1975          * apparently a few don't get set; catch them here.
1976          */
1977         return !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1978                pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX &&
1979                pkt->hdr.cmd != N_RX_PHY && pkt->hdr.cmd != N_RX &&
1980                pkt->hdr.cmd != N_RX_MPDU && pkt->hdr.cmd != N_COMPRESSED_BA;
1981 }
1982 
1983 static inline void
1984 _il_write8(struct il_priv *il, u32 ofs, u8 val)
1985 {
1986         writeb(val, il->hw_base + ofs);
1987 }
1988 #define il_write8(il, ofs, val) _il_write8(il, ofs, val)
1989 
1990 static inline void
1991 _il_wr(struct il_priv *il, u32 ofs, u32 val)
1992 {
1993         writel(val, il->hw_base + ofs);
1994 }
1995 
1996 static inline u32
1997 _il_rd(struct il_priv *il, u32 ofs)
1998 {
1999         return readl(il->hw_base + ofs);
2000 }
2001 
2002 static inline void
2003 _il_clear_bit(struct il_priv *il, u32 reg, u32 mask)
2004 {
2005         _il_wr(il, reg, _il_rd(il, reg) & ~mask);
2006 }
2007 
2008 static inline void
2009 _il_set_bit(struct il_priv *il, u32 reg, u32 mask)
2010 {
2011         _il_wr(il, reg, _il_rd(il, reg) | mask);
2012 }
2013 
2014 static inline void
2015 _il_release_nic_access(struct il_priv *il)
2016 {
2017         _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2018 }
2019 
2020 static inline u32
2021 il_rd(struct il_priv *il, u32 reg)
2022 {
2023         u32 value;
2024         unsigned long reg_flags;
2025 
2026         spin_lock_irqsave(&il->reg_lock, reg_flags);
2027         _il_grab_nic_access(il);
2028         value = _il_rd(il, reg);
2029         _il_release_nic_access(il);
2030         spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2031         return value;
2032 }
2033 
2034 static inline void
2035 il_wr(struct il_priv *il, u32 reg, u32 value)
2036 {
2037         unsigned long reg_flags;
2038 
2039         spin_lock_irqsave(&il->reg_lock, reg_flags);
2040         if (likely(_il_grab_nic_access(il))) {
2041                 _il_wr(il, reg, value);
2042                 _il_release_nic_access(il);
2043         }
2044         spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2045 }
2046 
2047 static inline u32
2048 _il_rd_prph(struct il_priv *il, u32 reg)
2049 {
2050         _il_wr(il, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
2051         return _il_rd(il, HBUS_TARG_PRPH_RDAT);
2052 }
2053 
2054 static inline void
2055 _il_wr_prph(struct il_priv *il, u32 addr, u32 val)
2056 {
2057         _il_wr(il, HBUS_TARG_PRPH_WADDR, ((addr & 0x0000FFFF) | (3 << 24)));
2058         _il_wr(il, HBUS_TARG_PRPH_WDAT, val);
2059 }
2060 
2061 static inline void
2062 il_set_bits_prph(struct il_priv *il, u32 reg, u32 mask)
2063 {
2064         unsigned long reg_flags;
2065 
2066         spin_lock_irqsave(&il->reg_lock, reg_flags);
2067         if (likely(_il_grab_nic_access(il))) {
2068                 _il_wr_prph(il, reg, (_il_rd_prph(il, reg) | mask));
2069                 _il_release_nic_access(il);
2070         }
2071         spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2072 }
2073 
2074 static inline void
2075 il_set_bits_mask_prph(struct il_priv *il, u32 reg, u32 bits, u32 mask)
2076 {
2077         unsigned long reg_flags;
2078 
2079         spin_lock_irqsave(&il->reg_lock, reg_flags);
2080         if (likely(_il_grab_nic_access(il))) {
2081                 _il_wr_prph(il, reg, ((_il_rd_prph(il, reg) & mask) | bits));
2082                 _il_release_nic_access(il);
2083         }
2084         spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2085 }
2086 
2087 static inline void
2088 il_clear_bits_prph(struct il_priv *il, u32 reg, u32 mask)
2089 {
2090         unsigned long reg_flags;
2091         u32 val;
2092 
2093         spin_lock_irqsave(&il->reg_lock, reg_flags);
2094         if (likely(_il_grab_nic_access(il))) {
2095                 val = _il_rd_prph(il, reg);
2096                 _il_wr_prph(il, reg, (val & ~mask));
2097                 _il_release_nic_access(il);
2098         }
2099         spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2100 }
2101 
2102 #define HW_KEY_DYNAMIC 0
2103 #define HW_KEY_DEFAULT 1
2104 
2105 #define IL_STA_DRIVER_ACTIVE BIT(0)     /* driver entry is active */
2106 #define IL_STA_UCODE_ACTIVE  BIT(1)     /* ucode entry is active */
2107 #define IL_STA_UCODE_INPROGRESS  BIT(2) /* ucode entry is in process of
2108                                            being activated */
2109 #define IL_STA_LOCAL BIT(3)     /* station state not directed by mac80211;
2110                                    (this is for the IBSS BSSID stations) */
2111 #define IL_STA_BCAST BIT(4)     /* this station is the special bcast station */
2112 
2113 void il_restore_stations(struct il_priv *il);
2114 void il_clear_ucode_stations(struct il_priv *il);
2115 void il_dealloc_bcast_stations(struct il_priv *il);
2116 int il_get_free_ucode_key_idx(struct il_priv *il);
2117 int il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags);
2118 int il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
2119                           struct ieee80211_sta *sta, u8 *sta_id_r);
2120 int il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr);
2121 int il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2122                       struct ieee80211_sta *sta);
2123 
2124 u8 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
2125                    struct ieee80211_sta *sta);
2126 
2127 int il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
2128                    u8 flags, bool init);
2129 
2130 /**
2131  * il_clear_driver_stations - clear knowledge of all stations from driver
2132  * @il: iwl il struct
2133  *
2134  * This is called during il_down() to make sure that in the case
2135  * we're coming there from a hardware restart mac80211 will be
2136  * able to reconfigure stations -- if we're getting there in the
2137  * normal down flow then the stations will already be cleared.
2138  */
2139 static inline void
2140 il_clear_driver_stations(struct il_priv *il)
2141 {
2142         unsigned long flags;
2143 
2144         spin_lock_irqsave(&il->sta_lock, flags);
2145         memset(il->stations, 0, sizeof(il->stations));
2146         il->num_stations = 0;
2147         il->ucode_key_table = 0;
2148         spin_unlock_irqrestore(&il->sta_lock, flags);
2149 }
2150 
2151 static inline int
2152 il_sta_id(struct ieee80211_sta *sta)
2153 {
2154         if (WARN_ON(!sta))
2155                 return IL_INVALID_STATION;
2156 
2157         return ((struct il_station_priv_common *)sta->drv_priv)->sta_id;
2158 }
2159 
2160 /**
2161  * il_sta_id_or_broadcast - return sta_id or broadcast sta
2162  * @il: iwl il
2163  * @context: the current context
2164  * @sta: mac80211 station
2165  *
2166  * In certain circumstances mac80211 passes a station pointer
2167  * that may be %NULL, for example during TX or key setup. In
2168  * that case, we need to use the broadcast station, so this
2169  * inline wraps that pattern.
2170  */
2171 static inline int
2172 il_sta_id_or_broadcast(struct il_priv *il, struct ieee80211_sta *sta)
2173 {
2174         int sta_id;
2175 
2176         if (!sta)
2177                 return il->hw_params.bcast_id;
2178 
2179         sta_id = il_sta_id(sta);
2180 
2181         /*
2182          * mac80211 should not be passing a partially
2183          * initialised station!
2184          */
2185         WARN_ON(sta_id == IL_INVALID_STATION);
2186 
2187         return sta_id;
2188 }
2189 
2190 /**
2191  * il_queue_inc_wrap - increment queue idx, wrap back to beginning
2192  * @idx -- current idx
2193  * @n_bd -- total number of entries in queue (must be power of 2)
2194  */
2195 static inline int
2196 il_queue_inc_wrap(int idx, int n_bd)
2197 {
2198         return ++idx & (n_bd - 1);
2199 }
2200 
2201 /**
2202  * il_queue_dec_wrap - decrement queue idx, wrap back to end
2203  * @idx -- current idx
2204  * @n_bd -- total number of entries in queue (must be power of 2)
2205  */
2206 static inline int
2207 il_queue_dec_wrap(int idx, int n_bd)
2208 {
2209         return --idx & (n_bd - 1);
2210 }
2211 
2212 /* TODO: Move fw_desc functions to iwl-pci.ko */
2213 static inline void
2214 il_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
2215 {
2216         if (desc->v_addr)
2217                 dma_free_coherent(&pci_dev->dev, desc->len, desc->v_addr,
2218                                   desc->p_addr);
2219         desc->v_addr = NULL;
2220         desc->len = 0;
2221 }
2222 
2223 static inline int
2224 il_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
2225 {
2226         if (!desc->len) {
2227                 desc->v_addr = NULL;
2228                 return -EINVAL;
2229         }
2230 
2231         desc->v_addr = dma_alloc_coherent(&pci_dev->dev, desc->len,
2232                                           &desc->p_addr, GFP_KERNEL);
2233         return (desc->v_addr != NULL) ? 0 : -ENOMEM;
2234 }
2235 
2236 /*
2237  * we have 8 bits used like this:
2238  *
2239  * 7 6 5 4 3 2 1 0
2240  * | | | | | | | |
2241  * | | | | | | +-+-------- AC queue (0-3)
2242  * | | | | | |
2243  * | +-+-+-+-+------------ HW queue ID
2244  * |
2245  * +---------------------- unused
2246  */
2247 static inline void
2248 il_set_swq_id(struct il_tx_queue *txq, u8 ac, u8 hwq)
2249 {
2250         BUG_ON(ac > 3);         /* only have 2 bits */
2251         BUG_ON(hwq > 31);       /* only use 5 bits */
2252 
2253         txq->swq_id = (hwq << 2) | ac;
2254 }
2255 
2256 static inline void
2257 _il_wake_queue(struct il_priv *il, u8 ac)
2258 {
2259         if (atomic_dec_return(&il->queue_stop_count[ac]) <= 0)
2260                 ieee80211_wake_queue(il->hw, ac);
2261 }
2262 
2263 static inline void
2264 _il_stop_queue(struct il_priv *il, u8 ac)
2265 {
2266         if (atomic_inc_return(&il->queue_stop_count[ac]) > 0)
2267                 ieee80211_stop_queue(il->hw, ac);
2268 }
2269 static inline void
2270 il_wake_queue(struct il_priv *il, struct il_tx_queue *txq)
2271 {
2272         u8 queue = txq->swq_id;
2273         u8 ac = queue & 3;
2274         u8 hwq = (queue >> 2) & 0x1f;
2275 
2276         if (test_and_clear_bit(hwq, il->queue_stopped))
2277                 _il_wake_queue(il, ac);
2278 }
2279 
2280 static inline void
2281 il_stop_queue(struct il_priv *il, struct il_tx_queue *txq)
2282 {
2283         u8 queue = txq->swq_id;
2284         u8 ac = queue & 3;
2285         u8 hwq = (queue >> 2) & 0x1f;
2286 
2287         if (!test_and_set_bit(hwq, il->queue_stopped))
2288                 _il_stop_queue(il, ac);
2289 }
2290 
2291 static inline void
2292 il_wake_queues_by_reason(struct il_priv *il, int reason)
2293 {
2294         u8 ac;
2295 
2296         if (test_and_clear_bit(reason, &il->stop_reason))
2297                 for (ac = 0; ac < 4; ac++)
2298                         _il_wake_queue(il, ac);
2299 }
2300 
2301 static inline void
2302 il_stop_queues_by_reason(struct il_priv *il, int reason)
2303 {
2304         u8 ac;
2305 
2306         if (!test_and_set_bit(reason, &il->stop_reason))
2307                 for (ac = 0; ac < 4; ac++)
2308                         _il_stop_queue(il, ac);
2309 }
2310 
2311 #ifdef ieee80211_stop_queue
2312 #undef ieee80211_stop_queue
2313 #endif
2314 
2315 #define ieee80211_stop_queue DO_NOT_USE_ieee80211_stop_queue
2316 
2317 #ifdef ieee80211_wake_queue
2318 #undef ieee80211_wake_queue
2319 #endif
2320 
2321 #define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue
2322 
2323 static inline void
2324 il_disable_interrupts(struct il_priv *il)
2325 {
2326         clear_bit(S_INT_ENABLED, &il->status);
2327 
2328         /* disable interrupts from uCode/NIC to host */
2329         _il_wr(il, CSR_INT_MASK, 0x00000000);
2330 
2331         /* acknowledge/clear/reset any interrupts still pending
2332          * from uCode or flow handler (Rx/Tx DMA) */
2333         _il_wr(il, CSR_INT, 0xffffffff);
2334         _il_wr(il, CSR_FH_INT_STATUS, 0xffffffff);
2335 }
2336 
2337 static inline void
2338 il_enable_rfkill_int(struct il_priv *il)
2339 {
2340         _il_wr(il, CSR_INT_MASK, CSR_INT_BIT_RF_KILL);
2341 }
2342 
2343 static inline void
2344 il_enable_interrupts(struct il_priv *il)
2345 {
2346         set_bit(S_INT_ENABLED, &il->status);
2347         _il_wr(il, CSR_INT_MASK, il->inta_mask);
2348 }
2349 
2350 /**
2351  * il_beacon_time_mask_low - mask of lower 32 bit of beacon time
2352  * @il -- pointer to il_priv data structure
2353  * @tsf_bits -- number of bits need to shift for masking)
2354  */
2355 static inline u32
2356 il_beacon_time_mask_low(struct il_priv *il, u16 tsf_bits)
2357 {
2358         return (1 << tsf_bits) - 1;
2359 }
2360 
2361 /**
2362  * il_beacon_time_mask_high - mask of higher 32 bit of beacon time
2363  * @il -- pointer to il_priv data structure
2364  * @tsf_bits -- number of bits need to shift for masking)
2365  */
2366 static inline u32
2367 il_beacon_time_mask_high(struct il_priv *il, u16 tsf_bits)
2368 {
2369         return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
2370 }
2371 
2372 /**
2373  * struct il_rb_status - reseve buffer status host memory mapped FH registers
2374  *
2375  * @closed_rb_num [0:11] - Indicates the idx of the RB which was closed
2376  * @closed_fr_num [0:11] - Indicates the idx of the RX Frame which was closed
2377  * @finished_rb_num [0:11] - Indicates the idx of the current RB
2378  *                           in which the last frame was written to
2379  * @finished_fr_num [0:11] - Indicates the idx of the RX Frame
2380  *                           which was transferred
2381  */
2382 struct il_rb_status {
2383         __le16 closed_rb_num;
2384         __le16 closed_fr_num;
2385         __le16 finished_rb_num;
2386         __le16 finished_fr_nam;
2387         __le32 __unused;        /* 3945 only */
2388 } __packed;
2389 
2390 #define TFD_QUEUE_SIZE_MAX      256
2391 #define TFD_QUEUE_SIZE_BC_DUP   64
2392 #define TFD_QUEUE_BC_SIZE       (TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP)
2393 #define IL_TX_DMA_MASK          DMA_BIT_MASK(36)
2394 #define IL_NUM_OF_TBS           20
2395 
2396 static inline u8
2397 il_get_dma_hi_addr(dma_addr_t addr)
2398 {
2399         return (sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0) & 0xF;
2400 }
2401 
2402 /**
2403  * struct il_tfd_tb transmit buffer descriptor within transmit frame descriptor
2404  *
2405  * This structure contains dma address and length of transmission address
2406  *
2407  * @lo: low [31:0] portion of the dma address of TX buffer every even is
2408  *      unaligned on 16 bit boundary
2409  * @hi_n_len: 0-3 [35:32] portion of dma
2410  *            4-15 length of the tx buffer
2411  */
2412 struct il_tfd_tb {
2413         __le32 lo;
2414         __le16 hi_n_len;
2415 } __packed;
2416 
2417 /**
2418  * struct il_tfd
2419  *
2420  * Transmit Frame Descriptor (TFD)
2421  *
2422  * @ __reserved1[3] reserved
2423  * @ num_tbs 0-4 number of active tbs
2424  *           5   reserved
2425  *           6-7 padding (not used)
2426  * @ tbs[20]    transmit frame buffer descriptors
2427  * @ __pad      padding
2428  *
2429  * Each Tx queue uses a circular buffer of 256 TFDs stored in host DRAM.
2430  * Both driver and device share these circular buffers, each of which must be
2431  * contiguous 256 TFDs x 128 bytes-per-TFD = 32 KBytes
2432  *
2433  * Driver must indicate the physical address of the base of each
2434  * circular buffer via the FH49_MEM_CBBC_QUEUE registers.
2435  *
2436  * Each TFD contains pointer/size information for up to 20 data buffers
2437  * in host DRAM.  These buffers collectively contain the (one) frame described
2438  * by the TFD.  Each buffer must be a single contiguous block of memory within
2439  * itself, but buffers may be scattered in host DRAM.  Each buffer has max size
2440  * of (4K - 4).  The concatenates all of a TFD's buffers into a single
2441  * Tx frame, up to 8 KBytes in size.
2442  *
2443  * A maximum of 255 (not 256!) TFDs may be on a queue waiting for Tx.
2444  */
2445 struct il_tfd {
2446         u8 __reserved1[3];
2447         u8 num_tbs;
2448         struct il_tfd_tb tbs[IL_NUM_OF_TBS];
2449         __le32 __pad;
2450 } __packed;
2451 /* PCI registers */
2452 #define PCI_CFG_RETRY_TIMEOUT   0x041
2453 
2454 struct il_rate_info {
2455         u8 plcp;                /* uCode API:  RATE_6M_PLCP, etc. */
2456         u8 plcp_siso;           /* uCode API:  RATE_SISO_6M_PLCP, etc. */
2457         u8 plcp_mimo2;          /* uCode API:  RATE_MIMO2_6M_PLCP, etc. */
2458         u8 ieee;                /* MAC header:  RATE_6M_IEEE, etc. */
2459         u8 prev_ieee;           /* previous rate in IEEE speeds */
2460         u8 next_ieee;           /* next rate in IEEE speeds */
2461         u8 prev_rs;             /* previous rate used in rs algo */
2462         u8 next_rs;             /* next rate used in rs algo */
2463         u8 prev_rs_tgg;         /* previous rate used in TGG rs algo */
2464         u8 next_rs_tgg;         /* next rate used in TGG rs algo */
2465 };
2466 
2467 struct il3945_rate_info {
2468         u8 plcp;                /* uCode API:  RATE_6M_PLCP, etc. */
2469         u8 ieee;                /* MAC header:  RATE_6M_IEEE, etc. */
2470         u8 prev_ieee;           /* previous rate in IEEE speeds */
2471         u8 next_ieee;           /* next rate in IEEE speeds */
2472         u8 prev_rs;             /* previous rate used in rs algo */
2473         u8 next_rs;             /* next rate used in rs algo */
2474         u8 prev_rs_tgg;         /* previous rate used in TGG rs algo */
2475         u8 next_rs_tgg;         /* next rate used in TGG rs algo */
2476         u8 table_rs_idx;        /* idx in rate scale table cmd */
2477         u8 prev_table_rs;       /* prev in rate table cmd */
2478 };
2479 
2480 /*
2481  * These serve as idxes into
2482  * struct il_rate_info il_rates[RATE_COUNT];
2483  */
2484 enum {
2485         RATE_1M_IDX = 0,
2486         RATE_2M_IDX,
2487         RATE_5M_IDX,
2488         RATE_11M_IDX,
2489         RATE_6M_IDX,
2490         RATE_9M_IDX,
2491         RATE_12M_IDX,
2492         RATE_18M_IDX,
2493         RATE_24M_IDX,
2494         RATE_36M_IDX,
2495         RATE_48M_IDX,
2496         RATE_54M_IDX,
2497         RATE_60M_IDX,
2498         RATE_COUNT,
2499         RATE_COUNT_LEGACY = RATE_COUNT - 1,     /* Excluding 60M */
2500         RATE_COUNT_3945 = RATE_COUNT - 1,
2501         RATE_INVM_IDX = RATE_COUNT,
2502         RATE_INVALID = RATE_COUNT,
2503 };
2504 
2505 enum {
2506         RATE_6M_IDX_TBL = 0,
2507         RATE_9M_IDX_TBL,
2508         RATE_12M_IDX_TBL,
2509         RATE_18M_IDX_TBL,
2510         RATE_24M_IDX_TBL,
2511         RATE_36M_IDX_TBL,
2512         RATE_48M_IDX_TBL,
2513         RATE_54M_IDX_TBL,
2514         RATE_1M_IDX_TBL,
2515         RATE_2M_IDX_TBL,
2516         RATE_5M_IDX_TBL,
2517         RATE_11M_IDX_TBL,
2518         RATE_INVM_IDX_TBL = RATE_INVM_IDX - 1,
2519 };
2520 
2521 enum {
2522         IL_FIRST_OFDM_RATE = RATE_6M_IDX,
2523         IL39_LAST_OFDM_RATE = RATE_54M_IDX,
2524         IL_LAST_OFDM_RATE = RATE_60M_IDX,
2525         IL_FIRST_CCK_RATE = RATE_1M_IDX,
2526         IL_LAST_CCK_RATE = RATE_11M_IDX,
2527 };
2528 
2529 /* #define vs. enum to keep from defaulting to 'large integer' */
2530 #define RATE_6M_MASK   (1 << RATE_6M_IDX)
2531 #define RATE_9M_MASK   (1 << RATE_9M_IDX)
2532 #define RATE_12M_MASK  (1 << RATE_12M_IDX)
2533 #define RATE_18M_MASK  (1 << RATE_18M_IDX)
2534 #define RATE_24M_MASK  (1 << RATE_24M_IDX)
2535 #define RATE_36M_MASK  (1 << RATE_36M_IDX)
2536 #define RATE_48M_MASK  (1 << RATE_48M_IDX)
2537 #define RATE_54M_MASK  (1 << RATE_54M_IDX)
2538 #define RATE_60M_MASK  (1 << RATE_60M_IDX)
2539 #define RATE_1M_MASK   (1 << RATE_1M_IDX)
2540 #define RATE_2M_MASK   (1 << RATE_2M_IDX)
2541 #define RATE_5M_MASK   (1 << RATE_5M_IDX)
2542 #define RATE_11M_MASK  (1 << RATE_11M_IDX)
2543 
2544 /* uCode API values for legacy bit rates, both OFDM and CCK */
2545 enum {
2546         RATE_6M_PLCP = 13,
2547         RATE_9M_PLCP = 15,
2548         RATE_12M_PLCP = 5,
2549         RATE_18M_PLCP = 7,
2550         RATE_24M_PLCP = 9,
2551         RATE_36M_PLCP = 11,
2552         RATE_48M_PLCP = 1,
2553         RATE_54M_PLCP = 3,
2554         RATE_60M_PLCP = 3,      /*FIXME:RS:should be removed */
2555         RATE_1M_PLCP = 10,
2556         RATE_2M_PLCP = 20,
2557         RATE_5M_PLCP = 55,
2558         RATE_11M_PLCP = 110,
2559         /*FIXME:RS:add RATE_LEGACY_INVM_PLCP = 0, */
2560 };
2561 
2562 /* uCode API values for OFDM high-throughput (HT) bit rates */
2563 enum {
2564         RATE_SISO_6M_PLCP = 0,
2565         RATE_SISO_12M_PLCP = 1,
2566         RATE_SISO_18M_PLCP = 2,
2567         RATE_SISO_24M_PLCP = 3,
2568         RATE_SISO_36M_PLCP = 4,
2569         RATE_SISO_48M_PLCP = 5,
2570         RATE_SISO_54M_PLCP = 6,
2571         RATE_SISO_60M_PLCP = 7,
2572         RATE_MIMO2_6M_PLCP = 0x8,
2573         RATE_MIMO2_12M_PLCP = 0x9,
2574         RATE_MIMO2_18M_PLCP = 0xa,
2575         RATE_MIMO2_24M_PLCP = 0xb,
2576         RATE_MIMO2_36M_PLCP = 0xc,
2577         RATE_MIMO2_48M_PLCP = 0xd,
2578         RATE_MIMO2_54M_PLCP = 0xe,
2579         RATE_MIMO2_60M_PLCP = 0xf,
2580         RATE_SISO_INVM_PLCP,
2581         RATE_MIMO2_INVM_PLCP = RATE_SISO_INVM_PLCP,
2582 };
2583 
2584 /* MAC header values for bit rates */
2585 enum {
2586         RATE_6M_IEEE = 12,
2587         RATE_9M_IEEE = 18,
2588         RATE_12M_IEEE = 24,
2589         RATE_18M_IEEE = 36,
2590         RATE_24M_IEEE = 48,
2591         RATE_36M_IEEE = 72,
2592         RATE_48M_IEEE = 96,
2593         RATE_54M_IEEE = 108,
2594         RATE_60M_IEEE = 120,
2595         RATE_1M_IEEE = 2,
2596         RATE_2M_IEEE = 4,
2597         RATE_5M_IEEE = 11,
2598         RATE_11M_IEEE = 22,
2599 };
2600 
2601 #define IL_CCK_BASIC_RATES_MASK    \
2602         (RATE_1M_MASK          | \
2603         RATE_2M_MASK)
2604 
2605 #define IL_CCK_RATES_MASK          \
2606         (IL_CCK_BASIC_RATES_MASK  | \
2607         RATE_5M_MASK          | \
2608         RATE_11M_MASK)
2609 
2610 #define IL_OFDM_BASIC_RATES_MASK   \
2611         (RATE_6M_MASK         | \
2612         RATE_12M_MASK         | \
2613         RATE_24M_MASK)
2614 
2615 #define IL_OFDM_RATES_MASK         \
2616         (IL_OFDM_BASIC_RATES_MASK | \
2617         RATE_9M_MASK          | \
2618         RATE_18M_MASK         | \
2619         RATE_36M_MASK         | \
2620         RATE_48M_MASK         | \
2621         RATE_54M_MASK)
2622 
2623 #define IL_BASIC_RATES_MASK         \
2624         (IL_OFDM_BASIC_RATES_MASK | \
2625          IL_CCK_BASIC_RATES_MASK)
2626 
2627 #define RATES_MASK ((1 << RATE_COUNT) - 1)
2628 #define RATES_MASK_3945 ((1 << RATE_COUNT_3945) - 1)
2629 
2630 #define IL_INVALID_VALUE    -1
2631 
2632 #define IL_MIN_RSSI_VAL                 -100
2633 #define IL_MAX_RSSI_VAL                    0
2634 
2635 /* These values specify how many Tx frame attempts before
2636  * searching for a new modulation mode */
2637 #define IL_LEGACY_FAILURE_LIMIT 160
2638 #define IL_LEGACY_SUCCESS_LIMIT 480
2639 #define IL_LEGACY_TBL_COUNT             160
2640 
2641 #define IL_NONE_LEGACY_FAILURE_LIMIT    400
2642 #define IL_NONE_LEGACY_SUCCESS_LIMIT    4500
2643 #define IL_NONE_LEGACY_TBL_COUNT        1500
2644 
2645 /* Success ratio (ACKed / attempted tx frames) values (perfect is 128 * 100) */
2646 #define IL_RS_GOOD_RATIO                12800   /* 100% */
2647 #define RATE_SCALE_SWITCH               10880   /*  85% */
2648 #define RATE_HIGH_TH            10880   /*  85% */
2649 #define RATE_INCREASE_TH                6400    /*  50% */
2650 #define RATE_DECREASE_TH                1920    /*  15% */
2651 
2652 /* possible actions when in legacy mode */
2653 #define IL_LEGACY_SWITCH_ANTENNA1      0
2654 #define IL_LEGACY_SWITCH_ANTENNA2      1
2655 #define IL_LEGACY_SWITCH_SISO          2
2656 #define IL_LEGACY_SWITCH_MIMO2_AB      3
2657 #define IL_LEGACY_SWITCH_MIMO2_AC      4
2658 #define IL_LEGACY_SWITCH_MIMO2_BC      5
2659 
2660 /* possible actions when in siso mode */
2661 #define IL_SISO_SWITCH_ANTENNA1        0
2662 #define IL_SISO_SWITCH_ANTENNA2        1
2663 #define IL_SISO_SWITCH_MIMO2_AB        2
2664 #define IL_SISO_SWITCH_MIMO2_AC        3
2665 #define IL_SISO_SWITCH_MIMO2_BC        4
2666 #define IL_SISO_SWITCH_GI              5
2667 
2668 /* possible actions when in mimo mode */
2669 #define IL_MIMO2_SWITCH_ANTENNA1       0
2670 #define IL_MIMO2_SWITCH_ANTENNA2       1
2671 #define IL_MIMO2_SWITCH_SISO_A         2
2672 #define IL_MIMO2_SWITCH_SISO_B         3
2673 #define IL_MIMO2_SWITCH_SISO_C         4
2674 #define IL_MIMO2_SWITCH_GI             5
2675 
2676 #define IL_MAX_SEARCH IL_MIMO2_SWITCH_GI
2677 
2678 #define IL_ACTION_LIMIT         3       /* # possible actions */
2679 
2680 #define LQ_SIZE         2       /* 2 mode tables:  "Active" and "Search" */
2681 
2682 /* load per tid defines for A-MPDU activation */
2683 #define IL_AGG_TPT_THREHOLD     0
2684 #define IL_AGG_LOAD_THRESHOLD   10
2685 #define IL_AGG_ALL_TID          0xff
2686 #define TID_QUEUE_CELL_SPACING  50      /*mS */
2687 #define TID_QUEUE_MAX_SIZE      20
2688 #define TID_ROUND_VALUE         5       /* mS */
2689 #define TID_MAX_LOAD_COUNT      8
2690 
2691 #define TID_MAX_TIME_DIFF ((TID_QUEUE_MAX_SIZE - 1) * TID_QUEUE_CELL_SPACING)
2692 #define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y))
2693 
2694 extern const struct il_rate_info il_rates[RATE_COUNT];
2695 
2696 enum il_table_type {
2697         LQ_NONE,
2698         LQ_G,                   /* legacy types */
2699         LQ_A,
2700         LQ_SISO,                /* high-throughput types */
2701         LQ_MIMO2,
2702         LQ_MAX,
2703 };
2704 
2705 #define is_legacy(tbl) ((tbl) == LQ_G || (tbl) == LQ_A)
2706 #define is_siso(tbl) ((tbl) == LQ_SISO)
2707 #define is_mimo2(tbl) ((tbl) == LQ_MIMO2)
2708 #define is_mimo(tbl) (is_mimo2(tbl))
2709 #define is_Ht(tbl) (is_siso(tbl) || is_mimo(tbl))
2710 #define is_a_band(tbl) ((tbl) == LQ_A)
2711 #define is_g_and(tbl) ((tbl) == LQ_G)
2712 
2713 #define ANT_NONE        0x0
2714 #define ANT_A           BIT(0)
2715 #define ANT_B           BIT(1)
2716 #define ANT_AB          (ANT_A | ANT_B)
2717 #define ANT_C           BIT(2)
2718 #define ANT_AC          (ANT_A | ANT_C)
2719 #define ANT_BC          (ANT_B | ANT_C)
2720 #define ANT_ABC         (ANT_AB | ANT_C)
2721 
2722 #define IL_MAX_MCS_DISPLAY_SIZE 12
2723 
2724 struct il_rate_mcs_info {
2725         char mbps[IL_MAX_MCS_DISPLAY_SIZE];
2726         char mcs[IL_MAX_MCS_DISPLAY_SIZE];
2727 };
2728 
2729 /**
2730  * struct il_rate_scale_data -- tx success history for one rate
2731  */
2732 struct il_rate_scale_data {
2733         u64 data;               /* bitmap of successful frames */
2734         s32 success_counter;    /* number of frames successful */
2735         s32 success_ratio;      /* per-cent * 128  */
2736         s32 counter;            /* number of frames attempted */
2737         s32 average_tpt;        /* success ratio * expected throughput */
2738         unsigned long stamp;
2739 };
2740 
2741 /**
2742  * struct il_scale_tbl_info -- tx params and success history for all rates
2743  *
2744  * There are two of these in struct il_lq_sta,
2745  * one for "active", and one for "search".
2746  */
2747 struct il_scale_tbl_info {
2748         enum il_table_type lq_type;
2749         u8 ant_type;
2750         u8 is_SGI;              /* 1 = short guard interval */
2751         u8 is_ht40;             /* 1 = 40 MHz channel width */
2752         u8 is_dup;              /* 1 = duplicated data streams */
2753         u8 action;              /* change modulation; IL_[LEGACY/SISO/MIMO]_SWITCH_* */
2754         u8 max_search;          /* maximun number of tables we can search */
2755         s32 *expected_tpt;      /* throughput metrics; expected_tpt_G, etc. */
2756         u32 current_rate;       /* rate_n_flags, uCode API format */
2757         struct il_rate_scale_data win[RATE_COUNT];      /* rate histories */
2758 };
2759 
2760 struct il_traffic_load {
2761         unsigned long time_stamp;       /* age of the oldest stats */
2762         u32 packet_count[TID_QUEUE_MAX_SIZE];   /* packet count in this time
2763                                                  * slice */
2764         u32 total;              /* total num of packets during the
2765                                  * last TID_MAX_TIME_DIFF */
2766         u8 queue_count;         /* number of queues that has
2767                                  * been used since the last cleanup */
2768         u8 head;                /* start of the circular buffer */
2769 };
2770 
2771 /**
2772  * struct il_lq_sta -- driver's rate scaling ilate structure
2773  *
2774  * Pointer to this gets passed back and forth between driver and mac80211.
2775  */
2776 struct il_lq_sta {
2777         u8 active_tbl;          /* idx of active table, range 0-1 */
2778         u8 enable_counter;      /* indicates HT mode */
2779         u8 stay_in_tbl;         /* 1: disallow, 0: allow search for new mode */
2780         u8 search_better_tbl;   /* 1: currently trying alternate mode */
2781         s32 last_tpt;
2782 
2783         /* The following determine when to search for a new mode */
2784         u32 table_count_limit;
2785         u32 max_failure_limit;  /* # failed frames before new search */
2786         u32 max_success_limit;  /* # successful frames before new search */
2787         u32 table_count;
2788         u32 total_failed;       /* total failed frames, any/all rates */
2789         u32 total_success;      /* total successful frames, any/all rates */
2790         u64 flush_timer;        /* time staying in mode before new search */
2791 
2792         u8 action_counter;      /* # mode-switch actions tried */
2793         u8 is_green;
2794         u8 is_dup;
2795         enum nl80211_band band;
2796 
2797         /* The following are bitmaps of rates; RATE_6M_MASK, etc. */
2798         u32 supp_rates;
2799         u16 active_legacy_rate;
2800         u16 active_siso_rate;
2801         u16 active_mimo2_rate;
2802         s8 max_rate_idx;        /* Max rate set by user */
2803         u8 missed_rate_counter;
2804 
2805         struct il_link_quality_cmd lq;
2806         struct il_scale_tbl_info lq_info[LQ_SIZE];      /* "active", "search" */
2807         struct il_traffic_load load[TID_MAX_LOAD_COUNT];
2808         u8 tx_agg_tid_en;
2809 #ifdef CONFIG_MAC80211_DEBUGFS
2810         u32 dbg_fixed_rate;
2811 #endif
2812         struct il_priv *drv;
2813 
2814         /* used to be in sta_info */
2815         int last_txrate_idx;
2816         /* last tx rate_n_flags */
2817         u32 last_rate_n_flags;
2818         /* packets destined for this STA are aggregated */
2819         u8 is_agg;
2820 };
2821 
2822 /*
2823  * il_station_priv: Driver's ilate station information
2824  *
2825  * When mac80211 creates a station it reserves some space (hw->sta_data_size)
2826  * in the structure for use by driver. This structure is places in that
2827  * space.
2828  *
2829  * The common struct MUST be first because it is shared between
2830  * 3945 and 4965!
2831  */
2832 struct il_station_priv {
2833         struct il_station_priv_common common;
2834         struct il_lq_sta lq_sta;
2835         atomic_t pending_frames;
2836         bool client;
2837         bool asleep;
2838 };
2839 
2840 static inline u8
2841 il4965_num_of_ant(u8 m)
2842 {
2843         return !!(m & ANT_A) + !!(m & ANT_B) + !!(m & ANT_C);
2844 }
2845 
2846 static inline u8
2847 il4965_first_antenna(u8 mask)
2848 {
2849         if (mask & ANT_A)
2850                 return ANT_A;
2851         if (mask & ANT_B)
2852                 return ANT_B;
2853         return ANT_C;
2854 }
2855 
2856 /**
2857  * il3945_rate_scale_init - Initialize the rate scale table based on assoc info
2858  *
2859  * The specific throughput table used is based on the type of network
2860  * the associated with, including A, B, G, and G w/ TGG protection
2861  */
2862 void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id);
2863 
2864 /* Initialize station's rate scaling information after adding station */
2865 void il4965_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
2866                          u8 sta_id);
2867 void il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
2868                          u8 sta_id);
2869 
2870 /**
2871  * il_rate_control_register - Register the rate control algorithm callbacks
2872  *
2873  * Since the rate control algorithm is hardware specific, there is no need
2874  * or reason to place it as a stand alone module.  The driver can call
2875  * il_rate_control_register in order to register the rate control callbacks
2876  * with the mac80211 subsystem.  This should be performed prior to calling
2877  * ieee80211_register_hw
2878  *
2879  */
2880 int il4965_rate_control_register(void);
2881 int il3945_rate_control_register(void);
2882 
2883 /**
2884  * il_rate_control_unregister - Unregister the rate control callbacks
2885  *
2886  * This should be called after calling ieee80211_unregister_hw, but before
2887  * the driver is unloaded.
2888  */
2889 void il4965_rate_control_unregister(void);
2890 void il3945_rate_control_unregister(void);
2891 
2892 int il_power_update_mode(struct il_priv *il, bool force);
2893 void il_power_initialize(struct il_priv *il);
2894 
2895 extern u32 il_debug_level;
2896 
2897 #ifdef CONFIG_IWLEGACY_DEBUG
2898 /*
2899  * il_get_debug_level: Return active debug level for device
2900  *
2901  * Using sysfs it is possible to set per device debug level. This debug
2902  * level will be used if set, otherwise the global debug level which can be
2903  * set via module parameter is used.
2904  */
2905 static inline u32
2906 il_get_debug_level(struct il_priv *il)
2907 {
2908         if (il->debug_level)
2909                 return il->debug_level;
2910         else
2911                 return il_debug_level;
2912 }
2913 #else
2914 static inline u32
2915 il_get_debug_level(struct il_priv *il)
2916 {
2917         return il_debug_level;
2918 }
2919 #endif
2920 
2921 #define il_print_hex_error(il, p, len)                                  \
2922 do {                                                                    \
2923         print_hex_dump(KERN_ERR, "iwl data: ",                          \
2924                        DUMP_PREFIX_OFFSET, 16, 1, p, len, 1);           \
2925 } while (0)
2926 
2927 #ifdef CONFIG_IWLEGACY_DEBUG
2928 #define IL_DBG(level, fmt, args...)                                     \
2929 do {                                                                    \
2930         if (il_get_debug_level(il) & level)                             \
2931                 dev_err(&il->hw->wiphy->dev, "%c %s " fmt,              \
2932                         in_interrupt() ? 'I' : 'U', __func__ , ##args); \
2933 } while (0)
2934 
2935 #define il_print_hex_dump(il, level, p, len)                            \
2936 do {                                                                    \
2937         if (il_get_debug_level(il) & level)                             \
2938                 print_hex_dump(KERN_DEBUG, "iwl data: ",                \
2939                                DUMP_PREFIX_OFFSET, 16, 1, p, len, 1);   \
2940 } while (0)
2941 
2942 #else
2943 #define IL_DBG(level, fmt, args...)
2944 static inline void
2945 il_print_hex_dump(struct il_priv *il, int level, const void *p, u32 len)
2946 {
2947 }
2948 #endif /* CONFIG_IWLEGACY_DEBUG */
2949 
2950 #ifdef CONFIG_IWLEGACY_DEBUGFS
2951 void il_dbgfs_register(struct il_priv *il, const char *name);
2952 void il_dbgfs_unregister(struct il_priv *il);
2953 #else
2954 static inline void il_dbgfs_register(struct il_priv *il, const char *name)
2955 {
2956 }
2957 
2958 static inline void
2959 il_dbgfs_unregister(struct il_priv *il)
2960 {
2961 }
2962 #endif /* CONFIG_IWLEGACY_DEBUGFS */
2963 
2964 /*
2965  * To use the debug system:
2966  *
2967  * If you are defining a new debug classification, simply add it to the #define
2968  * list here in the form of
2969  *
2970  * #define IL_DL_xxxx VALUE
2971  *
2972  * where xxxx should be the name of the classification (for example, WEP).
2973  *
2974  * You then need to either add a IL_xxxx_DEBUG() macro definition for your
2975  * classification, or use IL_DBG(IL_DL_xxxx, ...) whenever you want
2976  * to send output to that classification.
2977  *
2978  * The active debug levels can be accessed via files
2979  *
2980  *      /sys/module/iwl4965/parameters/debug
2981  *      /sys/module/iwl3945/parameters/debug
2982  *      /sys/class/net/wlan0/device/debug_level
2983  *
2984  * when CONFIG_IWLEGACY_DEBUG=y.
2985  */
2986 
2987 /* 0x0000000F - 0x00000001 */
2988 #define IL_DL_INFO              (1 << 0)
2989 #define IL_DL_MAC80211          (1 << 1)
2990 #define IL_DL_HCMD              (1 << 2)
2991 #define IL_DL_STATE             (1 << 3)
2992 /* 0x000000F0 - 0x00000010 */
2993 #define IL_DL_MACDUMP           (1 << 4)
2994 #define IL_DL_HCMD_DUMP         (1 << 5)
2995 #define IL_DL_EEPROM            (1 << 6)
2996 #define IL_DL_RADIO             (1 << 7)
2997 /* 0x00000F00 - 0x00000100 */
2998 #define IL_DL_POWER             (1 << 8)
2999 #define IL_DL_TEMP              (1 << 9)
3000 #define IL_DL_NOTIF             (1 << 10)
3001 #define IL_DL_SCAN              (1 << 11)
3002 /* 0x0000F000 - 0x00001000 */
3003 #define IL_DL_ASSOC             (1 << 12)
3004 #define IL_DL_DROP              (1 << 13)
3005 #define IL_DL_TXPOWER           (1 << 14)
3006 #define IL_DL_AP                (1 << 15)
3007 /* 0x000F0000 - 0x00010000 */
3008 #define IL_DL_FW                (1 << 16)
3009 #define IL_DL_RF_KILL           (1 << 17)
3010 #define IL_DL_FW_ERRORS         (1 << 18)
3011 #define IL_DL_LED               (1 << 19)
3012 /* 0x00F00000 - 0x00100000 */
3013 #define IL_DL_RATE              (1 << 20)
3014 #define IL_DL_CALIB             (1 << 21)
3015 #define IL_DL_WEP               (1 << 22)
3016 #define IL_DL_TX                (1 << 23)
3017 /* 0x0F000000 - 0x01000000 */
3018 #define IL_DL_RX                (1 << 24)
3019 #define IL_DL_ISR               (1 << 25)
3020 #define IL_DL_HT                (1 << 26)
3021 /* 0xF0000000 - 0x10000000 */
3022 #define IL_DL_11H               (1 << 28)
3023 #define IL_DL_STATS             (1 << 29)
3024 #define IL_DL_TX_REPLY          (1 << 30)
3025 #define IL_DL_QOS               (1 << 31)
3026 
3027 #define D_INFO(f, a...)         IL_DBG(IL_DL_INFO, f, ## a)
3028 #define D_MAC80211(f, a...)     IL_DBG(IL_DL_MAC80211, f, ## a)
3029 #define D_MACDUMP(f, a...)      IL_DBG(IL_DL_MACDUMP, f, ## a)
3030 #define D_TEMP(f, a...)         IL_DBG(IL_DL_TEMP, f, ## a)
3031 #define D_SCAN(f, a...)         IL_DBG(IL_DL_SCAN, f, ## a)
3032 #define D_RX(f, a...)           IL_DBG(IL_DL_RX, f, ## a)
3033 #define D_TX(f, a...)           IL_DBG(IL_DL_TX, f, ## a)
3034 #define D_ISR(f, a...)          IL_DBG(IL_DL_ISR, f, ## a)
3035 #define D_LED(f, a...)          IL_DBG(IL_DL_LED, f, ## a)
3036 #define D_WEP(f, a...)          IL_DBG(IL_DL_WEP, f, ## a)
3037 #define D_HC(f, a...)           IL_DBG(IL_DL_HCMD, f, ## a)
3038 #define D_HC_DUMP(f, a...)      IL_DBG(IL_DL_HCMD_DUMP, f, ## a)
3039 #define D_EEPROM(f, a...)       IL_DBG(IL_DL_EEPROM, f, ## a)
3040 #define D_CALIB(f, a...)        IL_DBG(IL_DL_CALIB, f, ## a)
3041 #define D_FW(f, a...)           IL_DBG(IL_DL_FW, f, ## a)
3042 #define D_RF_KILL(f, a...)      IL_DBG(IL_DL_RF_KILL, f, ## a)
3043 #define D_DROP(f, a...)         IL_DBG(IL_DL_DROP, f, ## a)
3044 #define D_AP(f, a...)           IL_DBG(IL_DL_AP, f, ## a)
3045 #define D_TXPOWER(f, a...)      IL_DBG(IL_DL_TXPOWER, f, ## a)
3046 #define D_RATE(f, a...)         IL_DBG(IL_DL_RATE, f, ## a)
3047 #define D_NOTIF(f, a...)        IL_DBG(IL_DL_NOTIF, f, ## a)
3048 #define D_ASSOC(f, a...)        IL_DBG(IL_DL_ASSOC, f, ## a)
3049 #define D_HT(f, a...)           IL_DBG(IL_DL_HT, f, ## a)
3050 #define D_STATS(f, a...)        IL_DBG(IL_DL_STATS, f, ## a)
3051 #define D_TX_REPLY(f, a...)     IL_DBG(IL_DL_TX_REPLY, f, ## a)
3052 #define D_QOS(f, a...)          IL_DBG(IL_DL_QOS, f, ## a)
3053 #define D_RADIO(f, a...)        IL_DBG(IL_DL_RADIO, f, ## a)
3054 #define D_POWER(f, a...)        IL_DBG(IL_DL_POWER, f, ## a)
3055 #define D_11H(f, a...)          IL_DBG(IL_DL_11H, f, ## a)
3056 
3057 #endif /* __il_core_h__ */
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root/drivers/net/wireless/intel/iwlegacy/common.h

INCLUDED FROM

DEFINITIONS
