root/drivers/net/wireless/intel/iwlwifi/iwl-config.h

INCLUDED FROM

DEFINITIONS

1. num_of_ant

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
   9  * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
  10  * Copyright(c) 2018 - 2019 Intel Corporation
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of version 2 of the GNU General Public License as
  14  * published by the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  * General Public License for more details.
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called COPYING.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <linuxwifi@intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  * BSD LICENSE
  29  *
  30  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  31  * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
  32  * Copyright(c) 2018 - 2019 Intel Corporation
  33  * All rights reserved.
  34  *
  35  * Redistribution and use in source and binary forms, with or without
  36  * modification, are permitted provided that the following conditions
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  38  *
  39  *  * Redistributions of source code must retain the above copyright
  40  *    notice, this list of conditions and the following disclaimer.
  41  *  * Redistributions in binary form must reproduce the above copyright
  42  *    notice, this list of conditions and the following disclaimer in
  43  *    the documentation and/or other materials provided with the
  44  *    distribution.
  45  *  * Neither the name Intel Corporation nor the names of its
  46  *    contributors may be used to endorse or promote products derived
  47  *    from this software without specific prior written permission.
  48  *
  49  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  50  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  51  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  52  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  53  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  54  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  55  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  56  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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  58  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  59  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  60  *
  61  *****************************************************************************/
  62 #ifndef __IWL_CONFIG_H__
  63 #define __IWL_CONFIG_H__
  64 
  65 #include <linux/types.h>
  66 #include <linux/netdevice.h>
  67 #include <linux/ieee80211.h>
  68 #include <linux/nl80211.h>
  69 #include "iwl-csr.h"
  70 
  71 enum iwl_device_family {
  72         IWL_DEVICE_FAMILY_UNDEFINED,
  73         IWL_DEVICE_FAMILY_1000,
  74         IWL_DEVICE_FAMILY_100,
  75         IWL_DEVICE_FAMILY_2000,
  76         IWL_DEVICE_FAMILY_2030,
  77         IWL_DEVICE_FAMILY_105,
  78         IWL_DEVICE_FAMILY_135,
  79         IWL_DEVICE_FAMILY_5000,
  80         IWL_DEVICE_FAMILY_5150,
  81         IWL_DEVICE_FAMILY_6000,
  82         IWL_DEVICE_FAMILY_6000i,
  83         IWL_DEVICE_FAMILY_6005,
  84         IWL_DEVICE_FAMILY_6030,
  85         IWL_DEVICE_FAMILY_6050,
  86         IWL_DEVICE_FAMILY_6150,
  87         IWL_DEVICE_FAMILY_7000,
  88         IWL_DEVICE_FAMILY_8000,
  89         IWL_DEVICE_FAMILY_9000,
  90         IWL_DEVICE_FAMILY_22000,
  91         IWL_DEVICE_FAMILY_22560,
  92         IWL_DEVICE_FAMILY_AX210,
  93 };
  94 
  95 /*
  96  * LED mode
  97  *    IWL_LED_DEFAULT:  use device default
  98  *    IWL_LED_RF_STATE: turn LED on/off based on RF state
  99  *                      LED ON  = RF ON
 100  *                      LED OFF = RF OFF
 101  *    IWL_LED_BLINK:    adjust led blink rate based on blink table
 102  *    IWL_LED_DISABLE:  led disabled
 103  */
 104 enum iwl_led_mode {
 105         IWL_LED_DEFAULT,
 106         IWL_LED_RF_STATE,
 107         IWL_LED_BLINK,
 108         IWL_LED_DISABLE,
 109 };
 110 
 111 /**
 112  * enum iwl_nvm_type - nvm formats
 113  * @IWL_NVM: the regular format
 114  * @IWL_NVM_EXT: extended NVM format
 115  * @IWL_NVM_SDP: NVM format used by 3168 series
 116  */
 117 enum iwl_nvm_type {
 118         IWL_NVM,
 119         IWL_NVM_EXT,
 120         IWL_NVM_SDP,
 121 };
 122 
 123 /*
 124  * This is the threshold value of plcp error rate per 100mSecs.  It is
 125  * used to set and check for the validity of plcp_delta.
 126  */
 127 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN          1
 128 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF          50
 129 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF     100
 130 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200
 131 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX          255
 132 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE      0
 133 
 134 /* TX queue watchdog timeouts in mSecs */
 135 #define IWL_WATCHDOG_DISABLED   0
 136 #define IWL_DEF_WD_TIMEOUT      2500
 137 #define IWL_LONG_WD_TIMEOUT     10000
 138 #define IWL_MAX_WD_TIMEOUT      120000
 139 
 140 #define IWL_DEFAULT_MAX_TX_POWER 22
 141 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
 142                                  NETIF_F_TSO | NETIF_F_TSO6)
 143 
 144 /* Antenna presence definitions */
 145 #define ANT_NONE        0x0
 146 #define ANT_INVALID     0xff
 147 #define ANT_A           BIT(0)
 148 #define ANT_B           BIT(1)
 149 #define ANT_C           BIT(2)
 150 #define ANT_AB          (ANT_A | ANT_B)
 151 #define ANT_AC          (ANT_A | ANT_C)
 152 #define ANT_BC          (ANT_B | ANT_C)
 153 #define ANT_ABC         (ANT_A | ANT_B | ANT_C)
 154 #define MAX_ANT_NUM 3
 155 
 156 
 157 static inline u8 num_of_ant(u8 mask)
 158 {
 159         return  !!((mask) & ANT_A) +
 160                 !!((mask) & ANT_B) +
 161                 !!((mask) & ANT_C);
 162 }
 163 
 164 /**
 165  * struct iwl_base_params - params not likely to change within a device family
 166  * @max_ll_items: max number of OTP blocks
 167  * @shadow_ram_support: shadow support for OTP memory
 168  * @led_compensation: compensate on the led on/off time per HW according
 169  *      to the deviation to achieve the desired led frequency.
 170  *      The detail algorithm is described in iwl-led.c
 171  * @wd_timeout: TX queues watchdog timeout
 172  * @max_event_log_size: size of event log buffer size for ucode event logging
 173  * @shadow_reg_enable: HW shadow register support
 174  * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
 175  *      is in flight. This is due to a HW bug in 7260, 3160 and 7265.
 176  * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
 177  * @max_tfd_queue_size: max number of entries in tfd queue.
 178  */
 179 struct iwl_base_params {
 180         unsigned int wd_timeout;
 181 
 182         u16 eeprom_size;
 183         u16 max_event_log_size;
 184 
 185         u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
 186            shadow_ram_support:1,
 187            shadow_reg_enable:1,
 188            pcie_l1_allowed:1,
 189            apmg_wake_up_wa:1,
 190            scd_chain_ext_wa:1;
 191 
 192         u16 num_of_queues;      /* def: HW dependent */
 193         u32 max_tfd_queue_size; /* def: HW dependent */
 194 
 195         u8 max_ll_items;
 196         u8 led_compensation;
 197 };
 198 
 199 /*
 200  * @stbc: support Tx STBC and 1*SS Rx STBC
 201  * @ldpc: support Tx/Rx with LDPC
 202  * @use_rts_for_aggregation: use rts/cts protection for HT traffic
 203  * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
 204  */
 205 struct iwl_ht_params {
 206         u8 ht_greenfield_support:1,
 207            stbc:1,
 208            ldpc:1,
 209            use_rts_for_aggregation:1;
 210         u8 ht40_bands;
 211 };
 212 
 213 /*
 214  * Tx-backoff threshold
 215  * @temperature: The threshold in Celsius
 216  * @backoff: The tx-backoff in uSec
 217  */
 218 struct iwl_tt_tx_backoff {
 219         s32 temperature;
 220         u32 backoff;
 221 };
 222 
 223 #define TT_TX_BACKOFF_SIZE 6
 224 
 225 /**
 226  * struct iwl_tt_params - thermal throttling parameters
 227  * @ct_kill_entry: CT Kill entry threshold
 228  * @ct_kill_exit: CT Kill exit threshold
 229  * @ct_kill_duration: The time  intervals (in uSec) in which the driver needs
 230  *      to checks whether to exit CT Kill.
 231  * @dynamic_smps_entry: Dynamic SMPS entry threshold
 232  * @dynamic_smps_exit: Dynamic SMPS exit threshold
 233  * @tx_protection_entry: TX protection entry threshold
 234  * @tx_protection_exit: TX protection exit threshold
 235  * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
 236  * @support_ct_kill: Support CT Kill?
 237  * @support_dynamic_smps: Support dynamic SMPS?
 238  * @support_tx_protection: Support tx protection?
 239  * @support_tx_backoff: Support tx-backoff?
 240  */
 241 struct iwl_tt_params {
 242         u32 ct_kill_entry;
 243         u32 ct_kill_exit;
 244         u32 ct_kill_duration;
 245         u32 dynamic_smps_entry;
 246         u32 dynamic_smps_exit;
 247         u32 tx_protection_entry;
 248         u32 tx_protection_exit;
 249         struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
 250         u8 support_ct_kill:1,
 251            support_dynamic_smps:1,
 252            support_tx_protection:1,
 253            support_tx_backoff:1;
 254 };
 255 
 256 /*
 257  * information on how to parse the EEPROM
 258  */
 259 #define EEPROM_REG_BAND_1_CHANNELS              0x08
 260 #define EEPROM_REG_BAND_2_CHANNELS              0x26
 261 #define EEPROM_REG_BAND_3_CHANNELS              0x42
 262 #define EEPROM_REG_BAND_4_CHANNELS              0x5C
 263 #define EEPROM_REG_BAND_5_CHANNELS              0x74
 264 #define EEPROM_REG_BAND_24_HT40_CHANNELS        0x82
 265 #define EEPROM_REG_BAND_52_HT40_CHANNELS        0x92
 266 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS   0x80
 267 #define EEPROM_REGULATORY_BAND_NO_HT40          0
 268 
 269 /* lower blocks contain EEPROM image and calibration data */
 270 #define OTP_LOW_IMAGE_SIZE_2K           (2 * 512 * sizeof(u16))  /*  2 KB */
 271 #define OTP_LOW_IMAGE_SIZE_16K          (16 * 512 * sizeof(u16)) /* 16 KB */
 272 #define OTP_LOW_IMAGE_SIZE_32K          (32 * 512 * sizeof(u16)) /* 32 KB */
 273 
 274 struct iwl_eeprom_params {
 275         const u8 regulatory_bands[7];
 276         bool enhanced_txpower;
 277 };
 278 
 279 /* Tx-backoff power threshold
 280  * @pwr: The power limit in mw
 281  * @backoff: The tx-backoff in uSec
 282  */
 283 struct iwl_pwr_tx_backoff {
 284         u32 pwr;
 285         u32 backoff;
 286 };
 287 
 288 /**
 289  * struct iwl_csr_params
 290  *
 291  * @flag_sw_reset: reset the device
 292  * @flag_mac_clock_ready:
 293  *      Indicates MAC (ucode processor, etc.) is powered up and can run.
 294  *      Internal resources are accessible.
 295  *      NOTE:  This does not indicate that the processor is actually running.
 296  *      NOTE:  This does not indicate that device has completed
 297  *             init or post-power-down restore of internal SRAM memory.
 298  *             Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
 299  *             SRAM is restored and uCode is in normal operation mode.
 300  *             This note is relevant only for pre 5xxx devices.
 301  *      NOTE:  After device reset, this bit remains "0" until host sets
 302  *             INIT_DONE
 303  * @flag_init_done: Host sets this to put device into fully operational
 304  *      D0 power mode. Host resets this after SW_RESET to put device into
 305  *      low power mode.
 306  * @flag_mac_access_req: Host sets this to request and maintain MAC wakeup,
 307  *      to allow host access to device-internal resources. Host must wait for
 308  *      mac_clock_ready (and !GOING_TO_SLEEP) before accessing non-CSR device
 309  *      registers.
 310  * @flag_val_mac_access_en: mac access is enabled
 311  * @flag_master_dis: disable master
 312  * @flag_stop_master: stop master
 313  * @addr_sw_reset: address for resetting the device
 314  * @mac_addr0_otp: first part of MAC address from OTP
 315  * @mac_addr1_otp: second part of MAC address from OTP
 316  * @mac_addr0_strap: first part of MAC address from strap
 317  * @mac_addr1_strap: second part of MAC address from strap
 318  */
 319 struct iwl_csr_params {
 320         u8 flag_sw_reset;
 321         u8 flag_mac_clock_ready;
 322         u8 flag_init_done;
 323         u8 flag_mac_access_req;
 324         u8 flag_val_mac_access_en;
 325         u8 flag_master_dis;
 326         u8 flag_stop_master;
 327         u8 addr_sw_reset;
 328         u32 mac_addr0_otp;
 329         u32 mac_addr1_otp;
 330         u32 mac_addr0_strap;
 331         u32 mac_addr1_strap;
 332 };
 333 
 334 /**
 335  * struct iwl_cfg_trans - information needed to start the trans
 336  *
 337  * These values cannot be changed when multiple configs are used for a
 338  * single PCI ID, because they are needed before the HW REV or RFID
 339  * can be read.
 340  *
 341  * @base_params: pointer to basic parameters
 342  * @csr: csr flags and addresses that are different across devices
 343  * @device_family: the device family
 344  * @umac_prph_offset: offset to add to UMAC periphery address
 345  * @rf_id: need to read rf_id to determine the firmware image
 346  * @use_tfh: use TFH
 347  * @gen2: 22000 and on transport operation
 348  * @mq_rx_supported: multi-queue rx support
 349  */
 350 struct iwl_cfg_trans_params {
 351         const struct iwl_base_params *base_params;
 352         const struct iwl_csr_params *csr;
 353         enum iwl_device_family device_family;
 354         u32 umac_prph_offset;
 355         u32 rf_id:1,
 356             use_tfh:1,
 357             gen2:1,
 358             mq_rx_supported:1,
 359             bisr_workaround:1;
 360 };
 361 
 362 /**
 363  * struct iwl_cfg
 364  * @trans: the trans-specific configuration part
 365  * @name: Official name of the device
 366  * @fw_name_pre: Firmware filename prefix. The api version and extension
 367  *      (.ucode) will be added to filename before loading from disk. The
 368  *      filename is constructed as fw_name_pre<api>.ucode.
 369  * @ucode_api_max: Highest version of uCode API supported by driver.
 370  * @ucode_api_min: Lowest version of uCode API supported by driver.
 371  * @max_inst_size: The maximal length of the fw inst section (only DVM)
 372  * @max_data_size: The maximal length of the fw data section (only DVM)
 373  * @valid_tx_ant: valid transmit antenna
 374  * @valid_rx_ant: valid receive antenna
 375  * @non_shared_ant: the antenna that is for WiFi only
 376  * @nvm_ver: NVM version
 377  * @nvm_calib_ver: NVM calibration version
 378  * @lib: pointer to the lib ops
 379  * @ht_params: point to ht parameters
 380  * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
 381  * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
 382  * @tx_with_siso_diversity: 1x1 device with tx antenna diversity
 383  * @internal_wimax_coex: internal wifi/wimax combo device
 384  * @high_temp: Is this NIC is designated to be in high temperature.
 385  * @host_interrupt_operation_mode: device needs host interrupt operation
 386  *      mode set
 387  * @nvm_hw_section_num: the ID of the HW NVM section
 388  * @mac_addr_from_csr: read HW address from CSR registers
 389  * @features: hw features, any combination of feature_whitelist
 390  * @pwr_tx_backoffs: translation table between power limits and backoffs
 391  * @max_rx_agg_size: max RX aggregation size of the ADDBA request/response
 392  * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
 393  * @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the
 394  *      station can receive in HT
 395  * @max_vht_ampdu_exponent: the exponent of the max length of A-MPDU that the
 396  *      station can receive in VHT
 397  * @dccm_offset: offset from which DCCM begins
 398  * @dccm_len: length of DCCM (including runtime stack CCM)
 399  * @dccm2_offset: offset from which the second DCCM begins
 400  * @dccm2_len: length of the second DCCM
 401  * @smem_offset: offset from which the SMEM begins
 402  * @smem_len: the length of SMEM
 403  * @vht_mu_mimo_supported: VHT MU-MIMO support
 404  * @integrated: discrete or integrated
 405  * @cdb: CDB support
 406  * @nvm_type: see &enum iwl_nvm_type
 407  * @d3_debug_data_base_addr: base address where D3 debug data is stored
 408  * @d3_debug_data_length: length of the D3 debug data
 409  * @bisr_workaround: BISR hardware workaround (for 22260 series devices)
 410  * @min_txq_size: minimum number of slots required in a TX queue
 411  * @uhb_supported: ultra high band channels supported
 412  * @min_256_ba_txq_size: minimum number of slots required in a TX queue which
 413  *      supports 256 BA aggregation
 414  *
 415  * We enable the driver to be backward compatible wrt. hardware features.
 416  * API differences in uCode shouldn't be handled here but through TLVs
 417  * and/or the uCode API version instead.
 418  */
 419 struct iwl_cfg {
 420         struct iwl_cfg_trans_params trans;
 421         /* params specific to an individual device within a device family */
 422         const char *name;
 423         const char *fw_name_pre;
 424         /* params likely to change within a device family */
 425         const struct iwl_ht_params *ht_params;
 426         const struct iwl_eeprom_params *eeprom_params;
 427         const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
 428         const char *default_nvm_file_C_step;
 429         const struct iwl_tt_params *thermal_params;
 430         enum iwl_led_mode led_mode;
 431         enum iwl_nvm_type nvm_type;
 432         u32 max_data_size;
 433         u32 max_inst_size;
 434         netdev_features_t features;
 435         u32 dccm_offset;
 436         u32 dccm_len;
 437         u32 dccm2_offset;
 438         u32 dccm2_len;
 439         u32 smem_offset;
 440         u32 smem_len;
 441         u32 soc_latency;
 442         u16 nvm_ver;
 443         u16 nvm_calib_ver;
 444         u32 rx_with_siso_diversity:1,
 445             tx_with_siso_diversity:1,
 446             bt_shared_single_ant:1,
 447             internal_wimax_coex:1,
 448             host_interrupt_operation_mode:1,
 449             high_temp:1,
 450             mac_addr_from_csr:1,
 451             lp_xtal_workaround:1,
 452             disable_dummy_notification:1,
 453             apmg_not_supported:1,
 454             vht_mu_mimo_supported:1,
 455             integrated:1,
 456             cdb:1,
 457             dbgc_supported:1,
 458             uhb_supported:1;
 459         u8 valid_tx_ant;
 460         u8 valid_rx_ant;
 461         u8 non_shared_ant;
 462         u8 nvm_hw_section_num;
 463         u8 max_rx_agg_size;
 464         u8 max_tx_agg_size;
 465         u8 max_ht_ampdu_exponent;
 466         u8 max_vht_ampdu_exponent;
 467         u8 ucode_api_max;
 468         u8 ucode_api_min;
 469         u32 min_umac_error_event_table;
 470         u32 extra_phy_cfg_flags;
 471         u32 d3_debug_data_base_addr;
 472         u32 d3_debug_data_length;
 473         u32 min_txq_size;
 474         u32 fw_mon_smem_write_ptr_addr;
 475         u32 fw_mon_smem_write_ptr_msk;
 476         u32 fw_mon_smem_cycle_cnt_ptr_addr;
 477         u32 fw_mon_smem_cycle_cnt_ptr_msk;
 478         u32 gp2_reg_addr;
 479         u32 min_256_ba_txq_size;
 480 };
 481 
 482 extern const struct iwl_csr_params iwl_csr_v1;
 483 extern const struct iwl_csr_params iwl_csr_v2;
 484 
 485 /*
 486  * This list declares the config structures for all devices.
 487  */
 488 #if IS_ENABLED(CONFIG_IWLDVM)
 489 extern const struct iwl_cfg iwl5300_agn_cfg;
 490 extern const struct iwl_cfg iwl5100_agn_cfg;
 491 extern const struct iwl_cfg iwl5350_agn_cfg;
 492 extern const struct iwl_cfg iwl5100_bgn_cfg;
 493 extern const struct iwl_cfg iwl5100_abg_cfg;
 494 extern const struct iwl_cfg iwl5150_agn_cfg;
 495 extern const struct iwl_cfg iwl5150_abg_cfg;
 496 extern const struct iwl_cfg iwl6005_2agn_cfg;
 497 extern const struct iwl_cfg iwl6005_2abg_cfg;
 498 extern const struct iwl_cfg iwl6005_2bg_cfg;
 499 extern const struct iwl_cfg iwl6005_2agn_sff_cfg;
 500 extern const struct iwl_cfg iwl6005_2agn_d_cfg;
 501 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;
 502 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;
 503 extern const struct iwl_cfg iwl1030_bgn_cfg;
 504 extern const struct iwl_cfg iwl1030_bg_cfg;
 505 extern const struct iwl_cfg iwl6030_2agn_cfg;
 506 extern const struct iwl_cfg iwl6030_2abg_cfg;
 507 extern const struct iwl_cfg iwl6030_2bgn_cfg;
 508 extern const struct iwl_cfg iwl6030_2bg_cfg;
 509 extern const struct iwl_cfg iwl6000i_2agn_cfg;
 510 extern const struct iwl_cfg iwl6000i_2abg_cfg;
 511 extern const struct iwl_cfg iwl6000i_2bg_cfg;
 512 extern const struct iwl_cfg iwl6000_3agn_cfg;
 513 extern const struct iwl_cfg iwl6050_2agn_cfg;
 514 extern const struct iwl_cfg iwl6050_2abg_cfg;
 515 extern const struct iwl_cfg iwl6150_bgn_cfg;
 516 extern const struct iwl_cfg iwl6150_bg_cfg;
 517 extern const struct iwl_cfg iwl1000_bgn_cfg;
 518 extern const struct iwl_cfg iwl1000_bg_cfg;
 519 extern const struct iwl_cfg iwl100_bgn_cfg;
 520 extern const struct iwl_cfg iwl100_bg_cfg;
 521 extern const struct iwl_cfg iwl130_bgn_cfg;
 522 extern const struct iwl_cfg iwl130_bg_cfg;
 523 extern const struct iwl_cfg iwl2000_2bgn_cfg;
 524 extern const struct iwl_cfg iwl2000_2bgn_d_cfg;
 525 extern const struct iwl_cfg iwl2030_2bgn_cfg;
 526 extern const struct iwl_cfg iwl6035_2agn_cfg;
 527 extern const struct iwl_cfg iwl6035_2agn_sff_cfg;
 528 extern const struct iwl_cfg iwl105_bgn_cfg;
 529 extern const struct iwl_cfg iwl105_bgn_d_cfg;
 530 extern const struct iwl_cfg iwl135_bgn_cfg;
 531 #endif /* CONFIG_IWLDVM */
 532 #if IS_ENABLED(CONFIG_IWLMVM)
 533 extern const struct iwl_cfg iwl7260_2ac_cfg;
 534 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;
 535 extern const struct iwl_cfg iwl7260_2n_cfg;
 536 extern const struct iwl_cfg iwl7260_n_cfg;
 537 extern const struct iwl_cfg iwl3160_2ac_cfg;
 538 extern const struct iwl_cfg iwl3160_2n_cfg;
 539 extern const struct iwl_cfg iwl3160_n_cfg;
 540 extern const struct iwl_cfg iwl3165_2ac_cfg;
 541 extern const struct iwl_cfg iwl3168_2ac_cfg;
 542 extern const struct iwl_cfg iwl7265_2ac_cfg;
 543 extern const struct iwl_cfg iwl7265_2n_cfg;
 544 extern const struct iwl_cfg iwl7265_n_cfg;
 545 extern const struct iwl_cfg iwl7265d_2ac_cfg;
 546 extern const struct iwl_cfg iwl7265d_2n_cfg;
 547 extern const struct iwl_cfg iwl7265d_n_cfg;
 548 extern const struct iwl_cfg iwl8260_2n_cfg;
 549 extern const struct iwl_cfg iwl8260_2ac_cfg;
 550 extern const struct iwl_cfg iwl8265_2ac_cfg;
 551 extern const struct iwl_cfg iwl8275_2ac_cfg;
 552 extern const struct iwl_cfg iwl4165_2ac_cfg;
 553 extern const struct iwl_cfg iwl9160_2ac_cfg;
 554 extern const struct iwl_cfg iwl9260_2ac_cfg;
 555 extern const struct iwl_cfg iwl9260_2ac_160_cfg;
 556 extern const struct iwl_cfg iwl9260_killer_2ac_cfg;
 557 extern const struct iwl_cfg iwl9270_2ac_cfg;
 558 extern const struct iwl_cfg iwl9460_2ac_cfg;
 559 extern const struct iwl_cfg iwl9560_2ac_cfg;
 560 extern const struct iwl_cfg iwl9560_2ac_cfg_quz_a0_jf_b0_soc;
 561 extern const struct iwl_cfg iwl9560_2ac_160_cfg;
 562 extern const struct iwl_cfg iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc;
 563 extern const struct iwl_cfg iwl9460_2ac_cfg_soc;
 564 extern const struct iwl_cfg iwl9461_2ac_cfg_soc;
 565 extern const struct iwl_cfg iwl9461_2ac_cfg_quz_a0_jf_b0_soc;
 566 extern const struct iwl_cfg iwl9462_2ac_cfg_soc;
 567 extern const struct iwl_cfg iwl9462_2ac_cfg_quz_a0_jf_b0_soc;
 568 extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
 569 extern const struct iwl_cfg iwl9560_2ac_160_cfg_soc;
 570 extern const struct iwl_cfg iwl9560_killer_2ac_cfg_soc;
 571 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_soc;
 572 extern const struct iwl_cfg iwl9560_killer_i_2ac_cfg_quz_a0_jf_b0_soc;
 573 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_quz_a0_jf_b0_soc;
 574 extern const struct iwl_cfg iwl9460_2ac_cfg_shared_clk;
 575 extern const struct iwl_cfg iwl9461_2ac_cfg_shared_clk;
 576 extern const struct iwl_cfg iwl9462_2ac_cfg_shared_clk;
 577 extern const struct iwl_cfg iwl9560_2ac_cfg_shared_clk;
 578 extern const struct iwl_cfg iwl9560_2ac_160_cfg_shared_clk;
 579 extern const struct iwl_cfg iwl9560_killer_2ac_cfg_shared_clk;
 580 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_shared_clk;
 581 extern const struct iwl_cfg iwl22000_2ac_cfg_hr;
 582 extern const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb;
 583 extern const struct iwl_cfg iwl22000_2ac_cfg_jf;
 584 extern const struct iwl_cfg iwl_ax101_cfg_qu_hr;
 585 extern const struct iwl_cfg iwl_ax101_cfg_qu_c0_hr_b0;
 586 extern const struct iwl_cfg iwl_ax101_cfg_quz_hr;
 587 extern const struct iwl_cfg iwl22000_2ax_cfg_hr;
 588 extern const struct iwl_cfg iwl_ax200_cfg_cc;
 589 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
 590 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
 591 extern const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0;
 592 extern const struct iwl_cfg iwl_ax201_cfg_quz_hr;
 593 extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr;
 594 extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr;
 595 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0;
 596 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0;
 597 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0;
 598 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0;
 599 extern const struct iwl_cfg killer1650x_2ax_cfg;
 600 extern const struct iwl_cfg killer1650w_2ax_cfg;
 601 extern const struct iwl_cfg iwl9461_2ac_cfg_qu_b0_jf_b0;
 602 extern const struct iwl_cfg iwl9462_2ac_cfg_qu_b0_jf_b0;
 603 extern const struct iwl_cfg iwl9560_2ac_cfg_qu_b0_jf_b0;
 604 extern const struct iwl_cfg iwl9560_2ac_160_cfg_qu_b0_jf_b0;
 605 extern const struct iwl_cfg iwl9461_2ac_cfg_qu_c0_jf_b0;
 606 extern const struct iwl_cfg iwl9462_2ac_cfg_qu_c0_jf_b0;
 607 extern const struct iwl_cfg iwl9560_2ac_cfg_qu_c0_jf_b0;
 608 extern const struct iwl_cfg iwl9560_2ac_160_cfg_qu_c0_jf_b0;
 609 extern const struct iwl_cfg killer1550i_2ac_cfg_qu_b0_jf_b0;
 610 extern const struct iwl_cfg killer1550s_2ac_cfg_qu_b0_jf_b0;
 611 extern const struct iwl_cfg iwl22000_2ax_cfg_jf;
 612 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0_f0;
 613 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0_f0;
 614 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0;
 615 extern const struct iwl_cfg iwl9560_2ac_cfg_qnj_jf_b0;
 616 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0;
 617 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0;
 618 extern const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0;
 619 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0;
 620 extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0;
 621 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0;
 622 #endif /* CPTCFG_IWLMVM || CPTCFG_IWLFMAC */
 623 
 624 #endif /* __IWL_CONFIG_H__ */