1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(c) 2018 - 2019 Intel Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * The full GNU General Public License is included in this distribution
23 * in the file called COPYING.
24 *
25 * Contact Information:
26 * Intel Linux Wireless <linuxwifi@intel.com>
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *
29 * BSD LICENSE
30 *
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34 * Copyright(c) 2018 - 2019 Intel Corporation
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 *
41 * * Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * * Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in
45 * the documentation and/or other materials provided with the
46 * distribution.
47 * * Neither the name Intel Corporation nor the names of its
48 * contributors may be used to endorse or promote products derived
49 * from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *
63 *****************************************************************************/
64 #include "iwl-drv.h"
65 #include "runtime.h"
66 #include "fw/api/commands.h"
67
68 void iwl_free_fw_paging(struct iwl_fw_runtime *fwrt)
69 {
70 int i;
71
72 if (!fwrt->fw_paging_db[0].fw_paging_block)
73 return;
74
75 for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) {
76 struct iwl_fw_paging *paging = &fwrt->fw_paging_db[i];
77
78 if (!paging->fw_paging_block) {
79 IWL_DEBUG_FW(fwrt,
80 "Paging: block %d already freed, continue to next page\n",
81 i);
82
83 continue;
84 }
85 dma_unmap_page(fwrt->trans->dev, paging->fw_paging_phys,
86 paging->fw_paging_size, DMA_BIDIRECTIONAL);
87
88 __free_pages(paging->fw_paging_block,
89 get_order(paging->fw_paging_size));
90 paging->fw_paging_block = NULL;
91 }
92
93 memset(fwrt->fw_paging_db, 0, sizeof(fwrt->fw_paging_db));
94 }
95 IWL_EXPORT_SYMBOL(iwl_free_fw_paging);
96
97 static int iwl_alloc_fw_paging_mem(struct iwl_fw_runtime *fwrt,
98 const struct fw_img *image)
99 {
100 struct page *block;
101 dma_addr_t phys = 0;
102 int blk_idx, order, num_of_pages, size;
103
104 if (fwrt->fw_paging_db[0].fw_paging_block)
105 return 0;
106
107 /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */
108 BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE);
109
110 num_of_pages = image->paging_mem_size / FW_PAGING_SIZE;
111 fwrt->num_of_paging_blk =
112 DIV_ROUND_UP(num_of_pages, NUM_OF_PAGE_PER_GROUP);
113 fwrt->num_of_pages_in_last_blk =
114 num_of_pages -
115 NUM_OF_PAGE_PER_GROUP * (fwrt->num_of_paging_blk - 1);
116
117 IWL_DEBUG_FW(fwrt,
118 "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n",
119 fwrt->num_of_paging_blk,
120 fwrt->num_of_pages_in_last_blk);
121
122 /*
123 * Allocate CSS and paging blocks in dram.
124 */
125 for (blk_idx = 0; blk_idx < fwrt->num_of_paging_blk + 1; blk_idx++) {
126 /* For CSS allocate 4KB, for others PAGING_BLOCK_SIZE (32K) */
127 size = blk_idx ? PAGING_BLOCK_SIZE : FW_PAGING_SIZE;
128 order = get_order(size);
129 block = alloc_pages(GFP_KERNEL, order);
130 if (!block) {
131 /* free all the previous pages since we failed */
132 iwl_free_fw_paging(fwrt);
133 return -ENOMEM;
134 }
135
136 fwrt->fw_paging_db[blk_idx].fw_paging_block = block;
137 fwrt->fw_paging_db[blk_idx].fw_paging_size = size;
138
139 phys = dma_map_page(fwrt->trans->dev, block, 0,
140 PAGE_SIZE << order,
141 DMA_BIDIRECTIONAL);
142 if (dma_mapping_error(fwrt->trans->dev, phys)) {
143 /*
144 * free the previous pages and the current one
145 * since we failed to map_page.
146 */
147 iwl_free_fw_paging(fwrt);
148 return -ENOMEM;
149 }
150 fwrt->fw_paging_db[blk_idx].fw_paging_phys = phys;
151
152 if (!blk_idx)
153 IWL_DEBUG_FW(fwrt,
154 "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n",
155 order);
156 else
157 IWL_DEBUG_FW(fwrt,
158 "Paging: allocated 32K bytes (order %d) for firmware paging.\n",
159 order);
160 }
161
162 return 0;
163 }
164
165 static int iwl_fill_paging_mem(struct iwl_fw_runtime *fwrt,
166 const struct fw_img *image)
167 {
168 int sec_idx, idx, ret;
169 u32 offset = 0;
170
171 /*
172 * find where is the paging image start point:
173 * if CPU2 exist and it's in paging format, then the image looks like:
174 * CPU1 sections (2 or more)
175 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2
176 * CPU2 sections (not paged)
177 * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2
178 * non paged to CPU2 paging sec
179 * CPU2 paging CSS
180 * CPU2 paging image (including instruction and data)
181 */
182 for (sec_idx = 0; sec_idx < image->num_sec; sec_idx++) {
183 if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) {
184 sec_idx++;
185 break;
186 }
187 }
188
189 /*
190 * If paging is enabled there should be at least 2 more sections left
191 * (one for CSS and one for Paging data)
192 */
193 if (sec_idx >= image->num_sec - 1) {
194 IWL_ERR(fwrt, "Paging: Missing CSS and/or paging sections\n");
195 ret = -EINVAL;
196 goto err;
197 }
198
199 /* copy the CSS block to the dram */
200 IWL_DEBUG_FW(fwrt, "Paging: load paging CSS to FW, sec = %d\n",
201 sec_idx);
202
203 if (image->sec[sec_idx].len > fwrt->fw_paging_db[0].fw_paging_size) {
204 IWL_ERR(fwrt, "CSS block is larger than paging size\n");
205 ret = -EINVAL;
206 goto err;
207 }
208
209 memcpy(page_address(fwrt->fw_paging_db[0].fw_paging_block),
210 image->sec[sec_idx].data,
211 image->sec[sec_idx].len);
212 dma_sync_single_for_device(fwrt->trans->dev,
213 fwrt->fw_paging_db[0].fw_paging_phys,
214 fwrt->fw_paging_db[0].fw_paging_size,
215 DMA_BIDIRECTIONAL);
216
217 IWL_DEBUG_FW(fwrt,
218 "Paging: copied %d CSS bytes to first block\n",
219 fwrt->fw_paging_db[0].fw_paging_size);
220
221 sec_idx++;
222
223 /*
224 * Copy the paging blocks to the dram. The loop index starts
225 * from 1 since the CSS block (index 0) was already copied to
226 * dram. We use num_of_paging_blk + 1 to account for that.
227 */
228 for (idx = 1; idx < fwrt->num_of_paging_blk + 1; idx++) {
229 struct iwl_fw_paging *block = &fwrt->fw_paging_db[idx];
230 int remaining = image->sec[sec_idx].len - offset;
231 int len = block->fw_paging_size;
232
233 /*
234 * For the last block, we copy all that is remaining,
235 * for all other blocks, we copy fw_paging_size at a
236 * time. */
237 if (idx == fwrt->num_of_paging_blk) {
238 len = remaining;
239 if (remaining !=
240 fwrt->num_of_pages_in_last_blk * FW_PAGING_SIZE) {
241 IWL_ERR(fwrt,
242 "Paging: last block contains more data than expected %d\n",
243 remaining);
244 ret = -EINVAL;
245 goto err;
246 }
247 } else if (block->fw_paging_size > remaining) {
248 IWL_ERR(fwrt,
249 "Paging: not enough data in other in block %d (%d)\n",
250 idx, remaining);
251 ret = -EINVAL;
252 goto err;
253 }
254
255 memcpy(page_address(block->fw_paging_block),
256 image->sec[sec_idx].data + offset, len);
257 dma_sync_single_for_device(fwrt->trans->dev,
258 block->fw_paging_phys,
259 block->fw_paging_size,
260 DMA_BIDIRECTIONAL);
261
262 IWL_DEBUG_FW(fwrt,
263 "Paging: copied %d paging bytes to block %d\n",
264 len, idx);
265
266 offset += block->fw_paging_size;
267 }
268
269 return 0;
270
271 err:
272 iwl_free_fw_paging(fwrt);
273 return ret;
274 }
275
276 static int iwl_save_fw_paging(struct iwl_fw_runtime *fwrt,
277 const struct fw_img *fw)
278 {
279 int ret;
280
281 ret = iwl_alloc_fw_paging_mem(fwrt, fw);
282 if (ret)
283 return ret;
284
285 return iwl_fill_paging_mem(fwrt, fw);
286 }
287
288 /* send paging cmd to FW in case CPU2 has paging image */
289 static int iwl_send_paging_cmd(struct iwl_fw_runtime *fwrt,
290 const struct fw_img *fw)
291 {
292 struct iwl_fw_paging_cmd paging_cmd = {
293 .flags = cpu_to_le32(PAGING_CMD_IS_SECURED |
294 PAGING_CMD_IS_ENABLED |
295 (fwrt->num_of_pages_in_last_blk <<
296 PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)),
297 .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE),
298 .block_num = cpu_to_le32(fwrt->num_of_paging_blk),
299 };
300 struct iwl_host_cmd hcmd = {
301 .id = iwl_cmd_id(FW_PAGING_BLOCK_CMD, IWL_ALWAYS_LONG_GROUP, 0),
302 .len = { sizeof(paging_cmd), },
303 .data = { &paging_cmd, },
304 };
305 int blk_idx;
306
307 /* loop for for all paging blocks + CSS block */
308 for (blk_idx = 0; blk_idx < fwrt->num_of_paging_blk + 1; blk_idx++) {
309 dma_addr_t addr = fwrt->fw_paging_db[blk_idx].fw_paging_phys;
310 __le32 phy_addr;
311
312 addr = addr >> PAGE_2_EXP_SIZE;
313 phy_addr = cpu_to_le32(addr);
314 paging_cmd.device_phy_addr[blk_idx] = phy_addr;
315 }
316
317 return iwl_trans_send_cmd(fwrt->trans, &hcmd);
318 }
319
320 int iwl_init_paging(struct iwl_fw_runtime *fwrt, enum iwl_ucode_type type)
321 {
322 const struct fw_img *fw = &fwrt->fw->img[type];
323 int ret;
324
325 if (fwrt->trans->trans_cfg->gen2)
326 return 0;
327
328 /*
329 * Configure and operate fw paging mechanism.
330 * The driver configures the paging flow only once.
331 * The CPU2 paging image is included in the IWL_UCODE_INIT image.
332 */
333 if (!fw->paging_mem_size)
334 return 0;
335
336 ret = iwl_save_fw_paging(fwrt, fw);
337 if (ret) {
338 IWL_ERR(fwrt, "failed to save the FW paging image\n");
339 return ret;
340 }
341
342 ret = iwl_send_paging_cmd(fwrt, fw);
343 if (ret) {
344 IWL_ERR(fwrt, "failed to send the paging cmd\n");
345 iwl_free_fw_paging(fwrt);
346 return ret;
347 }
348
349 return 0;
350 }
351 IWL_EXPORT_SYMBOL(iwl_init_paging);