drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c

/* [<][>][^][v][top][bottom][index][help] */
This source file includes following definitions.
iwl_nvm_print_channel_flags
iwl_get_channel_flags
iwl_init_channel_map
iwl_init_vht_hw_capab
iwl_init_he_hw_capab
iwl_init_sbands
iwl_get_sku
iwl_get_nvm_version
iwl_get_radio_cfg
iwl_get_n_hw_addrs
iwl_set_radio_cfg
iwl_flip_hw_address
iwl_set_hw_address_from_csr
iwl_set_hw_address_family_8000
iwl_set_hw_address
iwl_nvm_no_wide_in_5ghz
iwl_parse_nvm_data
iwl_nvm_get_regdom_bw_flags
iwl_parse_nvm_mcc_info
iwl_nvm_fixups
iwl_read_external_nvm
iwl_get_nvm
   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
   9  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  11  * Copyright(c) 2018 - 2019 Intel Corporation
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of version 2 of the GNU General Public License as
  15  * published by the Free Software Foundation.
  16  *
  17  * This program is distributed in the hope that it will be useful, but
  18  * WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  20  * General Public License for more details.
  21  *
  22  * The full GNU General Public License is included in this distribution
  23  * in the file called COPYING.
  24  *
  25  * Contact Information:
  26  *  Intel Linux Wireless <linuxwifi@intel.com>
  27  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  28  *
  29  * BSD LICENSE
  30  *
  31  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  32  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  33  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  34  * Copyright(c) 2018 - 2019 Intel Corporation
  35  * All rights reserved.
  36  *
  37  * Redistribution and use in source and binary forms, with or without
  38  * modification, are permitted provided that the following conditions
  39  * are met:
  40  *
  41  *  * Redistributions of source code must retain the above copyright
  42  *    notice, this list of conditions and the following disclaimer.
  43  *  * Redistributions in binary form must reproduce the above copyright
  44  *    notice, this list of conditions and the following disclaimer in
  45  *    the documentation and/or other materials provided with the
  46  *    distribution.
  47  *  * Neither the name Intel Corporation nor the names of its
  48  *    contributors may be used to endorse or promote products derived
  49  *    from this software without specific prior written permission.
  50  *
  51  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  52  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  53  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  54  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  55  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  56  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  57  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  58  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  59  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  60  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  61  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  62  *****************************************************************************/
  63 #include <linux/types.h>
  64 #include <linux/slab.h>
  65 #include <linux/export.h>
  66 #include <linux/etherdevice.h>
  67 #include <linux/pci.h>
  68 #include <linux/firmware.h>
  69 
  70 #include "iwl-drv.h"
  71 #include "iwl-modparams.h"
  72 #include "iwl-nvm-parse.h"
  73 #include "iwl-prph.h"
  74 #include "iwl-io.h"
  75 #include "iwl-csr.h"
  76 #include "fw/acpi.h"
  77 #include "fw/api/nvm-reg.h"
  78 #include "fw/api/commands.h"
  79 #include "fw/api/cmdhdr.h"
  80 #include "fw/img.h"
  81 
  82 /* NVM offsets (in words) definitions */
  83 enum nvm_offsets {
  84         /* NVM HW-Section offset (in words) definitions */
  85         SUBSYSTEM_ID = 0x0A,
  86         HW_ADDR = 0x15,
  87 
  88         /* NVM SW-Section offset (in words) definitions */
  89         NVM_SW_SECTION = 0x1C0,
  90         NVM_VERSION = 0,
  91         RADIO_CFG = 1,
  92         SKU = 2,
  93         N_HW_ADDRS = 3,
  94         NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
  95 
  96         /* NVM calibration section offset (in words) definitions */
  97         NVM_CALIB_SECTION = 0x2B8,
  98         XTAL_CALIB = 0x316 - NVM_CALIB_SECTION,
  99 
 100         /* NVM REGULATORY -Section offset (in words) definitions */
 101         NVM_CHANNELS_SDP = 0,
 102 };
 103 
 104 enum ext_nvm_offsets {
 105         /* NVM HW-Section offset (in words) definitions */
 106         MAC_ADDRESS_OVERRIDE_EXT_NVM = 1,
 107 
 108         /* NVM SW-Section offset (in words) definitions */
 109         NVM_VERSION_EXT_NVM = 0,
 110         RADIO_CFG_FAMILY_EXT_NVM = 0,
 111         SKU_FAMILY_8000 = 2,
 112         N_HW_ADDRS_FAMILY_8000 = 3,
 113 
 114         /* NVM REGULATORY -Section offset (in words) definitions */
 115         NVM_CHANNELS_EXTENDED = 0,
 116         NVM_LAR_OFFSET_OLD = 0x4C7,
 117         NVM_LAR_OFFSET = 0x507,
 118         NVM_LAR_ENABLED = 0x7,
 119 };
 120 
 121 /* SKU Capabilities (actual values from NVM definition) */
 122 enum nvm_sku_bits {
 123         NVM_SKU_CAP_BAND_24GHZ          = BIT(0),
 124         NVM_SKU_CAP_BAND_52GHZ          = BIT(1),
 125         NVM_SKU_CAP_11N_ENABLE          = BIT(2),
 126         NVM_SKU_CAP_11AC_ENABLE         = BIT(3),
 127         NVM_SKU_CAP_MIMO_DISABLE        = BIT(5),
 128 };
 129 
 130 /*
 131  * These are the channel numbers in the order that they are stored in the NVM
 132  */
 133 static const u16 iwl_nvm_channels[] = {
 134         /* 2.4 GHz */
 135         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
 136         /* 5 GHz */
 137         36, 40, 44 , 48, 52, 56, 60, 64,
 138         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
 139         149, 153, 157, 161, 165
 140 };
 141 
 142 static const u16 iwl_ext_nvm_channels[] = {
 143         /* 2.4 GHz */
 144         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
 145         /* 5 GHz */
 146         36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
 147         96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
 148         149, 153, 157, 161, 165, 169, 173, 177, 181
 149 };
 150 
 151 static const u16 iwl_uhb_nvm_channels[] = {
 152         /* 2.4 GHz */
 153         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
 154         /* 5 GHz */
 155         36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
 156         96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
 157         149, 153, 157, 161, 165, 169, 173, 177, 181,
 158         /* 6-7 GHz */
 159         189, 193, 197, 201, 205, 209, 213, 217, 221, 225, 229, 233, 237, 241,
 160         245, 249, 253, 257, 261, 265, 269, 273, 277, 281, 285, 289, 293, 297,
 161         301, 305, 309, 313, 317, 321, 325, 329, 333, 337, 341, 345, 349, 353,
 162         357, 361, 365, 369, 373, 377, 381, 385, 389, 393, 397, 401, 405, 409,
 163         413, 417, 421
 164 };
 165 
 166 #define IWL_NVM_NUM_CHANNELS            ARRAY_SIZE(iwl_nvm_channels)
 167 #define IWL_NVM_NUM_CHANNELS_EXT        ARRAY_SIZE(iwl_ext_nvm_channels)
 168 #define IWL_NVM_NUM_CHANNELS_UHB        ARRAY_SIZE(iwl_uhb_nvm_channels)
 169 #define NUM_2GHZ_CHANNELS               14
 170 #define FIRST_2GHZ_HT_MINUS             5
 171 #define LAST_2GHZ_HT_PLUS               9
 172 #define N_HW_ADDR_MASK                  0xF
 173 
 174 /* rate data (static) */
 175 static struct ieee80211_rate iwl_cfg80211_rates[] = {
 176         { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
 177         { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
 178           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 179         { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
 180           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 181         { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
 182           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 183         { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
 184         { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
 185         { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
 186         { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
 187         { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
 188         { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
 189         { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
 190         { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
 191 };
 192 #define RATES_24_OFFS   0
 193 #define N_RATES_24      ARRAY_SIZE(iwl_cfg80211_rates)
 194 #define RATES_52_OFFS   4
 195 #define N_RATES_52      (N_RATES_24 - RATES_52_OFFS)
 196 
 197 /**
 198  * enum iwl_nvm_channel_flags - channel flags in NVM
 199  * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
 200  * @NVM_CHANNEL_IBSS: usable as an IBSS channel
 201  * @NVM_CHANNEL_ACTIVE: active scanning allowed
 202  * @NVM_CHANNEL_RADAR: radar detection required
 203  * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
 204  * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
 205  *      on same channel on 2.4 or same UNII band on 5.2
 206  * @NVM_CHANNEL_UNIFORM: uniform spreading required
 207  * @NVM_CHANNEL_20MHZ: 20 MHz channel okay
 208  * @NVM_CHANNEL_40MHZ: 40 MHz channel okay
 209  * @NVM_CHANNEL_80MHZ: 80 MHz channel okay
 210  * @NVM_CHANNEL_160MHZ: 160 MHz channel okay
 211  * @NVM_CHANNEL_DC_HIGH: DC HIGH required/allowed (?)
 212  */
 213 enum iwl_nvm_channel_flags {
 214         NVM_CHANNEL_VALID               = BIT(0),
 215         NVM_CHANNEL_IBSS                = BIT(1),
 216         NVM_CHANNEL_ACTIVE              = BIT(3),
 217         NVM_CHANNEL_RADAR               = BIT(4),
 218         NVM_CHANNEL_INDOOR_ONLY         = BIT(5),
 219         NVM_CHANNEL_GO_CONCURRENT       = BIT(6),
 220         NVM_CHANNEL_UNIFORM             = BIT(7),
 221         NVM_CHANNEL_20MHZ               = BIT(8),
 222         NVM_CHANNEL_40MHZ               = BIT(9),
 223         NVM_CHANNEL_80MHZ               = BIT(10),
 224         NVM_CHANNEL_160MHZ              = BIT(11),
 225         NVM_CHANNEL_DC_HIGH             = BIT(12),
 226 };
 227 
 228 /**
 229  * enum iwl_reg_capa_flags - global flags applied for the whole regulatory
 230  * domain.
 231  * @REG_CAPA_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the
 232  *      2.4Ghz band is allowed.
 233  * @REG_CAPA_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the
 234  *      5Ghz band is allowed.
 235  * @REG_CAPA_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed
 236  *      for this regulatory domain (valid only in 5Ghz).
 237  * @REG_CAPA_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed
 238  *      for this regulatory domain (valid only in 5Ghz).
 239  * @REG_CAPA_MCS_8_ALLOWED: 11ac with MCS 8 is allowed.
 240  * @REG_CAPA_MCS_9_ALLOWED: 11ac with MCS 9 is allowed.
 241  * @REG_CAPA_40MHZ_FORBIDDEN: 11n channel with a width of 40Mhz is forbidden
 242  *      for this regulatory domain (valid only in 5Ghz).
 243  * @REG_CAPA_DC_HIGH_ENABLED: DC HIGH allowed.
 244  */
 245 enum iwl_reg_capa_flags {
 246         REG_CAPA_BF_CCD_LOW_BAND        = BIT(0),
 247         REG_CAPA_BF_CCD_HIGH_BAND       = BIT(1),
 248         REG_CAPA_160MHZ_ALLOWED         = BIT(2),
 249         REG_CAPA_80MHZ_ALLOWED          = BIT(3),
 250         REG_CAPA_MCS_8_ALLOWED          = BIT(4),
 251         REG_CAPA_MCS_9_ALLOWED          = BIT(5),
 252         REG_CAPA_40MHZ_FORBIDDEN        = BIT(7),
 253         REG_CAPA_DC_HIGH_ENABLED        = BIT(9),
 254 };
 255 
 256 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level,
 257                                                int chan, u32 flags)
 258 {
 259 #define CHECK_AND_PRINT_I(x)    \
 260         ((flags & NVM_CHANNEL_##x) ? " " #x : "")
 261 
 262         if (!(flags & NVM_CHANNEL_VALID)) {
 263                 IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n",
 264                               chan, flags);
 265                 return;
 266         }
 267 
 268         /* Note: already can print up to 101 characters, 110 is the limit! */
 269         IWL_DEBUG_DEV(dev, level,
 270                       "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s\n",
 271                       chan, flags,
 272                       CHECK_AND_PRINT_I(VALID),
 273                       CHECK_AND_PRINT_I(IBSS),
 274                       CHECK_AND_PRINT_I(ACTIVE),
 275                       CHECK_AND_PRINT_I(RADAR),
 276                       CHECK_AND_PRINT_I(INDOOR_ONLY),
 277                       CHECK_AND_PRINT_I(GO_CONCURRENT),
 278                       CHECK_AND_PRINT_I(UNIFORM),
 279                       CHECK_AND_PRINT_I(20MHZ),
 280                       CHECK_AND_PRINT_I(40MHZ),
 281                       CHECK_AND_PRINT_I(80MHZ),
 282                       CHECK_AND_PRINT_I(160MHZ),
 283                       CHECK_AND_PRINT_I(DC_HIGH));
 284 #undef CHECK_AND_PRINT_I
 285 }
 286 
 287 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
 288                                  u32 nvm_flags, const struct iwl_cfg *cfg)
 289 {
 290         u32 flags = IEEE80211_CHAN_NO_HT40;
 291 
 292         if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
 293                 if (ch_num <= LAST_2GHZ_HT_PLUS)
 294                         flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
 295                 if (ch_num >= FIRST_2GHZ_HT_MINUS)
 296                         flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
 297         } else if (nvm_flags & NVM_CHANNEL_40MHZ) {
 298                 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
 299                         flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
 300                 else
 301                         flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
 302         }
 303         if (!(nvm_flags & NVM_CHANNEL_80MHZ))
 304                 flags |= IEEE80211_CHAN_NO_80MHZ;
 305         if (!(nvm_flags & NVM_CHANNEL_160MHZ))
 306                 flags |= IEEE80211_CHAN_NO_160MHZ;
 307 
 308         if (!(nvm_flags & NVM_CHANNEL_IBSS))
 309                 flags |= IEEE80211_CHAN_NO_IR;
 310 
 311         if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
 312                 flags |= IEEE80211_CHAN_NO_IR;
 313 
 314         if (nvm_flags & NVM_CHANNEL_RADAR)
 315                 flags |= IEEE80211_CHAN_RADAR;
 316 
 317         if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
 318                 flags |= IEEE80211_CHAN_INDOOR_ONLY;
 319 
 320         /* Set the GO concurrent flag only in case that NO_IR is set.
 321          * Otherwise it is meaningless
 322          */
 323         if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
 324             (flags & IEEE80211_CHAN_NO_IR))
 325                 flags |= IEEE80211_CHAN_IR_CONCURRENT;
 326 
 327         return flags;
 328 }
 329 
 330 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
 331                                 struct iwl_nvm_data *data,
 332                                 const void * const nvm_ch_flags,
 333                                 u32 sbands_flags, bool v4)
 334 {
 335         int ch_idx;
 336         int n_channels = 0;
 337         struct ieee80211_channel *channel;
 338         u32 ch_flags;
 339         int num_of_ch, num_2ghz_channels = NUM_2GHZ_CHANNELS;
 340         const u16 *nvm_chan;
 341 
 342         if (cfg->uhb_supported) {
 343                 num_of_ch = IWL_NVM_NUM_CHANNELS_UHB;
 344                 nvm_chan = iwl_uhb_nvm_channels;
 345         } else if (cfg->nvm_type == IWL_NVM_EXT) {
 346                 num_of_ch = IWL_NVM_NUM_CHANNELS_EXT;
 347                 nvm_chan = iwl_ext_nvm_channels;
 348         } else {
 349                 num_of_ch = IWL_NVM_NUM_CHANNELS;
 350                 nvm_chan = iwl_nvm_channels;
 351         }
 352 
 353         for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
 354                 bool is_5ghz = (ch_idx >= num_2ghz_channels);
 355 
 356                 if (v4)
 357                         ch_flags =
 358                                 __le32_to_cpup((__le32 *)nvm_ch_flags + ch_idx);
 359                 else
 360                         ch_flags =
 361                                 __le16_to_cpup((__le16 *)nvm_ch_flags + ch_idx);
 362 
 363                 if (is_5ghz && !data->sku_cap_band_52ghz_enable)
 364                         continue;
 365 
 366                 /* workaround to disable wide channels in 5GHz */
 367                 if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) &&
 368                     is_5ghz) {
 369                         ch_flags &= ~(NVM_CHANNEL_40MHZ |
 370                                      NVM_CHANNEL_80MHZ |
 371                                      NVM_CHANNEL_160MHZ);
 372                 }
 373 
 374                 if (ch_flags & NVM_CHANNEL_160MHZ)
 375                         data->vht160_supported = true;
 376 
 377                 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) &&
 378                     !(ch_flags & NVM_CHANNEL_VALID)) {
 379                         /*
 380                          * Channels might become valid later if lar is
 381                          * supported, hence we still want to add them to
 382                          * the list of supported channels to cfg80211.
 383                          */
 384                         iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
 385                                                     nvm_chan[ch_idx], ch_flags);
 386                         continue;
 387                 }
 388 
 389                 channel = &data->channels[n_channels];
 390                 n_channels++;
 391 
 392                 channel->hw_value = nvm_chan[ch_idx];
 393                 channel->band = is_5ghz ?
 394                                 NL80211_BAND_5GHZ : NL80211_BAND_2GHZ;
 395                 channel->center_freq =
 396                         ieee80211_channel_to_frequency(
 397                                 channel->hw_value, channel->band);
 398 
 399                 /* Initialize regulatory-based run-time data */
 400 
 401                 /*
 402                  * Default value - highest tx power value.  max_power
 403                  * is not used in mvm, and is used for backwards compatibility
 404                  */
 405                 channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
 406 
 407                 /* don't put limitations in case we're using LAR */
 408                 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR))
 409                         channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
 410                                                                ch_idx, is_5ghz,
 411                                                                ch_flags, cfg);
 412                 else
 413                         channel->flags = 0;
 414 
 415                 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
 416                                             channel->hw_value, ch_flags);
 417                 IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n",
 418                                  channel->hw_value, channel->max_power);
 419         }
 420 
 421         return n_channels;
 422 }
 423 
 424 static void iwl_init_vht_hw_capab(struct iwl_trans *trans,
 425                                   struct iwl_nvm_data *data,
 426                                   struct ieee80211_sta_vht_cap *vht_cap,
 427                                   u8 tx_chains, u8 rx_chains)
 428 {
 429         const struct iwl_cfg *cfg = trans->cfg;
 430         int num_rx_ants = num_of_ant(rx_chains);
 431         int num_tx_ants = num_of_ant(tx_chains);
 432         unsigned int max_ampdu_exponent = (cfg->max_vht_ampdu_exponent ?:
 433                                            IEEE80211_VHT_MAX_AMPDU_1024K);
 434 
 435         vht_cap->vht_supported = true;
 436 
 437         vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
 438                        IEEE80211_VHT_CAP_RXSTBC_1 |
 439                        IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
 440                        3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
 441                        max_ampdu_exponent <<
 442                        IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
 443 
 444         if (data->vht160_supported)
 445                 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
 446                                 IEEE80211_VHT_CAP_SHORT_GI_160;
 447 
 448         if (cfg->vht_mu_mimo_supported)
 449                 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE;
 450 
 451         if (cfg->ht_params->ldpc)
 452                 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
 453 
 454         if (data->sku_cap_mimo_disabled) {
 455                 num_rx_ants = 1;
 456                 num_tx_ants = 1;
 457         }
 458 
 459         if (num_tx_ants > 1)
 460                 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
 461         else
 462                 vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
 463 
 464         switch (iwlwifi_mod_params.amsdu_size) {
 465         case IWL_AMSDU_DEF:
 466                 if (trans->trans_cfg->mq_rx_supported)
 467                         vht_cap->cap |=
 468                                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 469                 else
 470                         vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
 471                 break;
 472         case IWL_AMSDU_2K:
 473                 if (trans->trans_cfg->mq_rx_supported)
 474                         vht_cap->cap |=
 475                                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 476                 else
 477                         WARN(1, "RB size of 2K is not supported by this device\n");
 478                 break;
 479         case IWL_AMSDU_4K:
 480                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
 481                 break;
 482         case IWL_AMSDU_8K:
 483                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
 484                 break;
 485         case IWL_AMSDU_12K:
 486                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 487                 break;
 488         default:
 489                 break;
 490         }
 491 
 492         vht_cap->vht_mcs.rx_mcs_map =
 493                 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
 494                             IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
 495                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
 496                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
 497                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
 498                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
 499                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
 500                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
 501 
 502         if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
 503                 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
 504                 /* this works because NOT_SUPPORTED == 3 */
 505                 vht_cap->vht_mcs.rx_mcs_map |=
 506                         cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
 507         }
 508 
 509         vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
 510 
 511         vht_cap->vht_mcs.tx_highest |=
 512                 cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE);
 513 }
 514 
 515 static struct ieee80211_sband_iftype_data iwl_he_capa[] = {
 516         {
 517                 .types_mask = BIT(NL80211_IFTYPE_STATION),
 518                 .he_cap = {
 519                         .has_he = true,
 520                         .he_cap_elem = {
 521                                 .mac_cap_info[0] =
 522                                         IEEE80211_HE_MAC_CAP0_HTC_HE |
 523                                         IEEE80211_HE_MAC_CAP0_TWT_REQ,
 524                                 .mac_cap_info[1] =
 525                                         IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
 526                                         IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
 527                                 .mac_cap_info[2] =
 528                                         IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP,
 529                                 .mac_cap_info[3] =
 530                                         IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
 531                                         IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
 532                                 .mac_cap_info[4] =
 533                                         IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU |
 534                                         IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39,
 535                                 .mac_cap_info[5] =
 536                                         IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40 |
 537                                         IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B41 |
 538                                         IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU |
 539                                         IEEE80211_HE_MAC_CAP5_HE_DYNAMIC_SM_PS |
 540                                         IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX,
 541                                 .phy_cap_info[0] =
 542                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
 543                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
 544                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G,
 545                                 .phy_cap_info[1] =
 546                                         IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
 547                                         IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
 548                                         IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD,
 549                                 .phy_cap_info[2] =
 550                                         IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US,
 551                                 .phy_cap_info[3] =
 552                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_NO_DCM |
 553                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 |
 554                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_NO_DCM |
 555                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1,
 556                                 .phy_cap_info[4] =
 557                                         IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
 558                                         IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_8 |
 559                                         IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_8,
 560                                 .phy_cap_info[5] =
 561                                         IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_2 |
 562                                         IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2,
 563                                 .phy_cap_info[6] =
 564                                         IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
 565                                 .phy_cap_info[7] =
 566                                         IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_AR |
 567                                         IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI |
 568                                         IEEE80211_HE_PHY_CAP7_MAX_NC_1,
 569                                 .phy_cap_info[8] =
 570                                         IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
 571                                         IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
 572                                         IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
 573                                         IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
 574                                         IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_2x996,
 575                                 .phy_cap_info[9] =
 576                                         IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
 577                                         IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
 578                                         IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
 579                                         IEEE80211_HE_PHY_CAP9_NOMIMAL_PKT_PADDING_RESERVED,
 580                         },
 581                         /*
 582                          * Set default Tx/Rx HE MCS NSS Support field.
 583                          * Indicate support for up to 2 spatial streams and all
 584                          * MCS, without any special cases
 585                          */
 586                         .he_mcs_nss_supp = {
 587                                 .rx_mcs_80 = cpu_to_le16(0xfffa),
 588                                 .tx_mcs_80 = cpu_to_le16(0xfffa),
 589                                 .rx_mcs_160 = cpu_to_le16(0xfffa),
 590                                 .tx_mcs_160 = cpu_to_le16(0xfffa),
 591                                 .rx_mcs_80p80 = cpu_to_le16(0xffff),
 592                                 .tx_mcs_80p80 = cpu_to_le16(0xffff),
 593                         },
 594                         /*
 595                          * Set default PPE thresholds, with PPET16 set to 0,
 596                          * PPET8 set to 7
 597                          */
 598                         .ppe_thres = {0x61, 0x1c, 0xc7, 0x71},
 599                 },
 600         },
 601         {
 602                 .types_mask = BIT(NL80211_IFTYPE_AP),
 603                 .he_cap = {
 604                         .has_he = true,
 605                         .he_cap_elem = {
 606                                 .mac_cap_info[0] =
 607                                         IEEE80211_HE_MAC_CAP0_HTC_HE,
 608                                 .mac_cap_info[1] =
 609                                         IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
 610                                         IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
 611                                 .mac_cap_info[2] =
 612                                         IEEE80211_HE_MAC_CAP2_BSR,
 613                                 .mac_cap_info[3] =
 614                                         IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
 615                                         IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
 616                                 .mac_cap_info[4] =
 617                                         IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU,
 618                                 .mac_cap_info[5] =
 619                                         IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU,
 620                                 .phy_cap_info[0] =
 621                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
 622                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
 623                                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G,
 624                                 .phy_cap_info[1] =
 625                                         IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD,
 626                                 .phy_cap_info[2] =
 627                                         IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US,
 628                                 .phy_cap_info[3] =
 629                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_NO_DCM |
 630                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 |
 631                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_NO_DCM |
 632                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1,
 633                                 .phy_cap_info[4] =
 634                                         IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
 635                                         IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_8 |
 636                                         IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_8,
 637                                 .phy_cap_info[5] =
 638                                         IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_2 |
 639                                         IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2,
 640                                 .phy_cap_info[6] =
 641                                         IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
 642                                 .phy_cap_info[7] =
 643                                         IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI |
 644                                         IEEE80211_HE_PHY_CAP7_MAX_NC_1,
 645                                 .phy_cap_info[8] =
 646                                         IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
 647                                         IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
 648                                         IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
 649                                         IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
 650                                         IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_2x996,
 651                                 .phy_cap_info[9] =
 652                                         IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
 653                                         IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
 654                                         IEEE80211_HE_PHY_CAP9_NOMIMAL_PKT_PADDING_RESERVED,
 655                         },
 656                         /*
 657                          * Set default Tx/Rx HE MCS NSS Support field.
 658                          * Indicate support for up to 2 spatial streams and all
 659                          * MCS, without any special cases
 660                          */
 661                         .he_mcs_nss_supp = {
 662                                 .rx_mcs_80 = cpu_to_le16(0xfffa),
 663                                 .tx_mcs_80 = cpu_to_le16(0xfffa),
 664                                 .rx_mcs_160 = cpu_to_le16(0xfffa),
 665                                 .tx_mcs_160 = cpu_to_le16(0xfffa),
 666                                 .rx_mcs_80p80 = cpu_to_le16(0xffff),
 667                                 .tx_mcs_80p80 = cpu_to_le16(0xffff),
 668                         },
 669                         /*
 670                          * Set default PPE thresholds, with PPET16 set to 0,
 671                          * PPET8 set to 7
 672                          */
 673                         .ppe_thres = {0x61, 0x1c, 0xc7, 0x71},
 674                 },
 675         },
 676 };
 677 
 678 static void iwl_init_he_hw_capab(struct ieee80211_supported_band *sband,
 679                                  u8 tx_chains, u8 rx_chains)
 680 {
 681         sband->iftype_data = iwl_he_capa;
 682         sband->n_iftype_data = ARRAY_SIZE(iwl_he_capa);
 683 
 684         /* If not 2x2, we need to indicate 1x1 in the Midamble RX Max NSTS */
 685         if ((tx_chains & rx_chains) != ANT_AB) {
 686                 int i;
 687 
 688                 for (i = 0; i < sband->n_iftype_data; i++) {
 689                         iwl_he_capa[i].he_cap.he_cap_elem.phy_cap_info[1] &=
 690                                 ~IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS;
 691                         iwl_he_capa[i].he_cap.he_cap_elem.phy_cap_info[2] &=
 692                                 ~IEEE80211_HE_PHY_CAP2_MIDAMBLE_RX_TX_MAX_NSTS;
 693                         iwl_he_capa[i].he_cap.he_cap_elem.phy_cap_info[7] &=
 694                                 ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
 695                 }
 696         }
 697 }
 698 
 699 static void iwl_init_sbands(struct iwl_trans *trans,
 700                             struct iwl_nvm_data *data,
 701                             const void *nvm_ch_flags, u8 tx_chains,
 702                             u8 rx_chains, u32 sbands_flags, bool v4)
 703 {
 704         struct device *dev = trans->dev;
 705         const struct iwl_cfg *cfg = trans->cfg;
 706         int n_channels;
 707         int n_used = 0;
 708         struct ieee80211_supported_band *sband;
 709 
 710         n_channels = iwl_init_channel_map(dev, cfg, data, nvm_ch_flags,
 711                                           sbands_flags, v4);
 712         sband = &data->bands[NL80211_BAND_2GHZ];
 713         sband->band = NL80211_BAND_2GHZ;
 714         sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
 715         sband->n_bitrates = N_RATES_24;
 716         n_used += iwl_init_sband_channels(data, sband, n_channels,
 717                                           NL80211_BAND_2GHZ);
 718         iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ,
 719                              tx_chains, rx_chains);
 720 
 721         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
 722                 iwl_init_he_hw_capab(sband, tx_chains, rx_chains);
 723 
 724         sband = &data->bands[NL80211_BAND_5GHZ];
 725         sband->band = NL80211_BAND_5GHZ;
 726         sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
 727         sband->n_bitrates = N_RATES_52;
 728         n_used += iwl_init_sband_channels(data, sband, n_channels,
 729                                           NL80211_BAND_5GHZ);
 730         iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ,
 731                              tx_chains, rx_chains);
 732         if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac)
 733                 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap,
 734                                       tx_chains, rx_chains);
 735 
 736         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
 737                 iwl_init_he_hw_capab(sband, tx_chains, rx_chains);
 738 
 739         if (n_channels != n_used)
 740                 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
 741                             n_used, n_channels);
 742 }
 743 
 744 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
 745                        const __le16 *phy_sku)
 746 {
 747         if (cfg->nvm_type != IWL_NVM_EXT)
 748                 return le16_to_cpup(nvm_sw + SKU);
 749 
 750         return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
 751 }
 752 
 753 static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
 754 {
 755         if (cfg->nvm_type != IWL_NVM_EXT)
 756                 return le16_to_cpup(nvm_sw + NVM_VERSION);
 757         else
 758                 return le32_to_cpup((__le32 *)(nvm_sw +
 759                                                NVM_VERSION_EXT_NVM));
 760 }
 761 
 762 static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
 763                              const __le16 *phy_sku)
 764 {
 765         if (cfg->nvm_type != IWL_NVM_EXT)
 766                 return le16_to_cpup(nvm_sw + RADIO_CFG);
 767 
 768         return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
 769 
 770 }
 771 
 772 static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
 773 {
 774         int n_hw_addr;
 775 
 776         if (cfg->nvm_type != IWL_NVM_EXT)
 777                 return le16_to_cpup(nvm_sw + N_HW_ADDRS);
 778 
 779         n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
 780 
 781         return n_hw_addr & N_HW_ADDR_MASK;
 782 }
 783 
 784 static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
 785                               struct iwl_nvm_data *data,
 786                               u32 radio_cfg)
 787 {
 788         if (cfg->nvm_type != IWL_NVM_EXT) {
 789                 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
 790                 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
 791                 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
 792                 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
 793                 return;
 794         }
 795 
 796         /* set the radio configuration for family 8000 */
 797         data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg);
 798         data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg);
 799         data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg);
 800         data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg);
 801         data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg);
 802         data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg);
 803 }
 804 
 805 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
 806 {
 807         const u8 *hw_addr;
 808 
 809         hw_addr = (const u8 *)&mac_addr0;
 810         dest[0] = hw_addr[3];
 811         dest[1] = hw_addr[2];
 812         dest[2] = hw_addr[1];
 813         dest[3] = hw_addr[0];
 814 
 815         hw_addr = (const u8 *)&mac_addr1;
 816         dest[4] = hw_addr[1];
 817         dest[5] = hw_addr[0];
 818 }
 819 
 820 static void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
 821                                         struct iwl_nvm_data *data)
 822 {
 823         __le32 mac_addr0 =
 824                 cpu_to_le32(iwl_read32(trans,
 825                                        trans->trans_cfg->csr->mac_addr0_strap));
 826         __le32 mac_addr1 =
 827                 cpu_to_le32(iwl_read32(trans,
 828                                        trans->trans_cfg->csr->mac_addr1_strap));
 829 
 830         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
 831         /*
 832          * If the OEM fused a valid address, use it instead of the one in the
 833          * OTP
 834          */
 835         if (is_valid_ether_addr(data->hw_addr))
 836                 return;
 837 
 838         mac_addr0 = cpu_to_le32(iwl_read32(trans,
 839                                         trans->trans_cfg->csr->mac_addr0_otp));
 840         mac_addr1 = cpu_to_le32(iwl_read32(trans,
 841                                         trans->trans_cfg->csr->mac_addr1_otp));
 842 
 843         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
 844 }
 845 
 846 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
 847                                            const struct iwl_cfg *cfg,
 848                                            struct iwl_nvm_data *data,
 849                                            const __le16 *mac_override,
 850                                            const __be16 *nvm_hw)
 851 {
 852         const u8 *hw_addr;
 853 
 854         if (mac_override) {
 855                 static const u8 reserved_mac[] = {
 856                         0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
 857                 };
 858 
 859                 hw_addr = (const u8 *)(mac_override +
 860                                  MAC_ADDRESS_OVERRIDE_EXT_NVM);
 861 
 862                 /*
 863                  * Store the MAC address from MAO section.
 864                  * No byte swapping is required in MAO section
 865                  */
 866                 memcpy(data->hw_addr, hw_addr, ETH_ALEN);
 867 
 868                 /*
 869                  * Force the use of the OTP MAC address in case of reserved MAC
 870                  * address in the NVM, or if address is given but invalid.
 871                  */
 872                 if (is_valid_ether_addr(data->hw_addr) &&
 873                     memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
 874                         return;
 875 
 876                 IWL_ERR(trans,
 877                         "mac address from nvm override section is not valid\n");
 878         }
 879 
 880         if (nvm_hw) {
 881                 /* read the mac address from WFMP registers */
 882                 __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans,
 883                                                 WFMP_MAC_ADDR_0));
 884                 __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans,
 885                                                 WFMP_MAC_ADDR_1));
 886 
 887                 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
 888 
 889                 return;
 890         }
 891 
 892         IWL_ERR(trans, "mac address is not found\n");
 893 }
 894 
 895 static int iwl_set_hw_address(struct iwl_trans *trans,
 896                               const struct iwl_cfg *cfg,
 897                               struct iwl_nvm_data *data, const __be16 *nvm_hw,
 898                               const __le16 *mac_override)
 899 {
 900         if (cfg->mac_addr_from_csr) {
 901                 iwl_set_hw_address_from_csr(trans, data);
 902         } else if (cfg->nvm_type != IWL_NVM_EXT) {
 903                 const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
 904 
 905                 /* The byte order is little endian 16 bit, meaning 214365 */
 906                 data->hw_addr[0] = hw_addr[1];
 907                 data->hw_addr[1] = hw_addr[0];
 908                 data->hw_addr[2] = hw_addr[3];
 909                 data->hw_addr[3] = hw_addr[2];
 910                 data->hw_addr[4] = hw_addr[5];
 911                 data->hw_addr[5] = hw_addr[4];
 912         } else {
 913                 iwl_set_hw_address_family_8000(trans, cfg, data,
 914                                                mac_override, nvm_hw);
 915         }
 916 
 917         if (!is_valid_ether_addr(data->hw_addr)) {
 918                 IWL_ERR(trans, "no valid mac address was found\n");
 919                 return -EINVAL;
 920         }
 921 
 922         IWL_INFO(trans, "base HW address: %pM\n", data->hw_addr);
 923 
 924         return 0;
 925 }
 926 
 927 static bool
 928 iwl_nvm_no_wide_in_5ghz(struct iwl_trans *trans, const struct iwl_cfg *cfg,
 929                         const __be16 *nvm_hw)
 930 {
 931         /*
 932          * Workaround a bug in Indonesia SKUs where the regulatory in
 933          * some 7000-family OTPs erroneously allow wide channels in
 934          * 5GHz.  To check for Indonesia, we take the SKU value from
 935          * bits 1-4 in the subsystem ID and check if it is either 5 or
 936          * 9.  In those cases, we need to force-disable wide channels
 937          * in 5GHz otherwise the FW will throw a sysassert when we try
 938          * to use them.
 939          */
 940         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
 941                 /*
 942                  * Unlike the other sections in the NVM, the hw
 943                  * section uses big-endian.
 944                  */
 945                 u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID);
 946                 u8 sku = (subsystem_id & 0x1e) >> 1;
 947 
 948                 if (sku == 5 || sku == 9) {
 949                         IWL_DEBUG_EEPROM(trans->dev,
 950                                          "disabling wide channels in 5GHz (0x%0x %d)\n",
 951                                          subsystem_id, sku);
 952                         return true;
 953                 }
 954         }
 955 
 956         return false;
 957 }
 958 
 959 struct iwl_nvm_data *
 960 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
 961                    const __be16 *nvm_hw, const __le16 *nvm_sw,
 962                    const __le16 *nvm_calib, const __le16 *regulatory,
 963                    const __le16 *mac_override, const __le16 *phy_sku,
 964                    u8 tx_chains, u8 rx_chains, bool lar_fw_supported)
 965 {
 966         struct iwl_nvm_data *data;
 967         bool lar_enabled;
 968         u32 sku, radio_cfg;
 969         u32 sbands_flags = 0;
 970         u16 lar_config;
 971         const __le16 *ch_section;
 972 
 973         if (cfg->uhb_supported)
 974                 data = kzalloc(struct_size(data, channels,
 975                                            IWL_NVM_NUM_CHANNELS_UHB),
 976                                            GFP_KERNEL);
 977         else if (cfg->nvm_type != IWL_NVM_EXT)
 978                 data = kzalloc(struct_size(data, channels,
 979                                            IWL_NVM_NUM_CHANNELS),
 980                                            GFP_KERNEL);
 981         else
 982                 data = kzalloc(struct_size(data, channels,
 983                                            IWL_NVM_NUM_CHANNELS_EXT),
 984                                            GFP_KERNEL);
 985         if (!data)
 986                 return NULL;
 987 
 988         data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
 989 
 990         radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
 991         iwl_set_radio_cfg(cfg, data, radio_cfg);
 992         if (data->valid_tx_ant)
 993                 tx_chains &= data->valid_tx_ant;
 994         if (data->valid_rx_ant)
 995                 rx_chains &= data->valid_rx_ant;
 996 
 997         sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
 998         data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
 999         data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
1000         data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
1001         if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
1002                 data->sku_cap_11n_enable = false;
1003         data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
1004                                     (sku & NVM_SKU_CAP_11AC_ENABLE);
1005         data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
1006 
1007         data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
1008 
1009         if (cfg->nvm_type != IWL_NVM_EXT) {
1010                 /* Checking for required sections */
1011                 if (!nvm_calib) {
1012                         IWL_ERR(trans,
1013                                 "Can't parse empty Calib NVM sections\n");
1014                         kfree(data);
1015                         return NULL;
1016                 }
1017 
1018                 ch_section = cfg->nvm_type == IWL_NVM_SDP ?
1019                              &regulatory[NVM_CHANNELS_SDP] :
1020                              &nvm_sw[NVM_CHANNELS];
1021 
1022                 /* in family 8000 Xtal calibration values moved to OTP */
1023                 data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
1024                 data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
1025                 lar_enabled = true;
1026         } else {
1027                 u16 lar_offset = data->nvm_version < 0xE39 ?
1028                                  NVM_LAR_OFFSET_OLD :
1029                                  NVM_LAR_OFFSET;
1030 
1031                 lar_config = le16_to_cpup(regulatory + lar_offset);
1032                 data->lar_enabled = !!(lar_config &
1033                                        NVM_LAR_ENABLED);
1034                 lar_enabled = data->lar_enabled;
1035                 ch_section = &regulatory[NVM_CHANNELS_EXTENDED];
1036         }
1037 
1038         /* If no valid mac address was found - bail out */
1039         if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) {
1040                 kfree(data);
1041                 return NULL;
1042         }
1043 
1044         if (lar_fw_supported && lar_enabled)
1045                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1046 
1047         if (iwl_nvm_no_wide_in_5ghz(trans, cfg, nvm_hw))
1048                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ;
1049 
1050         iwl_init_sbands(trans, data, ch_section, tx_chains, rx_chains,
1051                         sbands_flags, false);
1052         data->calib_version = 255;
1053 
1054         return data;
1055 }
1056 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
1057 
1058 static u32 iwl_nvm_get_regdom_bw_flags(const u16 *nvm_chan,
1059                                        int ch_idx, u16 nvm_flags,
1060                                        u16 cap_flags,
1061                                        const struct iwl_cfg *cfg)
1062 {
1063         u32 flags = NL80211_RRF_NO_HT40;
1064 
1065         if (ch_idx < NUM_2GHZ_CHANNELS &&
1066             (nvm_flags & NVM_CHANNEL_40MHZ)) {
1067                 if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
1068                         flags &= ~NL80211_RRF_NO_HT40PLUS;
1069                 if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
1070                         flags &= ~NL80211_RRF_NO_HT40MINUS;
1071         } else if (nvm_flags & NVM_CHANNEL_40MHZ) {
1072                 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
1073                         flags &= ~NL80211_RRF_NO_HT40PLUS;
1074                 else
1075                         flags &= ~NL80211_RRF_NO_HT40MINUS;
1076         }
1077 
1078         if (!(nvm_flags & NVM_CHANNEL_80MHZ))
1079                 flags |= NL80211_RRF_NO_80MHZ;
1080         if (!(nvm_flags & NVM_CHANNEL_160MHZ))
1081                 flags |= NL80211_RRF_NO_160MHZ;
1082 
1083         if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
1084                 flags |= NL80211_RRF_NO_IR;
1085 
1086         if (nvm_flags & NVM_CHANNEL_RADAR)
1087                 flags |= NL80211_RRF_DFS;
1088 
1089         if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
1090                 flags |= NL80211_RRF_NO_OUTDOOR;
1091 
1092         /* Set the GO concurrent flag only in case that NO_IR is set.
1093          * Otherwise it is meaningless
1094          */
1095         if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
1096             (flags & NL80211_RRF_NO_IR))
1097                 flags |= NL80211_RRF_GO_CONCURRENT;
1098 
1099         /*
1100          * cap_flags is per regulatory domain so apply it for every channel
1101          */
1102         if (ch_idx >= NUM_2GHZ_CHANNELS) {
1103                 if (cap_flags & REG_CAPA_40MHZ_FORBIDDEN)
1104                         flags |= NL80211_RRF_NO_HT40;
1105 
1106                 if (!(cap_flags & REG_CAPA_80MHZ_ALLOWED))
1107                         flags |= NL80211_RRF_NO_80MHZ;
1108 
1109                 if (!(cap_flags & REG_CAPA_160MHZ_ALLOWED))
1110                         flags |= NL80211_RRF_NO_160MHZ;
1111         }
1112 
1113         return flags;
1114 }
1115 
1116 struct ieee80211_regdomain *
1117 iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
1118                        int num_of_ch, __le32 *channels, u16 fw_mcc,
1119                        u16 geo_info, u16 cap)
1120 {
1121         int ch_idx;
1122         u16 ch_flags;
1123         u32 reg_rule_flags, prev_reg_rule_flags = 0;
1124         const u16 *nvm_chan;
1125         struct ieee80211_regdomain *regd, *copy_rd;
1126         struct ieee80211_reg_rule *rule;
1127         enum nl80211_band band;
1128         int center_freq, prev_center_freq = 0;
1129         int valid_rules = 0;
1130         bool new_rule;
1131         int max_num_ch;
1132 
1133         if (cfg->uhb_supported) {
1134                 max_num_ch = IWL_NVM_NUM_CHANNELS_UHB;
1135                 nvm_chan = iwl_uhb_nvm_channels;
1136         } else if (cfg->nvm_type == IWL_NVM_EXT) {
1137                 max_num_ch = IWL_NVM_NUM_CHANNELS_EXT;
1138                 nvm_chan = iwl_ext_nvm_channels;
1139         } else {
1140                 max_num_ch = IWL_NVM_NUM_CHANNELS;
1141                 nvm_chan = iwl_nvm_channels;
1142         }
1143 
1144         if (WARN_ON(num_of_ch > max_num_ch))
1145                 num_of_ch = max_num_ch;
1146 
1147         if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
1148                 return ERR_PTR(-EINVAL);
1149 
1150         IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
1151                       num_of_ch);
1152 
1153         /* build a regdomain rule for every valid channel */
1154         regd = kzalloc(struct_size(regd, reg_rules, num_of_ch), GFP_KERNEL);
1155         if (!regd)
1156                 return ERR_PTR(-ENOMEM);
1157 
1158         /* set alpha2 from FW. */
1159         regd->alpha2[0] = fw_mcc >> 8;
1160         regd->alpha2[1] = fw_mcc & 0xff;
1161 
1162         for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
1163                 ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
1164                 band = (ch_idx < NUM_2GHZ_CHANNELS) ?
1165                        NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
1166                 center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
1167                                                              band);
1168                 new_rule = false;
1169 
1170                 if (!(ch_flags & NVM_CHANNEL_VALID)) {
1171                         iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
1172                                                     nvm_chan[ch_idx], ch_flags);
1173                         continue;
1174                 }
1175 
1176                 reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
1177                                                              ch_flags, cap,
1178                                                              cfg);
1179 
1180                 /* we can't continue the same rule */
1181                 if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags ||
1182                     center_freq - prev_center_freq > 20) {
1183                         valid_rules++;
1184                         new_rule = true;
1185                 }
1186 
1187                 rule = &regd->reg_rules[valid_rules - 1];
1188 
1189                 if (new_rule)
1190                         rule->freq_range.start_freq_khz =
1191                                                 MHZ_TO_KHZ(center_freq - 10);
1192 
1193                 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
1194 
1195                 /* this doesn't matter - not used by FW */
1196                 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
1197                 rule->power_rule.max_eirp =
1198                         DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
1199 
1200                 rule->flags = reg_rule_flags;
1201 
1202                 /* rely on auto-calculation to merge BW of contiguous chans */
1203                 rule->flags |= NL80211_RRF_AUTO_BW;
1204                 rule->freq_range.max_bandwidth_khz = 0;
1205 
1206                 prev_center_freq = center_freq;
1207                 prev_reg_rule_flags = reg_rule_flags;
1208 
1209                 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
1210                                             nvm_chan[ch_idx], ch_flags);
1211 
1212                 if (!(geo_info & GEO_WMM_ETSI_5GHZ_INFO) ||
1213                     band == NL80211_BAND_2GHZ)
1214                         continue;
1215 
1216                 reg_query_regdb_wmm(regd->alpha2, center_freq, rule);
1217         }
1218 
1219         regd->n_reg_rules = valid_rules;
1220 
1221         /*
1222          * Narrow down regdom for unused regulatory rules to prevent hole
1223          * between reg rules to wmm rules.
1224          */
1225         copy_rd = kmemdup(regd, struct_size(regd, reg_rules, valid_rules),
1226                           GFP_KERNEL);
1227         if (!copy_rd)
1228                 copy_rd = ERR_PTR(-ENOMEM);
1229 
1230         kfree(regd);
1231         return copy_rd;
1232 }
1233 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);
1234 
1235 #define IWL_MAX_NVM_SECTION_SIZE        0x1b58
1236 #define IWL_MAX_EXT_NVM_SECTION_SIZE    0x1ffc
1237 #define MAX_NVM_FILE_LEN        16384
1238 
1239 void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data,
1240                     unsigned int len)
1241 {
1242 #define IWL_4165_DEVICE_ID      0x5501
1243 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
1244 
1245         if (section == NVM_SECTION_TYPE_PHY_SKU &&
1246             hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
1247             (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
1248                 /* OTP 0x52 bug work around: it's a 1x1 device */
1249                 data[3] = ANT_B | (ANT_B << 4);
1250 }
1251 IWL_EXPORT_SYMBOL(iwl_nvm_fixups);
1252 
1253 /*
1254  * Reads external NVM from a file into mvm->nvm_sections
1255  *
1256  * HOW TO CREATE THE NVM FILE FORMAT:
1257  * ------------------------------
1258  * 1. create hex file, format:
1259  *      3800 -> header
1260  *      0000 -> header
1261  *      5a40 -> data
1262  *
1263  *   rev - 6 bit (word1)
1264  *   len - 10 bit (word1)
1265  *   id - 4 bit (word2)
1266  *   rsv - 12 bit (word2)
1267  *
1268  * 2. flip 8bits with 8 bits per line to get the right NVM file format
1269  *
1270  * 3. create binary file from the hex file
1271  *
1272  * 4. save as "iNVM_xxx.bin" under /lib/firmware
1273  */
1274 int iwl_read_external_nvm(struct iwl_trans *trans,
1275                           const char *nvm_file_name,
1276                           struct iwl_nvm_section *nvm_sections)
1277 {
1278         int ret, section_size;
1279         u16 section_id;
1280         const struct firmware *fw_entry;
1281         const struct {
1282                 __le16 word1;
1283                 __le16 word2;
1284                 u8 data[];
1285         } *file_sec;
1286         const u8 *eof;
1287         u8 *temp;
1288         int max_section_size;
1289         const __le32 *dword_buff;
1290 
1291 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
1292 #define NVM_WORD2_ID(x) (x >> 12)
1293 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8))
1294 #define EXT_NVM_WORD1_ID(x) ((x) >> 4)
1295 #define NVM_HEADER_0    (0x2A504C54)
1296 #define NVM_HEADER_1    (0x4E564D2A)
1297 #define NVM_HEADER_SIZE (4 * sizeof(u32))
1298 
1299         IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n");
1300 
1301         /* Maximal size depends on NVM version */
1302         if (trans->cfg->nvm_type != IWL_NVM_EXT)
1303                 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
1304         else
1305                 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
1306 
1307         /*
1308          * Obtain NVM image via request_firmware. Since we already used
1309          * request_firmware_nowait() for the firmware binary load and only
1310          * get here after that we assume the NVM request can be satisfied
1311          * synchronously.
1312          */
1313         ret = request_firmware(&fw_entry, nvm_file_name, trans->dev);
1314         if (ret) {
1315                 IWL_ERR(trans, "ERROR: %s isn't available %d\n",
1316                         nvm_file_name, ret);
1317                 return ret;
1318         }
1319 
1320         IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n",
1321                  nvm_file_name, fw_entry->size);
1322 
1323         if (fw_entry->size > MAX_NVM_FILE_LEN) {
1324                 IWL_ERR(trans, "NVM file too large\n");
1325                 ret = -EINVAL;
1326                 goto out;
1327         }
1328 
1329         eof = fw_entry->data + fw_entry->size;
1330         dword_buff = (__le32 *)fw_entry->data;
1331 
1332         /* some NVM file will contain a header.
1333          * The header is identified by 2 dwords header as follow:
1334          * dword[0] = 0x2A504C54
1335          * dword[1] = 0x4E564D2A
1336          *
1337          * This header must be skipped when providing the NVM data to the FW.
1338          */
1339         if (fw_entry->size > NVM_HEADER_SIZE &&
1340             dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
1341             dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
1342                 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
1343                 IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
1344                 IWL_INFO(trans, "NVM Manufacturing date %08X\n",
1345                          le32_to_cpu(dword_buff[3]));
1346 
1347                 /* nvm file validation, dword_buff[2] holds the file version */
1348                 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_8000 &&
1349                     CSR_HW_REV_STEP(trans->hw_rev) == SILICON_C_STEP &&
1350                     le32_to_cpu(dword_buff[2]) < 0xE4A) {
1351                         ret = -EFAULT;
1352                         goto out;
1353                 }
1354         } else {
1355                 file_sec = (void *)fw_entry->data;
1356         }
1357 
1358         while (true) {
1359                 if (file_sec->data > eof) {
1360                         IWL_ERR(trans,
1361                                 "ERROR - NVM file too short for section header\n");
1362                         ret = -EINVAL;
1363                         break;
1364                 }
1365 
1366                 /* check for EOF marker */
1367                 if (!file_sec->word1 && !file_sec->word2) {
1368                         ret = 0;
1369                         break;
1370                 }
1371 
1372                 if (trans->cfg->nvm_type != IWL_NVM_EXT) {
1373                         section_size =
1374                                 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
1375                         section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
1376                 } else {
1377                         section_size = 2 * EXT_NVM_WORD2_LEN(
1378                                                 le16_to_cpu(file_sec->word2));
1379                         section_id = EXT_NVM_WORD1_ID(
1380                                                 le16_to_cpu(file_sec->word1));
1381                 }
1382 
1383                 if (section_size > max_section_size) {
1384                         IWL_ERR(trans, "ERROR - section too large (%d)\n",
1385                                 section_size);
1386                         ret = -EINVAL;
1387                         break;
1388                 }
1389 
1390                 if (!section_size) {
1391                         IWL_ERR(trans, "ERROR - section empty\n");
1392                         ret = -EINVAL;
1393                         break;
1394                 }
1395 
1396                 if (file_sec->data + section_size > eof) {
1397                         IWL_ERR(trans,
1398                                 "ERROR - NVM file too short for section (%d bytes)\n",
1399                                 section_size);
1400                         ret = -EINVAL;
1401                         break;
1402                 }
1403 
1404                 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
1405                          "Invalid NVM section ID %d\n", section_id)) {
1406                         ret = -EINVAL;
1407                         break;
1408                 }
1409 
1410                 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
1411                 if (!temp) {
1412                         ret = -ENOMEM;
1413                         break;
1414                 }
1415 
1416                 iwl_nvm_fixups(trans->hw_id, section_id, temp, section_size);
1417 
1418                 kfree(nvm_sections[section_id].data);
1419                 nvm_sections[section_id].data = temp;
1420                 nvm_sections[section_id].length = section_size;
1421 
1422                 /* advance to the next section */
1423                 file_sec = (void *)(file_sec->data + section_size);
1424         }
1425 out:
1426         release_firmware(fw_entry);
1427         return ret;
1428 }
1429 IWL_EXPORT_SYMBOL(iwl_read_external_nvm);
1430 
1431 struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans,
1432                                  const struct iwl_fw *fw)
1433 {
1434         struct iwl_nvm_get_info cmd = {};
1435         struct iwl_nvm_data *nvm;
1436         struct iwl_host_cmd hcmd = {
1437                 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
1438                 .data = { &cmd, },
1439                 .len = { sizeof(cmd) },
1440                 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO)
1441         };
1442         int  ret;
1443         bool lar_fw_supported = !iwlwifi_mod_params.lar_disable &&
1444                                 fw_has_capa(&fw->ucode_capa,
1445                                             IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
1446         bool empty_otp;
1447         u32 mac_flags;
1448         u32 sbands_flags = 0;
1449         /*
1450          * All the values in iwl_nvm_get_info_rsp v4 are the same as
1451          * in v3, except for the channel profile part of the
1452          * regulatory.  So we can just access the new struct, with the
1453          * exception of the latter.
1454          */
1455         struct iwl_nvm_get_info_rsp *rsp;
1456         struct iwl_nvm_get_info_rsp_v3 *rsp_v3;
1457         bool v4 = fw_has_api(&fw->ucode_capa,
1458                              IWL_UCODE_TLV_API_REGULATORY_NVM_INFO);
1459         size_t rsp_size = v4 ? sizeof(*rsp) : sizeof(*rsp_v3);
1460         void *channel_profile;
1461 
1462         ret = iwl_trans_send_cmd(trans, &hcmd);
1463         if (ret)
1464                 return ERR_PTR(ret);
1465 
1466         if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != rsp_size,
1467                  "Invalid payload len in NVM response from FW %d",
1468                  iwl_rx_packet_payload_len(hcmd.resp_pkt))) {
1469                 ret = -EINVAL;
1470                 goto out;
1471         }
1472 
1473         rsp = (void *)hcmd.resp_pkt->data;
1474         empty_otp = !!(le32_to_cpu(rsp->general.flags) &
1475                        NVM_GENERAL_FLAGS_EMPTY_OTP);
1476         if (empty_otp)
1477                 IWL_INFO(trans, "OTP is empty\n");
1478 
1479         nvm = kzalloc(struct_size(nvm, channels, IWL_NUM_CHANNELS), GFP_KERNEL);
1480         if (!nvm) {
1481                 ret = -ENOMEM;
1482                 goto out;
1483         }
1484 
1485         iwl_set_hw_address_from_csr(trans, nvm);
1486         /* TODO: if platform NVM has MAC address - override it here */
1487 
1488         if (!is_valid_ether_addr(nvm->hw_addr)) {
1489                 IWL_ERR(trans, "no valid mac address was found\n");
1490                 ret = -EINVAL;
1491                 goto err_free;
1492         }
1493 
1494         IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr);
1495 
1496         /* Initialize general data */
1497         nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version);
1498         nvm->n_hw_addrs = rsp->general.n_hw_addrs;
1499         if (nvm->n_hw_addrs == 0)
1500                 IWL_WARN(trans,
1501                          "Firmware declares no reserved mac addresses. OTP is empty: %d\n",
1502                          empty_otp);
1503 
1504         /* Initialize MAC sku data */
1505         mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags);
1506         nvm->sku_cap_11ac_enable =
1507                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED);
1508         nvm->sku_cap_11n_enable =
1509                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED);
1510         nvm->sku_cap_11ax_enable =
1511                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AX_ENABLED);
1512         nvm->sku_cap_band_24ghz_enable =
1513                 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED);
1514         nvm->sku_cap_band_52ghz_enable =
1515                 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED);
1516         nvm->sku_cap_mimo_disabled =
1517                 !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED);
1518 
1519         /* Initialize PHY sku data */
1520         nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains);
1521         nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains);
1522 
1523         if (le32_to_cpu(rsp->regulatory.lar_enabled) && lar_fw_supported) {
1524                 nvm->lar_enabled = true;
1525                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1526         }
1527 
1528         rsp_v3 = (void *)rsp;
1529         channel_profile = v4 ? (void *)rsp->regulatory.channel_profile :
1530                           (void *)rsp_v3->regulatory.channel_profile;
1531 
1532         iwl_init_sbands(trans, nvm,
1533                         channel_profile,
1534                         nvm->valid_tx_ant & fw->valid_tx_ant,
1535                         nvm->valid_rx_ant & fw->valid_rx_ant,
1536                         sbands_flags, v4);
1537 
1538         iwl_free_resp(&hcmd);
1539         return nvm;
1540 
1541 err_free:
1542         kfree(nvm);
1543 out:
1544         iwl_free_resp(&hcmd);
1545         return ERR_PTR(ret);
1546 }
1547 IWL_EXPORT_SYMBOL(iwl_get_nvm);
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c

DEFINITIONS
