This source file includes following definitions.
- iwl_nvm_write_chunk
- iwl_nvm_read_chunk
- iwl_nvm_write_section
- iwl_nvm_read_section
- iwl_parse_nvm_sections
- iwl_mvm_load_nvm_to_nic
- iwl_nvm_init
- iwl_mvm_update_mcc
- iwl_mvm_init_mcc
- iwl_mvm_rx_chub_update_mcc
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64 #include <linux/firmware.h>
65 #include <linux/rtnetlink.h>
66 #include "iwl-trans.h"
67 #include "iwl-csr.h"
68 #include "mvm.h"
69 #include "iwl-eeprom-parse.h"
70 #include "iwl-eeprom-read.h"
71 #include "iwl-nvm-parse.h"
72 #include "iwl-prph.h"
73 #include "fw/acpi.h"
74
75
76 #define IWL_NVM_DEFAULT_CHUNK_SIZE (2 * 1024)
77
78 #define NVM_WRITE_OPCODE 1
79 #define NVM_READ_OPCODE 0
80
81
82 enum {
83 READ_NVM_CHUNK_SUCCEED = 0,
84 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
85 };
86
87
88
89
90
91 static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
92 u16 offset, u16 length, const u8 *data)
93 {
94 struct iwl_nvm_access_cmd nvm_access_cmd = {
95 .offset = cpu_to_le16(offset),
96 .length = cpu_to_le16(length),
97 .type = cpu_to_le16(section),
98 .op_code = NVM_WRITE_OPCODE,
99 };
100 struct iwl_host_cmd cmd = {
101 .id = NVM_ACCESS_CMD,
102 .len = { sizeof(struct iwl_nvm_access_cmd), length },
103 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
104 .data = { &nvm_access_cmd, data },
105
106 .dataflags = { 0, IWL_HCMD_DFL_DUP },
107 };
108 struct iwl_rx_packet *pkt;
109 struct iwl_nvm_access_resp *nvm_resp;
110 int ret;
111
112 ret = iwl_mvm_send_cmd(mvm, &cmd);
113 if (ret)
114 return ret;
115
116 pkt = cmd.resp_pkt;
117
118 nvm_resp = (void *)pkt->data;
119 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
120 IWL_ERR(mvm,
121 "NVM access write command failed for section %u (status = 0x%x)\n",
122 section, le16_to_cpu(nvm_resp->status));
123 ret = -EIO;
124 }
125
126 iwl_free_resp(&cmd);
127 return ret;
128 }
129
130 static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
131 u16 offset, u16 length, u8 *data)
132 {
133 struct iwl_nvm_access_cmd nvm_access_cmd = {
134 .offset = cpu_to_le16(offset),
135 .length = cpu_to_le16(length),
136 .type = cpu_to_le16(section),
137 .op_code = NVM_READ_OPCODE,
138 };
139 struct iwl_nvm_access_resp *nvm_resp;
140 struct iwl_rx_packet *pkt;
141 struct iwl_host_cmd cmd = {
142 .id = NVM_ACCESS_CMD,
143 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
144 .data = { &nvm_access_cmd, },
145 };
146 int ret, bytes_read, offset_read;
147 u8 *resp_data;
148
149 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
150
151 ret = iwl_mvm_send_cmd(mvm, &cmd);
152 if (ret)
153 return ret;
154
155 pkt = cmd.resp_pkt;
156
157
158 nvm_resp = (void *)pkt->data;
159 ret = le16_to_cpu(nvm_resp->status);
160 bytes_read = le16_to_cpu(nvm_resp->length);
161 offset_read = le16_to_cpu(nvm_resp->offset);
162 resp_data = nvm_resp->data;
163 if (ret) {
164 if ((offset != 0) &&
165 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
166
167
168
169
170
171
172
173
174 IWL_DEBUG_EEPROM(mvm->trans->dev,
175 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
176 offset);
177 ret = 0;
178 } else {
179 IWL_DEBUG_EEPROM(mvm->trans->dev,
180 "NVM access command failed with status %d (device: %s)\n",
181 ret, mvm->cfg->name);
182 ret = -ENODATA;
183 }
184 goto exit;
185 }
186
187 if (offset_read != offset) {
188 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
189 offset_read);
190 ret = -EINVAL;
191 goto exit;
192 }
193
194
195 memcpy(data + offset, resp_data, bytes_read);
196 ret = bytes_read;
197
198 exit:
199 iwl_free_resp(&cmd);
200 return ret;
201 }
202
203 static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
204 const u8 *data, u16 length)
205 {
206 int offset = 0;
207
208
209
210 while (offset < length) {
211 int chunk_size, ret;
212
213 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
214 length - offset);
215
216 ret = iwl_nvm_write_chunk(mvm, section, offset,
217 chunk_size, data + offset);
218 if (ret < 0)
219 return ret;
220
221 offset += chunk_size;
222 }
223
224 return 0;
225 }
226
227
228
229
230
231
232
233
234
235
236
237 static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
238 u8 *data, u32 size_read)
239 {
240 u16 length, offset = 0;
241 int ret;
242
243
244 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
245
246 ret = length;
247
248
249 while (ret == length) {
250
251 if ((size_read + offset + length) >
252 mvm->trans->trans_cfg->base_params->eeprom_size) {
253 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
254 return -ENOBUFS;
255 }
256
257 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
258 if (ret < 0) {
259 IWL_DEBUG_EEPROM(mvm->trans->dev,
260 "Cannot read NVM from section %d offset %d, length %d\n",
261 section, offset, length);
262 return ret;
263 }
264 offset += ret;
265 }
266
267 iwl_nvm_fixups(mvm->trans->hw_id, section, data, offset);
268
269 IWL_DEBUG_EEPROM(mvm->trans->dev,
270 "NVM section %d read completed\n", section);
271 return offset;
272 }
273
274 static struct iwl_nvm_data *
275 iwl_parse_nvm_sections(struct iwl_mvm *mvm)
276 {
277 struct iwl_nvm_section *sections = mvm->nvm_sections;
278 const __be16 *hw;
279 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
280 bool lar_enabled;
281 int regulatory_type;
282
283
284 if (mvm->trans->cfg->nvm_type == IWL_NVM) {
285 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
286 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
287 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
288 return NULL;
289 }
290 } else {
291 if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
292 regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
293 else
294 regulatory_type = NVM_SECTION_TYPE_REGULATORY;
295
296
297 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
298 !mvm->nvm_sections[regulatory_type].data) {
299 IWL_ERR(mvm,
300 "Can't parse empty family 8000 OTP/NVM sections\n");
301 return NULL;
302 }
303
304 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
305 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
306 IWL_ERR(mvm,
307 "Can't parse mac_address, empty sections\n");
308 return NULL;
309 }
310
311
312 if (mvm->trans->cfg->nvm_type == IWL_NVM_EXT &&
313 !mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
314 IWL_ERR(mvm,
315 "Can't parse phy_sku in B0, empty sections\n");
316 return NULL;
317 }
318 }
319
320 hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
321 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
322 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
323 mac_override =
324 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
325 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
326
327 regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
328 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
329 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
330
331 lar_enabled = !iwlwifi_mod_params.lar_disable &&
332 fw_has_capa(&mvm->fw->ucode_capa,
333 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
334
335 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, hw, sw, calib,
336 regulatory, mac_override, phy_sku,
337 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
338 lar_enabled);
339 }
340
341
342 int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
343 {
344 int i, ret = 0;
345 struct iwl_nvm_section *sections = mvm->nvm_sections;
346
347 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
348
349 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
350 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
351 continue;
352 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
353 sections[i].length);
354 if (ret < 0) {
355 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
356 break;
357 }
358 }
359 return ret;
360 }
361
362 int iwl_nvm_init(struct iwl_mvm *mvm)
363 {
364 int ret, section;
365 u32 size_read = 0;
366 u8 *nvm_buffer, *temp;
367 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
368
369 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
370 return -EINVAL;
371
372
373
374 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
375
376 nvm_buffer = kmalloc(mvm->trans->trans_cfg->base_params->eeprom_size,
377 GFP_KERNEL);
378 if (!nvm_buffer)
379 return -ENOMEM;
380 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
381
382 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
383 size_read);
384 if (ret == -ENODATA) {
385 ret = 0;
386 continue;
387 }
388 if (ret < 0)
389 break;
390 size_read += ret;
391 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
392 if (!temp) {
393 ret = -ENOMEM;
394 break;
395 }
396
397 iwl_nvm_fixups(mvm->trans->hw_id, section, temp, ret);
398
399 mvm->nvm_sections[section].data = temp;
400 mvm->nvm_sections[section].length = ret;
401
402 #ifdef CONFIG_IWLWIFI_DEBUGFS
403 switch (section) {
404 case NVM_SECTION_TYPE_SW:
405 mvm->nvm_sw_blob.data = temp;
406 mvm->nvm_sw_blob.size = ret;
407 break;
408 case NVM_SECTION_TYPE_CALIBRATION:
409 mvm->nvm_calib_blob.data = temp;
410 mvm->nvm_calib_blob.size = ret;
411 break;
412 case NVM_SECTION_TYPE_PRODUCTION:
413 mvm->nvm_prod_blob.data = temp;
414 mvm->nvm_prod_blob.size = ret;
415 break;
416 case NVM_SECTION_TYPE_PHY_SKU:
417 mvm->nvm_phy_sku_blob.data = temp;
418 mvm->nvm_phy_sku_blob.size = ret;
419 break;
420 case NVM_SECTION_TYPE_REGULATORY_SDP:
421 case NVM_SECTION_TYPE_REGULATORY:
422 mvm->nvm_reg_blob.data = temp;
423 mvm->nvm_reg_blob.size = ret;
424 break;
425 default:
426 if (section == mvm->cfg->nvm_hw_section_num) {
427 mvm->nvm_hw_blob.data = temp;
428 mvm->nvm_hw_blob.size = ret;
429 break;
430 }
431 }
432 #endif
433 }
434 if (!size_read)
435 IWL_ERR(mvm, "OTP is blank\n");
436 kfree(nvm_buffer);
437
438
439 if (mvm->nvm_file_name) {
440
441 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
442 mvm->nvm_sections);
443 if (ret) {
444 mvm->nvm_file_name = nvm_file_C;
445
446 if ((ret == -EFAULT || ret == -ENOENT) &&
447 mvm->nvm_file_name) {
448
449 ret = iwl_read_external_nvm(mvm->trans,
450 mvm->nvm_file_name,
451 mvm->nvm_sections);
452 if (ret)
453 return ret;
454 } else {
455 return ret;
456 }
457 }
458 }
459
460
461 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
462 if (!mvm->nvm_data)
463 return -ENODATA;
464 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
465 mvm->nvm_data->nvm_version);
466
467 return ret < 0 ? ret : 0;
468 }
469
470 struct iwl_mcc_update_resp *
471 iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
472 enum iwl_mcc_source src_id)
473 {
474 struct iwl_mcc_update_cmd mcc_update_cmd = {
475 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
476 .source_id = (u8)src_id,
477 };
478 struct iwl_mcc_update_resp *resp_cp;
479 struct iwl_rx_packet *pkt;
480 struct iwl_host_cmd cmd = {
481 .id = MCC_UPDATE_CMD,
482 .flags = CMD_WANT_SKB,
483 .data = { &mcc_update_cmd },
484 };
485
486 int ret;
487 u32 status;
488 int resp_len, n_channels;
489 u16 mcc;
490
491 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
492 return ERR_PTR(-EOPNOTSUPP);
493
494 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
495
496 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
497 alpha2[0], alpha2[1], src_id);
498
499 ret = iwl_mvm_send_cmd(mvm, &cmd);
500 if (ret)
501 return ERR_PTR(ret);
502
503 pkt = cmd.resp_pkt;
504
505
506 if (fw_has_capa(&mvm->fw->ucode_capa,
507 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT)) {
508 struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data;
509
510 n_channels = __le32_to_cpu(mcc_resp->n_channels);
511 resp_len = sizeof(struct iwl_mcc_update_resp) +
512 n_channels * sizeof(__le32);
513 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
514 if (!resp_cp) {
515 resp_cp = ERR_PTR(-ENOMEM);
516 goto exit;
517 }
518 } else {
519 struct iwl_mcc_update_resp_v3 *mcc_resp_v3 = (void *)pkt->data;
520
521 n_channels = __le32_to_cpu(mcc_resp_v3->n_channels);
522 resp_len = sizeof(struct iwl_mcc_update_resp) +
523 n_channels * sizeof(__le32);
524 resp_cp = kzalloc(resp_len, GFP_KERNEL);
525 if (!resp_cp) {
526 resp_cp = ERR_PTR(-ENOMEM);
527 goto exit;
528 }
529
530 resp_cp->status = mcc_resp_v3->status;
531 resp_cp->mcc = mcc_resp_v3->mcc;
532 resp_cp->cap = cpu_to_le16(mcc_resp_v3->cap);
533 resp_cp->source_id = mcc_resp_v3->source_id;
534 resp_cp->time = mcc_resp_v3->time;
535 resp_cp->geo_info = mcc_resp_v3->geo_info;
536 resp_cp->n_channels = mcc_resp_v3->n_channels;
537 memcpy(resp_cp->channels, mcc_resp_v3->channels,
538 n_channels * sizeof(__le32));
539 }
540
541 status = le32_to_cpu(resp_cp->status);
542
543 mcc = le16_to_cpu(resp_cp->mcc);
544
545
546 if (mcc == 0) {
547 mcc = 0x3030;
548 resp_cp->mcc = cpu_to_le16(mcc);
549 }
550
551 IWL_DEBUG_LAR(mvm,
552 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
553 status, mcc, mcc >> 8, mcc & 0xff, n_channels);
554
555 exit:
556 iwl_free_resp(&cmd);
557 return resp_cp;
558 }
559
560 int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
561 {
562 bool tlv_lar;
563 bool nvm_lar;
564 int retval;
565 struct ieee80211_regdomain *regd;
566 char mcc[3];
567
568 if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
569 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
570 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
571 nvm_lar = mvm->nvm_data->lar_enabled;
572 if (tlv_lar != nvm_lar)
573 IWL_INFO(mvm,
574 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
575 tlv_lar ? "enabled" : "disabled",
576 nvm_lar ? "enabled" : "disabled");
577 }
578
579 if (!iwl_mvm_is_lar_supported(mvm))
580 return 0;
581
582
583
584
585
586 retval = iwl_mvm_init_fw_regd(mvm);
587 if (retval != -ENOENT)
588 return retval;
589
590
591
592
593
594
595
596 mvm->lar_regdom_set = false;
597
598 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
599 if (IS_ERR_OR_NULL(regd))
600 return -EIO;
601
602 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
603 !iwl_acpi_get_mcc(mvm->dev, mcc)) {
604 kfree(regd);
605 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
606 MCC_SOURCE_BIOS, NULL);
607 if (IS_ERR_OR_NULL(regd))
608 return -EIO;
609 }
610
611 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
612 kfree(regd);
613 return retval;
614 }
615
616 void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
617 struct iwl_rx_cmd_buffer *rxb)
618 {
619 struct iwl_rx_packet *pkt = rxb_addr(rxb);
620 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
621 enum iwl_mcc_source src;
622 char mcc[3];
623 struct ieee80211_regdomain *regd;
624 int wgds_tbl_idx;
625
626 lockdep_assert_held(&mvm->mutex);
627
628 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
629 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
630 return;
631 }
632
633 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
634 return;
635
636 mcc[0] = le16_to_cpu(notif->mcc) >> 8;
637 mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
638 mcc[2] = '\0';
639 src = notif->source_id;
640
641 IWL_DEBUG_LAR(mvm,
642 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
643 mcc, src);
644 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
645 if (IS_ERR_OR_NULL(regd))
646 return;
647
648 wgds_tbl_idx = iwl_mvm_get_sar_geo_profile(mvm);
649 if (wgds_tbl_idx < 0)
650 IWL_DEBUG_INFO(mvm, "SAR WGDS is disabled (%d)\n",
651 wgds_tbl_idx);
652 else
653 IWL_DEBUG_INFO(mvm, "SAR WGDS: geo profile %d is configured\n",
654 wgds_tbl_idx);
655
656 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
657 kfree(regd);
658 }