This source file includes following definitions.
- firmware_running
- skb_put_le32
- mt7601u_dma_skb_wrap_cmd
- trace_mt_mcu_msg_send_cs
- mt7601u_mcu_msg_alloc
- mt7601u_mcu_wait_resp
- mt7601u_mcu_msg_send
- mt7601u_mcu_function_select
- mt7601u_mcu_tssi_read_kick
- mt7601u_mcu_calibrate
- mt7601u_write_reg_pairs
- mt7601u_burst_write_regs
- __mt7601u_dma_fw
- mt7601u_dma_fw
- mt7601u_upload_firmware
- mt7601u_load_firmware
- mt7601u_mcu_init
- mt7601u_mcu_cmd_init
- mt7601u_mcu_cmd_deinit
1
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3
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5
6
7
8 #include <linux/kernel.h>
9 #include <linux/firmware.h>
10 #include <linux/delay.h>
11 #include <linux/usb.h>
12 #include <linux/skbuff.h>
13
14 #include "mt7601u.h"
15 #include "dma.h"
16 #include "mcu.h"
17 #include "usb.h"
18 #include "trace.h"
19
20 #define MCU_FW_URB_MAX_PAYLOAD 0x3800
21 #define MCU_FW_URB_SIZE (MCU_FW_URB_MAX_PAYLOAD + 12)
22 #define MCU_RESP_URB_SIZE 1024
23
24 static inline int firmware_running(struct mt7601u_dev *dev)
25 {
26 return mt7601u_rr(dev, MT_MCU_COM_REG0) == 1;
27 }
28
29 static inline void skb_put_le32(struct sk_buff *skb, u32 val)
30 {
31 put_unaligned_le32(val, skb_put(skb, 4));
32 }
33
34 static inline void mt7601u_dma_skb_wrap_cmd(struct sk_buff *skb,
35 u8 seq, enum mcu_cmd cmd)
36 {
37 WARN_ON(mt7601u_dma_skb_wrap(skb, CPU_TX_PORT, DMA_COMMAND,
38 FIELD_PREP(MT_TXD_CMD_INFO_SEQ, seq) |
39 FIELD_PREP(MT_TXD_CMD_INFO_TYPE, cmd)));
40 }
41
42 static inline void trace_mt_mcu_msg_send_cs(struct mt7601u_dev *dev,
43 struct sk_buff *skb, bool need_resp)
44 {
45 u32 i, csum = 0;
46
47 for (i = 0; i < skb->len / 4; i++)
48 csum ^= get_unaligned_le32(skb->data + i * 4);
49
50 trace_mt_mcu_msg_send(dev, skb, csum, need_resp);
51 }
52
53 static struct sk_buff *mt7601u_mcu_msg_alloc(const void *data, int len)
54 {
55 struct sk_buff *skb;
56
57 WARN_ON(len % 4);
58
59 skb = alloc_skb(len + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
60 if (skb) {
61 skb_reserve(skb, MT_DMA_HDR_LEN);
62 skb_put_data(skb, data, len);
63 }
64
65 return skb;
66 }
67
68 static int mt7601u_mcu_wait_resp(struct mt7601u_dev *dev, u8 seq)
69 {
70 struct urb *urb = dev->mcu.resp.urb;
71 u32 rxfce;
72 int urb_status, ret, i = 5;
73
74 while (i--) {
75 if (!wait_for_completion_timeout(&dev->mcu.resp_cmpl,
76 msecs_to_jiffies(300))) {
77 dev_warn(dev->dev, "Warning: %s retrying\n", __func__);
78 continue;
79 }
80
81
82 rxfce = get_unaligned_le32(dev->mcu.resp.buf);
83 urb_status = urb->status * mt7601u_urb_has_error(urb);
84
85 ret = mt7601u_usb_submit_buf(dev, USB_DIR_IN, MT_EP_IN_CMD_RESP,
86 &dev->mcu.resp, GFP_KERNEL,
87 mt7601u_complete_urb,
88 &dev->mcu.resp_cmpl);
89 if (ret)
90 return ret;
91
92 if (urb_status)
93 dev_err(dev->dev, "Error: MCU resp urb failed:%d\n",
94 urb_status);
95
96 if (FIELD_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce) == seq &&
97 FIELD_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce) == CMD_DONE)
98 return 0;
99
100 dev_err(dev->dev, "Error: MCU resp evt:%lx seq:%hhx-%lx!\n",
101 FIELD_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce),
102 seq, FIELD_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce));
103 }
104
105 dev_err(dev->dev, "Error: %s timed out\n", __func__);
106 return -ETIMEDOUT;
107 }
108
109 static int
110 mt7601u_mcu_msg_send(struct mt7601u_dev *dev, struct sk_buff *skb,
111 enum mcu_cmd cmd, bool wait_resp)
112 {
113 struct usb_device *usb_dev = mt7601u_to_usb_dev(dev);
114 unsigned cmd_pipe = usb_sndbulkpipe(usb_dev,
115 dev->out_eps[MT_EP_OUT_INBAND_CMD]);
116 int sent, ret;
117 u8 seq = 0;
118
119 if (test_bit(MT7601U_STATE_REMOVED, &dev->state))
120 return 0;
121
122 mutex_lock(&dev->mcu.mutex);
123
124 if (wait_resp)
125 while (!seq)
126 seq = ++dev->mcu.msg_seq & 0xf;
127
128 mt7601u_dma_skb_wrap_cmd(skb, seq, cmd);
129
130 if (dev->mcu.resp_cmpl.done)
131 dev_err(dev->dev, "Error: MCU response pre-completed!\n");
132
133 trace_mt_mcu_msg_send_cs(dev, skb, wait_resp);
134 trace_mt_submit_urb_sync(dev, cmd_pipe, skb->len);
135 ret = usb_bulk_msg(usb_dev, cmd_pipe, skb->data, skb->len, &sent, 500);
136 if (ret) {
137 dev_err(dev->dev, "Error: send MCU cmd failed:%d\n", ret);
138 goto out;
139 }
140 if (sent != skb->len)
141 dev_err(dev->dev, "Error: %s sent != skb->len\n", __func__);
142
143 if (wait_resp)
144 ret = mt7601u_mcu_wait_resp(dev, seq);
145 out:
146 mutex_unlock(&dev->mcu.mutex);
147
148 consume_skb(skb);
149
150 return ret;
151 }
152
153 static int mt7601u_mcu_function_select(struct mt7601u_dev *dev,
154 enum mcu_function func, u32 val)
155 {
156 struct sk_buff *skb;
157 struct {
158 __le32 id;
159 __le32 value;
160 } __packed __aligned(4) msg = {
161 .id = cpu_to_le32(func),
162 .value = cpu_to_le32(val),
163 };
164
165 skb = mt7601u_mcu_msg_alloc(&msg, sizeof(msg));
166 if (!skb)
167 return -ENOMEM;
168 return mt7601u_mcu_msg_send(dev, skb, CMD_FUN_SET_OP, func == 5);
169 }
170
171 int mt7601u_mcu_tssi_read_kick(struct mt7601u_dev *dev, int use_hvga)
172 {
173 int ret;
174
175 if (!test_bit(MT7601U_STATE_MCU_RUNNING, &dev->state))
176 return 0;
177
178 ret = mt7601u_mcu_function_select(dev, ATOMIC_TSSI_SETTING,
179 use_hvga);
180 if (ret) {
181 dev_warn(dev->dev, "Warning: MCU TSSI read kick failed\n");
182 return ret;
183 }
184
185 dev->tssi_read_trig = true;
186
187 return 0;
188 }
189
190 int
191 mt7601u_mcu_calibrate(struct mt7601u_dev *dev, enum mcu_calibrate cal, u32 val)
192 {
193 struct sk_buff *skb;
194 struct {
195 __le32 id;
196 __le32 value;
197 } __packed __aligned(4) msg = {
198 .id = cpu_to_le32(cal),
199 .value = cpu_to_le32(val),
200 };
201
202 skb = mt7601u_mcu_msg_alloc(&msg, sizeof(msg));
203 if (!skb)
204 return -ENOMEM;
205 return mt7601u_mcu_msg_send(dev, skb, CMD_CALIBRATION_OP, true);
206 }
207
208 int mt7601u_write_reg_pairs(struct mt7601u_dev *dev, u32 base,
209 const struct mt76_reg_pair *data, int n)
210 {
211 const int max_vals_per_cmd = INBAND_PACKET_MAX_LEN / 8;
212 struct sk_buff *skb;
213 int cnt, i, ret;
214
215 if (!n)
216 return 0;
217
218 cnt = min(max_vals_per_cmd, n);
219
220 skb = alloc_skb(cnt * 8 + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
221 if (!skb)
222 return -ENOMEM;
223 skb_reserve(skb, MT_DMA_HDR_LEN);
224
225 for (i = 0; i < cnt; i++) {
226 skb_put_le32(skb, base + data[i].reg);
227 skb_put_le32(skb, data[i].value);
228 }
229
230 ret = mt7601u_mcu_msg_send(dev, skb, CMD_RANDOM_WRITE, cnt == n);
231 if (ret)
232 return ret;
233
234 return mt7601u_write_reg_pairs(dev, base, data + cnt, n - cnt);
235 }
236
237 int mt7601u_burst_write_regs(struct mt7601u_dev *dev, u32 offset,
238 const u32 *data, int n)
239 {
240 const int max_regs_per_cmd = INBAND_PACKET_MAX_LEN / 4 - 1;
241 struct sk_buff *skb;
242 int cnt, i, ret;
243
244 if (!n)
245 return 0;
246
247 cnt = min(max_regs_per_cmd, n);
248
249 skb = alloc_skb(cnt * 4 + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
250 if (!skb)
251 return -ENOMEM;
252 skb_reserve(skb, MT_DMA_HDR_LEN);
253
254 skb_put_le32(skb, MT_MCU_MEMMAP_WLAN + offset);
255 for (i = 0; i < cnt; i++)
256 skb_put_le32(skb, data[i]);
257
258 ret = mt7601u_mcu_msg_send(dev, skb, CMD_BURST_WRITE, cnt == n);
259 if (ret)
260 return ret;
261
262 return mt7601u_burst_write_regs(dev, offset + cnt * 4,
263 data + cnt, n - cnt);
264 }
265
266 struct mt76_fw_header {
267 __le32 ilm_len;
268 __le32 dlm_len;
269 __le16 build_ver;
270 __le16 fw_ver;
271 u8 pad[4];
272 char build_time[16];
273 };
274
275 struct mt76_fw {
276 struct mt76_fw_header hdr;
277 u8 ivb[MT_MCU_IVB_SIZE];
278 u8 ilm[];
279 };
280
281 static int __mt7601u_dma_fw(struct mt7601u_dev *dev,
282 const struct mt7601u_dma_buf *dma_buf,
283 const void *data, u32 len, u32 dst_addr)
284 {
285 DECLARE_COMPLETION_ONSTACK(cmpl);
286 struct mt7601u_dma_buf buf = *dma_buf;
287 __le32 reg;
288 u32 val;
289 int ret;
290
291 reg = cpu_to_le32(FIELD_PREP(MT_TXD_INFO_TYPE, DMA_PACKET) |
292 FIELD_PREP(MT_TXD_INFO_D_PORT, CPU_TX_PORT) |
293 FIELD_PREP(MT_TXD_INFO_LEN, len));
294 memcpy(buf.buf, ®, sizeof(reg));
295 memcpy(buf.buf + sizeof(reg), data, len);
296 memset(buf.buf + sizeof(reg) + len, 0, 8);
297
298 ret = mt7601u_vendor_single_wr(dev, MT_VEND_WRITE_FCE,
299 MT_FCE_DMA_ADDR, dst_addr);
300 if (ret)
301 return ret;
302 len = roundup(len, 4);
303 ret = mt7601u_vendor_single_wr(dev, MT_VEND_WRITE_FCE,
304 MT_FCE_DMA_LEN, len << 16);
305 if (ret)
306 return ret;
307
308 buf.len = MT_DMA_HDR_LEN + len + 4;
309 ret = mt7601u_usb_submit_buf(dev, USB_DIR_OUT, MT_EP_OUT_INBAND_CMD,
310 &buf, GFP_KERNEL,
311 mt7601u_complete_urb, &cmpl);
312 if (ret)
313 return ret;
314
315 if (!wait_for_completion_timeout(&cmpl, msecs_to_jiffies(1000))) {
316 dev_err(dev->dev, "Error: firmware upload timed out\n");
317 usb_kill_urb(buf.urb);
318 return -ETIMEDOUT;
319 }
320 if (mt7601u_urb_has_error(buf.urb)) {
321 dev_err(dev->dev, "Error: firmware upload urb failed:%d\n",
322 buf.urb->status);
323 return buf.urb->status;
324 }
325
326 val = mt7601u_rr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX);
327 val++;
328 mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX, val);
329
330 return 0;
331 }
332
333 static int
334 mt7601u_dma_fw(struct mt7601u_dev *dev, struct mt7601u_dma_buf *dma_buf,
335 const void *data, int len, u32 dst_addr)
336 {
337 int n, ret;
338
339 if (len == 0)
340 return 0;
341
342 n = min(MCU_FW_URB_MAX_PAYLOAD, len);
343 ret = __mt7601u_dma_fw(dev, dma_buf, data, n, dst_addr);
344 if (ret)
345 return ret;
346
347 if (!mt76_poll_msec(dev, MT_MCU_COM_REG1, BIT(31), BIT(31), 500))
348 return -ETIMEDOUT;
349
350 return mt7601u_dma_fw(dev, dma_buf, data + n, len - n, dst_addr + n);
351 }
352
353 static int
354 mt7601u_upload_firmware(struct mt7601u_dev *dev, const struct mt76_fw *fw)
355 {
356 struct mt7601u_dma_buf dma_buf;
357 void *ivb;
358 u32 ilm_len, dlm_len;
359 int i, ret;
360
361 ivb = kmemdup(fw->ivb, sizeof(fw->ivb), GFP_KERNEL);
362 if (!ivb)
363 return -ENOMEM;
364 if (mt7601u_usb_alloc_buf(dev, MCU_FW_URB_SIZE, &dma_buf)) {
365 ret = -ENOMEM;
366 goto error;
367 }
368
369 ilm_len = le32_to_cpu(fw->hdr.ilm_len) - sizeof(fw->ivb);
370 dev_dbg(dev->dev, "loading FW - ILM %u + IVB %zu\n",
371 ilm_len, sizeof(fw->ivb));
372 ret = mt7601u_dma_fw(dev, &dma_buf, fw->ilm, ilm_len, sizeof(fw->ivb));
373 if (ret)
374 goto error;
375
376 dlm_len = le32_to_cpu(fw->hdr.dlm_len);
377 dev_dbg(dev->dev, "loading FW - DLM %u\n", dlm_len);
378 ret = mt7601u_dma_fw(dev, &dma_buf, fw->ilm + ilm_len,
379 dlm_len, MT_MCU_DLM_OFFSET);
380 if (ret)
381 goto error;
382
383 ret = mt7601u_vendor_request(dev, MT_VEND_DEV_MODE, USB_DIR_OUT,
384 0x12, 0, ivb, sizeof(fw->ivb));
385 if (ret < 0)
386 goto error;
387 ret = 0;
388
389 for (i = 100; i && !firmware_running(dev); i--)
390 msleep(10);
391 if (!i) {
392 ret = -ETIMEDOUT;
393 goto error;
394 }
395
396 dev_dbg(dev->dev, "Firmware running!\n");
397 error:
398 kfree(ivb);
399 mt7601u_usb_free_buf(dev, &dma_buf);
400
401 return ret;
402 }
403
404 static int mt7601u_load_firmware(struct mt7601u_dev *dev)
405 {
406 const struct firmware *fw;
407 const struct mt76_fw_header *hdr;
408 int len, ret;
409 u32 val;
410
411 mt7601u_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN |
412 MT_USB_DMA_CFG_TX_BULK_EN));
413
414 if (firmware_running(dev))
415 return firmware_request_cache(dev->dev, MT7601U_FIRMWARE);
416
417 ret = request_firmware(&fw, MT7601U_FIRMWARE, dev->dev);
418 if (ret)
419 return ret;
420
421 if (!fw || !fw->data || fw->size < sizeof(*hdr))
422 goto err_inv_fw;
423
424 hdr = (const struct mt76_fw_header *) fw->data;
425
426 if (le32_to_cpu(hdr->ilm_len) <= MT_MCU_IVB_SIZE)
427 goto err_inv_fw;
428
429 len = sizeof(*hdr);
430 len += le32_to_cpu(hdr->ilm_len);
431 len += le32_to_cpu(hdr->dlm_len);
432
433 if (fw->size != len)
434 goto err_inv_fw;
435
436 val = le16_to_cpu(hdr->fw_ver);
437 dev_info(dev->dev,
438 "Firmware Version: %d.%d.%02d Build: %x Build time: %.16s\n",
439 (val >> 12) & 0xf, (val >> 8) & 0xf, val & 0xf,
440 le16_to_cpu(hdr->build_ver), hdr->build_time);
441
442 len = le32_to_cpu(hdr->ilm_len);
443
444 mt7601u_wr(dev, 0x94c, 0);
445 mt7601u_wr(dev, MT_FCE_PSE_CTRL, 0);
446
447 mt7601u_vendor_reset(dev);
448 msleep(5);
449
450 mt7601u_wr(dev, 0xa44, 0);
451 mt7601u_wr(dev, 0x230, 0x84210);
452 mt7601u_wr(dev, 0x400, 0x80c00);
453 mt7601u_wr(dev, 0x800, 1);
454
455 mt7601u_rmw(dev, MT_PBF_CFG, 0, (MT_PBF_CFG_TX0Q_EN |
456 MT_PBF_CFG_TX1Q_EN |
457 MT_PBF_CFG_TX2Q_EN |
458 MT_PBF_CFG_TX3Q_EN));
459
460 mt7601u_wr(dev, MT_FCE_PSE_CTRL, 1);
461
462 mt7601u_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN |
463 MT_USB_DMA_CFG_TX_BULK_EN));
464 val = mt76_set(dev, MT_USB_DMA_CFG, MT_USB_DMA_CFG_TX_CLR);
465 val &= ~MT_USB_DMA_CFG_TX_CLR;
466 mt7601u_wr(dev, MT_USB_DMA_CFG, val);
467
468
469 mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230);
470
471 mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_MAX_COUNT, 1);
472
473 mt7601u_wr(dev, MT_FCE_PDMA_GLOBAL_CONF, 0x44);
474
475 mt7601u_wr(dev, MT_FCE_SKIP_FS, 3);
476
477 ret = mt7601u_upload_firmware(dev, (const struct mt76_fw *)fw->data);
478
479 release_firmware(fw);
480
481 return ret;
482
483 err_inv_fw:
484 dev_err(dev->dev, "Invalid firmware image\n");
485 release_firmware(fw);
486 return -ENOENT;
487 }
488
489 int mt7601u_mcu_init(struct mt7601u_dev *dev)
490 {
491 int ret;
492
493 mutex_init(&dev->mcu.mutex);
494
495 ret = mt7601u_load_firmware(dev);
496 if (ret)
497 return ret;
498
499 set_bit(MT7601U_STATE_MCU_RUNNING, &dev->state);
500
501 return 0;
502 }
503
504 int mt7601u_mcu_cmd_init(struct mt7601u_dev *dev)
505 {
506 int ret;
507
508 ret = mt7601u_mcu_function_select(dev, Q_SELECT, 1);
509 if (ret)
510 return ret;
511
512 init_completion(&dev->mcu.resp_cmpl);
513 if (mt7601u_usb_alloc_buf(dev, MCU_RESP_URB_SIZE, &dev->mcu.resp)) {
514 mt7601u_usb_free_buf(dev, &dev->mcu.resp);
515 return -ENOMEM;
516 }
517
518 ret = mt7601u_usb_submit_buf(dev, USB_DIR_IN, MT_EP_IN_CMD_RESP,
519 &dev->mcu.resp, GFP_KERNEL,
520 mt7601u_complete_urb, &dev->mcu.resp_cmpl);
521 if (ret) {
522 mt7601u_usb_free_buf(dev, &dev->mcu.resp);
523 return ret;
524 }
525
526 return 0;
527 }
528
529 void mt7601u_mcu_cmd_deinit(struct mt7601u_dev *dev)
530 {
531 usb_kill_urb(dev->mcu.resp.urb);
532 mt7601u_usb_free_buf(dev, &dev->mcu.resp);
533 }