This source file includes following definitions.
- mt7603_start
- mt7603_stop
- mt7603_add_interface
- mt7603_remove_interface
- mt7603_init_edcca
- mt7603_set_channel
- mt7603_config
- mt7603_configure_filter
- mt7603_bss_info_changed
- mt7603_sta_add
- mt7603_sta_assoc
- mt7603_sta_remove
- mt7603_ps_tx_list
- mt7603_sta_ps
- mt7603_ps_set_more_data
- mt7603_release_buffered_frames
- mt7603_set_key
- mt7603_conf_tx
- mt7603_flush
- mt7603_ampdu_action
- mt7603_sta_rate_tbl_update
- mt7603_set_coverage_class
- mt7603_tx
- mt7603_init
- mt7603_exit
1
2
3 #include <linux/etherdevice.h>
4 #include <linux/platform_device.h>
5 #include <linux/pci.h>
6 #include <linux/module.h>
7 #include "mt7603.h"
8 #include "mac.h"
9 #include "eeprom.h"
10
11 static int
12 mt7603_start(struct ieee80211_hw *hw)
13 {
14 struct mt7603_dev *dev = hw->priv;
15
16 mt7603_mac_start(dev);
17 dev->mt76.survey_time = ktime_get_boottime();
18 set_bit(MT76_STATE_RUNNING, &dev->mt76.state);
19 mt7603_mac_work(&dev->mt76.mac_work.work);
20
21 return 0;
22 }
23
24 static void
25 mt7603_stop(struct ieee80211_hw *hw)
26 {
27 struct mt7603_dev *dev = hw->priv;
28
29 clear_bit(MT76_STATE_RUNNING, &dev->mt76.state);
30 cancel_delayed_work_sync(&dev->mt76.mac_work);
31 mt7603_mac_stop(dev);
32 }
33
34 static int
35 mt7603_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
36 {
37 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
38 struct mt7603_dev *dev = hw->priv;
39 struct mt76_txq *mtxq;
40 u8 bc_addr[ETH_ALEN];
41 int idx;
42 int ret = 0;
43
44 mutex_lock(&dev->mt76.mutex);
45
46 mvif->idx = ffs(~dev->vif_mask) - 1;
47 if (mvif->idx >= MT7603_MAX_INTERFACES) {
48 ret = -ENOSPC;
49 goto out;
50 }
51
52 mt76_wr(dev, MT_MAC_ADDR0(mvif->idx),
53 get_unaligned_le32(vif->addr));
54 mt76_wr(dev, MT_MAC_ADDR1(mvif->idx),
55 (get_unaligned_le16(vif->addr + 4) |
56 MT_MAC_ADDR1_VALID));
57
58 if (vif->type == NL80211_IFTYPE_AP) {
59 mt76_wr(dev, MT_BSSID0(mvif->idx),
60 get_unaligned_le32(vif->addr));
61 mt76_wr(dev, MT_BSSID1(mvif->idx),
62 (get_unaligned_le16(vif->addr + 4) |
63 MT_BSSID1_VALID));
64 }
65
66 idx = MT7603_WTBL_RESERVED - 1 - mvif->idx;
67 dev->vif_mask |= BIT(mvif->idx);
68 mvif->sta.wcid.idx = idx;
69 mvif->sta.wcid.hw_key_idx = -1;
70
71 eth_broadcast_addr(bc_addr);
72 mt7603_wtbl_init(dev, idx, mvif->idx, bc_addr);
73
74 mtxq = (struct mt76_txq *)vif->txq->drv_priv;
75 mtxq->wcid = &mvif->sta.wcid;
76 mt76_txq_init(&dev->mt76, vif->txq);
77 rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid);
78
79 out:
80 mutex_unlock(&dev->mt76.mutex);
81
82 return ret;
83 }
84
85 static void
86 mt7603_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
87 {
88 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
89 struct mt7603_dev *dev = hw->priv;
90 int idx = mvif->sta.wcid.idx;
91
92 mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 0);
93 mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 0);
94 mt76_wr(dev, MT_BSSID0(mvif->idx), 0);
95 mt76_wr(dev, MT_BSSID1(mvif->idx), 0);
96 mt7603_beacon_set_timer(dev, mvif->idx, 0);
97
98 rcu_assign_pointer(dev->mt76.wcid[idx], NULL);
99 mt76_txq_remove(&dev->mt76, vif->txq);
100
101 mutex_lock(&dev->mt76.mutex);
102 dev->vif_mask &= ~BIT(mvif->idx);
103 mutex_unlock(&dev->mt76.mutex);
104 }
105
106 void mt7603_init_edcca(struct mt7603_dev *dev)
107 {
108
109 mt76_rmw_field(dev, MT_RXTD(8), MT_RXTD_8_LOWER_SIGNAL, 0x23);
110
111
112 mt76_rr(dev, MT_MIB_STAT_ED);
113
114 if (dev->ed_monitor)
115 mt76_set(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME);
116 else
117 mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME);
118
119 dev->ed_strict_mode = 0xff;
120 dev->ed_strong_signal = 0;
121 dev->ed_time = ktime_get_boottime();
122
123 mt7603_edcca_set_strict(dev, false);
124 }
125
126 static int
127 mt7603_set_channel(struct mt7603_dev *dev, struct cfg80211_chan_def *def)
128 {
129 u8 *rssi_data = (u8 *)dev->mt76.eeprom.data;
130 int idx, ret;
131 u8 bw = MT_BW_20;
132 bool failed = false;
133
134 cancel_delayed_work_sync(&dev->mt76.mac_work);
135 tasklet_disable(&dev->mt76.pre_tbtt_tasklet);
136
137 mutex_lock(&dev->mt76.mutex);
138 set_bit(MT76_RESET, &dev->mt76.state);
139
140 mt7603_beacon_set_timer(dev, -1, 0);
141 mt76_set_channel(&dev->mt76);
142 mt7603_mac_stop(dev);
143
144 if (def->width == NL80211_CHAN_WIDTH_40)
145 bw = MT_BW_40;
146
147 dev->mt76.chandef = *def;
148 mt76_rmw_field(dev, MT_AGG_BWCR, MT_AGG_BWCR_BW, bw);
149 ret = mt7603_mcu_set_channel(dev);
150 if (ret) {
151 failed = true;
152 goto out;
153 }
154
155 if (def->chan->band == NL80211_BAND_5GHZ) {
156 idx = 1;
157 rssi_data += MT_EE_RSSI_OFFSET_5G;
158 } else {
159 idx = 0;
160 rssi_data += MT_EE_RSSI_OFFSET_2G;
161 }
162
163 memcpy(dev->rssi_offset, rssi_data, sizeof(dev->rssi_offset));
164
165 idx |= (def->chan -
166 mt76_hw(dev)->wiphy->bands[def->chan->band]->channels) << 1;
167 mt76_wr(dev, MT_WF_RMAC_CH_FREQ, idx);
168 mt7603_mac_set_timing(dev);
169 mt7603_mac_start(dev);
170
171 clear_bit(MT76_RESET, &dev->mt76.state);
172
173 mt76_txq_schedule_all(&dev->mt76);
174
175 ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mt76.mac_work,
176 msecs_to_jiffies(MT7603_WATCHDOG_TIME));
177
178
179 mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_READ_CLR_DIS);
180 mt76_set(dev, MT_MIB_CTL,
181 MT_MIB_CTL_CCA_NAV_TX | MT_MIB_CTL_PSCCA_TIME);
182 mt76_rr(dev, MT_MIB_STAT_PSCCA);
183 mt7603_cca_stats_reset(dev);
184
185 dev->mt76.survey_time = ktime_get_boottime();
186
187 mt7603_init_edcca(dev);
188
189 out:
190 if (!(mt76_hw(dev)->conf.flags & IEEE80211_CONF_OFFCHANNEL))
191 mt7603_beacon_set_timer(dev, -1, dev->mt76.beacon_int);
192 mutex_unlock(&dev->mt76.mutex);
193
194 tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
195
196 if (failed)
197 mt7603_mac_work(&dev->mt76.mac_work.work);
198
199 return ret;
200 }
201
202 static int
203 mt7603_config(struct ieee80211_hw *hw, u32 changed)
204 {
205 struct mt7603_dev *dev = hw->priv;
206 int ret = 0;
207
208 if (changed & (IEEE80211_CONF_CHANGE_CHANNEL |
209 IEEE80211_CONF_CHANGE_POWER)) {
210 ieee80211_stop_queues(hw);
211 ret = mt7603_set_channel(dev, &hw->conf.chandef);
212 ieee80211_wake_queues(hw);
213 }
214
215 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
216 mutex_lock(&dev->mt76.mutex);
217
218 if (!(hw->conf.flags & IEEE80211_CONF_MONITOR))
219 dev->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC;
220 else
221 dev->rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC;
222
223 mt76_wr(dev, MT_WF_RFCR, dev->rxfilter);
224
225 mutex_unlock(&dev->mt76.mutex);
226 }
227
228 return ret;
229 }
230
231 static void
232 mt7603_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
233 unsigned int *total_flags, u64 multicast)
234 {
235 struct mt7603_dev *dev = hw->priv;
236 u32 flags = 0;
237
238 #define MT76_FILTER(_flag, _hw) do { \
239 flags |= *total_flags & FIF_##_flag; \
240 dev->rxfilter &= ~(_hw); \
241 dev->rxfilter |= !(flags & FIF_##_flag) * (_hw); \
242 } while (0)
243
244 dev->rxfilter &= ~(MT_WF_RFCR_DROP_OTHER_BSS |
245 MT_WF_RFCR_DROP_OTHER_BEACON |
246 MT_WF_RFCR_DROP_FRAME_REPORT |
247 MT_WF_RFCR_DROP_PROBEREQ |
248 MT_WF_RFCR_DROP_MCAST_FILTERED |
249 MT_WF_RFCR_DROP_MCAST |
250 MT_WF_RFCR_DROP_BCAST |
251 MT_WF_RFCR_DROP_DUPLICATE |
252 MT_WF_RFCR_DROP_A2_BSSID |
253 MT_WF_RFCR_DROP_UNWANTED_CTL |
254 MT_WF_RFCR_DROP_STBC_MULTI);
255
256 MT76_FILTER(OTHER_BSS, MT_WF_RFCR_DROP_OTHER_TIM |
257 MT_WF_RFCR_DROP_A3_MAC |
258 MT_WF_RFCR_DROP_A3_BSSID);
259
260 MT76_FILTER(FCSFAIL, MT_WF_RFCR_DROP_FCSFAIL);
261
262 MT76_FILTER(CONTROL, MT_WF_RFCR_DROP_CTS |
263 MT_WF_RFCR_DROP_RTS |
264 MT_WF_RFCR_DROP_CTL_RSV |
265 MT_WF_RFCR_DROP_NDPA);
266
267 *total_flags = flags;
268 mt76_wr(dev, MT_WF_RFCR, dev->rxfilter);
269 }
270
271 static void
272 mt7603_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
273 struct ieee80211_bss_conf *info, u32 changed)
274 {
275 struct mt7603_dev *dev = hw->priv;
276 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
277
278 mutex_lock(&dev->mt76.mutex);
279
280 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BSSID)) {
281 if (info->assoc || info->ibss_joined) {
282 mt76_wr(dev, MT_BSSID0(mvif->idx),
283 get_unaligned_le32(info->bssid));
284 mt76_wr(dev, MT_BSSID1(mvif->idx),
285 (get_unaligned_le16(info->bssid + 4) |
286 MT_BSSID1_VALID));
287 } else {
288 mt76_wr(dev, MT_BSSID0(mvif->idx), 0);
289 mt76_wr(dev, MT_BSSID1(mvif->idx), 0);
290 }
291 }
292
293 if (changed & BSS_CHANGED_ERP_SLOT) {
294 int slottime = info->use_short_slot ? 9 : 20;
295
296 if (slottime != dev->slottime) {
297 dev->slottime = slottime;
298 mt7603_mac_set_timing(dev);
299 }
300 }
301
302 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON_INT)) {
303 int beacon_int = !!info->enable_beacon * info->beacon_int;
304
305 tasklet_disable(&dev->mt76.pre_tbtt_tasklet);
306 mt7603_beacon_set_timer(dev, mvif->idx, beacon_int);
307 tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
308 }
309
310 mutex_unlock(&dev->mt76.mutex);
311 }
312
313 int
314 mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
315 struct ieee80211_sta *sta)
316 {
317 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
318 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
319 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
320 int idx;
321 int ret = 0;
322
323 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7603_WTBL_STA - 1);
324 if (idx < 0)
325 return -ENOSPC;
326
327 __skb_queue_head_init(&msta->psq);
328 msta->ps = ~0;
329 msta->smps = ~0;
330 msta->wcid.sta = 1;
331 msta->wcid.idx = idx;
332 mt7603_wtbl_init(dev, idx, mvif->idx, sta->addr);
333 mt7603_wtbl_set_ps(dev, msta, false);
334
335 if (vif->type == NL80211_IFTYPE_AP)
336 set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
337
338 return ret;
339 }
340
341 void
342 mt7603_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
343 struct ieee80211_sta *sta)
344 {
345 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
346
347 mt7603_wtbl_update_cap(dev, sta);
348 }
349
350 void
351 mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
352 struct ieee80211_sta *sta)
353 {
354 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
355 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
356 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
357
358 spin_lock_bh(&dev->ps_lock);
359 __skb_queue_purge(&msta->psq);
360 mt7603_filter_tx(dev, wcid->idx, true);
361 spin_unlock_bh(&dev->ps_lock);
362
363 mt7603_wtbl_clear(dev, wcid->idx);
364 }
365
366 static void
367 mt7603_ps_tx_list(struct mt7603_dev *dev, struct sk_buff_head *list)
368 {
369 struct sk_buff *skb;
370
371 while ((skb = __skb_dequeue(list)) != NULL)
372 mt76_tx_queue_skb_raw(dev, skb_get_queue_mapping(skb),
373 skb, 0);
374 }
375
376 void
377 mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
378 {
379 struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
380 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
381 struct sk_buff_head list;
382
383 mt76_stop_tx_queues(&dev->mt76, sta, true);
384 mt7603_wtbl_set_ps(dev, msta, ps);
385 if (ps)
386 return;
387
388 __skb_queue_head_init(&list);
389
390 spin_lock_bh(&dev->ps_lock);
391 skb_queue_splice_tail_init(&msta->psq, &list);
392 spin_unlock_bh(&dev->ps_lock);
393
394 mt7603_ps_tx_list(dev, &list);
395 }
396
397 static void
398 mt7603_ps_set_more_data(struct sk_buff *skb)
399 {
400 struct ieee80211_hdr *hdr;
401
402 hdr = (struct ieee80211_hdr *)&skb->data[MT_TXD_SIZE];
403 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
404 }
405
406 static void
407 mt7603_release_buffered_frames(struct ieee80211_hw *hw,
408 struct ieee80211_sta *sta,
409 u16 tids, int nframes,
410 enum ieee80211_frame_release_type reason,
411 bool more_data)
412 {
413 struct mt7603_dev *dev = hw->priv;
414 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
415 struct sk_buff_head list;
416 struct sk_buff *skb, *tmp;
417
418 __skb_queue_head_init(&list);
419
420 mt7603_wtbl_set_ps(dev, msta, false);
421
422 spin_lock_bh(&dev->ps_lock);
423 skb_queue_walk_safe(&msta->psq, skb, tmp) {
424 if (!nframes)
425 break;
426
427 if (!(tids & BIT(skb->priority)))
428 continue;
429
430 skb_set_queue_mapping(skb, MT_TXQ_PSD);
431 __skb_unlink(skb, &msta->psq);
432 mt7603_ps_set_more_data(skb);
433 __skb_queue_tail(&list, skb);
434 nframes--;
435 }
436 spin_unlock_bh(&dev->ps_lock);
437
438 if (!skb_queue_empty(&list))
439 ieee80211_sta_eosp(sta);
440
441 mt7603_ps_tx_list(dev, &list);
442
443 if (nframes)
444 mt76_release_buffered_frames(hw, sta, tids, nframes, reason,
445 more_data);
446 }
447
448 static int
449 mt7603_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
450 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
451 struct ieee80211_key_conf *key)
452 {
453 struct mt7603_dev *dev = hw->priv;
454 struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
455 struct mt7603_sta *msta = sta ? (struct mt7603_sta *)sta->drv_priv :
456 &mvif->sta;
457 struct mt76_wcid *wcid = &msta->wcid;
458 int idx = key->keyidx;
459
460
461 switch (key->cipher) {
462 case WLAN_CIPHER_SUITE_TKIP:
463 case WLAN_CIPHER_SUITE_CCMP:
464 break;
465 default:
466 return -EOPNOTSUPP;
467 }
468
469
470
471
472
473 if ((vif->type == NL80211_IFTYPE_ADHOC ||
474 vif->type == NL80211_IFTYPE_MESH_POINT) &&
475 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
476 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
477 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
478 return -EOPNOTSUPP;
479
480 if (cmd == SET_KEY) {
481 key->hw_key_idx = wcid->idx;
482 wcid->hw_key_idx = idx;
483 } else {
484 if (idx == wcid->hw_key_idx)
485 wcid->hw_key_idx = -1;
486
487 key = NULL;
488 }
489 mt76_wcid_key_setup(&dev->mt76, wcid, key);
490
491 return mt7603_wtbl_set_key(dev, wcid->idx, key);
492 }
493
494 static int
495 mt7603_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
496 const struct ieee80211_tx_queue_params *params)
497 {
498 struct mt7603_dev *dev = hw->priv;
499 u16 cw_min = (1 << 5) - 1;
500 u16 cw_max = (1 << 10) - 1;
501 u32 val;
502
503 queue = dev->mt76.q_tx[queue].q->hw_idx;
504
505 if (params->cw_min)
506 cw_min = params->cw_min;
507 if (params->cw_max)
508 cw_max = params->cw_max;
509
510 mutex_lock(&dev->mt76.mutex);
511 mt7603_mac_stop(dev);
512
513 val = mt76_rr(dev, MT_WMM_TXOP(queue));
514 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(queue));
515 val |= params->txop << MT_WMM_TXOP_SHIFT(queue);
516 mt76_wr(dev, MT_WMM_TXOP(queue), val);
517
518 val = mt76_rr(dev, MT_WMM_AIFSN);
519 val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(queue));
520 val |= params->aifs << MT_WMM_AIFSN_SHIFT(queue);
521 mt76_wr(dev, MT_WMM_AIFSN, val);
522
523 val = mt76_rr(dev, MT_WMM_CWMIN);
524 val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(queue));
525 val |= cw_min << MT_WMM_CWMIN_SHIFT(queue);
526 mt76_wr(dev, MT_WMM_CWMIN, val);
527
528 val = mt76_rr(dev, MT_WMM_CWMAX(queue));
529 val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(queue));
530 val |= cw_max << MT_WMM_CWMAX_SHIFT(queue);
531 mt76_wr(dev, MT_WMM_CWMAX(queue), val);
532
533 mt7603_mac_start(dev);
534 mutex_unlock(&dev->mt76.mutex);
535
536 return 0;
537 }
538
539 static void
540 mt7603_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
541 u32 queues, bool drop)
542 {
543 }
544
545 static int
546 mt7603_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
547 struct ieee80211_ampdu_params *params)
548 {
549 enum ieee80211_ampdu_mlme_action action = params->action;
550 struct mt7603_dev *dev = hw->priv;
551 struct ieee80211_sta *sta = params->sta;
552 struct ieee80211_txq *txq = sta->txq[params->tid];
553 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
554 u16 tid = params->tid;
555 u16 ssn = params->ssn;
556 u8 ba_size = params->buf_size;
557 struct mt76_txq *mtxq;
558
559 if (!txq)
560 return -EINVAL;
561
562 mtxq = (struct mt76_txq *)txq->drv_priv;
563
564 switch (action) {
565 case IEEE80211_AMPDU_RX_START:
566 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn,
567 params->buf_size);
568 mt7603_mac_rx_ba_reset(dev, sta->addr, tid);
569 break;
570 case IEEE80211_AMPDU_RX_STOP:
571 mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
572 break;
573 case IEEE80211_AMPDU_TX_OPERATIONAL:
574 mtxq->aggr = true;
575 mtxq->send_bar = false;
576 mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, ba_size);
577 break;
578 case IEEE80211_AMPDU_TX_STOP_FLUSH:
579 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
580 mtxq->aggr = false;
581 mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1);
582 break;
583 case IEEE80211_AMPDU_TX_START:
584 mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
585 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
586 break;
587 case IEEE80211_AMPDU_TX_STOP_CONT:
588 mtxq->aggr = false;
589 mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1);
590 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
591 break;
592 }
593
594 return 0;
595 }
596
597 static void
598 mt7603_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
599 struct ieee80211_sta *sta)
600 {
601 struct mt7603_dev *dev = hw->priv;
602 struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
603 struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates);
604 int i;
605
606 spin_lock_bh(&dev->mt76.lock);
607 for (i = 0; i < ARRAY_SIZE(msta->rates); i++) {
608 msta->rates[i].idx = sta_rates->rate[i].idx;
609 msta->rates[i].count = sta_rates->rate[i].count;
610 msta->rates[i].flags = sta_rates->rate[i].flags;
611
612 if (msta->rates[i].idx < 0 || !msta->rates[i].count)
613 break;
614 }
615 msta->n_rates = i;
616 mt7603_wtbl_set_rates(dev, msta, NULL, msta->rates);
617 msta->rate_probe = false;
618 mt7603_wtbl_set_smps(dev, msta,
619 sta->smps_mode == IEEE80211_SMPS_DYNAMIC);
620 spin_unlock_bh(&dev->mt76.lock);
621 }
622
623 static void
624 mt7603_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
625 {
626 struct mt7603_dev *dev = hw->priv;
627
628 dev->coverage_class = coverage_class;
629 mt7603_mac_set_timing(dev);
630 }
631
632 static void mt7603_tx(struct ieee80211_hw *hw,
633 struct ieee80211_tx_control *control,
634 struct sk_buff *skb)
635 {
636 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
637 struct ieee80211_vif *vif = info->control.vif;
638 struct mt7603_dev *dev = hw->priv;
639 struct mt76_wcid *wcid = &dev->global_sta.wcid;
640
641 if (control->sta) {
642 struct mt7603_sta *msta;
643
644 msta = (struct mt7603_sta *)control->sta->drv_priv;
645 wcid = &msta->wcid;
646 } else if (vif) {
647 struct mt7603_vif *mvif;
648
649 mvif = (struct mt7603_vif *)vif->drv_priv;
650 wcid = &mvif->sta.wcid;
651 }
652
653 mt76_tx(&dev->mt76, control->sta, wcid, skb);
654 }
655
656 const struct ieee80211_ops mt7603_ops = {
657 .tx = mt7603_tx,
658 .start = mt7603_start,
659 .stop = mt7603_stop,
660 .add_interface = mt7603_add_interface,
661 .remove_interface = mt7603_remove_interface,
662 .config = mt7603_config,
663 .configure_filter = mt7603_configure_filter,
664 .bss_info_changed = mt7603_bss_info_changed,
665 .sta_state = mt76_sta_state,
666 .set_key = mt7603_set_key,
667 .conf_tx = mt7603_conf_tx,
668 .sw_scan_start = mt76_sw_scan,
669 .sw_scan_complete = mt76_sw_scan_complete,
670 .flush = mt7603_flush,
671 .ampdu_action = mt7603_ampdu_action,
672 .get_txpower = mt76_get_txpower,
673 .wake_tx_queue = mt76_wake_tx_queue,
674 .sta_rate_tbl_update = mt7603_sta_rate_tbl_update,
675 .release_buffered_frames = mt7603_release_buffered_frames,
676 .set_coverage_class = mt7603_set_coverage_class,
677 .set_tim = mt76_set_tim,
678 .get_survey = mt76_get_survey,
679 };
680
681 MODULE_LICENSE("Dual BSD/GPL");
682
683 static int __init mt7603_init(void)
684 {
685 int ret;
686
687 ret = platform_driver_register(&mt76_wmac_driver);
688 if (ret)
689 return ret;
690
691 #ifdef CONFIG_PCI
692 ret = pci_register_driver(&mt7603_pci_driver);
693 if (ret)
694 platform_driver_unregister(&mt76_wmac_driver);
695 #endif
696 return ret;
697 }
698
699 static void __exit mt7603_exit(void)
700 {
701 #ifdef CONFIG_PCI
702 pci_unregister_driver(&mt7603_pci_driver);
703 #endif
704 platform_driver_unregister(&mt76_wmac_driver);
705 }
706
707 module_init(mt7603_init);
708 module_exit(mt7603_exit);