This source file includes following definitions.
- qtnf_chip_id_get
1
2
3
4 #ifndef _QTN_HW_IDS_H_
5 #define _QTN_HW_IDS_H_
6
7 #include <linux/pci_ids.h>
8
9 #define PCIE_VENDOR_ID_QUANTENNA (0x1bb5)
10
11
12
13 #define PCIE_DEVICE_ID_QSR (0x0008)
14
15 #define QTN_REG_SYS_CTRL_CSR 0x14
16 #define QTN_CHIP_ID_MASK 0xF0
17 #define QTN_CHIP_ID_TOPAZ 0x40
18 #define QTN_CHIP_ID_PEARL 0x50
19 #define QTN_CHIP_ID_PEARL_B 0x60
20 #define QTN_CHIP_ID_PEARL_C 0x70
21
22
23
24 #define QTN_PCI_PEARL_FW_NAME "qtn/fmac_qsr10g.img"
25 #define QTN_PCI_TOPAZ_FW_NAME "qtn/fmac_qsr1000.img"
26 #define QTN_PCI_TOPAZ_BOOTLD_NAME "qtn/uboot_qsr1000.img"
27
28 static inline unsigned int qtnf_chip_id_get(const void __iomem *regs_base)
29 {
30 u32 board_rev = readl(regs_base + QTN_REG_SYS_CTRL_CSR);
31
32 return board_rev & QTN_CHIP_ID_MASK;
33 }
34
35 #endif