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6 #ifndef _BRCMU_D11_H_
7 #define _BRCMU_D11_H_
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10 #define BRCMU_D11N_IOTYPE 1
11 #define BRCMU_D11AC_IOTYPE 2
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19 #define BRCMU_CHSPEC_INVALID 255
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23 #define BRCMU_CHSPEC_CH_MASK 0x00ff
24 #define BRCMU_CHSPEC_CH_SHIFT 0
25 #define BRCMU_CHSPEC_CHL_MASK 0x000f
26 #define BRCMU_CHSPEC_CHL_SHIFT 0
27 #define BRCMU_CHSPEC_CHH_MASK 0x00f0
28 #define BRCMU_CHSPEC_CHH_SHIFT 4
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36 #define BRCMU_CHSPEC_D11N_SB_MASK 0x0300
37 #define BRCMU_CHSPEC_D11N_SB_SHIFT 8
38 #define BRCMU_CHSPEC_D11N_SB_L 0x0100
39 #define BRCMU_CHSPEC_D11N_SB_U 0x0200
40 #define BRCMU_CHSPEC_D11N_SB_N 0x0300
41 #define BRCMU_CHSPEC_D11N_BW_MASK 0x0c00
42 #define BRCMU_CHSPEC_D11N_BW_SHIFT 10
43 #define BRCMU_CHSPEC_D11N_BW_10 0x0400
44 #define BRCMU_CHSPEC_D11N_BW_20 0x0800
45 #define BRCMU_CHSPEC_D11N_BW_40 0x0c00
46 #define BRCMU_CHSPEC_D11N_BND_MASK 0x3000
47 #define BRCMU_CHSPEC_D11N_BND_SHIFT 12
48 #define BRCMU_CHSPEC_D11N_BND_5G 0x1000
49 #define BRCMU_CHSPEC_D11N_BND_2G 0x2000
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56 #define BRCMU_CHSPEC_D11AC_SB_MASK 0x0700
57 #define BRCMU_CHSPEC_D11AC_SB_SHIFT 8
58 #define BRCMU_CHSPEC_D11AC_SB_LLL 0x0000
59 #define BRCMU_CHSPEC_D11AC_SB_LLU 0x0100
60 #define BRCMU_CHSPEC_D11AC_SB_LUL 0x0200
61 #define BRCMU_CHSPEC_D11AC_SB_LUU 0x0300
62 #define BRCMU_CHSPEC_D11AC_SB_ULL 0x0400
63 #define BRCMU_CHSPEC_D11AC_SB_ULU 0x0500
64 #define BRCMU_CHSPEC_D11AC_SB_UUL 0x0600
65 #define BRCMU_CHSPEC_D11AC_SB_UUU 0x0700
66 #define BRCMU_CHSPEC_D11AC_SB_LL BRCMU_CHSPEC_D11AC_SB_LLL
67 #define BRCMU_CHSPEC_D11AC_SB_LU BRCMU_CHSPEC_D11AC_SB_LLU
68 #define BRCMU_CHSPEC_D11AC_SB_UL BRCMU_CHSPEC_D11AC_SB_LUL
69 #define BRCMU_CHSPEC_D11AC_SB_UU BRCMU_CHSPEC_D11AC_SB_LUU
70 #define BRCMU_CHSPEC_D11AC_SB_L BRCMU_CHSPEC_D11AC_SB_LLL
71 #define BRCMU_CHSPEC_D11AC_SB_U BRCMU_CHSPEC_D11AC_SB_LLU
72 #define BRCMU_CHSPEC_D11AC_BW_MASK 0x3800
73 #define BRCMU_CHSPEC_D11AC_BW_SHIFT 11
74 #define BRCMU_CHSPEC_D11AC_BW_5 0x0000
75 #define BRCMU_CHSPEC_D11AC_BW_10 0x0800
76 #define BRCMU_CHSPEC_D11AC_BW_20 0x1000
77 #define BRCMU_CHSPEC_D11AC_BW_40 0x1800
78 #define BRCMU_CHSPEC_D11AC_BW_80 0x2000
79 #define BRCMU_CHSPEC_D11AC_BW_160 0x2800
80 #define BRCMU_CHSPEC_D11AC_BW_8080 0x3000
81 #define BRCMU_CHSPEC_D11AC_BND_MASK 0xc000
82 #define BRCMU_CHSPEC_D11AC_BND_SHIFT 14
83 #define BRCMU_CHSPEC_D11AC_BND_2G 0x0000
84 #define BRCMU_CHSPEC_D11AC_BND_3G 0x4000
85 #define BRCMU_CHSPEC_D11AC_BND_4G 0x8000
86 #define BRCMU_CHSPEC_D11AC_BND_5G 0xc000
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88 #define BRCMU_CHAN_BAND_2G 0
89 #define BRCMU_CHAN_BAND_5G 1
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91 enum brcmu_chan_bw {
92 BRCMU_CHAN_BW_20,
93 BRCMU_CHAN_BW_40,
94 BRCMU_CHAN_BW_80,
95 BRCMU_CHAN_BW_80P80,
96 BRCMU_CHAN_BW_160,
97 };
98
99 enum brcmu_chan_sb {
100 BRCMU_CHAN_SB_NONE = -1,
101 BRCMU_CHAN_SB_LLL,
102 BRCMU_CHAN_SB_LLU,
103 BRCMU_CHAN_SB_LUL,
104 BRCMU_CHAN_SB_LUU,
105 BRCMU_CHAN_SB_ULL,
106 BRCMU_CHAN_SB_ULU,
107 BRCMU_CHAN_SB_UUL,
108 BRCMU_CHAN_SB_UUU,
109 BRCMU_CHAN_SB_L = BRCMU_CHAN_SB_LLL,
110 BRCMU_CHAN_SB_U = BRCMU_CHAN_SB_LLU,
111 BRCMU_CHAN_SB_LL = BRCMU_CHAN_SB_LLL,
112 BRCMU_CHAN_SB_LU = BRCMU_CHAN_SB_LLU,
113 BRCMU_CHAN_SB_UL = BRCMU_CHAN_SB_LUL,
114 BRCMU_CHAN_SB_UU = BRCMU_CHAN_SB_LUU,
115 };
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130 struct brcmu_chan {
131 u16 chspec;
132 u8 chnum;
133 u8 control_ch_num;
134 u8 band;
135 enum brcmu_chan_bw bw;
136 enum brcmu_chan_sb sb;
137 };
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147 struct brcmu_d11inf {
148 u8 io_type;
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150 void (*encchspec)(struct brcmu_chan *ch);
151 void (*decchspec)(struct brcmu_chan *ch);
152 };
153
154 void brcmu_d11_attach(struct brcmu_d11inf *d11inf);
155
156 #endif