This source file includes following definitions.
- mcs_2_txstreams
- mcs_2_rate
- rspec_active
- rspec_phytxbyte2
- rspec_get_bw
- rspec_issgi
- rspec_is40mhz
- rspec2rate
- rspec_mimoplcp3
- plcp3_issgi
- rspec_stc
- rspec_stf
- is_mcs_rate
- is_ofdm_rate
- is_cck_rate
- is_single_stream
- cck_rspec
- ofdm_phy2mac_rate
- cck_phy2mac_rate
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17 #ifndef _BRCM_RATE_H_
18 #define _BRCM_RATE_H_
19
20 #include "types.h"
21 #include "d11.h"
22 #include "phy_hal.h"
23
24 extern const u8 rate_info[];
25 extern const struct brcms_c_rateset cck_ofdm_mimo_rates;
26 extern const struct brcms_c_rateset ofdm_mimo_rates;
27 extern const struct brcms_c_rateset cck_ofdm_rates;
28 extern const struct brcms_c_rateset ofdm_rates;
29 extern const struct brcms_c_rateset cck_rates;
30 extern const struct brcms_c_rateset gphy_legacy_rates;
31 extern const struct brcms_c_rateset rate_limit_1_2;
32
33 struct brcms_mcs_info {
34
35 u32 phy_rate_20;
36
37 u32 phy_rate_40;
38
39 u32 phy_rate_20_sgi;
40
41 u32 phy_rate_40_sgi;
42
43 u8 tx_phy_ctl3;
44
45 u8 leg_ofdm;
46 };
47
48 #define BRCMS_MAXMCS 32
49 #define MCS_TABLE_SIZE 33
50 extern const struct brcms_mcs_info mcs_table[];
51
52 #define MCS_TXS_MASK 0xc0
53 #define MCS_TXS_SHIFT 6
54
55
56 static inline u8 mcs_2_txstreams(u8 mcs)
57 {
58 return (mcs_table[mcs].tx_phy_ctl3 & MCS_TXS_MASK) >> MCS_TXS_SHIFT;
59 }
60
61 static inline uint mcs_2_rate(u8 mcs, bool is40, bool sgi)
62 {
63 if (sgi) {
64 if (is40)
65 return mcs_table[mcs].phy_rate_40_sgi;
66 return mcs_table[mcs].phy_rate_20_sgi;
67 }
68 if (is40)
69 return mcs_table[mcs].phy_rate_40;
70
71 return mcs_table[mcs].phy_rate_20;
72 }
73
74
75 #define BRCMS_RATE_MASK_FULL 0xff
76
77
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84
85
86
87 #define RSPEC_RATE_MASK 0x0000007F
88
89 #define RSPEC_MIMORATE 0x08000000
90
91 #define RSPEC_BW_MASK 0x00000700
92
93 #define RSPEC_BW_SHIFT 8
94
95 #define RSPEC_STF_MASK 0x00003800
96
97 #define RSPEC_STF_SHIFT 11
98
99 #define RSPEC_CT_MASK 0x0000C000
100
101 #define RSPEC_CT_SHIFT 14
102
103 #define RSPEC_STC_MASK 0x00300000
104
105 #define RSPEC_STC_SHIFT 20
106
107 #define RSPEC_LDPC_CODING 0x00400000
108
109 #define RSPEC_SHORT_GI 0x00800000
110
111 #define RSPEC_OVERRIDE 0x80000000
112
113 #define RSPEC_OVERRIDE_MCS_ONLY 0x40000000
114
115 static inline bool rspec_active(u32 rspec)
116 {
117 return rspec & (RSPEC_RATE_MASK | RSPEC_MIMORATE);
118 }
119
120 static inline u8 rspec_phytxbyte2(u32 rspec)
121 {
122 return (rspec & 0xff00) >> 8;
123 }
124
125 static inline u32 rspec_get_bw(u32 rspec)
126 {
127 return (rspec & RSPEC_BW_MASK) >> RSPEC_BW_SHIFT;
128 }
129
130 static inline bool rspec_issgi(u32 rspec)
131 {
132 return (rspec & RSPEC_SHORT_GI) == RSPEC_SHORT_GI;
133 }
134
135 static inline bool rspec_is40mhz(u32 rspec)
136 {
137 u32 bw = rspec_get_bw(rspec);
138
139 return bw == PHY_TXC1_BW_40MHZ || bw == PHY_TXC1_BW_40MHZ_DUP;
140 }
141
142 static inline uint rspec2rate(u32 rspec)
143 {
144 if (rspec & RSPEC_MIMORATE)
145 return mcs_2_rate(rspec & RSPEC_RATE_MASK, rspec_is40mhz(rspec),
146 rspec_issgi(rspec));
147 return rspec & RSPEC_RATE_MASK;
148 }
149
150 static inline u8 rspec_mimoplcp3(u32 rspec)
151 {
152 return (rspec & 0xf00000) >> 16;
153 }
154
155 static inline bool plcp3_issgi(u8 plcp)
156 {
157 return (plcp & (RSPEC_SHORT_GI >> 16)) != 0;
158 }
159
160 static inline uint rspec_stc(u32 rspec)
161 {
162 return (rspec & RSPEC_STC_MASK) >> RSPEC_STC_SHIFT;
163 }
164
165 static inline uint rspec_stf(u32 rspec)
166 {
167 return (rspec & RSPEC_STF_MASK) >> RSPEC_STF_SHIFT;
168 }
169
170 static inline bool is_mcs_rate(u32 ratespec)
171 {
172 return (ratespec & RSPEC_MIMORATE) != 0;
173 }
174
175 static inline bool is_ofdm_rate(u32 ratespec)
176 {
177 return !is_mcs_rate(ratespec) &&
178 (rate_info[ratespec & RSPEC_RATE_MASK] & BRCMS_RATE_FLAG);
179 }
180
181 static inline bool is_cck_rate(u32 ratespec)
182 {
183 u32 rate = (ratespec & BRCMS_RATE_MASK);
184
185 return !is_mcs_rate(ratespec) && (
186 rate == BRCM_RATE_1M || rate == BRCM_RATE_2M ||
187 rate == BRCM_RATE_5M5 || rate == BRCM_RATE_11M);
188 }
189
190 static inline bool is_single_stream(u8 mcs)
191 {
192 return mcs <= HIGHEST_SINGLE_STREAM_MCS || mcs == 32;
193 }
194
195 static inline u8 cck_rspec(u8 cck)
196 {
197 return cck & RSPEC_RATE_MASK;
198 }
199
200
201
202 static inline u8 ofdm_phy2mac_rate(u8 rlpt)
203 {
204 return wlc_phy_get_ofdm_rate_lookup()[rlpt & 0x7];
205 }
206
207 static inline u8 cck_phy2mac_rate(u8 signal)
208 {
209 return signal/5;
210 }
211
212
213 #define BRCMS_RATES_CCK_OFDM 0
214 #define BRCMS_RATES_CCK 1
215 #define BRCMS_RATES_OFDM 2
216
217
218
219 bool brcms_c_rate_hwrs_filter_sort_validate(struct brcms_c_rateset *rs,
220 const struct brcms_c_rateset *hw_rs,
221 bool check_brate, u8 txstreams);
222
223 void brcms_c_rateset_copy(const struct brcms_c_rateset *src,
224 struct brcms_c_rateset *dst);
225
226
227 u32 brcms_c_compute_rspec(struct d11rxhdr *rxh, u8 *plcp);
228
229 void brcms_c_rateset_filter(struct brcms_c_rateset *src,
230 struct brcms_c_rateset *dst, bool basic_only,
231 u8 rates, uint xmask, bool mcsallow);
232
233 void brcms_c_rateset_default(struct brcms_c_rateset *rs_tgt,
234 const struct brcms_c_rateset *rs_hw, uint phy_type,
235 int bandtype, bool cck_only, uint rate_mask,
236 bool mcsallow, u8 bw, u8 txstreams);
237
238 s16 brcms_c_rate_legacy_phyctl(uint rate);
239
240 void brcms_c_rateset_mcs_upd(struct brcms_c_rateset *rs, u8 txstreams);
241 void brcms_c_rateset_mcs_clear(struct brcms_c_rateset *rateset);
242 void brcms_c_rateset_mcs_build(struct brcms_c_rateset *rateset, u8 txstreams);
243 void brcms_c_rateset_bw_mcs_filter(struct brcms_c_rateset *rateset, u8 bw);
244
245 #endif